Power conversion device and program

Abstract

To provide a power conversion device capable of reducing the number of components, and to provide a program applied to the power conversion device.SOLUTION: A power conversion device 10 comprises a reactor 20, an upper arm first diode DH1, an upper arm second diode DH2, a lower arm first switch QL1, a lower arm second switch QL2, and an intermediate circuit 30. The intermediate circuit 30 comprises a first intermediate capacitor 31, a second intermediate capacitor 32, a first restriction diode 41, a second restriction diode 42, and a connection diode DS. The intermediate circuit 30 is configured such that the intermediate capacitors 31 and 32 are series-connected at charging of the intermediate capacitors 31 and 32 and the intermediate capacitors 31 and 32 are parallel-connected at discharging of the intermediate capacitors 31 and 32.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a power conversion device that transforms a voltage input from an input terminal and outputs the transformed voltage from an output terminal, and a program that is applied to the power conversion device. [Background technology]

[0002] Known as this type of power conversion device is a boost converter that uses LC resonance to achieve a boost ratio of 1.5, as described in Patent Document 1. More specifically, the boost converter shown in Figure 5 of Patent Document 1 includes four switches, four diodes, two reactors, and five capacitors. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] U.S. Patent No. 10,637,352 Summary of the Invention [Problem to be solved by the invention]

[0004] Due to space limitations in the installation location of a power conversion device, miniaturization of the power conversion device is required, and therefore it is desirable to reduce the number of passive elements, including reactors, and semiconductor elements, including switches.

[0005] A main object of the present invention is to provide a power conversion device that can reduce the number of components and a program that can be applied to the power conversion device. [Means for solving the problem]

[0006] The present invention provides a power conversion device that transforms a voltage input from an input terminal and outputs the transformed voltage from an output terminal, a series connection of an upper arm first semiconductor portion and an upper arm second semiconductor portion; a series connection of a lower arm first semiconductor portion and a lower arm second semiconductor portion; an intermediate circuit connecting an upper arm connection point, which is a connection point between the upper arm first semiconductor portion and the upper arm second semiconductor portion, and a lower arm connection point, which is a connection point between the lower arm first semiconductor portion and the lower arm second semiconductor portion; a reactor connecting a connection point between the series-connected body of the upper arm first semiconductor portion and the upper arm second semiconductor portion and the series-connected body of the lower arm first semiconductor portion and the lower arm second semiconductor portion and the input terminal, between the upper arm connection point and the intermediate circuit, or between the lower arm connection point and the intermediate circuit; Equipped with The intermediate circuit has a plurality of intermediate capacitors and rectifying elements, and is configured so that the connection state of each of the intermediate capacitors can be switched between a series connection state and a parallel connection state.

[0007] The present invention can be embodied as a power conversion device having a boost function, for example, as follows.

[0008] A power conversion device that boosts a voltage input from a high potential side input terminal and a low potential side input terminal as the input terminals, and outputs the boosted voltage from a high potential side output terminal and a low potential side output terminal as the output terminals, the upper arm first semiconductor portion is an upper arm first diode portion, the upper arm second semiconductor portion is an upper arm second diode portion, the lower arm first semiconductor unit is a lower arm first switch unit, the lower arm second semiconductor unit is a lower arm second switch unit, the high potential side output terminal is connected to the cathode of the upper arm first diode section, a high potential side of both ends of the lower arm first switch section is connected to an anode of the upper arm second diode section; the low potential side output terminal and the low potential side input terminal are connected to the low potential side of both ends of the lower arm second switch section, The reactor is provided in an electrical path connecting the high potential side input terminal and the high potential side of the lower arm first switch section, an electrical path connecting the upper arm connection point and the intermediate circuit, or an electrical path connecting the lower arm connection point and the intermediate circuit.

[0009] The present invention can be embodied as a power conversion device having a boost function, for example, as follows.

[0010] A power conversion device that boosts a voltage input from a high potential side input terminal and a low potential side input terminal as the input terminals, and outputs the boosted voltage from a high potential side output terminal and a low potential side output terminal as the output terminals, the upper arm first semiconductor unit is an upper arm first switch unit, the upper arm second semiconductor unit is an upper arm second switch unit, the lower arm first semiconductor unit is a lower arm first switch unit, the lower arm second semiconductor unit is a lower arm second switch unit, the high potential side output terminal is connected to a high potential side of both ends of the upper arm first switch section, a low potential side of one of both ends of the upper arm second switch section is connected to a high potential side of one of both ends of the lower arm first switch section; the low potential side output terminal and the low potential side input terminal are connected to the low potential side of both ends of the lower arm first switch section, The reactor is provided in an electrical path connecting the high potential side input terminal and the high potential side of the lower arm first switch section, an electrical path connecting the upper arm connection point and the intermediate circuit, or an electrical path connecting the lower arm connection point and the intermediate circuit.

[0011] The present invention can also be embodied as a power conversion device having a step-down function, for example, as follows.

[0012] A power conversion device that steps down a voltage input from a high potential side input terminal and a low potential side input terminal as the input terminals, and outputs the voltage from a high potential side output terminal and a low potential side output terminal as the output terminals, the upper arm first semiconductor unit is an upper arm first switch unit, the upper arm second semiconductor unit is an upper arm second switch unit, the lower arm first semiconductor portion is a lower arm first diode portion, the lower arm second semiconductor portion is a lower arm second diode portion, the high potential side input terminal is connected to a high potential side of both ends of the upper arm first switch section, a cathode of the lower arm first diode section is connected to a lower potential side of both ends of the upper arm second switch section; the low potential side input terminal and the low potential side output terminal are connected to an anode of the lower arm second diode section, The reactor is provided in an electrical path connecting the high potential side output terminal and the cathode of the lower arm first diode section, an electrical path connecting the upper arm connection point and the intermediate circuit, or an electrical path connecting the lower arm connection point and the intermediate circuit.

[0013] According to the present invention, it is possible to reduce the number of switch units and reactors, which are relatively large among the components of a power conversion device, and to achieve a reduction in the size of the power conversion device. [Brief explanation of the drawings]

[0014] [Figure 1] 1 is a configuration diagram of a power conversion device according to a first embodiment. [Figure 2] 4 is a time chart showing the driving state of a switch, changes in current, voltage, etc. [Figure 3] FIG. 10 is a diagram showing the current flow state in Mode 1. [Figure 4] FIG. 10 is a diagram showing the current flow state in Mode 2. [Figure 5] FIG. [Figure 6]FIG. 10 is a configuration diagram of a power conversion device according to a second embodiment. [Figure 7] 4 is a time chart showing the driving state of a switch, changes in current, voltage, etc. [Figure 8] FIG. 10 is a diagram showing the current flow state in Mode 1. [Figure 9] FIG. 10 is a diagram showing the current flow state in Mode 2. [Figure 10] 10 is a flowchart showing a procedure for boost control according to a third embodiment. [Figure 11] 4 is a time chart showing the transition of the drive state of the switch, the current, the voltage, etc. in the first voltage step-up control. [Figure 12] FIG. 10 is a diagram showing the current flow state in Mode 2. [Figure 13] FIG. 10 is a diagram showing the current flow state in Mode 4. [Figure 14] FIG. 10 is a diagram showing the current flow state in Mode 3. [Figure 15] 5 is a time chart showing the transition of the drive state of the switch, the current, the voltage, etc. in the second voltage step-up control. [Figure 16] 6 is a time chart showing the transition of the drive state of the switch, the current, the voltage, etc. in the third boost control. [Figure 17] FIG. 10 is a diagram showing the current flow state in Mode 1. [Figure 18] FIG. 10 is a configuration diagram of a power conversion device according to a fourth embodiment. [Figure 19] 4 is a time chart showing the driving state of a switch, changes in current, voltage, etc. [Figure 20] FIG. 10 is a diagram showing the current flow state in Mode 1. [Figure 21] FIG. 10 is a diagram showing the current flow state in Mode 2-1. [Figure 22] FIG. 10 is a diagram showing the current flow state in Mode 2-2. [Figure 23] FIG. 10 is a diagram showing the current flow state in Mode 3. [Figure 24] FIG. 10 is a diagram showing the current flow state in Mode 4-1. [Figure 25]FIG. 10 is a diagram showing the current flow state in Mode 4-2. [Figure 26] FIG. 10 is a configuration diagram of a power conversion device according to a fifth embodiment. [Figure 27] 4 is a time chart showing the driving state of a switch, changes in current, voltage, etc. [Figure 28] FIG. 10 is a diagram showing the current flow state in Mode 1. [Figure 29] FIG. 10 is a diagram showing the current flow state in Mode 2. [Figure 30] FIG. 10 is a configuration diagram of a power conversion device according to a sixth embodiment. [Figure 31] 4 is a time chart showing the driving state of a switch, changes in current, voltage, etc. [Figure 32] FIG. 10 is a diagram showing the current flow state in Mode 1. [Figure 33] FIG. 10 is a diagram showing the current flow state in Mode 2. [Figure 34] 13 is a flowchart showing a procedure for voltage reduction control according to the seventh embodiment. [Figure 35] 4 is a time chart showing the transition of the drive state of the switch, current, voltage, etc. in the first step-down control. [Figure 36] FIG. 10 is a diagram showing the current flow state in Mode 1. [Figure 37] FIG. 10 is a diagram showing the current flow state in Mode 2. [Figure 38] FIG. 10 is a diagram showing the current flow state in Mode 3. [Figure 39] 5 is a time chart showing the transition of the drive state of the switch, the current, the voltage, etc. in the second step-down control. [Figure 40] 6 is a time chart showing the transition of the drive state of the switch, the current, the voltage, etc. in the third step-down control. [Figure 41] FIG. 10 is a diagram showing the current flow state in Mode 4. [Figure 42] FIG. 13 is a configuration diagram of a power conversion device according to an eighth embodiment. [Figure 43] 4 is a flowchart showing a procedure for voltage boost control. [Figure 44]4 is a time chart showing the transition of the drive state of the switch, current, voltage, etc. under low boost control. [Figure 45] FIG. 10 is a diagram showing a current flow state in Mode A of low boost control. [Figure 46] FIG. 10 is a diagram showing a current flow state in Mode B of low boost control. [Figure 47] 5 is a time chart showing the transition of the drive state of the switch, current, voltage, etc. during medium boost control. [Figure 48] FIG. 10 is a diagram showing a current flow state in Mode A of the medium boost control. [Figure 49] FIG. 10 is a diagram showing a current flow state in Mode B of the medium boost control. [Figure 50] 10 is a time chart showing the transition of the drive state of the switch, the current, the voltage, etc. in the medium step-up control according to the modified example. [Figure 51] FIG. 10 is a diagram showing a current flow state in Mode A of the medium boost control according to the modified example. [Figure 52] FIG. 10 is a diagram showing a current flow state in Mode B of the medium boost control according to the modified example. [Figure 53] 4 is a time chart showing the transition of the drive state of the switch, current, voltage, etc. during high boost control. [Figure 54] FIG. 10 is a diagram showing a current flow state in Mode A of high boost control. [Figure 55] FIG. 10 is a diagram showing a current flow state in Mode B of high boost control. [Figure 56] FIG. 13 is a configuration diagram of a power conversion device according to a modified example of the eighth embodiment. [Figure 57] FIG. 13 is a configuration diagram of a power conversion device according to a ninth embodiment. [Figure 58] 4 is a flowchart showing a procedure for voltage step-down control. [Figure 59] 4 is a time chart showing the transition of the drive state of the switch, current, voltage, etc. during low step-down control. [Figure 60] FIG. 10 is a diagram showing a current flow state in Mode A of low step-down control. [Figure 61] FIG. 10 is a diagram showing a current flow state in Mode B of low step-down control. [Figure 62] 4 is a time chart showing the transition of the drive state of the switch, current, voltage, etc. in the medium step-down control. [Figure 63] FIG. 10 is a diagram showing a current flow state in Mode A of medium step-down control. [Figure 64] FIG. 10 is a diagram showing a current flow state in Mode B of medium step-down control. [Figure 65] 10 is a time chart showing the transition of the drive state of the switch, the current, the voltage, etc. in the medium step-down control according to the modified example. [Figure 66] FIG. 10 is a diagram showing a current flow state in Mode A of the medium step-down control according to the modified example. [Figure 67] FIG. 10 is a diagram showing a current flow state in Mode B of the medium step-down control according to the modified example. [Figure 68] 4 is a time chart showing the transition of the drive state of the switch, the current, the voltage, etc. in high step-down control. [Figure 69] FIG. 10 is a diagram showing a current flow state in Mode A of high step-down control. [Figure 70] FIG. 10 is a diagram showing a current flow state in Mode B of high step-down control. [Figure 71] FIG. 13 is a configuration diagram of a power conversion device according to a modification of the ninth embodiment. [Figure 72] FIG. 20 is a configuration diagram of a power conversion device according to a tenth embodiment. [Figure 73] FIG. 23 is a configuration diagram of a power conversion device according to a modification of the tenth embodiment. [Figure 74] FIG. 22 is a configuration diagram of a power conversion device according to an eleventh embodiment. [Figure 75] 4 is a time chart showing the transition of the drive state of the switch, the current, the voltage, etc. in high step-down control. [Figure 76] FIG. 10 is a diagram showing a current flow state in Mode B of high step-down control. [Figure 77] FIG. 10 is a diagram showing a current flow state in Mode D1 of high step-down control. [Figure 78] FIG. 10 is a diagram showing a current flow state in Mode A of high step-down control. [Figure 79]FIG. 23 is a graph showing power conversion efficiencies of the eleventh embodiment and a comparative example. [Figure 80] FIG. 23 is a configuration diagram of a power conversion device according to a modification of the eleventh embodiment. [Figure 81] FIG. 23 is a configuration diagram of a power conversion device according to a modification of the eleventh embodiment. [Figure 82] FIG. 23 is a configuration diagram of a power conversion device according to a modification of the eleventh embodiment. [Figure 83] FIG. 23 is a configuration diagram of a power conversion device according to a modification of the eleventh embodiment. [Figure 84] FIG. 23 is a configuration diagram of a power conversion device according to a modification of the eleventh embodiment. [Figure 85] FIG. 23 is a configuration diagram of a power conversion device according to a modification of the eleventh embodiment. [Figure 86] FIG. 23 is a configuration diagram of a power conversion device according to a modification of the eleventh embodiment. [Figure 87] FIG. 23 is a configuration diagram of a power conversion device according to a modification of the eleventh embodiment. [Figure 88] FIG. 23 is a configuration diagram of a power conversion device according to a modification of the eleventh embodiment. [Figure 89] FIG. 23 is a configuration diagram of a power conversion device according to a modification of the eleventh embodiment. [Figure 90] FIG. 23 is a configuration diagram of a power conversion device according to a modification of the eleventh embodiment. [Figure 91] FIG. 10 is a configuration diagram of a power conversion device according to another embodiment. [Figure 92] FIG. 10 is a configuration diagram of a power conversion device according to another embodiment. [Figure 93] FIG. 10 is a configuration diagram of a power conversion device according to another embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0015] First Embodiment A first embodiment of a power conversion device according to the present invention will be described below with reference to the drawings. The power conversion device is mounted on a moving object such as a vehicle, an aircraft, or a ship. The vehicle may be, for example, a hybrid vehicle equipped with a rotating electric machine and an engine, or an electric vehicle equipped with only the rotating electric machine of the rotating electric machine and engine.

[0016] 1, the power conversion device 10 includes a reactor 20, a first capacitor 21, a lower-arm first switch QL1 (corresponding to a "lower-arm first switch section"), and a lower-arm second switch QL2 (corresponding to a "lower-arm second switch section"). In this embodiment, the lower-arm first switch QL1 and the lower-arm second switch QL2 are N-channel MOSFETs having body diodes.

[0017] A first high potential side terminal TH1 of the power conversion device 10 is connected to a first end of the reactor 20 and a first end of the first capacitor 21. A drain of the lower-arm first switch QL1 is connected to a second end of the reactor 20, and a drain of the lower-arm second switch QL2 is connected to a source of the lower-arm first switch QL1. A second end of the first capacitor 21 and a first low potential side terminal TL1 of the power conversion device 10 are connected to the source of the lower-arm second switch QL2. Each of the terminals TH1 and TL1 is connected to, for example, a DC side terminal of an AC / DC converter or a secondary battery. The secondary battery is, for example, a lithium-ion battery or a nickel-metal hydride battery.

[0018] The power conversion device 10 includes an upper-arm first diode DH1 (corresponding to the "upper-arm first diode section"), an upper-arm second diode DH2 (corresponding to the "upper-arm second diode section"), and a second capacitor 22. A cathode of the upper-arm first diode DH1 is connected to a second high-potential side terminal TH2 of the power conversion device 10 and a first end of the second capacitor 22. A second end of the second capacitor 22 is connected to a second low-potential side terminal TL2 of the power conversion device 10 and a source of the lower-arm second switch QL2. A cathode of the upper-arm first diode DH1 is connected to a cathode of the upper-arm second diode DH2. A drain of the lower-arm first switch QL1 is connected to an anode of the upper-arm second diode DH2. Each of the terminals TH2 and TL2 is connected to, for example, a DC side terminal of an AC / DC converter or a secondary battery. The secondary battery is, for example, a lithium-ion battery or a nickel-metal hydride battery. In this embodiment, the rated voltage (e.g., 450 V) of the DC side terminal of the AC / DC converter or the secondary battery connected to the second high potential side terminal TH2 and the second low potential side terminal TL2 is higher than the rated voltage (e.g., 300 V) of the DC side terminal of the AC / DC converter or the secondary battery connected to the first high potential side terminal TH1 and the first low potential side terminal TL1.

[0019] The power conversion device 10 includes an intermediate circuit 30. The intermediate circuit 30 includes a first intermediate capacitor 31, a second intermediate capacitor 32, a first regulating diode 41, a second regulating diode 42, and a connecting diode DS. An anode of the upper-arm first diode DH1 and a cathode of the upper-arm second diode DH2 are connected to a first end of the first intermediate capacitor 31 and a cathode of the second regulating diode 42. A cathode of the first regulating diode 41 and an anode of the connecting diode DS are connected to a second end of the first intermediate capacitor 31. A cathode of the connecting diode DS and a first end of the second intermediate capacitor 32 are connected to an anode of the second regulating diode 42. A source of the lower-arm first switch QL1 and a drain of the lower-arm second switch QL2 are connected to a second end of the second intermediate capacitor 32 and an anode of the first regulating diode 41.

[0020] The power conversion device 10 includes a first voltage sensor 51 and a second voltage sensor 52. The first voltage sensor 51 detects the voltage across the terminals of the first capacitor 21, and the second voltage sensor 52 detects the voltage across the terminals of the second capacitor 22. The detected values ​​of the voltage sensors 51 and 52 are input to a control device 60 included in the power conversion device 10.

[0021] The control device 60 is primarily composed of a microcomputer, which includes a CPU. The functions provided by the microcomputer can be provided by software stored in a physical memory device and a computer executing the software, software alone, hardware alone, or a combination of these. For example, when the microcomputer is provided by a hardware electronic circuit, the function can be provided by a digital circuit including multiple logic circuits or an analog circuit. For example, the microcomputer executes a program stored in a non-transitory tangible storage medium serving as a memory unit of the microcomputer. The program includes, for example, a power conversion processing program described below. Execution of the program results in the execution of a method corresponding to the program. The memory unit is, for example, a non-volatile memory. The program stored in the memory unit can be updated via a communication network such as the Internet, for example, via OTA (Over the Air) or other means. The control device 60 performs switching control of the lower arm first switch QL1 and the lower arm second switch QL2, thereby performing power conversion processing to boost the voltage input from the first high potential side terminal TH1 (corresponding to the "high potential side input terminal") and the first low potential side terminal TL1 (corresponding to the "low potential side input terminal") and output it from the second high potential side terminal TH2 (corresponding to the "high potential side output terminal") and the second low potential side terminal TL2 (corresponding to the "low potential side output terminal").

[0022] Next, the power conversion process will be described with reference to FIG. 2. In FIG. 2(a), the solid line indicates the transition of the low-voltage side voltage VL detected by the first voltage sensor 51, and the dashed line indicates the transition of the high-voltage side voltage VH detected by the second voltage sensor 52. FIG. 2(b) indicates the transition of the intermediate current iCf flowing from the connection point of the upper-arm first diode DH1 and the upper-arm second diode DH2 to the intermediate circuit 30, and FIG. 2(c) indicates the transition of the reactor current iL flowing through the reactor 20. In FIG. 2(d), the solid line indicates the transition of the drive state of the lower-arm first switch QL1, and the dashed line indicates the transition of the drive state of the lower-arm second switch QL2. In FIG. 2(e), the solid line indicates the transition of the inter-terminal voltage VDH1 of the upper-arm first diode DH1, and the dashed line indicates the transition of the inter-terminal voltage VDH2 of the upper-arm second diode DH2. In Fig. 2(f), the solid line indicates the transition of the terminal voltage VQL1 (drain-to-source voltage) of the first lower-arm switch QL1, and the dashed line indicates the transition of the terminal voltage VQL2 of the second lower-arm switch QL2. In Fig. 2, the signs of the currents and voltages are positive in the direction of the arrows shown in Fig. 1.

[0023] The control device 60 performs a power conversion process by alternately repeating Mode 1 and Mode 2. During Mode 1, the lower-arm second switch QL2 is turned on and the lower-arm first switch QL1 is turned off. During Mode 2, the lower-arm first switch QL1 is turned on and the lower-arm second switch QL2 is turned off.

[0024] 3, a current flows through a closed circuit including the reactor 20, the upper-arm second diode DH2, the first intermediate capacitor 31, the connecting diode DS, the second intermediate capacitor 32, the lower-arm second switch QL2, and the first capacitor 21. Specifically, an LC resonance occurs in this closed circuit between the reactor 20 and the first and second intermediate capacitors 31 and 32 connected in series, causing a sinusoidal current to flow. Due to this LC resonance, the voltages across the intermediate capacitors 31 and 32 change sinusoidally, so that the voltages VDH1 and VDH2 across the diodes DH1 and DH2 and the voltages VQL1 and VQL2 across the switches QL1 and QL2 have waveforms in which sinusoidal resonance voltages are superimposed.

[0025] When the capacitance of the first intermediate capacitor 31 is C1, the capacitance of the second intermediate capacitor 32 is C2, and the inductance of the reactor 20 is L, the first resonance period Tc1, which is the resonance period of the LC resonance in Mode 1, is expressed by the following equation (eq1).

[0026]

number

[0027]

number

[0028] 4, during the period of Mode 2, a current flows through a closed circuit including the reactor 20, the lower-arm first switch QL1, the parallel connection of the first intermediate capacitor 31 and the first regulating diode 41 with the second intermediate capacitor 32 and the second regulating diode 42, the upper-arm first diode DH1, the second capacitor 22, and the first capacitor 21. More specifically, LC resonance occurs in this closed circuit between the reactor 20 and the parallel-connected first and second intermediate capacitors 31 and 32, causing a sinusoidal current to flow. Due to this LC resonance, the voltages between the terminals of the intermediate capacitors 31 and 32 change sinusoidally, so that the voltages VDH1 and VDH2 between the terminals of the diodes DH1 and DH2 and the voltages VQL1 and VQL2 between the terminals of the switches QL1 and QL2 have waveforms in which sinusoidal resonance voltages are superimposed.

[0029] The second resonance period Tc2, which is the resonance period of the LC resonance in Mode 2, is expressed by the following equation (eq3).

[0030]

number

[0031] According to the above equations (eq2) and (eq3), the second resonance period Tc2 is twice the first resonance period Tc1, so the period "2Tr" of Mode2 is twice the period "Tr" of Mode1.

[0032] During the period of Mode 1, the voltage across each of the intermediate capacitors 31 and 32 is approximately half the voltage across the first capacitor 21. Thereafter, during the period of Mode 2, a voltage obtained by adding the voltage across the terminals of each of the intermediate capacitors 31 and 32 to the voltage across the terminals of the first capacitor 21 is supplied to the second capacitor 22. Therefore, the input voltages of the first high potential side terminal TH1 and the first low potential side terminal TL1 can be multiplied by approximately 1.5 and output from the second high potential side terminal TH2 and the second low potential side terminal TL2.

[0033] FIG. 5 shows the difference in size between the comparative example and this embodiment. The comparative example is the power conversion device shown in FIG. 5 of Patent Document 1. The comparative example requires four diodes, whereas the present embodiment requires five. Meanwhile, the comparative example requires four switches and their drive circuits, whereas the present embodiment requires two. The comparative example requires two reactors, whereas the present embodiment requires one. In other words, the number of switches, drive circuits, and reactors is half that of the comparative example. Furthermore, the comparative example requires five capacitors, whereas the present embodiment requires four. In the comparative example and the present embodiment, if the sum of the number of components, such as diodes, is considered to be the size, the comparative example has a size of 19, whereas the present embodiment has a size of 14. In other words, the present embodiment reduces the size of the power conversion device 10 by approximately 26%.

[0034] In particular, passive components such as capacitors and reactors tend to be large in size, so this embodiment, which can reduce the number of capacitors and reactors, can suitably achieve miniaturization of the power conversion device.

[0035] In this embodiment, the reactor 20 is provided on the first capacitor 21 side, which is the low-voltage side, of the first capacitor 21 and the second capacitor 22. Therefore, the AC current component flowing through the reactor 20 can be reduced, and the effect of reducing AC loss in the reactor 20 can be expected.

[0036] <Modification of the first embodiment> The timing of switching from Mode 1 to Mode 2 and the timing of switching from Mode 2 to Mode 1 are not limited to the timing when the current iL flowing through the reactor 20 becomes 0, but may also be the timing when the current iL becomes close to 0. The timing when the current iL becomes close to 0 is, for example, the timing when the current iL is greater than 0 and is equal to or smaller than 1 / 10, 1 / 20, or 1 / 40 of the maximum value that the peak value of the current iL can take. The timing when the current iL becomes close to 0 is a combination of the timing when the current iL becomes 0 and the timing when the current iL becomes close to 0.

[0037] Second Embodiment The second embodiment will be described below with reference to the drawings, focusing on differences from the first embodiment. In this embodiment, the position of the reactor 23 is changed as shown in Fig. 6. Specifically, an anode of the upper-arm first diode DH1 and a cathode of the upper-arm second diode DH2 are connected to a first end of the reactor 23. A first end of the first intermediate capacitor 31 and a cathode of the second regulating diode 42 are connected to a second end of the reactor 23. Note that in Fig. 6, the same components as those shown in Fig. 1 are denoted by the same reference numerals for convenience.

[0038] As in the first embodiment, the control device 60 performs power conversion processing by alternately repeating Mode 1 and Mode 2 as shown in FIG. 7. FIGS. 7(a) to 7(f) correspond to FIGS. 3(a) to 3(f). During Mode 1 shown in FIG. 7, a sinusoidal current flows through the closed circuit indicated by the dashed line in FIG. 8. During Mode 2 shown in FIG. 7, a sinusoidal current flows through the closed circuit indicated by the dashed line in FIG. 9. In this embodiment, the inter-terminal voltages VDH1 and VDH2 of the diodes DH1 and DH2 and the inter-terminal voltages VQL1 and VQL2 of the switches QL1 and QL2 are clamped by the inter-terminal voltages of the first capacitor 21 and the second capacitor 22. Therefore, no sinusoidal resonant voltage is superimposed on the inter-terminal voltages VDH1 and VDH2 of the diodes DH1 and DH2 and the inter-terminal voltages VQL1 and VQL2 of the switches QL1 and QL2.

[0039] According to the present embodiment described above, the voltages applied to the upper-arm first and second diodes DH1, DH2 and the lower-arm first and second switches QL1, QL2 can be reduced compared to Embodiment 1. Therefore, the upper-arm first and second diodes DH1, DH2 and the lower-arm first and second switches QL1, QL2 can be low-voltage elements, and losses can be reduced by soft switching.

[0040] Third Embodiment The third embodiment will be described below with reference to the drawings, focusing on differences from the first embodiment. In this embodiment, in the configuration shown in Fig. 1, the power conversion processing mode is changed based on a step-up ratio VrtH, which is a value obtained by dividing the high-voltage side voltage VH by the low-voltage side voltage VL.

[0041] 10 shows the procedure of the power conversion process executed by the control device 60. This process is executed repeatedly at a predetermined control period, for example.

[0042] In step S10, the high-voltage side voltage VH detected by the second voltage sensor 52 is divided by the low-voltage side voltage VL detected by the first voltage sensor 51 to calculate the step-up ratio VrtH.

[0043] In steps S11 to S15, one of the first voltage step-up control, the second voltage step-up control, and the third voltage step-up control is selected and executed based on the calculated voltage step-up ratio VrtH.

[0044] Specifically, in step S11, it is determined whether the boost ratio VrtH is equal to the threshold value VthH, which is set to 1.5 in this embodiment.

[0045] If the determination in step S11 is negative, the process proceeds to step S12, where it is determined whether or not the boost ratio VrtH is lower than the threshold value VthH. If the determination in step S12 is positive, the process proceeds to step S13, where the first boost control is executed. The first boost control will be described below with reference to Fig. 11. Figs. 11(a) to (f) correspond to Figs. 3(a) to (f) above.

[0046] FIG. 11 shows an example where the step-up ratio VrtH is 1.17. The control device 60 performs first step-up control by repeating one cycle consisting of Mode 4, Mode 2, Mode 4, and Mode 3. During Mode 4, the lower-arm first switch QL1 and the lower-arm second switch QL2 are turned off. During Mode 2, the lower-arm second switch QL2 is turned on, and the lower-arm first switch QL1 is turned off. During Mode 3, the lower-arm first switch QL1 is turned on, and the lower-arm second switch QL2 is turned off. Note that each Mode in this embodiment differs from each Mode in the first embodiment.

[0047] During Mode 4, as shown in FIG. 13, a current flows through a closed circuit including the reactor 20, the upper-arm second diode DH2, the upper-arm first diode DH1, the second capacitor 22, and the first capacitor 21.

[0048] The control device 60 switches on the lower-arm second switch QL2, thereby transitioning from Mode 4 to Mode 2. During Mode 2, as shown in Fig. 12 , a current flows through a closed circuit including the reactor 20, the upper-arm second diode DH2, the first intermediate capacitor 31, the connecting diode DS, the second intermediate capacitor 32, the lower-arm second switch QL2, and the first capacitor 21.

[0049] The control device 60 switches the lower arm second switch QL2 to OFF, thereby transitioning from Mode 2 to Mode 4 shown in FIG.

[0050] The control device 60 switches on the lower-arm first switch QL1, thereby transitioning from Mode 4 to Mode 3. During Mode 3, as shown in Fig. 14 , a current flows through a closed circuit including the reactor 20, the lower-arm first switch QL1, a parallel connection of the first intermediate capacitor 31 and the first regulating diode 41 with the second intermediate capacitor 32 and the second regulating diode 42, the upper-arm first diode DH1, the second capacitor 22, and the first capacitor 21. As a result, the intermediate capacitors 31 and 32 are discharged.

[0051] Thereafter, the first lower-arm switch QL1 is switched off, thereby completing one cycle. The above-described first boost control allows the power conversion device 10 to function as a boost converter.

[0052] Returning to the explanation of Fig. 10, if the determination in step S11 is affirmative, the process proceeds to step S14, where the second voltage step-up control is performed. The second voltage step-up control will be explained below with reference to Fig. 15. Fig. 15(a) to (f) correspond to the above Fig. 11(a) to (f).

[0053] 15 shows an example where the voltage step-up ratio VrtH is 1.5. The control device 60 performs second voltage step-up control, which repeats one cycle consisting of Mode 2 and Mode 3. The length of one cycle in the second voltage step-up control is the same as the length of one cycle in the first voltage step-up control.

[0054] During Mode 2, a current flows through the closed circuit shown by the dashed line in Fig. 12. The control device 60 switches the lower-arm second switch QL2 off and switches the lower-arm first switch QL1 on. This causes a transition from Mode 2 to Mode 3. During Mode 3, a current flows through the closed circuit shown by the dashed line in Fig. 14.

[0055] Thereafter, the lower-arm first switch QL1 is switched off and the lower-arm second switch QL2 is switched on, thereby completing one cycle. The above-described second boost control allows the power conversion device 10 to function as a boost converter.

[0056] Returning to the explanation of Fig. 10, if a negative determination is made in step S12, the process proceeds to step S15, where the third voltage step-up control is performed. The third voltage step-up control will be explained below with reference to Fig. 16. Figs. 16(a) to (f) correspond to Figs. 15(a) to (f).

[0057] 16 shows an example in which the step-up ratio VrtH is 1.83. The control device 60 performs third step-up control in which one cycle consisting of Mode 1, Mode 2, Mode 1, and Mode 3 is repeated. The length of one cycle in the third step-up control is the same as the lengths of one cycle in the first and second step-up controls. During Mode 1, the lower-arm first switch QL1 and the lower-arm second switch QL2 are turned on.

[0058] 17, a current flows through a closed circuit including the reactor 20, the lower-arm first switch QL1, the lower-arm second switch QL2, and the first capacitor 21. The third boost control, in which one cycle consisting of Mode 1, Mode 2, Mode 1, and Mode 3 is repeated, allows the power conversion device 10 to function as a boost converter.

[0059] In each step-up control, since the charge and discharge amounts of the first intermediate capacitor 31 and the second intermediate capacitor 32 need to be equal, the period of Mode 3 may be set to be approximately twice as long as the period of Mode 2. For example, the period of Mode 3 is 1.8 to 2.2 times as long as the period of Mode 2, and preferably 1.9 to 2.1 times as long.

[0060] In this embodiment, the period of Mode 3 is set longer than the period of Mode 2, and the switching period of each switch QL1, QL2 is set shorter than the first resonance period Tc1 described in the first embodiment, thereby realizing the boost operation. Specifically, for example, the length of one cycle of each boost control mode is shorter than the first resonance period Tc1. Also, in this embodiment, the boost ratio VrtH can be changed to a value other than 1.5.

[0061] <Modification of the third embodiment> The driving method described in Fig. 2 of the first embodiment may be applied to the lower-arm first switch QL1 and the lower-arm second switch QL2. In this case, for example, the upper-arm first switch QH1 and the upper-arm second switch QH2 may be turned off, and the body diodes of the upper-arm first and second switches QH1 and QH2 may be used as "upper-arm first and second diode units." Furthermore, for example, the upper-arm first switch QH1 and the upper-arm second switch QH2 may be turned on and off so as to perform synchronous rectification.

[0062] <Fourth embodiment> The fourth embodiment will be described below with reference to the drawings, focusing on the differences from the second embodiment. In this embodiment, as shown in Fig. 18, upper arm first and second switches QH1 and QH2 are provided instead of the upper arm first and second diodes DH1 and DH2. In this embodiment, the upper arm first and second switches QH1 and QH2 are N-channel MOSFETs. In Fig. 18, the same components as those shown in Fig. 6 are denoted by the same reference numerals for convenience.

[0063] The source of the upper-arm second switch QH2 is connected to the drain of the lower-arm first switch QL1. The drain of the upper-arm second switch QH2 is connected to the source of the upper-arm first switch QH1. The drain of the upper-arm first switch QH1 is connected to a first end of the second capacitor 22.

[0064] The control device 60 performs power conversion processing by controlling the switching of the upper-arm first and second switches QH1 and QH2 and the lower-arm first and second switches QL1 and QL2, thereby boosting the voltage input from the first high potential side terminal TH1 and the first low potential side terminal TL1 and outputting it from the second high potential side terminal TH2 and the second low potential side terminal TL2. This power conversion processing will be explained using Figure 19. Figures 19(a) to 19(d) correspond to Figures 7(a) to 7(d). In Figure 19(e), the solid line indicates the transition in the drive state of the upper-arm first switch QH1, and the dashed line indicates the transition in the drive state of the upper-arm second switch QH2. In Figure 19(f), the solid line indicates the transition in the drive state of the lower-arm first switch QL1, and the dashed line indicates the transition in the drive state of the lower-arm second switch QL2. In Fig. 19(g), the solid line indicates the transition of the inter-terminal voltage VQH1 of the upper-arm first switch QH1, and the dashed line indicates the transition of the inter-terminal voltage VQH2 of the upper-arm second switch QH2. In Fig. 19(h), the solid line indicates the transition of the inter-terminal voltage VQL1 of the lower-arm first switch QL1, and the dashed line indicates the transition of the inter-terminal voltage VQL2 of the lower-arm second switch QL2. In Fig. 19, the signs of the currents and voltages are positive in the direction of the arrows shown in Fig. 18. Fig. 19 also shows the case where the step-up ratio is 1.5.

[0065] The control device 60 performs voltage boost control by repeating one cycle consisting of Mode 1, Mode 2 (Mode 2-1, Mode 2-2), Mode 3, and Mode 4 (Mode 4-1, Mode 4-2). Note that each Mode in this embodiment is different from each Mode in the second embodiment.

[0066] During Mode 1, the upper-arm first switch QH1 and the lower-arm first switch QL1 are turned on, and the upper-arm second switch QH2 and the lower-arm second switch QL2 are turned off. As a result, as shown in Fig. 20 , a current flows through a closed circuit including the parallel connection of the lower-arm first switch QL1, the first intermediate capacitor 31, and the first regulating diode 41, and the second intermediate capacitor 32 and the second regulating diode 42, the reactor 23, the upper-arm first switch QH1, the second capacitor 22, and the first capacitor 21.

[0067] The control device switches off the lower-arm first switch QL1 and switches on the lower-arm second switch QL2, thereby transitioning from Mode 1 to Mode 2. Within the period of Mode 2, the period when the current iCf flowing through the intermediate circuit 30 is negative is the period of Mode 2-1 as shown in Fig. 21, and the period when the current iCf flowing through the intermediate circuit 30 is positive is the period of Mode 2-2 as shown in Fig. 22.

[0068] During Mode 2, the direction of the drain current flowing through the upper-arm first switch QH1 changes from source to drain to drain to source, and then the system transitions to the next Mode 3. This prevents a recovery current from flowing through the body diode of the upper-arm first switch QH1 when the upper-arm second switch QH2 is turned on in the next Mode 3.

[0069] The control device 60 switches the upper-arm first switch QH1 off and switches the upper-arm second switch QH2 on. This causes a transition from Mode 2-2 to Mode 3. As a result, as shown in Fig. 23 , a current flows through a closed circuit including the upper-arm second switch QH2, the reactor 23, the first intermediate capacitor 31, the connecting diode DS, the second intermediate capacitor 32, the lower-arm second switch QL2, and the first capacitor 21. This causes the intermediate capacitors 31 and 32 to be charged.

[0070] The control device 60 switches the lower-arm second switch QL2 off and switches the lower-arm first switch QL1 on. This causes a transition from Mode 3 to Mode 4. During Mode 4, a current flows back through a closed circuit including the upper-arm second switch QH2, the reactor 23, the intermediate circuit 30, and the lower-arm first switch QL1. During Mode 4, the period when the current iCf flowing through the intermediate circuit 30 is positive corresponds to the period of Mode 4-1 as shown in FIG. 24, and the period when the current iCf flowing through the intermediate circuit 30 is negative corresponds to the period of Mode 4-2 as shown in FIG. 25.

[0071] During Mode 4, the direction of the drain current flowing through the upper-arm second switch QH2 changes from source to drain to drain to source, and then the system transitions to the next Mode 1. This prevents a recovery current from flowing through the body diode of the upper-arm second switch QH2 when the upper-arm first switch QH1 is turned on in the next Mode 1.

[0072] The boost control in which one cycle consisting of Modes 1 to 4 is repeated allows the power conversion device 10 to function as a boost converter. In this embodiment, the period of Mode 1 and the period of Mode 3 are the same length, and the period of Mode 2 and the period of Mode 4 are the same length.

[0073] In this embodiment, the boost operation is achieved by making the switching period of each switch QH1, QH2, QL1, and QL2 shorter than the first resonance period Tc1 described in Embodiment 1. Specifically, for example, one cycle consisting of Mode 1, Mode 2, Mode 3, and Mode 4 is set to a predetermined period, and the predetermined period is shorter than the first resonance period Tc1.

[0074] In this embodiment, the controller 60 adjusts the proportion of the period of Modes 2 and 4 relative to the predetermined time, so that the boost ratio VrtH can be changed to a value other than 1.5.

[0075] Fifth Embodiment The fifth embodiment will be described below with reference to the drawings, focusing on the differences from the first embodiment. In this embodiment, as shown in Fig. 26, upper arm first and second switches QH1 and QH2 are provided instead of the upper arm first and second diodes DH1 and DH2, and lower arm first and second diodes DL1 and DL2 are provided instead of the lower arm first and second switches QL1 and QL2. In Fig. 26, the same components as those shown in Figs. 1 and 18 are denoted by the same reference numerals for convenience.

[0076] The source of the upper-arm second switch QH2 is connected to the cathode of the lower-arm first diode DL1, and the anode of the lower-arm first diode DL1 is connected to the cathode of the lower-arm second diode DL2. The anode of the lower-arm second diode DL2 is connected to second ends of the first capacitor 21 and the second capacitor 22.

[0077] The control device 60 performs a power conversion process in which the voltage input from the second high potential side terminal TH2 and the second low potential side terminal TL2 is stepped down and output from the first high potential side terminal TH1 and the first low potential side terminal TL1 by controlling the switching of the upper arm first switch QH1 and the upper arm second switch QH2. This power conversion process will be described using Fig. 27.

[0078] Figures 27(a) to (c) correspond to Figures 2(a) to (c). In Figure 27(d), the solid line indicates the transition of the drive state of the upper-arm first switch QH1, and the dashed line indicates the transition of the drive state of the upper-arm second switch QH2. In Figure 27(e), the solid line indicates the transition of the inter-terminal voltage VQH1 of the upper-arm first switch QH1, and the dashed line indicates the transition of the inter-terminal voltage VQL2 of the upper-arm second switch QH2. In Figure 27(f), the solid line indicates the transition of the inter-terminal voltage VDL1 of the lower-arm first diode DL1, and the dashed line indicates the transition of the inter-terminal voltage VDL2 of the lower-arm second diode DL2. In Figure 27, the signs of each current and voltage are positive in the direction of the arrow shown in Figure 26.

[0079] The control device 60 performs a power conversion process by alternately repeating Mode 1 and Mode 2. During Mode 1, the upper-arm first switch QH2 is turned on and the upper-arm second switch QH2 is turned off. During Mode 2, the upper-arm second switch QH2 is turned on and the upper-arm first switch QH1 is turned off.

[0080] 28, a current flows through a closed circuit including the upper-arm first switch QH1, the first intermediate capacitor 31, the connecting diode DS, the second intermediate capacitor 32, the lower-arm second diode DL2, the reactor 20, the first capacitor 21, and the second capacitor 22. Specifically, LC resonance occurs in this closed circuit between the reactor 20 and the first and second intermediate capacitors 31 and 32 connected in series, causing a sinusoidal current to flow. Due to this LC resonance, the voltages across the intermediate capacitors 31 and 32 change sinusoidally, so that the voltages VDL1 and VDL2 across the diodes DL1 and DL2 and the voltages VQH1 and VQH2 across the switches QH1 and QH2 have waveforms in which sinusoidal resonance voltages are superimposed.

[0081] The control device 60 switches the upper-arm first switch QH1 off and switches the upper-arm second switch QH2 on when a half cycle Tr (=Tc1×½) of the first resonance cycle Tc1 has elapsed since the start of Mode 1. This causes a transition from Mode 1 to Mode 2. At this time, soft switching of the ZCS can be achieved by switching the upper-arm first switch QH1 off and the upper-arm second switch QH2 on, thereby reducing losses.

[0082] 29 , a current flows through a closed circuit including the upper-arm second switch QH2, the reactor 20, the first capacitor 21, the lower-arm second diode DL2, and a parallel-connected assembly of the first intermediate capacitor 31, the first regulating diode 41, the second intermediate capacitor 32, and the second regulating diode 42. Specifically, LC resonance occurs in this closed circuit between the reactor 20 and the parallel-connected first and second intermediate capacitors 31 and 32, causing a sinusoidal current to flow. Due to this LC resonance, the voltages across the intermediate capacitors 31 and 32 change sinusoidally, so that the voltages VDL1 and VDL2 across the diodes DL1 and DL2 and the voltages VQH1 and VQH2 across the switches QH1 and QH2 have waveforms in which sinusoidal resonance voltages are superimposed.

[0083] The control device 60 switches the upper-arm second switch QH2 off and switches the upper-arm first switch QH1 on when a half cycle 2Tr (=Tc2×½) of the second resonance cycle Tc2 has elapsed since the start of Mode 2. This causes a transition from Mode 2 to Mode 1. At this time, soft switching of the ZCS can be achieved by switching the upper-arm second switch QH2 off and the upper-arm first switch QH1 on, thereby reducing losses.

[0084] According to the above equations (eq2) and (eq3), the second resonance period Tc2 is twice the first resonance period Tc1. Therefore, similar to the first embodiment, the period "2Tr" of Mode 2 is twice the period "Tr" of Mode 1. Furthermore, in this embodiment, the input voltages of the second high potential side terminal TH2 and the second low potential side terminal TL2 can be multiplied by approximately 0.33 (1 / 3) and output from the first high potential side terminal TH1 and the first low potential side terminal TL1.

[0085] According to the present embodiment described above, the same effects as those of the first embodiment can be obtained in the step-down control.

[0086] <Modification of the Fifth Embodiment> The timing of switching from Mode 1 to Mode 2 and from Mode 2 to Mode 1 is not limited to the timing when the current iL flowing through the reactor 20 becomes 0, as in the modified example of the first embodiment, but may be the timing when the current iL becomes close to 0.

[0087] The driving method described in FIG. 27 of the fifth embodiment may be applied to the upper-arm first switch QH1 and the upper-arm second switch QH2 of the circuit in FIG. 18. In this case, for example, the lower-arm first switch QL1 and the lower-arm second switch QL2 may be turned off, and the body diodes of the lower-arm first and second switches QL1 and QL2 may be used as the "lower-arm first and second diode units." Also, for example, the lower-arm first switch QL1 and the lower-arm second switch QL2 may be turned on and off so as to perform synchronous rectification.

[0088] Sixth Embodiment The sixth embodiment will be described below with reference to the drawings, focusing on differences from the fifth embodiment. In this embodiment, the position of the reactor 23 is changed as shown in Fig. 30. In Fig. 30, the same components as those shown in Fig. 26 are denoted by the same reference numerals for convenience.

[0089] As in the fifth embodiment, the control device 60 performs power conversion processing by alternately repeating Mode 1 and Mode 2 as shown in FIG. 31. (a) to (f) of FIG. 31 correspond to (a) to (f) of FIG. 27. During Mode 1 shown in FIG. 31, a sinusoidal current flows through the closed circuit indicated by the dashed line in FIG. 32. During Mode 2 shown in FIG. 31, a sinusoidal current flows through the closed circuit indicated by the dashed line in FIG. 33. In this embodiment, the inter-terminal voltages VDL1 and VDL2 of the diodes DL1 and DL2 and the inter-terminal voltages VQH1 and VQH2 of the switches QH1 and QH2 are clamped by the inter-terminal voltages of the first capacitor 21 and the second capacitor 22. Therefore, a sinusoidal resonant voltage is not superimposed on the inter-terminal voltages VDL1 and VDL2 of the diodes DL1 and DL2 and the inter-terminal voltages VQH1 and VQH2 of the switches QH1 and QH2.

[0090] According to the present embodiment described above, similarly to the second embodiment, the lower arm first and second diodes DL1, DL2 and the upper arm first and second switches QH1, QH2 are made of low-voltage elements, and losses can be reduced by soft switching.

[0091] Seventh Embodiment The seventh embodiment will be described below with reference to the drawings, focusing on the differences from the fifth embodiment. In this embodiment, in the configuration shown in Fig. 26, the power conversion processing mode is changed based on the step-down ratio VrtL, which is the value obtained by dividing the low-voltage side voltage VL by the high-voltage side voltage VH.

[0092] 34 shows the procedure of the power conversion process executed by the control device 60. This process is executed repeatedly at a predetermined control period, for example.

[0093] In step S20, the low-voltage side voltage VL detected by the first voltage sensor 51 is divided by the high-voltage side voltage VH detected by the second voltage sensor 52 to calculate the step-down ratio VrtL.

[0094] In steps S21 to S25, one of the first step-down control, the second step-down control, and the third step-down control is selected and executed based on the calculated step-down ratio VrtL.

[0095] Specifically, in step S21, it is determined whether the step-down ratio VrtL is equal to the threshold value VthL, which is set to 1 / 3 in this embodiment.

[0096] If the determination in step S21 is negative, the process proceeds to step S22, where it is determined whether the step-down ratio VrtL is lower than the threshold value VthL. If the determination in step S22 is positive, the process proceeds to step S23, where the first step-down control is executed. The first step-down control will be described below with reference to FIG. 35. FIGS. 35(a) to (f) correspond to the above-mentioned FIGS. 27(a) to (f).

[0097] 35 shows an example where the step-down ratio VrtL is 0.25. The control device 60 performs first step-down control by repeating one cycle consisting of Mode 1, Mode 2, Mode 1, and Mode 3. During Mode 1, the upper-arm first switch QH1 and the upper-arm second switch QH2 are turned off. During Mode 2, the upper-arm second switch QH2 is turned on, and the upper-arm first switch QH1 is turned off. During Mode 3, the upper-arm first switch QH1 is turned on, and the upper-arm second switch QH2 is turned off. Note that each Mode in this embodiment differs from each Mode in the fifth embodiment.

[0098] During the period of Mode 1, as shown in FIG. 36, a current flows through a closed circuit including the reactor 20, the first capacitor 21, the lower-arm second diode DL2, and the lower-arm first diode DL1.

[0099] The control device 60 switches on the upper-arm second switch QH2, thereby transitioning from Mode 1 to Mode 2. During Mode 2, as shown in Fig. 37 , a current flows through a closed circuit including the reactor 20, the first capacitor 21, the lower-arm second diode DL2, a parallel connection of the first intermediate capacitor 31 and the first regulating diode 41, and the second intermediate capacitor 32 and the second regulating diode 42, and the upper-arm second switch QH2.

[0100] The control device 60 switches the upper-arm second switch QH2 to OFF, thereby transitioning from Mode 2 to Mode 1 shown in FIG.

[0101] The control device 60 switches on the upper-arm first switch QH1, thereby transitioning from Mode 1 to Mode 3. During the period of Mode 3, as shown in Fig. 38 , a current flows through a closed circuit including the reactor 20, the lower-arm first switch QL1, the reactor 20, the first capacitor 21, the second capacitor 22, the upper-arm first switch QH1, the first intermediate capacitor 31, the connecting diode DS, the second intermediate capacitor 32, and the lower-arm first diode DL1.

[0102] Thereafter, the upper-arm first switch QH1 is switched off, thereby completing one cycle. The above-described first step-down / step-up control allows the power conversion device 10 to function as a step-down converter.

[0103] Returning to the explanation of Fig. 34, if the answer to the question in step S21 is affirmative, the process proceeds to step S24, where the second voltage step-down control is performed. The second voltage step-down control will be explained below with reference to Fig. 39. Fig. 39(a) to (f) correspond to Fig. 35(a) to (f).

[0104] 39 shows an example in which the step-down ratio VrtL is 1 / 3. The control device 60 performs second step-down control in which one cycle consisting of Mode 3 and Mode 2 is repeated. The length of one cycle in the second step-down control is the same as the length of one cycle in the first step-down control.

[0105] During Mode 3, a current flows through the closed circuit shown by the dashed line in Fig. 38. The control device 60 switches the upper-arm first switch QH1 off and switches the upper-arm second switch QH2 on. This causes a transition from Mode 3 to Mode 2. During Mode 2, a current flows through the closed circuit shown by the dashed line in Fig. 37.

[0106] Thereafter, the upper-arm second switch QH2 is switched off and the upper-arm first switch QH1 is switched on, thereby completing one cycle. The second step-down control described above allows the power conversion device 10 to function as a step-down converter.

[0107] Returning to the explanation of Fig. 34, if a negative determination is made in step S22, the process proceeds to step S25, where the third voltage step-down control is performed. The third voltage step-down control will be explained below with reference to Fig. 40. Fig. 40(a) to (f) correspond to Fig. 39(a) to (f) above.

[0108] 40 shows an example where the step-down ratio VrtL is 0.42. The control device 60 performs third step-down control, which repeats one cycle consisting of Mode 3, Mode 4, Mode 2, and Mode 4. The length of one cycle in the third step-down control is the same as the lengths of one cycle in the first and second step-down controls.

[0109] During the period of Mode 4, a current flows through a closed circuit including the reactor 20, the first capacitor 21, the second capacitor 22, the upper-arm first switch QH1, and the upper-arm second switch QH2, as shown in Fig. 41. The third step-down control, in which one cycle consisting of Mode 3, Mode 4, Mode 2, and Mode 4 is repeated, allows the power conversion device 10 to function as a step-down converter.

[0110] In each step-down control, since the charge and discharge amounts of the first intermediate capacitor 31 and the second intermediate capacitor 32 need to be equal, the period of Mode 2 may be set to be approximately twice as long as the period of Mode 3. For example, the period of Mode 2 is 1.8 to 2.2 times as long as the period of Mode 3, and preferably 1.9 to 2.1 times as long.

[0111] In this embodiment, the period of Mode 2 is set longer than the period of Mode 3, and the switching period of each switch QH1, QH2 is set shorter than the first resonance period Tc1 described in the first embodiment, thereby realizing the step-down operation. Specifically, for example, the length of one cycle of each step-down control mode is shorter than the first resonance period Tc1. In addition, in this embodiment, the step-down ratio VrtL can be changed to a value other than 0.33.

[0112] Eighth Embodiment The eighth embodiment will be described below with reference to the drawings, focusing on the differences from the first embodiment. In this embodiment, as shown in Fig. 42, the intermediate circuit 30 includes a first regulating switch QY1 (corresponding to the "first regulating switch section"), a second regulating switch QY2 (corresponding to the "second regulating switch section"), and a connection switch QX (corresponding to the "connection switch section") instead of the diodes 41, 42, and DS. This allows the step-up ratio (= VH / VL) to be changed in three stages. In Fig. 42, the same components as those shown in Fig. 1 and the like are denoted by the same reference numerals for convenience.

[0113] In this embodiment, the first regulating switch QY1, the second regulating switch QY2, and the connection switch QX are N-channel MOSFETs having body diodes. The anode of the upper-arm first diode DH1 and the cathode of the upper-arm second diode DH2 are connected to a first end of the first intermediate capacitor 31 and the drain of the first regulating switch QY1. The drain of the second regulating switch QY2 and the source of the connection switch QX are connected to a second end of the first intermediate capacitor 31. The drain of the connection switch QX and the first end of the second intermediate capacitor 32 are connected to a second end of the second intermediate capacitor 32 and the source of the second regulating switch QY2. The source of the lower-arm first switch QL1 and the drain of the lower-arm second switch QL2 are connected to a second end of the second intermediate capacitor 32 and the source of the second regulating switch QY2.

[0114] 43 shows the procedure of the power conversion process executed by the control device 60. This process is executed repeatedly at a predetermined control period, for example.

[0115] In steps S30, S32, and S34, it is determined whether the boost ratio is a low-level boost request, a medium-level boost request, or a high-level boost request. A low-level boost request is a request for a target boost ratio of 1.5. A medium-level boost request is a request for a target boost ratio of 2. A high-level boost request is a request for a target boost ratio of 3. Note that the actual boost ratio may deviate slightly from the target boost ratio due to, for example, the loss characteristics of the circuit of the power conversion device 10.

[0116] If it is determined that there is a low-level boost request, the process proceeds to step S31, where low boost control is performed. If it is determined that there is a medium-level boost request, the process proceeds to step S33, where medium boost control is performed. If it is determined that there is a high-level boost request, the process proceeds to step S35, where high boost control is performed.

[0117] First, low boost control will be described using Figure 44. Figures 44(a) to (c) correspond to Figures 2(a) to (c). Figure 44(d) shows the transition of the drive states of the lower-arm first switch QL1 and each regulating switch QY1, QY2, and Figure 44(e) shows the transition of the drive states of the lower-arm second switch QL2 and the connection switch QX. In Figure 44, the signs of each current and voltage are positive in the direction of the arrow shown in Figure 42.

[0118] In the low boost control, the control device 60 alternately repeats Mode A and Mode B. During Mode A, the lower-arm second switch QL2 and the connection switch QX are turned on, and the lower-arm first switch QL1 and the regulating switches QY1 and QY2 are turned off. During Mode B, the lower-arm first switch QL1 and the regulating switches QY1 and QY2 are turned on, and the lower-arm second switch QL2 and the connection switch QX are turned off.

[0119] During the period of Mode A, as shown in Fig. 45, a current flows in a closed circuit including the reactor 20, the upper-arm second diode DH2, the first intermediate capacitor 31, the connection switch QX, the second intermediate capacitor 32, the lower-arm second switch QL2, and the first capacitor 21. More specifically, LC resonance occurs in this closed circuit due to the reactor 20 and the first and second intermediate capacitors 31 and 32 connected in series, causing a sinusoidal current to flow. Due to this LC resonance, the voltages across the intermediate capacitors 31 and 32 change sinusoidally, so that the voltages across the diodes DH1 and DH2 and the voltages across the switches QL1 and QL2 have waveforms in which sinusoidal resonance voltages are superimposed.

[0120] The control device 60 switches the lower-arm second switch QL2 and the connection switch QX off and switches the lower-arm first switch QL1 and the regulating switches QY1 and QY2 on when a half cycle Tr of the first resonance cycle Tc1 has elapsed since the start of Mode A. This transitions from Mode A to Mode B. At this time, soft switching of the ZCS can be achieved by switching the lower-arm second switch QL2 off and the lower-arm first switch QL1 on, thereby reducing losses. Note that, as in the first embodiment, the timing at which iL becomes 0 and the timing at which iCf becomes 0 are the same or approximately the same.

[0121] 46, during the period of Mode B, a current flows through a closed circuit including the reactor 20, the lower-arm first switch QL1, the parallel connection of the first intermediate capacitor 31 and the first regulating switch QY1 with the second intermediate capacitor 32 and the second regulating switch QY2, the upper-arm first diode DH1, the second capacitor 22, and the first capacitor 21. More specifically, LC resonance occurs in this closed circuit between the reactor 20 and the parallel-connected first and second intermediate capacitors 31 and 32, causing a sinusoidal current to flow. Due to this LC resonance, the voltages across the intermediate capacitors 31 and 32 change sinusoidally, so that the voltages VDH1 and VDH2 across the diodes DH1 and DH2 and the voltages VQL1 and VQL2 across the switches QL1 and QL2 have waveforms in which sinusoidal resonance voltages are superimposed.

[0122] At the timing when half a cycle 2Tr (=Tc2×½) of the second resonance cycle Tc2 has elapsed since the start of Mode B, the control device 60 switches off the lower-arm first switch QL1 and the regulating switches QY1 and QY2 and switches on the lower-arm second switch QL2 and the connection switch QX. This transitions from Mode B to Mode A. At this time, soft switching of the ZCS can be achieved by switching off the lower-arm first switch QL1 and switching on the lower-arm second switch QL2, thereby reducing losses.

[0123] As described in the first embodiment, the second resonance period Tc2 is twice the first resonance period Tc1, so the period "2Tr" of Mode B is twice the period "Tr" of Mode A.

[0124] During the period of Mode A, the voltage across each of the intermediate capacitors 31 and 32 is approximately half the voltage across the first capacitor 21. Thereafter, during the period of Mode B, a voltage obtained by adding the voltage across the terminals of each of the intermediate capacitors 31 and 32 to the voltage across the terminals of the first capacitor 21 is supplied to the second capacitor 22. Therefore, the input voltages of the first high potential side terminal TH1 and the first low potential side terminal TL1 can be multiplied by approximately 1.5 and output from the second high potential side terminal TH2 and the second low potential side terminal TL2.

[0125] Next, the medium voltage boost control will be explained using Figure 47. Figures 47(a) to (c) correspond to Figures 44(a) to (c). Figure 47(d) shows the transition of the drive states of the lower arm first and second switches QL1 and QL2. Figure 47(e) shows the transition of the drive states of the regulating switches QY1 and QY2 and the connection switch QX.

[0126] During the medium boost control, the control device 60 alternately performs processing of Mode A and Mode B. During Mode A, the lower-arm second switch QL2 is turned on and the lower-arm first switch QL1 is turned off, and during Mode B, the lower-arm second switch QL2 is turned off and the lower-arm first switch QL1 is turned on. During Modes A and B, the regulating switches QY1 and QY2 are maintained on and the connection switch QX is maintained off.

[0127] 48, during the period of Mode A, a current flows through a closed circuit including the reactor 20, the upper-arm second diode DH2, the first intermediate capacitor 31, and a parallel connection of the first regulating switch QY1, the second regulating switch QY2, and the second intermediate capacitor 32, the lower-arm second switch QL2, and the first capacitor 21. More specifically, LC resonance occurs in this closed circuit due to the reactor 20 and the parallel-connected first and second intermediate capacitors 31 and 32, causing a sinusoidal current to flow.

[0128] The control device 60 switches the lower-arm second switch QL2 off and switches the lower-arm first switch QL1 on when a half cycle 2Tr of the second resonance cycle Tc2 has elapsed since the start of Mode A. This transitions from Mode A to Mode B. At this time, soft switching of the ZCS can be achieved by switching the lower-arm second switch QL2 off and the lower-arm first switch QL1 on, thereby reducing losses. Note that, as in the first embodiment, the timing at which iL becomes 0 and the timing at which iCf becomes 0 are the same or approximately the same.

[0129] 49, during the period of Mode B, a current flows through a closed circuit including the reactor 20, the lower-arm first switch QL1, the first intermediate capacitor 31, the parallel connection of the first regulating switch QY1 with the second intermediate capacitor 32 and the second regulating switch QY2, the upper-arm first diode DH1, the second capacitor 22, and the first capacitor 21. More specifically, LC resonance occurs in this closed circuit due to the reactor 20 and the parallel-connected first and second intermediate capacitors 31 and 32, causing a sinusoidal current to flow.

[0130] The control device 60 switches the lower-arm first switch QL1 off and switches the lower-arm second switch QL2 on when a half cycle 2Tr of the second resonance cycle Tc2 has elapsed since the start of Mode B. This transitions from Mode B to Mode A. At this time, soft switching of the ZCS can be achieved by switching the lower-arm first switch QL1 off and the lower-arm second switch QL2 on, thereby reducing losses. The periods of Mode A and Mode B are equal.

[0131] During the period of Mode A, the voltage across each of the intermediate capacitors 31 and 32 becomes approximately equal to the voltage across the first capacitor 21. Thereafter, during the period of Mode B, a voltage obtained by adding the voltage across the terminals of each of the intermediate capacitors 31 and 32 to the voltage across the terminals of the first capacitor 21 is supplied to the second capacitor 22. Therefore, the input voltages of the first high potential side terminal TH1 and the first low potential side terminal TL1 can be approximately doubled and output from the second high potential side terminal TH2 and the second low potential side terminal TL2.

[0132] The medium voltage boost control can also be performed by the method shown in Figure 50. Figures 50(a) to (e) correspond to Figures 47(a) to (e).

[0133] In the medium boost control according to the modified example, the control device 60 alternately performs processing of Mode A and Mode B. During Mode A, the lower-arm second switch QL2 is turned on and the lower-arm first switch QL1 is turned off, and during Mode B, the lower-arm second switch QL2 is turned off and the lower-arm first switch QL1 is turned on. During Modes A and B, the regulating switches QY1 and QY2 are kept off and the connection switch QX is kept on.

[0134] 51, a current flows in a closed circuit including the reactor 20, the upper-arm second diode DH2, the first intermediate capacitor 31, the connection switch QX, the second intermediate capacitor 32, the lower-arm second switch QL2, and the first capacitor 21. In detail, an LC resonance occurs in this closed circuit due to the reactor 20 and the first and second intermediate capacitors 31 and 32 connected in series, causing a sinusoidal current to flow.

[0135] The control device 60 switches off the lower-arm second switch QL2 and switches on the lower-arm first switch QL1 when a half cycle Tr of the first resonance cycle Tc1 has elapsed since the start of Mode A. This causes a transition from Mode A to Mode B.

[0136] 52, a current flows in a closed circuit including the reactor 20, the lower-arm first switch QL1, the second intermediate capacitor 32, the connection switch QX, the first intermediate capacitor 31, the upper-arm first diode DH1, the second capacitor 22, and the first capacitor 21. In detail, an LC resonance occurs in this closed circuit due to the reactor 20 and the first and second intermediate capacitors 31 and 32 connected in series, causing a sinusoidal current to flow.

[0137] The control device 60 switches off the lower-arm first switch QL1 and switches on the lower-arm second switch QL2 at the timing when a half cycle Tr of the first resonance cycle Tc1 has elapsed since the start of Mode B.

[0138] During the period of Mode A, the voltage across each of the intermediate capacitors 31 and 32 is approximately half the voltage across the first capacitor 21. Thereafter, during the period of Mode B, a voltage obtained by adding the voltage across the terminals of each of the intermediate capacitors 31 and 32 to the voltage across the terminals of the first capacitor 21 is supplied to the second capacitor 22. Therefore, the input voltages of the first high potential side terminal TH1 and the first low potential side terminal TL1 can be approximately doubled and output from the second high potential side terminal TH2 and the second low potential side terminal TL2.

[0139] Next, high boost control will be described using Figure 53. Figures 53(a) to (c) correspond to Figures 47(a) to (c). Figure 53(d) shows the transition of the drive states of the lower-arm first switch QL1 and the connection switch QX, and Figure 53(e) shows the transition of the drive states of the lower-arm second switch QL2 and each of the regulating switches QY1 and QY2.

[0140] During high boost control, the control device 60 alternately performs processing of Mode A and Mode B. During Mode A, the lower-arm first switch QL1 and the connection switch QX are turned off, and the lower-arm second switch QL2 and the regulating switches QY1 and QY2 are turned on. During Mode B, the lower-arm first switch QL1 and the connection switch QX are turned on, and the lower-arm second switch QL2 and the regulating switches QY1 and QY2 are turned off.

[0141] 54, during the period of Mode A, a current flows through a closed circuit including the reactor 20, the upper-arm second diode DH2, the first intermediate capacitor 31, and a parallel connection of the first regulating switch QY1, the second regulating switch QY2, and the second intermediate capacitor 32, the lower-arm second switch QL2, and the first capacitor 21. More specifically, LC resonance occurs in this closed circuit due to the reactor 20 and the parallel-connected first and second intermediate capacitors 31 and 32, causing a sinusoidal current to flow.

[0142] At the timing when half a cycle 2Tr of the second resonance cycle Tc2 has elapsed since the start of Mode A, the control device 60 switches off the lower-arm second switch QL2 and the regulating switches QY1 and QY2 and switches on the lower-arm first switch QL1 and the connection switch QX. This transitions from Mode A to Mode B. At this time, soft switching of the ZCS can be achieved by switching off the lower-arm second switch QL2 and switching on the lower-arm first switch QL1, thereby reducing losses.

[0143] 55, a current flows in a closed circuit including the reactor 20, the lower-arm first switch QL1, the second intermediate capacitor 32, the connection switch QX, the first intermediate capacitor 31, the upper-arm first diode DH1, the second capacitor 22, and the first capacitor 21. In detail, an LC resonance occurs in this closed circuit due to the reactor 20 and the first and second intermediate capacitors 31 and 32 connected in series, causing a sinusoidal current to flow.

[0144] The control device 60 switches the lower-arm first switch QL1 and the connection switch QX off and switches the lower-arm second switch QL2 and the regulating switches QY1 and QY2 on when a half cycle Tr of the first resonance cycle Tc1 has elapsed since the start of Mode B. This transitions from Mode B to Mode A. At this time, soft switching of the ZCS can be achieved by switching the lower-arm first switch QL1 off and the lower-arm second switch QL2 on, thereby reducing losses. The period "2Tr" of Mode A is twice the period "Tr" of Mode B.

[0145] During the period of Mode A, the voltage across each of the intermediate capacitors 31 and 32 becomes approximately equal to the voltage across the first capacitor 21. Thereafter, during the period of Mode B, a voltage obtained by adding the voltage across the terminals of each of the intermediate capacitors 31 and 32 to the voltage across the terminals of the first capacitor 21 is supplied to the second capacitor 22. Therefore, the input voltages of the first high potential side terminal TH1 and the first low potential side terminal TL1 can be multiplied by approximately three and output from the second high potential side terminal TH2 and the second low potential side terminal TL2.

[0146] Since each of the switches QY1, QY2, and QX has a body diode, a current flow path can be secured even if some abnormality occurs in the power conversion device 10 and the switches QY1, QY2, and QX of the intermediate circuit 30 are switched off, thereby preventing a large surge voltage from occurring.

[0147] <Modification of the Eighth Embodiment> During the periods of Modes A and B of the low boost control shown in FIG. 44, the regulating switches QY1 and QY2 and the connection switch QX may be maintained in the off state.

[0148] During the period of Mode B of the medium boost control shown in FIG. 47, the regulating switches QY1 and QY2 may be turned off.

[0149] During the period of Mode A of the medium boost control shown in FIG. 50, the connection switch QX may be turned off.

[0150] In the low, medium, and high boost control, the timing of switching from Mode A to Mode B and from Mode B to Mode A is not limited to the timing when the current iL flowing through the reactor 20 becomes 0, but may be the timing when the current iL becomes close to 0, as in the first embodiment.

[0151] The position of the reactor may be changed as shown in Fig. 56. Specifically, a reactor 23 may be provided in the electrical path connecting the anode of the upper-arm first diode DH1 and the cathode of the upper-arm second diode DH2 to the intermediate circuit 30.

[0152] Ninth Embodiment The ninth embodiment will be described below with reference to the drawings, focusing on the differences from the eighth embodiment and the like. In this embodiment, as shown in Fig. 57, the intermediate circuit 30 in the step-down circuit includes a first regulating switch QY1, a second regulating switch QY2, and a connection switch QX instead of the diodes 41, 42, and DS. This allows the step-down ratio (=VL / VH) to be changed in three stages. In Fig. 57, the same components as those shown in Figs. 42, 26, etc. are denoted by the same reference numerals for convenience.

[0153] 58 shows the procedure of the power conversion process executed by the control device 60. This process is executed repeatedly at a predetermined control period, for example.

[0154] In steps S40, S42, and S44, it is determined whether the step-down ratio is a low-level step-down request, a medium-level step-down request, or a high-level step-down request. A low-level step-down request is a request for a step-down ratio target value of 1 / 1.5. A medium-level step-down request is a request for a step-down ratio target value of 1 / 2. A high-level step-down request is a request for a step-down ratio target value of 1 / 3. Note that the actual step-down ratio may deviate slightly from the step-down ratio target value due to, for example, the loss characteristics of the circuit of the power conversion device 10.

[0155] If it is determined that there is a low-level voltage step-down request, the process proceeds to step S41, where low voltage step-down control is performed. If it is determined that there is a medium-level voltage step-down request, the process proceeds to step S43, where medium voltage step-down control is performed. If it is determined that there is a high-level voltage step-down request, the process proceeds to step S45, where high voltage step-down control is performed.

[0156] First, low step-down control will be described using Figure 59. Figures 59(a) to (c) correspond to Figures 44(a) to (c). Figure 59(d) shows the transitions in the drive states of the upper-arm first switch QH1 and the regulating switches QY1 and QY2, and Figure 59(e) shows the transitions in the drive states of the upper-arm second switch QH2 and the connection switch QX.

[0157] The control device 60 performs low step-down control by alternately repeating Mode A and Mode B. During Mode A, the upper-arm second switch QH2 and the connection switch QX are turned on, and the upper-arm first switch QH1 and the regulating switches QY1 and QY2 are turned off. During Mode B, the upper-arm second switch QH2 and the connection switch QX are turned off, and the upper-arm first switch QH1 and the regulating switches QY1 and QY2 are turned on.

[0158] During the period of Mode A, as shown in Fig. 60, a current flows in a closed circuit including the reactor 20, the first capacitor 21, the lower-arm second diode DL2, the second intermediate capacitor 32, the connection switch QX, the first intermediate capacitor 31, and the upper-arm second switch QH2. In detail, LC resonance occurs in this closed circuit due to the reactor 20 and the first and second intermediate capacitors 31 and 32 connected in series, causing a sinusoidal current to flow.

[0159] The control device 60 switches off the upper-arm second switch QH2 and the connection switch QX and switches on the upper-arm first switch QH1 and the regulating switches QY1 and QY2 at a timing when a half cycle Tr of the first resonance cycle Tc1 has elapsed since the start of Mode A. This transitions from Mode A to Mode B. At this time, soft switching of the ZCS can be achieved by switching off the upper-arm second switch QH2 and switching on the upper-arm first switch QH1, thereby reducing losses.

[0160] During the period of Mode B, as shown in Fig. 61, a current flows through a closed circuit including the reactor 20, the first capacitor 21, the second capacitor 22, the upper-arm first switch QH1, the parallel connection of the first intermediate capacitor 31 and the first regulating switch QY1 with the second intermediate capacitor 32 and the second regulating switch QY2, and the lower-arm first diode DL1. More specifically, LC resonance occurs in this closed circuit due to the reactor 20 and the parallel-connected first and second intermediate capacitors 31 and 32, causing a sinusoidal current to flow.

[0161] The control device 60 switches off the upper-arm first switch QH1 and the regulating switches QY1 and QY2 and switches on the upper-arm second switch QH2 and the connection switch QX when half a cycle 2Tr of the second resonance cycle Tc2 has elapsed since the start of Mode B. This transitions from Mode B to Mode A. At this time, soft switching of the ZCS can be achieved by switching off the upper-arm first switch QH1 and on the upper-arm second switch QH2, thereby reducing losses. The period "2Tr" of Mode B is twice the period "Tr" of Mode A.

[0162] According to the low step-down control described above, the input voltages of the second high potential side terminal TH2 and the second low potential side terminal TL2 can be multiplied by approximately 1 / 1.5 and output from the first high potential side terminal TH1 and the first low potential side terminal TL1.

[0163] Next, the medium step-down control will be explained using Figure 62. Figures 62(a) to (c) correspond to Figures 47(a) to (c). Figure 62(d) shows the transition of the drive states of the upper arm first and second switches QH1 and QH2. Figure 62(e) shows the transition of the drive states of the regulating switches QY1 and QY2 and the connection switch QX.

[0164] In the medium step-down control, the control device 60 alternately performs processing of Mode A and Mode B. During Mode A, the upper-arm second switch QH2 is turned on and the upper-arm first switch QH1 is turned off, and during Mode B, the upper-arm second switch QH2 is turned off and the upper-arm first switch QH1 is turned on. During Modes A and B, the regulating switches QY1 and QY2 are kept on, and the connection switch QX is kept off.

[0165] During the period of Mode A, as shown in Fig. 63, a current flows through a closed circuit including the reactor 20, the first capacitor 21, the lower-arm second diode DL2, the first intermediate capacitor 31, and a parallel connection of the first regulating switch QY1, the second regulating switch QY2, and the second intermediate capacitor 32, and the upper-arm second switch QH2. More specifically, LC resonance occurs in this closed circuit due to the reactor 20 and the parallel-connected first and second intermediate capacitors 31 and 32, causing a sinusoidal current to flow.

[0166] The control device 60 switches the upper-arm second switch QH2 off and switches the upper-arm first switch QH1 on at the timing when a half cycle 2Tr of the second resonance cycle Tc2 has elapsed since the start of Mode A. This causes a transition from Mode A to Mode B. At this time, soft switching of the ZCS can be achieved by switching the upper-arm second switch QH2 off and the upper-arm first switch QH1 on, thereby reducing losses.

[0167] During the period of Mode B, as shown in Fig. 64, a current flows through a closed circuit including the reactor 20, the first capacitor 21, the second capacitor 22, the upper-arm first switch QH1, the first intermediate capacitor 31, a parallel connection of the first regulating switch QY1, the second regulating switch QY2, and the second intermediate capacitor 32, and the lower-arm first diode DL1. More specifically, LC resonance occurs in this closed circuit due to the reactor 20 and the parallel-connected first and second intermediate capacitors 31 and 32, causing a sinusoidal current to flow.

[0168] The control device 60 switches the upper-arm first switch QH1 off and the upper-arm second switch QH2 on when a half cycle 2Tr of the second resonance cycle Tc2 has elapsed since the start of Mode B. This transitions from Mode B to Mode A. At this time, soft switching of the ZCS can be achieved by switching the upper-arm first switch QH1 off and the upper-arm second switch QH2 on, thereby reducing losses. The periods of Mode A and Mode B are equal.

[0169] According to the low-medium voltage control described above, the input voltages of the second high potential side terminal TH2 and the second low potential side terminal TL2 can be multiplied by approximately half and output from the first high potential side terminal TH1 and the first low potential side terminal TL1.

[0170] The medium step-down control can also be performed by the method shown in Figure 65. Figures 65(a) to (e) correspond to Figures 62(a) to (e).

[0171] In the medium step-down control according to the modified example, the control device 60 alternately performs processing of Mode A and Mode B. During Mode A, the upper-arm second switch QH2 is turned on and the upper-arm first switch QH1 is turned off, and during Mode B, the upper-arm second switch QH2 is turned off and the upper-arm first switch QH1 is turned on. During Modes A and B, the regulating switches QY1 and QY2 are kept off and the connection switch QX is kept on.

[0172] During the period of Mode A, as shown in Fig. 66, a current flows in a closed circuit including the reactor 20, the first capacitor 21, the lower-arm second diode DL2, the second intermediate capacitor 32, the connection switch QX, the first intermediate capacitor 31, and the upper-arm second switch QH2. In detail, LC resonance occurs in this closed circuit due to the reactor 20 and the first and second intermediate capacitors 31 and 32 connected in series, causing a sinusoidal current to flow.

[0173] The control device 60 switches off the upper-arm second switch QH2 and switches on the upper-arm first switch QH1 when a half cycle Tr of the first resonance cycle Tc1 has elapsed since the start of Mode A. This causes a transition from Mode A to Mode B.

[0174] During the period of Mode B, a current flows in a closed circuit including the reactor 20, the first capacitor 21, the second capacitor 22, the upper-arm first switch QH1, the first intermediate capacitor 31, the connection switch QX, the second intermediate capacitor 32, and the lower-arm first diode DL1, as shown in Fig. 67. In detail, LC resonance occurs in this closed circuit due to the reactor 20 and the first and second intermediate capacitors 31 and 32 connected in series, causing a sinusoidal current to flow.

[0175] The control device 60 switches the upper-arm first switch QH1 off and switches the upper-arm second switch QH2 on at the timing when a half cycle Tr of the first resonance cycle Tc1 has elapsed since the start of Mode B.

[0176] The low-medium voltage control according to the modified example described above also makes it possible to multiply the input voltage of the second high potential side terminal TH2 and the second low potential side terminal TL2 by approximately half and output it from the first high potential side terminal TH1 and the first low potential side terminal TL1.

[0177] Next, high step-down control will be explained using Figure 68. Figures 68(a) to (c) correspond to Figures 62(a) to (c). Figure 68(d) shows the transition of the drive state of the upper-arm first switch QH1 and the connection switch QX, and Figure 68(e) shows the transition of the drive state of the upper-arm second switch QH2 and each of the regulating switches QY1 and QY2.

[0178] In the high step-down control, the control device 60 alternately repeats Mode A and Mode B. During Mode A, the upper-arm first switch QH1 and the connection switch QX are turned off, and the upper-arm second switch QH2 and the regulating switches QY1 and QY2 are turned on. During Mode B, the upper-arm first switch QH1 and the connection switch QX are turned on, and the upper-arm second switch QH2 and the regulating switches QY1 and QY2 are turned off.

[0179] During the period of Mode A, as shown in Fig. 69, a current flows through a closed circuit including the reactor 20, the first capacitor 21, the lower-arm second diode DL2, the first intermediate capacitor 31, and a parallel connection of the first regulating switch QY1, the second regulating switch QY2, and the second intermediate capacitor 32, and the upper-arm second switch QH2. More specifically, LC resonance occurs in this closed circuit due to the reactor 20 and the parallel-connected first and second intermediate capacitors 31 and 32, causing a sinusoidal current to flow.

[0180] When half a cycle 2Tr of the second resonance cycle Tc2 has elapsed since the start of Mode A, the control device 60 switches off the upper-arm second switch QH2 and the regulating switches QY1 and QY2 and switches on the upper-arm first switch QH1 and the connection switch QX. This transitions from Mode A to Mode B. At this time, soft switching of the ZCS can be achieved by switching off the upper-arm second switch QH2 and switching on the upper-arm first switch QH1, thereby reducing losses.

[0181] During the period of Mode B, as shown in Fig. 70, a current flows in a closed circuit including the reactor 20, the first capacitor 21, the second capacitor 22, the upper-arm first switch QH1, the first intermediate capacitor 31, the connection switch QX, the second intermediate capacitor 32, and the lower-arm first diode DL1. In detail, LC resonance occurs in this closed circuit due to the reactor 20 and the first and second intermediate capacitors 31 and 32 connected in series, causing a sinusoidal current to flow.

[0182] The control device 60 switches off the upper-arm first switch QH1 and the connection switch QX and switches on the upper-arm second switch QH2 and the regulating switches QY1 and QY2 when a half cycle Tr of the first resonance cycle Tc1 has elapsed since the start of Mode B. This transitions from Mode B to Mode A. At this time, soft switching of the ZCS can be achieved by switching off the upper-arm first switch QH1 and on the upper-arm second switch QH2, thereby reducing losses. Note that the period "2Tr" of Mode A is twice the period "Tr" of Mode B.

[0183] According to the low step-down control described above, the input voltages of the second high potential side terminal TH2 and the second low potential side terminal TL2 can be multiplied by approximately 1 / 3 and output from the first high potential side terminal TH1 and the first low potential side terminal TL1.

[0184] <Modification of the ninth embodiment> During the period of Mode A of the medium step-down control shown in FIG. 62, the regulating switches QY1 and QY2 may be kept off.

[0185] During the period of Mode B of the medium boost control shown in FIG. 65, the connection switch QX may be turned off.

[0186] During the periods of Modes A and B of the high step-down control shown in FIG. 68, the connection switch QX and the regulating switches QY1 and QY2 may be turned off.

[0187] In the low, medium, and high step-down control, the timing of switching from Mode A to Mode B and from Mode B to Mode A is not limited to the timing when the current iL flowing through the reactor 20 becomes 0, but may be the timing when the current iL becomes close to 0, as in the first embodiment.

[0188] The position of the reactor may be changed as shown in Fig. 71. Specifically, a reactor 23 may be provided in the electrical path connecting the source of the upper-arm first switch QH1 and the drain of the upper-arm second switch QH2 to the intermediate circuit 30.

[0189] Tenth Embodiment The tenth embodiment will be described below with reference to the drawings, focusing on differences from the eighth, ninth, and other embodiments. In this embodiment, as shown in FIG. 72, the power conversion device 10 includes four switches QH1, QH2, QL1, and QL2. As a result, the power conversion device 10 shown in FIG. 72 functions as a step-up circuit or a step-down circuit. When the control device 60 causes the power conversion device 10 to function as a step-up circuit, it only needs to keep the upper-arm first and second switches QH1 and QH2 off during the low, medium, and high step-up control shown in FIG. 43. When the control device 60 causes the power conversion device 10 to function as a step-down circuit, it only needs to keep the lower-arm first and second switches QL1 and QL2 off during the low, medium, and high step-down control shown in FIG. 58.

[0190] The control device 60 can also perform synchronous rectification control as follows. More specifically, when the power conversion device 10 is caused to function as a boost circuit, the control device 60 may turn on the upper-arm first and second switches QH1 and QH2 during a period when the body diodes are conductive (i.e., when a current flows from the source to the drain of the switch) instead of always keeping the upper-arm first and second switches QH1 and QH2 off. Furthermore, when the power conversion device 10 is caused to function as a step-down circuit, the control device 60 may turn on the lower-arm first and second switches QL1 and QL2 during a period when the body diodes are conductive instead of always keeping the lower-arm first and second switches QL1 and QL2 off.

[0191] <Modification of the Tenth Embodiment> The position of the reactor may be changed as shown in Fig. 73. Specifically, a reactor 23 may be provided in an electrical path connecting the source of the upper-arm first switch QH1 and the drain of the upper-arm second switch QH2 to the intermediate circuit 30.

[0192] Eleventh Embodiment The eleventh embodiment will be described below with reference to the drawings, focusing on differences from the ninth embodiment and the like. In this embodiment, as shown in Fig. 74, the power conversion device 10 includes a sub-reactor 70 and a sub-capacitor 71. The sub-reactor 70 and the sub-capacitor 71 are connected in series, and a first end of this series connection is connected to the source of the upper-arm first switch QH1 and the drain of the upper-arm second switch QH2. A second end of this series connection is connected to the second high potential side terminal TH2 and the drain of the upper-arm first switch QH1. The sub-reactor 70 and the sub-capacitor 71 are provided to reduce switching loss in the power conversion device 10. The above-mentioned high step-down control will be described below as an example.

[0193] To prevent the upper-arm first switch QH1 and the upper-arm second switch QH2 from being turned on simultaneously, dead times during which the upper-arm first switch QH1 and the upper-arm second switch QH2 are turned off are set between Mode A and Mode B, and between Mode B and Mode A. In FIG. 75, the dead time between Mode B and Mode A is indicated by Mode D1, and the dead time between Mode A and Mode B is indicated by Mode D2. In FIG. 75(b), the solid line indicates the transition of the voltage VQH1 across the upper-arm first switch QH1, and the dashed line indicates the transition of the voltage VQH2 across the upper-arm second switch QH2. In FIG. 75(c), the actual transition of the reactor current iL is shown, and the dashed line indicates the transition of the current izvs flowing through the sub-reactor 70 and the sub-capacitor 71. FIG. 75(d) shows the transition of the current icf flowing through the intermediate circuit 30. Note that izvs is very small compared to the maximum absolute value of iL.

[0194] FIG. 76 shows the state of Mode B, FIG. 77 shows the state of Mode D1, and FIG. 78 shows the state of Mode A. When the upper-arm first switch QH1 is switched from on to off, a transition is made from the state shown in FIG. 76 to the state shown in FIG. 77. In Mode D1, the minute current izvs that continues to flow through the sub-capacitor 71 and the sub-reactor 70 discharges the charge stored in the parasitic capacitance of the upper-arm second switch QH2. After the discharge of the stored charge is completed, the upper-arm second switch QH2 is switched on, thereby transitioning to Mode A. At this time, because the stored charge has already been discharged, it is possible to reduce the current flowing in the closed circuit including the parasitic capacitance, drain, and source of the upper-arm second switch QH2, and it is possible to reduce the switching loss of the upper-arm second switch QH2.

[0195] In Mode D2 after Mode A, the minute current izvs continuously flows through the sub-capacitor 71 and the sub-reactor 70, causing the charge stored in the parasitic capacitance of the upper-arm first switch QH1 to be discharged. After the discharge of the stored charge is complete, the upper-arm first switch QH1 is turned on, thereby transitioning to Mode B. At this time, because the stored charge has already been discharged, the switching loss of the upper-arm first switch QH1 can be reduced.

[0196] 79, ZVS indicates the relationship between the output power Pout and the power conversion efficiency of the power conversion device 10 according to this embodiment, and ZCS indicates the above relationship according to a comparative example that does not include the sub-reactor 70 and the sub-capacitor 71. According to this embodiment, the electrostatic energy of the parasitic capacitance of the switch can be recovered, thereby improving the efficiency compared to the comparative example.

[0197] <Modification of the eleventh embodiment> As shown in Fig. 80, one end of the series connection of the sub-reactor 70 and the sub-capacitor 71 may be connected to the first high potential side terminal TH1 and one end of the reactor 20. Also, as shown in Fig. 81, one end of the series connection of the sub-reactor 70 and the sub-capacitor 71 may be connected to the second low potential side terminal TL2 and the anode of the lower-arm second diode DL2. Also, one end of the series connection of the sub-reactor 70 and the sub-capacitor 71 may be connected to the first low potential side terminal TL1 and the anode of the lower-arm second diode DL2.

[0198] The position of the reactor may be changed as shown in Fig. 82. Specifically, a reactor 28 may be provided in an electrical path connecting the anode of the lower-arm first diode DL1 and the cathode of the lower-arm second diode DL2 to the intermediate circuit 30. In this case, the installation positions of the sub-reactor 70 and the sub-capacitor 71 may be as shown in Fig. 83 or 84.

[0199] The power conversion device 10 shown in Fig. 1 may be provided with a sub-reactor 70 and a sub-capacitor 71. In this case, for example, the configurations shown in Fig. 85, Fig. 86, and Fig. 87 may be employed. Furthermore, one end of the series connection of the sub-reactor 70 and the sub-capacitor 71 may be connected to the first low potential side terminal TL1.

[0200] The power conversion device 10 shown in Fig. 6 may be provided with a sub-reactor 70 and a sub-capacitor 71. In this case, for example, the configurations shown in Fig. 88, Fig. 89, and Fig. 90 may be employed. Furthermore, one end of the series connection of the sub-reactor 70 and the sub-capacitor 71 may be connected to the first low potential side terminal TL1.

[0201] <Other embodiments> The above-described embodiments may be modified as follows.

[0202] In the eighth to eleventh embodiments, each of the switches QY1, QY2, and QX in the intermediate circuit 30 may be an IGBT with a freewheel diode connected in anti-parallel. In this case, the collector and emitter directions of the first regulating switch QY1, the second regulating switch QY2, and the connection switch QX may be determined so as to enable current flow in each mode shown in the eighth to eleventh embodiments. Furthermore, when each of the switches QY1, QY2, and QX is configured with two IGBTs with freewheel diodes connected in anti-parallel, the emitter of the first IGBT and the collector of the second IGBT may be connected, and the collector of the first IGBT and the emitter of the second IGBT may be connected.

[0203] In the first to eleventh embodiments, the capacitance of the first intermediate capacitor 31 and the capacitance of the second intermediate capacitor 32 may be different.

[0204] In the first to eleventh embodiments, the switch section included in the power conversion device 10 is not limited to one semiconductor switch but may be a series connection of multiple semiconductor switches, and the diode section included in the power conversion device 10 is not limited to one diode but may be a series connection of multiple diodes. Fig. 91 shows an example in which, in the configuration shown in Fig. 1, the upper arm first and second diodes DH1 and DH2 are configured as a series connection of two diodes, and the lower arm first and second switches QL1 and QL2 are configured as a series connection of two N-channel MOSFETs. This allows each switch and each diode to be a low-voltage element. The same applies to the switches QY1, QY2, and QX included in the intermediate circuit 30 of the eighth to eleventh embodiments.

[0205] In the first to eleventh embodiments, the switch section included in the power conversion device 10 may be a parallel connection of multiple switches, and the diode section included in the power conversion device 10 may be a parallel connection of multiple diodes. Fig. 92 shows an example in which, in the configuration shown in Fig. 1, the upper arm first and second diodes DH1 and DH2 are configured as a parallel connection of two diodes, and the lower arm first and second switches QL1 and QL2 are configured as a parallel connection of two N-channel MOSFETs. This allows each switch and each diode to be an element with a low current capacity. The same applies to the switches QY1, QY2, and QX included in the intermediate circuit 30 of the eighth to eleventh embodiments.

[0206] In the first to seventh embodiments, the intermediate circuit 30 may be a circuit including first to third intermediate capacitors 31 to 33, first to fourth regulating diodes 41 to 44, and first and second connecting diodes DS1 and DS2, as shown in FIG. 93. In this case, the boost ratio in the boost control is approximately 1.33 (4 / 3). In FIG. 44, the first regulating diode 41 corresponds to the "upstream diode," the second regulating diode 42 corresponds to the "downstream diode," and the third intermediate capacitor 33 corresponds to the "midstream capacitor." Furthermore, the third regulating diode 43 corresponds to the "first midstream diode," and the fourth regulating diode 44 corresponds to the "second midstream diode."

[0207] Incidentally, the intermediate circuit 30 may include N intermediate capacitors (N is an integer equal to or greater than 4). In this case, the intermediate circuit 30 includes N-1 connecting diodes, one upstream diode and one downstream diode, and N-2 first midstream diodes and second midstream diodes. In this case, the boost ratio in the boost control is 1+1 / N.

[0208] 6, instead of between the connection point of the upper-arm first diode DH1 and the upper-arm second diode DH2 and the intermediate circuit 30, the reactor 23 may be provided between the connection point of the lower-arm first switch QL1 and the lower-arm second switch QL2 and the intermediate circuit 30. Also, in FIG. 18, instead of between the connection point of the upper-arm first switch QH1 and the upper-arm second switch QH2 and the intermediate circuit 30, the reactor 23 may be provided between the connection point of the lower-arm first switch QL1 and the lower-arm second switch QL2 and the intermediate circuit 30. Also, in FIG. 30, instead of between the connection point of the upper-arm first switch QH1 and the upper-arm second switch QH2 and the intermediate circuit 30, the reactor 23 may be provided between the connection point of the lower-arm first diode DL1 and the lower-arm second diode DL2 and the intermediate circuit 30.

[0209] The upper and lower arm switches included in the power conversion device 10 are not limited to N-channel MOSFETs, and may be, for example, IGBTs with freewheel diodes connected in antiparallel. [Explanation of symbols]

[0210] 10...power conversion device, 20...reactor, 30...intermediate circuit, DH1, DH2...upper arm first and second diodes, QL1, QL2...lower arm first and second switches, 60...control device

Claims

1. A power conversion device (10) that transforms a voltage input from input terminals (TH1, TH2; TL1, TL2) and outputs the transformed voltage from output terminals (TH2, TH1; TL2, TL1), a series connection of an upper arm first semiconductor portion (DH1, QH1) and an upper arm second semiconductor portion (DH2, QH2); a series connection of a lower arm first semiconductor portion (QL1, DL1) and a lower arm second semiconductor portion (QL2, DL2); an intermediate circuit (30) connecting an upper arm connection point, which is a connection point between the upper arm first semiconductor portion and the upper arm second semiconductor portion, and a lower arm connection point, which is a connection point between the lower arm first semiconductor portion and the lower arm second semiconductor portion; a reactor (20, 23, 28) connecting a connection point between the series-connected body of the upper arm first semiconductor portion and the upper arm second semiconductor portion and the series-connected body of the lower arm first semiconductor portion and the lower arm second semiconductor portion and the input terminal, between the upper arm connection point and the intermediate circuit, or between the lower arm connection point and the intermediate circuit; Equipped with The intermediate circuit has a plurality of intermediate capacitors (31 to 33) and rectifying elements (41 to 44, DS, DS1, DS2, QY1, QY2, QX), and is configured to be able to switch the connection state of each of the intermediate capacitors to a series connection state or a parallel connection state.

2. The rectifying elements are diodes (41 to 44, DS, DS1, DS2), 2. The power conversion device according to claim 1, wherein the intermediate circuit is configured such that the intermediate capacitors are connected in series when a current flows from the upper arm connection point side to the intermediate circuit, and the intermediate capacitors are connected in parallel when a current flows from the lower arm connection point side to the intermediate circuit.

3. A power conversion device that boosts a voltage input from a high potential side input terminal (TH1) and a low potential side input terminal (TL1) as the input terminals, and outputs the boosted voltage from a high potential side output terminal (TH2) and a low potential side output terminal (TL2) as the output terminals, the upper arm first semiconductor portion is an upper arm first diode portion (DH1), the upper arm second semiconductor portion is an upper arm second diode portion (DH2), the lower arm first semiconductor unit is a lower arm first switch unit (QL1), the lower arm second semiconductor unit is a lower arm second switch unit (QL2), the high potential side output terminal is connected to the cathode of the upper arm first diode section, a high-potential side of both ends of the lower-arm first switch section is connected to an anode of the upper-arm second diode section; the low potential side output terminal and the low potential side input terminal are connected to the low potential side of both ends of the lower arm second switch section, 3. The power conversion device according to claim 2, wherein the reactor is provided in an electrical path connecting the high potential side input terminal and the high potential side of the lower arm first switch unit, an electrical path connecting the upper arm connection point and the intermediate circuit, or an electrical path connecting the lower arm connection point and the intermediate circuit.

4. A power conversion device that boosts a voltage input from a high potential side input terminal (TH1) and a low potential side input terminal (TL1) as the input terminals, and outputs the boosted voltage from a high potential side output terminal (TH2) and a low potential side output terminal (TL2) as the output terminals, the upper arm first semiconductor unit is an upper arm first switch unit (QH1), the upper arm second semiconductor unit is an upper arm second switch unit (QH2), the lower arm first semiconductor unit is a lower arm first switch unit (QL1), the lower arm second semiconductor unit is a lower arm second switch unit (QL2), the high potential side output terminal is connected to a high potential side of both ends of the upper arm first switch section, a low potential side of one of both ends of the upper arm second switch section is connected to a high potential side of one of both ends of the lower arm first switch section; the low potential side output terminal and the low potential side input terminal are connected to the low potential side of both ends of the lower arm second switch section, 3. The power conversion device according to claim 2, wherein the reactor is provided in an electrical path connecting the high potential side input terminal and the high potential side of the lower arm first switch unit, an electrical path connecting the upper arm connection point and the intermediate circuit, or an electrical path connecting the lower arm connection point and the intermediate circuit.

5. a control device (60) that alternately executes Mode 1 in which the lower arm first switch unit is turned off and the lower arm second switch unit is turned on, and Mode 2 in which the lower arm first switch unit is turned on and the lower arm second switch unit is turned off; The power conversion device according to claim 3 , wherein the control device switches from one of the Mode 1 and the Mode 2 to the other at a timing when the current flowing through the reactor becomes close to zero.

6. a control device (60) that calculates a step-up ratio (VrtH) of an output voltage (VH) at the output terminal relative to an input voltage (VL) at the input terminal, The control device if the calculated step-up ratio is less than 1.5, a first step-up control is executed in which Mode 4 is executed to turn off the lower arm first switch unit and the lower arm second switch unit, Mode 2 is executed to turn off the lower arm first switch unit and turn on the lower arm second switch unit, Mode 4, and Mode 3 is executed to turn on the lower arm first switch unit and turn off the lower arm second switch unit, in this order; When the calculated boost ratio is 1.5, a second boost control is executed in which Mode 2 and Mode 3 are alternately repeated; If the calculated boost ratio exceeds 1.5, a third boost control is executed in which Mode 1, Mode 2, Mode 1, and Mode 3 are repeated in this order to turn on the lower arm first switch unit and the lower arm second switch unit; The power conversion device according to claim 3 or 4, wherein in each of the boost controls, a period of the Mode 3 is longer than a period of the Mode 2.

7. 7. The power conversion device according to claim 6, wherein the period of Mode 3 is 1.8 to 2.2 times as long as the period of Mode 2.

8. 5. The power conversion device according to claim 4, further comprising: a control device (60) that repeatedly executes, in this order: Mode 1, turning on the upper arm first switch unit and the lower arm first switch unit and turning off the upper arm second switch unit and the lower arm second switch unit; Mode 2, turning on the upper arm first switch unit and the lower arm second switch unit and turning off the upper arm second switch unit and the lower arm first switch unit; Mode 3, turning on the upper arm second switch unit and the lower arm second switch unit and turning off the upper arm first switch unit and the lower arm first switch unit; and Mode 4, turning on the upper arm second switch unit and the lower arm first switch unit and turning off the upper arm first switch unit and the lower arm second switch unit.

9. A power conversion device that steps down a voltage input from a high potential side input terminal (TH2) and a low potential side input terminal (TL2) as the input terminals, and outputs the voltage from a high potential side output terminal (TH1) and a low potential side output terminal (TL1) as the output terminals, the upper arm first semiconductor unit is an upper arm first switch unit (QH1), the upper arm second semiconductor unit is an upper arm second switch unit (QH2), the lower arm first semiconductor portion is a lower arm first diode portion (DL1), the lower arm second semiconductor portion is a lower arm second diode portion (DL2), the high potential side input terminal is connected to a high potential side of both ends of the upper arm first switch section, a cathode of the lower arm first diode section is connected to a lower potential side of both ends of the upper arm second switch section; the low potential side input terminal and the low potential side output terminal are connected to an anode of the lower arm second diode section, 3. The power conversion device according to claim 2, wherein the reactor is provided in an electrical path connecting the high potential side output terminal and the cathode of the lower arm first diode section, an electrical path connecting the upper arm connection point and the intermediate circuit, or an electrical path connecting the lower arm connection point and the intermediate circuit.

10. a control device (60) that alternately executes Mode 1 in which the upper arm first switch unit is turned on and the upper arm second switch unit is turned off, and Mode 2 in which the upper arm first switch unit is turned off and the upper arm second switch unit is turned on; The power conversion device according to claim 9 , wherein the control device switches from one of the Mode 1 and the Mode 2 to the other at a timing when the current flowing through the reactor becomes close to zero.

11. a control device (60) that calculates a step-down ratio (VrtL) of an output voltage (VL) of the output terminal relative to an input voltage (VH) of the input terminal, The control device if the calculated step-down ratio is less than 1 / 3, a first step-down control is executed in which Mode 3 is turned on and the upper-arm first switch unit is turned off, Mode 1 is turned off the upper-arm first switch unit and the upper-arm second switch unit, Mode 2 is turned off the upper-arm first switch unit and the upper-arm second switch unit is turned on, and Mode 1 is repeated in this order; If the calculated step-down ratio is 1 / 3, a second step-down control is executed in which Mode 3 and Mode 2 are alternately repeated; If the calculated step-down ratio exceeds 1 / 3, a third step-down control is executed in which Mode 3, Mode 4 in which the upper-arm first switch unit and the upper-arm second switch unit are turned on, Mode 2, and Mode 4 are repeated in this order; The power conversion device according to claim 9 , wherein in each step-down control, a period of the Mode 2 is longer than a period of the Mode 3.

12. The power conversion device according to claim 11, wherein the period of Mode 2 is 1.8 to 2.2 times as long as the period of Mode 3.

13. The intermediate circuit includes a first intermediate capacitor (31) and a second intermediate capacitor (32) as the plurality of intermediate capacitors, and a first regulating diode (41), a second regulating diode (42) and a connecting diode (DS) as the plurality of diodes, a first end of the first intermediate capacitor and a cathode of the second regulating diode are connected to the upper arm connection point; a cathode of the first regulating diode and an anode of the connecting diode are connected to a second end of the first intermediate capacitor; the cathode of the connecting diode is connected to the anode of the second regulating diode and a first end of a second intermediate capacitor; The power conversion device according to any one of claims 2 to 4 and 9 to 12, wherein a second end of the second intermediate capacitor and an anode of the first regulating diode are connected to the lower arm connection point.

14. The number of intermediate capacitors (31 to 33) is three or more, The intermediate circuit includes, as the diode, connecting diodes (DS1, DS2) that connect adjacent intermediate capacitors in order to connect the intermediate capacitors in series from the upper arm connection point to the lower arm connection point, and that are provided with their anodes facing the upper arm connection point and their cathodes facing the lower arm connection point; an upstream diode (41) having a cathode connected to one end of the intermediate capacitor (31) that is closest to the upper arm connection point among the intermediate capacitors and an anode connected to the lower arm connection point; a downstream diode (42) having an anode connected to one end of the intermediate capacitor (32) that is closest to the lower arm connection point among the intermediate capacitors and a cathode connected to the upper arm connection point; a first midstream diode (43) having an anode connected to a first end of a midstream capacitor (33) that is an intermediate capacitor other than the upstream diode and the downstream diode among the intermediate capacitors, and a cathode connected to the upper arm connection point; a second midstream diode (44) having a cathode connected to the second end of the midstream capacitor and an anode connected to the lower arm connection point; The power conversion device according to any one of claims 2 to 4 and 9 to 12, comprising:

15. A program applied to a power conversion device (10) that boosts a voltage input from a high potential side input terminal (TH1) and a low potential side input terminal (TL1) as input terminals and outputs the boosted voltage from a high potential side output terminal (TH2) and a low potential side output terminal (TL2) as output terminals, The power conversion device is a series connection of an upper arm first diode section (DH1) and an upper arm second diode section (DH2); a series connection of a lower arm first switch unit (QL1) and a lower arm second switch unit (QL2); an intermediate circuit (30) connecting an upper arm connection point, which is a connection point between the upper arm first diode section and the upper arm second diode section, and a lower arm connection point, which is a connection point between the lower arm first switch section and the lower arm second switch section; Reactors (20, 23), A computer, Equipped with the high potential side output terminal is connected to the cathode of the upper arm first diode section, a high-potential side of both ends of the lower-arm first switch section is connected to an anode of the upper-arm second diode section; the low potential side output terminal and the low potential side input terminal are connected to the low potential side of both ends of the lower arm second switch section, the reactor is provided in an electrical path connecting the high potential side input terminal and the high potential side of the lower arm first switch unit, an electrical path connecting the upper arm connection point and the intermediate circuit, or an electrical path connecting the lower arm connection point and the intermediate circuit, the intermediate circuit has a plurality of intermediate capacitors (31 to 33) and diodes (41 to 44, DS, DS1, DS2), and is configured such that when a current flows from the upper arm connection point side to the intermediate circuit, the intermediate capacitors are connected in series, and when a current flows from the lower arm connection point side to the intermediate circuit, the intermediate capacitors are connected in parallel, The computer, Alternately executing Mode 1 in which the lower arm first switch unit is turned off and the lower arm second switch unit is turned on and Mode 2 in which the lower arm first switch unit is turned on and the lower arm second switch unit is turned off, a program for executing switching from one of the Mode 1 and the Mode 2 to the other at a timing when the current flowing through the reactor becomes close to zero;

16. A program applied to a power conversion device (10) that boosts a voltage input from a high potential side input terminal (TH1) and a low potential side input terminal (TL1) as input terminals and outputs the boosted voltage from a high potential side output terminal (TH2) and a low potential side output terminal (TL2) as output terminals, The power conversion device is a series connection of an upper arm first diode section (DH1) and an upper arm second diode section (DH2); a series connection of a lower arm first switch unit (QL1) and a lower arm second switch unit (QL2); an intermediate circuit (30) connecting an upper arm connection point, which is a connection point between the upper arm first diode section and the upper arm second diode section, and a lower arm connection point, which is a connection point between the lower arm first switch section and the lower arm second switch section; Reactors (20, 23), A computer, Equipped with the high potential side output terminal is connected to the cathode of the upper arm first diode section, a high-potential side of both ends of the lower-arm first switch section is connected to an anode of the upper-arm second diode section; the low potential side output terminal and the low potential side input terminal are connected to the low potential side of both ends of the lower arm second switch section, the reactor is provided in an electrical path connecting the high potential side input terminal and the high potential side of the lower arm first switch unit, an electrical path connecting the upper arm connection point and the intermediate circuit, or an electrical path connecting the lower arm connection point and the intermediate circuit, the intermediate circuit has a plurality of intermediate capacitors (31 to 33) and diodes (41 to 44, DS, DS1, DS2), and is configured such that when a current flows from the upper arm connection point side to the intermediate circuit, the intermediate capacitors are connected in series, and when a current flows from the lower arm connection point side to the intermediate circuit, the intermediate capacitors are connected in parallel, The computer, Calculating a step-up ratio (VrtH) of an output voltage (VH) at the output terminal relative to an input voltage (VL) at the input terminal; if the calculated boost ratio is less than 1.5, a first boost control is executed in which Mode 4 is executed to turn off the lower arm first switch unit and the lower arm second switch unit, Mode 2 is executed to turn off the lower arm first switch unit and turn on the lower arm second switch unit, Mode 4, and Mode 3 is executed to turn on the lower arm first switch unit and turn off the lower arm second switch unit, in this order; When the calculated boost ratio is 1.5, a second boost control is executed in which Mode 2 and Mode 3 are alternately repeated; If the calculated boost ratio exceeds 1.5, a third boost control is executed in which Mode 1, Mode 2, Mode 1, and Mode 3 are repeated in this order to turn on the lower arm first switch unit and the lower arm second switch unit; In each of the boost controls, the period of Mode 3 is longer than the period of Mode 2.

17. A program applied to a power conversion device (10) that boosts a voltage input from a high potential side input terminal (TH1) and a low potential side input terminal (TL1) as input terminals and outputs the boosted voltage from a high potential side output terminal (TH2) and a low potential side output terminal (TL2) as output terminals, The power conversion device is a series connection of an upper arm first switch section (QH1) and an upper arm second switch section (QH2); a series connection of a lower arm first switch unit (QL1) and a lower arm second switch unit (QL2); an intermediate circuit (30) connecting an upper arm connection point, which is a connection point between the upper arm first switch unit and the upper arm second switch unit, and a lower arm connection point, which is a connection point between the lower arm first switch unit and the lower arm second switch unit; Reactors (20, 23), A computer, Equipped with the high potential side output terminal is connected to a high potential side of both ends of the upper arm first switch section, a low potential side of one of both ends of the upper arm second switch section is connected to a high potential side of one of both ends of the lower arm first switch section; the low potential side output terminal and the low potential side input terminal are connected to the low potential side of both ends of the lower arm second switch section, the reactor is provided in an electrical path connecting the high potential side input terminal and the high potential side of the lower arm first switch unit, an electrical path connecting the upper arm connection point and the intermediate circuit, or an electrical path connecting the lower arm connection point and the intermediate circuit, the intermediate circuit has a plurality of intermediate capacitors (31 to 33) and diodes (41 to 44, DS, DS1, DS2), and is configured such that when a current flows from the upper arm connection point side to the intermediate circuit, the intermediate capacitors are connected in series, and when a current flows from the lower arm connection point side to the intermediate circuit, the intermediate capacitors are connected in parallel, The computer, A program that repeatedly executes, in this order, Mode 1, which turns on the upper arm first switch unit and the lower arm first switch unit and turns off the upper arm second switch unit and the lower arm second switch unit; Mode 2, which turns on the upper arm first switch unit and the lower arm second switch unit and turns off the upper arm second switch unit and the lower arm first switch unit; Mode 3, which turns on the upper arm second switch unit and the lower arm second switch unit and turns off the upper arm first switch unit and the lower arm first switch unit; and Mode 4, which turns on the upper arm second switch unit and the lower arm first switch unit and turns off the upper arm first switch unit and the lower arm second switch unit.

18. A program applied to a power conversion device (10) that steps down a voltage input from a high potential side input terminal (TH2) and a low potential side input terminal (TL2) as input terminals and outputs the voltage from a high potential side output terminal (TH1) and a low potential side output terminal (TL1) as output terminals, The power conversion device is a series connection of an upper arm first switch section (QH1) and an upper arm second switch section (QH2); a series connection of a lower arm first diode section (DL1) and a lower arm second diode section (DL2); an intermediate circuit (30) connecting an upper arm connection point, which is a connection point between the upper arm first switch section and the upper arm second switch section, and a lower arm connection point, which is a connection point between the lower arm first diode section and the lower arm second diode section; Reactors (20, 23), A computer, Equipped with the high potential side input terminal is connected to a high potential side of both ends of the upper arm first switch section, a cathode of the lower arm first diode section is connected to a lower potential side of both ends of the upper arm second switch section; the low potential side input terminal and the low potential side output terminal are connected to an anode of the lower arm second diode section, the reactor is provided in an electrical path connecting the high potential side output terminal and the cathode of the lower arm first diode section, an electrical path connecting the upper arm connection point and the intermediate circuit, or an electrical path connecting the lower arm connection point and the intermediate circuit, the intermediate circuit has a plurality of intermediate capacitors (31 to 33) and diodes (41 to 44, DS, DS1, DS2), and is configured such that when a current flows from the upper arm connection point side to the intermediate circuit, the intermediate capacitors are connected in series, and when a current flows from the lower arm connection point side to the intermediate circuit, the intermediate capacitors are connected in parallel, The computer, Alternately executing Mode 1 in which the upper arm first switch unit is turned on and the upper arm second switch unit is turned off and Mode 2 in which the upper arm first switch unit is turned off and the upper arm second switch unit is turned on, a program for executing switching from one of the Mode 1 and the Mode 2 to the other at a timing when the current flowing through the reactor becomes close to zero;

19. A program applied to a power conversion device (10) that steps down a voltage input from a high potential side input terminal (TH2) and a low potential side input terminal (TL2) as input terminals and outputs the voltage from a high potential side output terminal (TH1) and a low potential side output terminal (TL1) as output terminals, The power conversion device is a series connection of an upper arm first switch section (QH1) and an upper arm second switch section (QH2); a series connection of a lower arm first diode section (DL1) and a lower arm second diode section (DL2); an intermediate circuit (30) connecting an upper arm connection point, which is a connection point between the upper arm first switch section and the upper arm second switch section, and a lower arm connection point, which is a connection point between the lower arm first diode section and the lower arm second diode section; Reactors (20, 23), A computer, Equipped with the high potential side input terminal is connected to a high potential side of both ends of the upper arm first switch section, a cathode of the lower arm first diode section is connected to a lower potential side of both ends of the upper arm second switch section; the low potential side input terminal and the low potential side output terminal are connected to an anode of the lower arm second diode section, the reactor is provided in an electrical path connecting the high potential side output terminal and the cathode of the lower arm first diode section, an electrical path connecting the upper arm connection point and the intermediate circuit, or an electrical path connecting the lower arm connection point and the intermediate circuit, the intermediate circuit has a plurality of intermediate capacitors (31 to 33) and diodes (41 to 44, DS, DS1, DS2), and is configured such that when a current flows from the upper arm connection point side to the intermediate circuit, the intermediate capacitors are connected in series, and when a current flows from the lower arm connection point side to the intermediate circuit, the intermediate capacitors are connected in parallel, The computer, Calculating a step-down ratio (VrtL) of an output voltage (VL) at the output terminal relative to an input voltage (VH) at the input terminal; if the calculated step-down ratio is less than 1 / 3, a first step-down control is executed in which Mode 3 is turned on and the upper-arm first switch unit is turned off, Mode 1 is turned off the upper-arm first switch unit and the upper-arm second switch unit, Mode 2 is turned off the upper-arm first switch unit and the upper-arm second switch unit is turned on, and Mode 1 is repeated in this order; If the calculated step-down ratio is 1 / 3, a second step-down control is executed in which Mode 3 and Mode 2 are alternately repeated; If the calculated step-down ratio exceeds 1 / 3, a third step-down control is executed in which Mode 3, Mode 4 in which the upper-arm first switch unit and the upper-arm second switch unit are turned on, Mode 2, and Mode 4 are repeated in this order; In each step-down control, the period of Mode 2 is longer than the period of Mode 3.

20. The intermediate circuit has a first intermediate capacitor (31) and a second intermediate capacitor (32) as the plurality of intermediate capacitors, and a first regulating switch unit (QY1), a second regulating switch unit (QY2) and a connection switch unit (QX) as the plurality of rectifying elements, a high potential side of both ends of the first regulating switch unit and a first end of the first intermediate capacitor are connected to the upper arm connection point; a second terminal of the first intermediate capacitor is connected to a high potential side of both ends of the second regulating switch unit and a first terminal of the connection switch unit; a second terminal of the connection switch unit and a first terminal of the second intermediate capacitor are connected to a low-potential side of both ends of the first regulation switch unit; a low-potential side of both ends of the second regulating switch unit and a second end of the second intermediate capacitor are connected to the lower arm connection point; 2. The power conversion device according to claim 1, further comprising: a control device (60) that performs drive control of the first regulating switch unit, the second regulating switch unit, and the connection switch unit in order to switch a connection state of each of the intermediate capacitors between a series connection state and a parallel connection state.

21. A power conversion device that boosts a voltage input from a high potential side input terminal (TH1) and a low potential side input terminal (TL1) as the input terminals, and outputs the boosted voltage from a high potential side output terminal (TH2) and a low potential side output terminal (TL2) as the output terminals, the upper arm first semiconductor portion is an upper arm first diode portion (DH1), the upper arm second semiconductor portion is an upper arm second diode portion (DH2), the lower arm first semiconductor unit is a lower arm first switch unit (QL1), the lower arm second semiconductor unit is a lower arm second switch unit (QL2), the high potential side output terminal is connected to the cathode of the upper arm first diode section, a high-potential side of both ends of the lower-arm first switch section is connected to an anode of the upper-arm second diode section; the low potential side output terminal and the low potential side input terminal are connected to the low potential side of both ends of the lower arm second switch section, 21. The power conversion device according to claim 20, wherein the reactor is provided in an electrical path connecting the high potential side input terminal and the high potential side of the lower arm first switch unit, an electrical path connecting the upper arm connection point and the intermediate circuit, or an electrical path connecting the lower arm connection point and the intermediate circuit.

22. a control device (60) that alternately executes Mode A in which the lower arm first switch unit is turned off, the lower arm second switch unit is turned on, the first restriction switch unit and the second restriction switch unit are turned off, and the connection switch unit is turned on or off, and Mode B in which the lower arm first switch unit is turned on, the lower arm second switch unit is turned off, the first restriction switch unit and the second restriction switch unit are turned on or off, and the connection switch unit is turned off, The power conversion device according to claim 21 , wherein the control device switches from one of the Mode A and the Mode B to the other at a timing when the current flowing through the reactor becomes close to zero.

23. a control device (60) that alternately executes Mode A in which the lower arm first switch unit is turned off, the lower arm second switch unit is turned on, the first restriction switch unit and the second restriction switch unit are turned on, and the connection switch unit is turned off, and Mode B in which the lower arm first switch unit is turned on, the lower arm second switch unit is turned off, the first restriction switch unit and the second restriction switch unit are turned on or off, and the connection switch unit is turned off, The power conversion device according to claim 21 , wherein the control device switches from one of the Mode A and the Mode B to the other at a timing when the current flowing through the reactor becomes close to zero.

24. a control device (60) that alternately executes Mode A in which the lower arm first switch unit is turned off, the lower arm second switch unit is turned on, the first restriction switch unit and the second restriction switch unit are turned off, and the connection switch unit is turned on or off, and Mode B in which the lower arm first switch unit is turned on, the lower arm second switch unit is turned off, the first restriction switch unit and the second restriction switch unit are turned off, and the connection switch unit is turned on, The power conversion device according to claim 21 , wherein the control device switches from one of the Mode A and the Mode B to the other at a timing when the current flowing through the reactor becomes close to zero.

25. a control device (60) that alternately executes Mode A in which the lower arm first switch unit is turned off, the lower arm second switch unit is turned on, the first restriction switch unit and the second restriction switch unit are turned on, and the connection switch unit is turned off, and Mode B in which the lower arm first switch unit is turned on, the lower arm second switch unit is turned off, the first restriction switch unit and the second restriction switch unit are turned off, and the connection switch unit is turned on, The power conversion device according to claim 21 , wherein the control device switches from one of the Mode A and the Mode B to the other at a timing when the current flowing through the reactor becomes close to zero.

26. A power conversion device that steps down a voltage input from a high potential side input terminal (TH2) and a low potential side input terminal (TL2) as the input terminals, and outputs the voltage from a high potential side output terminal (TH1) and a low potential side output terminal (TL1) as the output terminals, the upper arm first semiconductor unit is an upper arm first switch unit (QH1), the upper arm second semiconductor unit is an upper arm second switch unit (QH2), the lower arm first semiconductor portion is a lower arm first diode portion (DL1), the lower arm second semiconductor portion is a lower arm second diode portion (DL2), the high potential side input terminal is connected to a high potential side of both ends of the upper arm first switch section, a cathode of the lower arm first diode section is connected to a lower potential side of both ends of the upper arm second switch section; the low potential side input terminal and the low potential side output terminal are connected to an anode of the lower arm second diode section, 21. The power conversion device according to claim 20, wherein the reactor is provided in an electrical path connecting the high potential side output terminal and the cathode of the lower arm first diode section, an electrical path connecting the upper arm connection point and the intermediate circuit, or an electrical path connecting the lower arm connection point and the intermediate circuit.

27. a control device (60) that alternately executes Mode A in which the upper arm first switch unit is turned off, the upper arm second switch unit is turned on, the first restriction switch unit and the second restriction switch unit are turned off, and the connection switch unit is turned on, and Mode B in which the upper arm first switch unit is turned on, the upper arm second switch unit is turned off, the first restriction switch unit and the second restriction switch unit are turned on, and the connection switch unit is turned off, The power conversion device according to claim 26, wherein the control device switches from one of the Mode A and the Mode B to the other at a timing when the current flowing through the reactor becomes close to zero.

28. a control device (60) that alternately executes Mode A in which the upper arm first switch unit is turned off, the upper arm second switch unit is turned on, the first restriction switch unit and the second restriction switch unit are turned on or off, and the connection switch unit is turned off, and Mode B in which the upper arm first switch unit is turned on, the upper arm second switch unit is turned off, the first restriction switch unit and the second restriction switch unit are turned on, and the connection switch unit is turned off, The power conversion device according to claim 26, wherein the control device switches from one of the Mode A and the Mode B to the other at a timing when the current flowing through the reactor becomes close to zero.

29. a control device (60) that alternately executes Mode A in which the upper arm first switch unit is turned off, the upper arm second switch unit is turned on, the first restriction switch unit and the second restriction switch unit are turned off, and the connection switch unit is turned on, and Mode B in which the upper arm first switch unit is turned on, the upper arm second switch unit is turned off, the first restriction switch unit and the second restriction switch unit are turned off, and the connection switch unit is turned on or off, The power conversion device according to claim 26, wherein the control device switches from one of the Mode A and the Mode B to the other at a timing when the current flowing through the reactor becomes close to zero.

30. a control device (60) that alternately executes Mode A in which the upper arm first switch unit is turned off, the upper arm second switch unit is turned on, the first restriction switch unit and the second restriction switch unit are turned on or off, and the connection switch unit is turned off, and Mode B in which the upper arm first switch unit is turned on, the upper arm second switch unit is turned off, the first restriction switch unit and the second restriction switch unit are turned off, and the connection switch unit is turned on or off, The power conversion device according to claim 26, wherein the control device switches from one of the Mode A and the Mode B to the other at a timing when the current flowing through the reactor becomes close to zero.

31. the upper arm first semiconductor unit is an upper arm first switch unit (QH1), the upper arm second semiconductor unit is an upper arm second switch unit (QH2), the lower arm first semiconductor unit is a lower arm first switch unit (QL1), the lower arm second semiconductor unit is a lower arm second switch unit (QL2), a high potential side output terminal serving as the output terminal is connected to a high potential side of both ends of the upper arm first switch section; a low potential side of one of both ends of the upper arm second switch section is connected to a high potential side of one of both ends of the lower arm first switch section; a low potential side output terminal serving as the output terminal and a low potential side input terminal serving as the input terminal are connected to a low potential side of both ends of the lower arm second switch section, 21. The power conversion device according to claim 20, wherein the reactor is provided in an electrical path connecting a high potential side input terminal as the input terminal and a high potential side of the lower arm first switch unit, an electrical path connecting the upper arm connection point and the intermediate circuit, or an electrical path connecting the lower arm connection point and the intermediate circuit.

32. A sub-reactor (70) and a sub-capacitor (71) are connected in series, a first end of a series connection of the sub-reactor and the sub-capacitor is connected to a connection point of the lower-arm first switch unit and the lower-arm second switch unit; The power conversion device according to any one of claims 21 to 25 and 31, wherein a second end of the series connection of the sub-reactor and the sub-capacitor is connected to the low potential side output terminal, the high potential side input terminal, the high potential side output terminal, or the low potential side input terminal.

33. A sub-reactor (70) and a sub-capacitor (71) are connected in series, a first end of a series connection of the sub-reactor and the sub-capacitor is connected to a connection point between the upper arm first switch unit and the upper arm second switch unit; A power conversion device according to any one of claims 26 to 31, wherein a second end of the series connection of the sub-reactor and the sub-capacitor is connected to any one of the high-potential side output terminal, the low-potential side input terminal, the high-potential side input terminal, or the low-potential side output terminal.

34. A program applied to a power conversion device (10) that transforms a voltage input from input terminals (TH1, TH2; TL1, TL2) and outputs the transformed voltage from output terminals (TH2, TH1; TL2, TL1), The power conversion device is a series connection of an upper arm first semiconductor portion (DH1, QH1) and an upper arm second semiconductor portion (DH2, QH2); a series connection of a lower arm first semiconductor portion (QL1, DL1) and a lower arm second semiconductor portion (QL2, DL2); an intermediate circuit (30) connecting an upper arm connection point, which is a connection point between the upper arm first semiconductor portion and the upper arm second semiconductor portion, and a lower arm connection point, which is a connection point between the lower arm first semiconductor portion and the lower arm second semiconductor portion; a reactor (20, 23, 28) connecting a connection point between the series-connected body of the upper arm first semiconductor portion and the upper arm second semiconductor portion and the series-connected body of the lower arm first semiconductor portion and the lower arm second semiconductor portion and the input terminal, between the upper arm connection point and the intermediate circuit, or between the lower arm connection point and the intermediate circuit; A computer, Equipped with The intermediate circuit includes a first intermediate capacitor (31), a second intermediate capacitor (32), a first regulating switch unit (QY1), a second regulating switch unit (QY2), and a connection switch unit (QX), a high potential side of both ends of the first regulating switch unit and a first end of the first intermediate capacitor are connected to the upper arm connection point; a second terminal of the first intermediate capacitor is connected to a high potential side of both ends of the second regulating switch unit and a first terminal of the connection switch unit; a second terminal of the connection switch unit and a first terminal of the second intermediate capacitor are connected to a low-potential side of both ends of the first regulation switch unit; a low-potential side of both ends of the second regulating switch unit and a second end of the second intermediate capacitor are connected to the lower arm connection point; The computer, a program that controls the driving of the first regulating switch unit, the second regulating switch unit, and the connection switch unit in order to switch the connection state of each of the intermediate capacitors to a series connection state or a parallel connection state;

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