Method for forming high dielectric constant metal oxides

By doping silicon into high-dielectric-constant metal oxides using trisilylamine, the method addresses non-uniform interfacial layers and reduces production costs in semiconductor manufacturing, enhancing dielectric performance and simplifying the process.

JP7839611B2Active Publication Date: 2026-04-02PENTAPRO MATERIAL INC
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2025-02-23
Publication Date
2026-04-02

AI Technical Summary

Technical Problem

Conventional methods for forming high-dielectric-constant gate oxide films in semiconductor manufacturing, such as using hafnium oxide, result in non-uniform interfacial layers due to oxygen diffusion, leading to leakage and reduced effective dielectric constants, and require expensive ISSG processes and high-temperature combustion, increasing production costs.

Method used

A method involving the use of trisilylamine (TSA) to dope silicon into high-dielectric-constant metal oxides like HfO2 during deposition, forming a high-quality SiO2 interface layer during annealing, eliminating the need for separate ISSG processes and reducing production costs.

Benefits of technology

This approach simplifies the manufacturing process, suppresses leakage, and enhances the effective dielectric constant by naturally forming a high-quality SiO2 interface layer, improving charge retention and dielectric performance.

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Abstract

To provide a method for forming a high dielectric constant (high-k) metal-oxide capable of reducing a cost and simplifying a process because a conventional ISSG process is not required, and capable of excellently forming a substrate interface layer (barrier layer) with high performance by generating SiH3 using a small amount of trisilylamine (TSA, chemical formula: N (SiO2) 3) and combining it with an organometallic compound precursor.SOLUTION: The method uses TSA to form a trace amount of SiO2 and combines with an organometallic precursor, such as TEMAH or TDMAH, to or deposit the SiO2 in the metal-oxide. By high-temperature annealing performed after deposition, Si / O atoms doped in the film move to the interface with the substrate to form a high-quality side SiO2 interface layer. Thereby, leakage is suppressed, and a high dielectric constant, a low leakage current, a high breakdown voltage, and high reliability are realized.SELECTED DRAWING: None
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Description

[Technical Field]

[0001] This invention belongs to the field of semiconductor manufacturing and, in particular, relates to a technique for forming high-dielectric-constant (high-k) metal oxide thin films used as gate oxide films for transistors. [Background technology]

[0002] In recent years, as semiconductor manufacturing has advanced to the nanometer scale, the ability to form high-quality gate oxide films with high dielectric constants has become a crucial technology. Conventional silicon oxide films (SiO2) and silicon nitride films (Si3N4) do not have sufficient dielectric constants, limiting their use as gate dielectric films in nanometer-scale CMOS (complementary metal-oxide-semiconductor) processes. Therefore, using metal oxide films with higher dielectric constants as gate dielectric films has become an inevitable choice.

[0003] Currently, the most common high dielectric constant material is hafnium oxide (HfO2), and a typical method of forming it involves depositing an alkylamide-based organometallic precursor (e.g., tetra(ethylmethylamino)hafnium (TEMAH) or tetra(dimethylamide)hafnium (TDMAH)) as a monolayer on a standard cleaned silicon substrate using atomic layer deposition (ALD) technology, then heating it to a specific temperature in an oxygen source atmosphere (H2O, O3, or oxygen plasma, etc.) to form an HfO2 thin film on the silicon wafer surface, and repeating this process. However, in the subsequent high-temperature annealing process, oxygen in the HfO2 diffuses with the silicon substrate (if the substrate is silicon), resulting in a non-uniform coating of SiO2 or silicate (M) at the Si / HfO2 interface. x Si y O z An interfacial layer is formed, which is of poor quality and causes leakage, affecting the crystallization behavior of HfO2 and significantly reducing the effective dielectric constant (k value). [Overview of the project] [Problems that the invention aims to solve]

[0004] Conventionally, ISSG (in-situ steam generation) technology is used to first form a high-density, ultra-thin, and homogeneous high-quality SiO2 layer on the silicon wafer surface by introducing ozone or steam, and then depositing HfO2. This high-density SiO2 layer effectively blocks the diffusion of HfO2 between the HfO2 and the substrate silicon, improving the effective dielectric constant. However, ISSG process technology and equipment are expensive, and an additional high-temperature combustion process is required, further increasing production costs. Therefore, there is a strong demand for a method of forming high-dielectric-constant metal gate oxide films that simplifies the manufacturing process and reduces production costs. [Means for solving the problem]

[0005] This invention provides a technique for generating SiO2 using a small amount of trisilylamine (TSA, chemical formula N(SiH3)3), and adding it to a high dielectric constant metal oxide (hereinafter, in the examples herein, HfO2 is the main example) in combination with an organometallic compound precursor such as TEMAH or TDMAH. Using TSA as a precursor, SiO2 and HfO2 are mixed or layered using an oxygen source (H2O, O3, oxygen plasma, etc.) in an ALD (atomic layer deposition) or CVD (chemical vapor deposition) process to finally obtain silicon-doped HfO2. In the subsequent high-temperature annealing process, the silicon / oxygen atoms doped in the film diffuse to the interface between the silicon substrate and HfO2, forming a high-quality SiO2 interface layer. This eliminates the need for the conventional ISSG process of "pre-forming an SiO2 barrier layer before depositing HfO2," simplifying the process while obtaining a high effective dielectric constant.

[0006] Alternatively, it is possible to perform ALD using TSA as a precursor, depositing high-quality SiO2 onto a standard-cleaned silicon substrate surface, and then subsequently depositing a high-dielectric-constant metal oxide using the same apparatus. This eliminates the need to switch to a different type of apparatus, such as an ISSG, to produce an ultrathin SiO2 layer, thus simplifying the manufacturing flow.

[0007] Furthermore, the method of the present invention is also applicable to the manufacturing of dielectric layers for DRAM capacitors, and has the effect of improving dielectric constant while suppressing leakage current. Currently, high dielectric constant metal oxides (HfO2, ZrO2, La2O3, Al2O3, etc.) or metal-doped ternary oxides (Al, Zr, Si, lanthanides) are used as dielectric layers for DRAM capacitors and gate oxide films for transistors. For example, doping HfO2 with Al promotes a phase transition to a higher dielectric constant phase (orthorhombic) or suppresses leakage due to grain boundaries, but during high-temperature annealing, the diffusion of Al into the silicon substrate causes spikes, increasing leakage and reducing effective capacitance. Therefore, a method is ultimately adopted in which a high-quality SiO2 barrier layer is first formed on the silicon wafer surface, and then high-performance metal oxides are laminated afterward. By using the method of the present invention, even in the high dielectric constant metal oxide process for DRAM capacitors, leakage can be suppressed by naturally generating a high-quality SiO2 interface layer during annealing, thereby improving the charge retention performance of the capacitor and the overall effective dielectric constant.

[0008] To further clarify the above features and advantages, preferred embodiments are described below in detail with reference to the drawings. [Brief explanation of the drawing]

[0009] [Figure 1A] This is a schematic diagram of the atomic layer deposition (ALD) system and its process. [Figure 1B] This is a schematic diagram of the atomic layer deposition (ALD) system and its process. [Figure 2A] This is a cross-sectional view showing a conventional method for forming a metal oxide dielectric layer. [Figure 2B]This is a cross-sectional view showing a conventional method for forming a metal oxide dielectric layer. [Figure 2C] This is a cross-sectional view showing a conventional method for forming a metal oxide dielectric layer. [Figure 2D] This is a cross-sectional view showing a conventional method for forming a metal oxide dielectric layer. [Figure 2E] This is a cross-sectional view showing a conventional method for forming a metal oxide dielectric layer. [Figure 3A] This is a cross-sectional view of the process of the method for forming a high dielectric metal oxide according to the present invention. [Figure 3B] This is a cross-sectional view of the process of the method for forming a high dielectric metal oxide according to the present invention. [Figure 3C] This is a cross-sectional view of the process of the method for forming a high dielectric metal oxide according to the present invention. [Figure 3D] This is a cross-sectional view of the process of the method for forming a high dielectric metal oxide according to the present invention. [Figure 4] This graph shows the results of X-ray photoelectron spectroscopy (XPS) compositional analysis after depositing and annealing an HfO2 thin film containing 4% TSA-based precursor according to the present invention. [Figure 5] This is a diagram showing the process flow according to the present invention. [Modes for carrying out the invention]

[0010] The following describes the differences between embodiments of the present invention and the prior art with reference to the drawings. The drawings are merely schematic examples to facilitate explanation and do not limit the scope of the present invention. Also, the same reference numerals indicate similar elements.

[0011] First, referring to Figures 1A and 1B, Figure 1A shows a schematic diagram of the ALD system 100. The ALD system 100 comprises a reaction chamber 101, into which a precursor 103 supplied via a precursor introduction line 102 is introduced into the reaction chamber 101 at a predetermined timing and flow rate pattern 104, adsorbed on the surface of a substrate 105 maintained at a specific temperature, and a desired thin film is formed.

[0012] FIG. 1B is a diagram schematically showing an ALD process taking HfO2 deposition as an example. In step A, tetrakis(ethylmethylamino)hafnium (TEMAH) is introduced for about 1000 ms and saturatedly adsorbed on the surface of substrate 105. In step B, N2 is purged for about 1500 ms to remove excess TEMAH, leaving only a monolayer of TEMAH on the substrate surface. In step C, H2O is introduced for about 1000 ms while maintaining the substrate temperature at about 150 to 300 °C, and the reaction between H2O and TEMAH is allowed to proceed to form HfO2 on the surface of substrate 105. In step D, N2 is purged again for about 1500 ms to remove excess H2O and by-products.

[0013] Thus, the characteristic of ALD is that only one type of precursor is introduced at a time, and after the reaction, excess precursors and by-products are purged with an inert gas (such as Ar or N2) to perform self-controlled film formation. By repeating these steps A to D as one cycle until the desired film thickness is reached, a high-quality metal oxide dielectric layer can be formed.

[0014] FIGS. 2A to 2E are process diagrams schematically showing a conventional method for forming a metal oxide dielectric layer. As shown in FIG. 2A, first, substrate 201 is prepared. In a nanometer-scale semiconductor process, in addition to a flat silicon wafer, wafers with a fin structure or wafers with a columnar structure for capacitors formed thereon are targets. First, the natural oxide film on the substrate surface is removed.

[0015] Next, as shown in FIG. 2B, an ultrathin and high-density SiO2 layer 202 is formed on substrate 201 using an in-situ steam generation (ISSG) process. At that time, oxygen or hydrogen is used as the reaction gas, and the O2 flow rate is 10 to 30 slm, the H2 flow rate is 5 to 15 slm, and the ratio of O2:H2 is about 2:1. High-temperature conditions such as an operating pressure of 20 Torr or less and a substrate temperature of over 1000 °C are common.

[0016] As shown in Figure 2C, a high dielectric constant metal oxide film 203 is then deposited using ALD. Examples of high dielectric constant metal oxide films include HfO2, ZrO2, La2O3, Al2O3, or ternary oxides doped with Al, Zr, Si, lanthanides, etc. Taking HfO2 as an example, TEMAH or TDMAH is used as the precursor, the pulse time is about 0.5 to 2 seconds, and the substrate temperature is about 25 to 150°C. H2O, O3, or O2 plasma is used as the oxygen source, the flow rate is 50 to 100 sccm, the substrate temperature is 150 to 300°C, and the operating pressure is 10 -2 ~10 2 Torr pulse duration can be set to approximately 0.5 to 2 seconds.

[0017] In the process shown in Figure 2D, RTA (Rapid Thermal Annealing) is performed to optimize the crystal structure and leakage current characteristics of the metal oxide dielectric film. This is done under an inert atmosphere such as Ar or N2, with a gas flow rate of 0.5-10 slm and a pressure of 10°C. -2 ~10 2 Torr is typically defined as a temperature of 400-900°C and a duration of less than 60 seconds.

[0018] Finally, as shown in Figure 2E, a gate electrode material 204 (e.g., TiN, TaN, etc.) is deposited on the high dielectric constant metal oxide film 203.

[0019] Figures 3A to 3D are schematic process diagrams illustrating the deposition method of a metal oxide dielectric layer according to the present invention. Figure 3A shows the state after the native oxide film on the substrate 301 has been removed, similar to the conventional example.

[0020] Next, as shown in Figure 3B, conventionally a high-quality SiO2 layer was formed first. However, in the present invention, in the ALD process, a metal oxide precursor containing trisilylamine (TSA) is introduced, and the metal oxide 303 is deposited in a state where silicon (or SiO2) is doped in a certain ratio. This results in a state in which silicon is mixed with the metal oxide during the deposition stage.

[0021] Next, as shown in FIG. 3C, RTA is performed to optimize the metal oxide 303 again. It has been confirmed that by this process, the silicon atoms doped in the metal oxide diffuse to the interface between the substrate 301 and the metal oxide 303, forming a high-density SiO2 interface layer 302. That is, in the present invention, SiO2 deposition by ISSG becomes unnecessary, and simplification of the process and cost reduction can be achieved simultaneously.

[0022] Specifically, taking HfO2 as an example, in the present invention, the doping concentration of TSA is set to about 0.1 to 10%, and CVD is performed in a state where TSA is mixed with an HfO2 precursor such as TEMAH or TDMAH, or ALD is performed, and after repeatedly depositing until the desired film thickness is reached, annealing is performed once. As another method, there is also a method of laminating by repeating procedures such as (1) ALD (1 cycle) of SiO2 using TSA → (2) ALD (24 cycles) of HfO2 using TEMAH. In any case, finally, by performing RTA, the layer structure of FIG. 3C is obtained, and the crystal structure of HfO2 is also optimized (a higher dielectric constant can be expected in the orthorhombic phase or tetragonal phase).

[0023] As an example of the HfO2 deposition conditions, the TSA precursor temperature is 25 to 150 °C, the pulse time is 0.5 to 2 seconds, the substrate temperature is 150 to 450 °C, the flow rate of the oxygen source (such as H2O, O3, O2 plasma, etc.) is 30 to 200 sccm, and the operating pressure is 10 -2 ~10 2 Torr, etc. The RTA process can be carried out at 300 to 1100 °C for 60 seconds or less, using Ar or N2 as the atmosphere, with a flow rate of 0.5 to 10 slm and a pressure of 10 2 ~10 -2 Torr.

[0024] Figure 4 is graph 400, showing the XPS composition depth profiling analysis after depositing an HfO2 thin film containing approximately 4% silicon on a silicon substrate according to the present invention and subsequently performing RTA. Curve 401 shows the hafnium (Hf) concentration, 402 shows the oxygen (O) concentration, and 403 shows the silicon (Si) concentration. In the region shown by the elliptical portion 404 in the figure, the Hf signal weakens and the Si signal strengthens, but the O signal remains stable, suggesting the presence of an SiO2 interface layer there. In other words, according to the present invention, a high-quality SiO2 interface layer (302) is naturally formed between HfO2 (303) and the silicon substrate (301).

[0025] As described above, in this invention, by adding a small amount of TSA when depositing the metal oxide dielectric layer, a high-quality SiO2 layer is formed at the interface with the substrate, and leakage due to diffusion of the metal oxide into the silicon substrate can be suppressed.

[0026] Figure 5 is a schematic diagram showing the flow for forming the metal oxide dielectric layer according to the present invention. Step 501: Prepare the substrate (such as silicon) and remove any native oxide film, etc. Step 502: Load the substrate into a sealed chamber and set the process conditions (precursor flow rate, inert gas flow rate, pressure, temperature, etc.) to a controllable state. Step 503: Form a silicon-doped metal oxide dielectric layer using TSA. Step 504: The metal oxide crystal phase is optimized by RTA, and at the same time, an SiO2 barrier layer is formed at the substrate interface.

[0027] In particular, by using TSA as a reaction precursor in step 503, a high-quality SiO2 interface layer can be obtained after annealing in step 504. Step 503 can be applied in any form, such as by mixing TSA with an organometallic precursor and performing CVD in an atmosphere containing an active oxygen source, or by using ALD to alternately repeat SiO2 deposition cycles with TSA and metal oxide deposition cycles with, for example, TEMAH.

[0028] The RTA performed in step 504 has the effect of promoting the crystalline phase of the metal oxide dielectric to a high dielectric constant phase (orthorhombic or tetragonal phase in the case of HfO2), and can further increase the effective dielectric constant of the (SiO2+HfO2) structure.

[0029] As described above, the present invention has been disclosed based on preferred embodiments, but these are not intended to limit the invention. Those skilled in the art can make changes and modifications as appropriate without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be determined by the claims.

Claims

1. The process of preparing the circuit board, The process of loading the substrate into a sealed chamber, A step of forming a silicon-doped metal oxide dielectric layer on the substrate, The process includes a step of subjecting the substrate to rapid heat treatment to form a silicon dioxide interface layer between the substrate and the metal oxide dielectric layer, The aforementioned silicon doping is performed using trisilylamine (chemical formula N(SiH) 3 ) 3 A method for forming a metal oxide dielectric layer, characterized by using ).

2. The method for forming a metal oxide dielectric layer according to claim 1, characterized in that the trisilylamine is mixed with an organometallic precursor and reacted in an environment containing an active oxygen source to form the silicon-doped metal oxide dielectric layer.

3. A method for forming a metal oxide dielectric layer according to claim 1, characterized in that the silicon-doped metal oxide dielectric layer is formed by an atomic layer deposition process which alternately performs a silicon dioxide deposition step using trisilylamine as a precursor and a metal oxide deposition step using an organometallic precursor.

4. The method for forming a metal oxide dielectric layer according to claim 1, characterized in that the metal oxide dielectric layer is a metal oxide or a metal nitride.

5. The method for forming a metal oxide dielectric layer according to claim 1, characterized in that the metal oxide dielectric layer is selected from the group consisting of hafnium oxide, zirconium oxide, lanthanum oxide, or aluminum oxide.

6. The method for forming a metal oxide dielectric layer according to claim 2, characterized in that the organometallic precursor is tetra(ethylmethylamino)hafnium or tetra(dimethylamide)hafnium, and the metal oxide dielectric layer contains hafnium oxide.

7. The method for forming a metal oxide dielectric layer according to claim 1, characterized in that the doping concentration of the silicon is 0.1% or more and 10% or less.

8. The method for forming a metal oxide dielectric layer according to claim 1, characterized in that the step of forming a silicon-doped metal oxide dielectric layer on the substrate is carried out by introducing an active oxygen source into a sealed chamber and maintaining the temperature of the substrate at 100°C or higher and 450°C or lower.

9. The method for forming a metal oxide dielectric layer according to claim 1, characterized in that the temperature of the rapid heat treatment is 300°C or more and 1100°C or less.

10. The method for forming a metal oxide dielectric layer according to claim 6, characterized in that the hafnium oxide formed has an orthorhombic or tetragonal phase.

11. The method for forming a metal oxide dielectric layer according to claim 8, characterized in that the reactive oxygen source is selected from the group consisting of ozone, neutral oxygen atoms, or oxygen ions.

12. The method for forming a metal oxide dielectric layer according to claim 1, characterized in that the substrate is selected from the group consisting of silicon, silicon carbide, or compound semiconductors.

Citation Information

Patent Citations

  • Semiconductor device

    JP2003059926A

  • Semiconductor device and its manufacturing method

    JP2003204058A

  • Manufacturing method for semiconductor device, and the semiconductor device

    JP2003297826A

  • Method of depositing highly dielectric constant film and method of manufacturing semiconductor device

    JP2007005365A