Components for semiconductor manufacturing equipment

Abstract

The present invention provides a member for a semiconductor manufacturing apparatus having a wafer mounting surface which is less likely to generate particles even when a wafer slides thereon. A member for a semiconductor manufacturing apparatus includes a ceramic substrate having an upper surface with a plurality of protrusions for mounting a wafer, each of the plurality of protrusions having a top end surface, at least one of the top end surfaces having a patterned uneven shape.

Description

[Technical Field]

[0001] This invention relates to a component for semiconductor manufacturing equipment. [Background technology]

[0002] Conventionally, semiconductor manufacturing equipment components used for wafer holding, temperature control, and transport are known. These types of semiconductor manufacturing equipment components are also called wafer stands, electrostatic chucks, susceptors, etc., and generally have the function of adsorbing wafers by electrostatic force by applying electrostatic power to built-in electrodes. Some are also known to have the function of controlling the wafer temperature by flowing gas between the wafer stand and the wafer being adsorbed.

[0003] As components for semiconductor manufacturing equipment, for example, there is a known type that includes a ceramic substrate having an upper surface on which a wafer can be placed and a lower surface, and containing electrodes, and a base plate located on the lower side of the ceramic substrate and containing a refrigerant flow path. The upper surface on which the wafer can be placed is provided with multiple protrusions to support the wafer.

[0004] Patent Document 1 describes that a plurality of protrusions (corresponding to "projections") are formed on the substrate-facing surface (corresponding to the "upper surface on which a wafer can be placed") of a chuck body (corresponding to the "ceramic substrate") formed of first ceramic particles. Patent Document 1 describes that at least the portion of the protrusions excluding the tip side layer is formed of second ceramic particles with a major axis of 20 μm or more and 2000 μm or less, and has a porosity of 0.1% or more and 1.0% or less. Furthermore, Patent Document 1 describes that the surface roughness of the leading edge surface of the protrusions is 0.01 μm or less in terms of arithmetic mean roughness Ra, that the tip side layer of each protrusion is a light-transmitting single crystal plate or polycrystalline plate, and that each protrusion, including the tip side layer, is formed entirely of second ceramic particles with a major axis of 20 μm or more and 2000 μm or less, and has a porosity of 0.1% or more and 1.0% or less.

[0005] Patent Document 1 describes the effects of the invention as follows: The base layer of each protrusion is densely formed of large ceramic particles. Larger ceramic particles result in wider particle interfaces, and low porosity and high density lead to strong bonding between ceramic particles. Therefore, when dry cleaning is performed in the plasma processing chamber using plasma, the shedding of ceramic particles constituting the base layer can be suppressed, thereby suppressing the generation of particles from the electrostatic chuck. If the surface roughness of the leading edge surface that serves as the substrate support surface is 0.01 μm or less in terms of arithmetic mean roughness Ra, it is possible to suppress the localized large force applied from the substrate W to the substrate support surface when the substrate W is electrostatically attracted to the electrostatic chuck, thereby preventing damage to the protrusions. Furthermore, it is possible to suppress changes in the contact state between the protrusions and the substrate W due to damage, which would alter the thermal conductivity between the substrate W and the electrostatic chuck. If the protrusions are formed of relatively large second ceramic particles, including the leading edge, with a major axis of 20 μm to 2000 μm, the particle interface of the ceramic particles is wide, which suppresses particle shedding from the leading edge due to contact between the leading edge and the substrate W, or due to dry cleaning in the plasma processing chamber using plasma. [Prior art documents] [Patent Documents]

[0006] [Patent Document 1] Japanese Patent Publication No. 2023-31112 [Overview of the Initiative] [Problems that the invention aims to solve]

[0007] When a wafer is in contact with the upper end surface of a protrusion, it may slide against the upper end surface of the protrusion due to thermal expansion or other factors, and in this case, there is a risk that the ceramic particles constituting the upper end surface of the protrusion may detach. When ceramic particles detach, they adhere to the wafer as particles, which can affect the quality of the semiconductor and reduce the yield. Patent Document 1 aims to suppress the generation of particles from an electrostatic chuck by focusing on the surface roughness of the leading edge surface of the protrusion (convex part) that supports the wafer, the major axis of the particles of the convex part, and the porosity of the convex part, but there is still room for improvement.

[0008] In view of the above circumstances, one embodiment of the present invention aims to provide a component for semiconductor manufacturing equipment having a wafer mounting surface that is less likely to generate particles even when the wafer slides. [Means for solving the problem]

[0009] The inventors of this invention have diligently studied and developed the present invention as illustrated below in order to solve the above problems.

[0010] [Aspect 1] A component for semiconductor manufacturing equipment comprising a ceramic substrate having an upper surface with a plurality of protrusions for placing a wafer, wherein each of the plurality of protrusions has an upper end surface, and at least one of the upper end surfaces has a patterned uneven shape. [Aspect 2] The semiconductor manufacturing apparatus member according to embodiment 1, wherein at least one of the upper end surfaces having the patterned uneven shape has a pattern composed of a plurality of striated protrusions extending from the center of gravity of the upper surface of the ceramic substrate toward the outer circumference. [Aspect 3] The semiconductor manufacturing apparatus member according to embodiment 1, wherein at least one of the upper end surfaces having the patterned uneven shape has a pattern composed of a plurality of point-like protrusions. [Aspect 4] The semiconductor manufacturing apparatus component according to embodiment 1, wherein at least one of the upper end surfaces having the patterned uneven shape has a pattern composed of a plurality of dimples. [Aspect 5] The semiconductor manufacturing apparatus member according to embodiment 1, wherein at least one of the upper end surfaces having the patterned uneven shape has a pattern composed of a mesh-like protrusion formed by the intersection of a plurality of linear protrusions. [Aspect 6] The semiconductor manufacturing apparatus member according to any one of embodiments 1 to 5, wherein the patterned uneven shape has a convex region and a concave region that is lower in height than the convex region, and the ratio of the convex region on at least one upper end surface to the projected area of ​​said upper end surface is 50% or less. [Aspect 7] A semiconductor manufacturing apparatus component according to any one of embodiments 1 to 6, wherein the ratio of the total projected area of ​​the upper end faces of the plurality of protrusions to the projected area of ​​the upper surface of the ceramic substrate is 3% or less. [Aspect 8] A component for semiconductor manufacturing equipment comprising a ceramic substrate having an upper surface for mounting a wafer, wherein the upper surface is a ceramic substrate having one or more patterned uneven shapes from any of the following i) to iv): i) A pattern consisting of multiple ridge-like protrusions extending from the center of gravity toward the outer circumference of the upper surface of the ceramic substrate. ii) Pattern composed of multiple point-like protrusions iii) Patterns composed of multiple dimples iv) A pattern composed of a network of intersecting linear protrusions. [Effects of the Invention]

[0011] According to a semiconductor manufacturing equipment component of one embodiment of the present invention, particles are less likely to be generated even when the wafer slides on the wafer mounting surface. Therefore, this semiconductor manufacturing equipment component can contribute to improving the quality stability and yield of semiconductors. [Brief explanation of the drawing]

[0012] [Figure 1A]It is a schematic partial longitudinal sectional view of a member for a semiconductor manufacturing apparatus according to an embodiment of the present invention (a partial sectional view when cut along a plane including the central axis of the member for a semiconductor manufacturing apparatus). [Figure 1B] It is a schematic partial longitudinal sectional view of a member for a semiconductor manufacturing apparatus according to an embodiment of the present invention (a partial sectional view when cut along a plane including the central axis of the member for a semiconductor manufacturing apparatus). [Figure 2A] It is a schematic partial enlarged view of the vicinity surrounded by the thick frame shown in FIG. 1A. [Figure 2B] It is a schematic partial enlarged view of the vicinity surrounded by the thick frame shown in FIG. 1B. [Figure 3] It is a schematic plan view of the wafer mounting surface of a ceramic substrate according to an embodiment. [Figure 4] An example of a patterned concavo-convex shape provided on the upper end surface of the protrusion is shown. [Figure 5] It is a manufacturing process diagram of a member for a semiconductor manufacturing apparatus according to an embodiment of the present invention.

Mode for Carrying Out the Invention

[0013] Next, embodiments of the present invention will be described in detail while referring to the drawings. It should be understood that the present invention is not limited to the following embodiments, and design changes, improvements, etc. can be appropriately made based on the ordinary knowledge of those skilled in the art without departing from the gist of the present invention. Also, in this specification, "upper" and "lower" are used to conveniently represent the relative positional relationship when the upper surface of the ceramic substrate of the member for a semiconductor manufacturing apparatus is placed on the horizontal plane with the upper side facing up, and do not represent an absolute positional relationship. Therefore, depending on the orientation of the member for a semiconductor manufacturing apparatus, "upper" and "lower" can become "lower" and "upper", "left" and "right", or "front" and "rear".

[0014] <1. Configuration of Member for Semiconductor Manufacturing Apparatus> Referring to the partial longitudinal cross-sectional view shown in Figure 1A, a semiconductor manufacturing apparatus component 10A according to one embodiment of the present invention can be used when performing processes such as CVD or etching on a wafer W using plasma. The semiconductor manufacturing apparatus component 10A comprises a ceramic substrate 20 having an upper surface 21 on which a wafer W can be placed and a lower surface 23, and incorporating electrodes 26. The semiconductor manufacturing apparatus component 10A also comprises a base plate 30 located on the lower surface 23 side of the ceramic substrate 20 and incorporating a refrigerant flow path 32. The ceramic substrate 20 and the base plate 30 can be joined via a bonding layer 40.

[0015] The ceramic substrate 20 comprises a central portion 20a having a circular top surface 21 in plan view, and an outer peripheral portion 20b having an annular top surface 27 in plan view around the outer periphery of the central portion 20a. The central portion 20a of the ceramic substrate 20 can have, for example, a diameter of 190 to 450 mm and a thickness of 1 to 5 mm. A wafer W can be placed on the top surface 21 of the central portion 20a, and a focus ring can be placed on the top surface 27 of the outer peripheral portion 20b. Hereinafter, the focus ring may be abbreviated as "FR". The top surface 27 of the outer peripheral portion 20b is one step lower than the top surface 21 of the central portion 20a. The lower surfaces 23 of the central portion 20a and the outer peripheral portion 20b may be on the same plane. The illustrated ceramic substrate 20 may have a central portion 20a but not an outer peripheral portion 20b, that is, it may not have the lower top surface 27.

[0016] The upper surface 21 of the ceramic substrate 20 on which the wafer W can be placed is provided with a plurality of protrusions 22 for placing the wafer W. A sealing band 25 may also be formed along the outer edge of the upper surface 21. In this case, the wafer W may be supported by the upper end surface 21c of the sealing band 25 and the upper end surfaces 21a of the plurality of protrusions 22. It is preferable that the sealing band 25 and the plurality of protrusions 22 be of the same height. As shown in Figure 3, in one embodiment, an annular sealing band 25 is formed along the outer edge of the upper surface 21 of the ceramic substrate 20, and a plurality of protrusions 22 are formed across the entire inner surface of the sealing band 25.

[0017] Figure 2A is a schematic magnified view of the area enclosed by the thick frame in Figure 1A, showing the schematic structure of the protrusions 22 provided on the upper surface 21 of the ceramic substrate 20. The number density of the protrusions 22 per unit area in a plan view is, for example, 1 to 150 protrusions / mm². 2 It can be done at a rate of 10-150 pieces / mm 2 This can be done. The shape of the projection 22 is not limited, but can be a columnar shape such as a cylinder or a rectangular prism. The height h of the projection 22 is, for example, 5 to 100 μm, and can typically be 10 to 30 μm. The diameter d of the projection 22 is, for example, 0.3 to 3.0 mm, and can typically be 0.8 to 2.2 mm. Here, the diameter d of the projection 22 refers to the equivalent diameter of a circle when the projection 22 is viewed from above. The upper surface 21 of the central part 20a of the ceramic substrate 20, where the seal band 25 and projection 22 are not provided, is referred to as the reference surface 21b.

[0018] Each of the multiple protrusions 22 has an upper end surface 21a, and at least one upper end surface 21a, preferably 50% or more of the upper end surfaces 21a of the total number of protrusions 22, more preferably 80% or more of the upper end surfaces 21a of the total number of protrusions 22, and even more preferably all of the upper end surfaces 21a of the protrusions 22 have a patterned uneven shape. The patterned uneven shape can have a convex region that forms the same surface as the upper end surface 21a and a concave region that forms a region that is relatively lower in height than the convex region. Here, the convex region is considered to be a region that acts to cause the wafer W to come into contact with the upper surface 21 of the ceramic substrate 20 when the flat wafer W is placed on the upper surface 21 of the ceramic substrate 20. The concave region is a region that is relatively lower in height than the convex region and is considered to be a region that acts to prevent the wafer W from coming into contact with the concave region when the flat wafer W is placed on the upper surface 21 of the ceramic substrate 20. The upper end surface 21a has a patterned uneven shape, which reduces the contact area when the wafer W contacts the upper end surface 21a of the protrusion 22. Therefore, when the wafer W slides against the upper end surface 21a of the protrusion 22 due to thermal expansion or the like, the shedding of ceramic particles constituting the protrusion 22 is suppressed, and particle generation is suppressed. For similar reasons, it is preferable that the upper end surface 21c of the seal band 25 also has a patterned uneven shape.

[0019] The patterned uneven surface structure is not particularly limited as long as the contact area between the upper end surface 21a of the projection 22 and the wafer W is reduced compared to when the upper end surface 21a of the projection 22 is flat. Figure 4 shows five specific examples of patterned uneven surfaces when the upper end surface 21a of the projection 22 is viewed from above. The same uneven surfaces can also be adopted for the upper end surface 21c of the seal band 25.

[0020] The uneven shape of No. 1 has a pattern consisting of multiple striated protrusions extending from the center of gravity toward the outer circumference of the upper surface 21 of the ceramic substrate 20. The line width of each striated protrusion (corresponding to the protrusion region) in a plan view can be, for example, 20 to 200 μm. When the wafer W placed on the upper surface 21 of the ceramic substrate 20 undergoes thermal expansion, the wafer W is prone to sliding in the radial direction. Therefore, if the upper end surface 21a of the protrusion 22 has an uneven shape with such a pattern, in addition to the effect of reducing the contact area with the wafer W, the incidental effect of effectively reducing friction during sliding can also be obtained.

[0021] The uneven shape of No. 2 has a pattern composed of multiple point-like protrusions. Each point-like protrusion in No. 2 is relatively small. It is preferable that the multiple point-like protrusions are arranged evenly on the upper end surface 21a. The area of ​​each point-like protrusion (corresponding to the protrusion region) in a plan view is, for example, 200 to 25000 μm². 2 This can be achieved. When the upper end surface 21a of the projection 22 has such a pattern of unevenness, in addition to the effect of reducing the contact area with the wafer W, an additional effect can be obtained in which friction during sliding can be reduced regardless of the sliding direction of the wafer W.

[0022] The uneven shape of No. 3 also has a pattern composed of multiple point-like protrusions. Each point-like protrusion in No. 3 is relatively large. It is preferable that the multiple point-like protrusions are arranged evenly on the upper end surface 21a. The area of ​​each of the multiple point-like protrusions (corresponding to the protrusion region) in a plan view is, for example, 2000 to 250000 μm². 2 This can be achieved. When the upper end surface 21a of the projection 22 has such a pattern of unevenness, in addition to the effect of reducing the contact area with the wafer W, an additional effect can be obtained in which friction during sliding can be reduced regardless of the sliding direction of the wafer W. The unevenness shape of No. 2 and the unevenness shape of No. 3 differ in the area of ​​each point-like protrusion when viewed from above.

[0023] The uneven shape of No. 4 has a pattern consisting of a reference surface (corresponding to the convex region) and a plurality of dimples (point-like recesses) provided on the reference surface. Preferably, the plurality of dimples are arranged without bias on the upper end surface 21a. The area of ​​each dimple in a plan view is, for example, 200 to 25,000 μm². 2 This can be achieved. When the upper end surface 21a of the projection 22 has such a pattern of unevenness, in addition to the effect of reducing the contact area with the wafer W, an additional effect can be obtained in which friction during sliding can be reduced regardless of the sliding direction of the wafer W. Furthermore, it is thought that when detachment occurs, the inside of the dimples can serve as a place to escape, making it less likely for particles to adhere to the wafer W.

[0024] The uneven shape of No. 5 has a pattern composed of a mesh-like protrusion where multiple linear protrusions (corresponding to protrusion regions) intersect. In the illustrated embodiment, each mesh of the mesh-like protrusion is hexagonal (honeycomb-like), but each mesh of the mesh-like protrusion may be other polygonal shapes such as triangles, squares, pentagons, or octagons, or multiple polygonal shapes such as pentagons and triangles may be combined. The line width of each linear protrusion in plan view can be, for example, 20 to 200 μm. The area of ​​each mesh in plan view can be, for example, 2000 to 250000 μm. 2 This can be achieved. When the upper end surface 21a of the projection 22 has such a pattern of unevenness, in addition to the effect of reducing the contact area with the wafer W, an additional effect can be obtained in which friction during sliding can be reduced regardless of the sliding direction of the wafer W.

[0025] With regard to the patterned uneven shape on the upper end surface 21a of the multiple protrusions 22, from the viewpoint of suppressing the detachment of ceramic particles constituting the protrusions 22 by reducing the contact area with the wafer W, it is preferable that the ratio of the convex area on at least one upper end surface 21a to the projected area of ​​said upper end surface 21a be 50% or less, more preferably 40% or less, and even more preferably 35% or less. On the other hand, with regard to the patterned uneven shape on the upper end surface 21a of the multiple protrusions 22, from the viewpoint of suppressing the detachment of ceramic particles by preventing the surface pressure from becoming too high when the wafer W is placed on it, and from the viewpoint of effectively utilizing the protrusions 22, it is preferable that the ratio of the convex area on at least one upper end surface 21a to the projected area of ​​said upper end surface 21a be 10% or more, more preferably 20% or more, and even more preferably 25% or more. Therefore, the ratio of the convex region on at least one upper end surface 21a to the projected area of ​​said upper end surface 21a is preferably, for example, 10 to 50%, more preferably 20 to 40%, and even more preferably 25 to 35%.

[0026] It is desirable that at least one upper end surface 21a of the multiple protrusions 22, preferably 50% or more of the upper end surfaces 21a of the total number of protrusions 22, more preferably 80% or more of the upper end surfaces 21a of the total number of protrusions 22, and even more preferably all of the upper end surfaces 21a of the protrusions 22 each satisfy the area ratio of the convex portion region described above.

[0027] The projected area of ​​the upper end surface 21a of the projection 22 is defined as the area enclosed by the region that protrudes above the reference surface 21b of the upper surface 21 of the ceramic substrate 20 when viewed from above, for the projection 22 to be measured.

[0028] From the viewpoint of suppressing the shedding of ceramic particles constituting the protrusions 22 by reducing the contact area with the wafer W, it is desirable that the ratio of the total projected area of ​​the upper end surfaces 21a of the multiple protrusions 22 to the projected area of ​​the upper surface 21 of the ceramic substrate 20 be small. Specifically, this ratio is preferably 3% or less, may be 2.5% or less, or 2% or less. On the other hand, from the viewpoint of suppressing the shedding of ceramic particles by preventing the surface pressure from becoming too high when the wafer W is placed on it, this ratio is preferably 0.5% or more, more preferably 0.7% or more, and even more preferably 1% or more. Therefore, the ratio of the total projected area of ​​the upper end surfaces 21a of the multiple protrusions 22 to the projected area of ​​the upper surface 21 of the ceramic substrate 20 may be, for example, 0.5 to 3%, 0.7 to 2.5%, or 1 to 2%.

[0029] The multiple protrusions 22 may have at least their upper end surfaces 21a covered with a coating film. Examples of the coating film include a coating film containing at least one selected from silicon carbide, diamond-like carbon, amorphous silicon, molybdenum, chromium, and tantalum.

[0030] The ceramic substrate 20, including the protrusions 22 and the sealing band 25, can be formed from a ceramic material such as alumina or aluminum nitride. In a preferred embodiment, the ceramic particles constituting the plurality of protrusions 22 contain one or two selected from alumina and aluminum nitride. In a more preferred embodiment, the ceramic particles constituting the plurality of protrusions 22 contain 80% by mass or more of one or two selected from alumina and aluminum nitride. In an even more preferred embodiment, the ceramic particles constituting the plurality of protrusions 22 contain 95% by mass or more of one or two selected from alumina and aluminum nitride.

[0031] Electrode 26 is a planar electrode used as an electrostatic electrode and is connected to an external DC power supply via a power supply member (not shown). Electrode 26 is formed from a material containing, for example, W, Mo, WC, MoC, etc. A low-pass filter may be placed in the middle of the power supply member. The power supply member is electrically insulated from the bonding layer 40 and the base plate 30. When a DC voltage is applied to electrode 26, the wafer W is attracted and fixed to the wafer mounting surface, specifically the upper end surface 21c of the seal band 25 and the upper end surface 21a of the projection 22, by electrostatic attraction force. When the DC voltage is removed, the attraction and fixation of the wafer W to the wafer mounting surface are released.

[0032] The electrode 26 may incorporate a heater electrode (resistive heating element) in place of or in addition to the electrode for electrostatic adsorption, or it may incorporate an RF electrode for plasma generation. In this case, a heater power supply is connected to the heater electrode, and an RF power supply is connected to the RF electrode. The ceramic substrate 20 may have one layer of electrode 26, or it may have two or more layers with gaps in between.

[0033] The base plate 30 can be, for example, disc-shaped. The base plate 30 may have an annular flange on its lower side used to clamp the semiconductor manufacturing equipment component 10A to a jig inside the chamber. The thickness of the base plate 30 can be 20 to 40 mm, typically 25 to 35 mm. The base plate 30 can be connected to a radio frequency (RF) power supply and used as an RF electrode.

[0034] The base plate 30 can be a disc with good electrical and thermal conductivity (a disc with the same diameter as or larger than the ceramic substrate 20). A refrigerant channel 32 through which the refrigerant circulates may be formed inside the base plate 30. The refrigerant flowing through the refrigerant channel 32 is preferably a liquid and preferably electrically insulating. Examples of electrically insulating liquids include fluorine-based inert liquids. The refrigerant channel 32 can be formed, for example, in a single continuous line from one end (inlet) to the other end (outlet) across the entire base plate 30 in a plan view. A supply port and a recovery port of an external refrigerant device (not shown) are connected to one end and the other end of the refrigerant channel 32, respectively. The refrigerant supplied from the supply port of the external refrigerant device to one end of the refrigerant channel 32 passes through the refrigerant channel 32, returns to the recovery port of the external refrigerant device from the other end of the refrigerant channel 32, is temperature-adjusted, and then supplied again from the supply port to one end of the refrigerant channel 32.

[0035] The base plate 30 can be made of, for example, a metallic material or a composite material of metal and ceramics. Examples of metallic materials include Al, Ti, Mo, or alloys thereof. Examples of composite materials of metal and ceramics include metal matrix composites (MMC) and ceramic matrix composites (CMC). Specific examples of such composite materials include materials containing Si, SiC, and Ti (also called SiSiCTi), materials in which Al and / or Si are impregnated into a porous SiC body, and composite materials of Al2O3 and TiC. A material in which Al is impregnated into a porous SiC body is called AlSiC, and a material in which Si is impregnated into a porous SiC body is called SiSiC. It is preferable to select a material for the base plate 30 that has a thermal expansion coefficient close to that of the ceramic substrate 20. For example, if the ceramic substrate 20 is made of alumina, it is preferable that the base plate 30 be made of SiSiCTi or AlSiC, which have a thermal expansion coefficient close to that of alumina.

[0036] As shown in Figure 1A, the upper surface 31 of the base plate 30 is bonded to the lower surface 23 of the ceramic substrate 20 via a bonding layer 40. The bonding layer 40 bonds the lower surface 23 of the ceramic substrate 20 to the upper surface 31 of the base plate 30. The bonding layer 40 may be composed of a metal layer formed from, for example, solder or metal brazing material. The bonding layer 40 is formed, for example, by TCB (Thermal Compression Bonding). TCB is a known method in which a metal bonding material is sandwiched between two members to be bonded, and the two members are pressed together while heated to a temperature below the solidus temperature of the metal bonding material. The bonding layer 40 is not limited to a metal layer. For example, a resin bonding layer may be used instead of a metal layer. The resin bonding layer can be composed of, for example, a cured product of a silicone resin adhesive, epoxy resin adhesive, acrylic resin adhesive, or urethane resin adhesive.

[0037] At least one of the sides of the ceramic substrate 20, the outer periphery of the bonding layer 40, and the sides of the base plate 30 can be covered with an insulating film 60. Examples of insulating films 60 include thermal spray films of alumina or yttria.

[0038] In the embodiment described above, the semiconductor manufacturing equipment member 10A may have multiple holes that penetrate vertically. Such holes include multiple gas holes 50 opening in the upper surface 21 and lift pin holes for inserting lift pins to move the wafer W up and down on the upper surface 21. Multiple gas holes 50 can be provided at appropriate positions when the upper surface 21 is viewed from above (see Figure 3). A heat-conducting gas such as He gas is supplied to the gas holes 50. Typically, the gas holes 50 can be provided to open in areas of the upper surface 21 where the seal band 25 and multiple protrusions 22 are not provided (reference surface 21b). When heat-conducting gas is supplied to the gas holes 50, the space on the back side of the wafer W placed on the upper surface 21 is filled with heat-conducting gas. A plug 55 having a gas channel may be embedded in the gas holes 50. Multiple lift pin holes can be provided at equal intervals along concentric circles on the upper surface 21 when the upper surface 21 is viewed from above.

[0039] <2. Method of using components for semiconductor manufacturing equipment> Next, a representative example of how to use the semiconductor manufacturing equipment component 10A will be described. First, with the semiconductor manufacturing equipment component 10A installed in a chamber (not shown), the wafer W is placed on the upper surface 21 of the ceramic substrate 20. Then, the pressure inside the chamber is reduced using a vacuum pump to adjust to a predetermined vacuum level, and a voltage is applied to the electrodes 26 of the ceramic substrate 20 to generate electrostatic adsorption force, thereby adsorbing and fixing the wafer W to the wafer mounting surface (specifically, the upper end surface 21c of the seal band 25 and the upper end surface 21a of the projection 22).

[0040] Next, the chamber is transformed into a reaction gas atmosphere at a predetermined pressure (e.g., several tens to several hundred Pas). In this state, a high-frequency voltage such as an RF voltage is applied between an upper electrode (not shown) located on the ceiling of the chamber and the base plate 30 of the semiconductor manufacturing equipment component 10A to generate plasma. The surface of the wafer W is then treated with the generated plasma.

[0041] <3. Examples of manufacturing components for semiconductor manufacturing equipment> Next, an example of the manufacturing of semiconductor manufacturing equipment component 10A will be illustrated using Figure 5. First, a disc-shaped ceramic sintered body 120, which will be the basis for the ceramic substrate 20, is manufactured by hot-press sintering a molded body of ceramic powder (Figure 5A). The molded body may be manufactured by stacking multiple tape molded bodies, by mold casting, or by compressing ceramic powder. The ceramic sintered body 120 contains electrodes 26.

[0042] Next, multiple protrusions 22 are provided on the upper surface of the ceramic sintered body 120 by laser processing (Figure 5B). A patterned uneven shape is formed on the upper end surface 21a of each protrusion 22 by laser processing. The timing of forming the multiple protrusions 22 may be after the bonding of the ceramic substrate 20 and the base plate 30.

[0043] In parallel with this, two MMC disc members 131 and 136 are manufactured (Figure 5C). Then, a groove 132, which will ultimately become the refrigerant flow path 32, is formed on the lower surface of the upper MMC disc member 131 by machining (Figure 5D). A through hole 133 for refrigerant introduction and a through hole 134 for refrigerant discharge are made in the lower MMC disc member 136. If the ceramic sintered body 120 is made of alumina, it is preferable that the MMC disc members 131 and 136 are made of SiSiCTi or AlSiC. This is because the thermal expansion coefficient of alumina is approximately the same as that of SiSiCTi or AlSiC.

[0044] A disc-shaped member made of SiSiCTi can be manufactured, for example, as follows: First, a powder mixture is prepared by mixing silicon carbide, metallic Si, and metallic Ti. Next, a disc-shaped molded body is produced from the obtained powder mixture by uniaxial pressure molding, and the molded body is hot-press sintered in an inert atmosphere to obtain a disc-shaped member made of SiSiCTi.

[0045] Next, a metal bonding material 135 is placed between the lower surface of the upper MMC disc member 131 and the upper surface of the lower MMC disc member 136, and a metal bonding material 137 is placed on the upper surface of the upper MMC disc member 131. Then, the ceramic sintered body 120 is placed on top of the metal bonding material 137 placed on the upper surface of the upper MMC disc member 131. This results in a laminate 110 in which the lower MMC disc member 136 and metal bonding material 135, the upper MMC disc member 131 and metal bonding material 137, and the ceramic sintered body 120 are stacked in this order from bottom to top (Figure 5E). By heating and pressurizing this laminate 110 (TCB), a bonded body is obtained. The bonded body is formed by bonding the ceramic sintered body 120 to the upper surface of the MMC block 130, which will become the base plate 30, via a metal bonding layer. The MMC block 130 is formed by joining an upper MMC disc member 131 and a lower MMC disc member 136 via a metal bonding layer. The MMC block 130 has a refrigerant flow path 32, a refrigerant introduction section 36, and a refrigerant discharge section 38.

[0046] TCB (Temperature-Correcting Bonding) is performed, for example, as follows: The laminate is pressed and bonded at a temperature below the solidus temperature of the metal bonding material (for example, between 20°C below the solidus temperature and the solidus temperature), and then returned to room temperature. This causes the metal bonding material to become a metal bonding layer. As the metal bonding material, Al-Mg-based bonding materials or Al-Si-Mg-based bonding materials can be used. For example, when performing TCB using an Al-Si-Mg-based bonding material, the laminate is pressed while heated in a vacuum atmosphere. It is preferable to use a metal bonding material with a thickness of around 100 μm.

[0047] Next, the outer periphery of the ceramic sintered body 120 is machined to form a step, thereby creating a ceramic substrate 20 having a central portion 20a and an outer peripheral portion 20b. This yields a semiconductor manufacturing equipment component 10A (Figure 5F).

[0048] Although the base plate 30 in Figure 1A is shown as a single piece, it may also be a structure in which two members are joined by a metal bonding layer, as shown in Figure 5F, or a structure in which three or more members are joined by a metal bonding layer. Furthermore, when the bonding layer 40 is formed using the metal bonding material 137, the insulating film 60 can be formed on the base plate 30 by thermal spraying either before or after bonding with the ceramic substrate 20. When the bonding layer 40 is formed using a resin adhesive sheet, the resin melts, so the insulating film 60 is formed by thermal spraying before bonding with the ceramic substrate 20.

[0049] <4. Other Embodiments> In the semiconductor manufacturing apparatus member 10A according to the above embodiment, the upper surface 21 of the ceramic substrate 20 has a plurality of protrusions 22, and the patterned uneven shape is formed on the upper end surface of the protrusions 22, but the patterned uneven shape can also be formed without providing the protrusions 22. Referring to Figures 1B and 2B, the semiconductor manufacturing apparatus member 10B according to one embodiment of the present invention is a ceramic substrate 20 having an upper surface 21 for placing a wafer W, and the upper surface 21 comprises a ceramic substrate 20 having a patterned uneven shape.

[0050] The upper surface 21 is not provided with protrusions 22, but instead has one or more of the following patterned uneven shapes i) to iv). i) A pattern consisting of multiple ridge-like protrusions extending from the center of gravity toward the outer periphery of the upper surface 21 of the ceramic substrate 20. ii) Pattern composed of multiple point-like protrusions iii) Patterns composed of multiple dimples iv) A pattern composed of a mesh-like structure where multiple linear protrusions intersect.

[0051] The patterned uneven shape can have a convex region that forms the same surface as the upper surface 21 and a concave region that forms a region that is relatively lower in height than the convex region. Here, the convex region is considered to be the region that acts to cause the wafer W to come into contact with the upper surface 21 of the ceramic substrate 20 when the flat wafer W is placed on it. The concave region refers to a region that is relatively lower in height than the convex region, and is considered to be the region that acts to prevent the wafer W from coming into contact with the concave region when the flat wafer W is placed on the upper surface 21 of the ceramic substrate 20. Because the upper surface 21 has a patterned uneven shape, the wafer W Up Since the contact area with surface 21 is reduced, when the wafer W slides against the upper surface 21 due to thermal expansion or the like, it is thought that the shedding of ceramic particles constituting the upper surface 21 is suppressed, and the generation of particles is suppressed.

[0052] With regard to the patterned uneven shape on the upper surface 21, from the viewpoint of suppressing the detachment of ceramic particles constituting the upper surface 21 by reducing the contact area with the wafer W, it is preferable that the ratio of the convex area on the upper surface 21 to the projected area of ​​the upper surface 21 be 50% or less, more preferably 30% or less, and even more preferably 10% or less. On the other hand, with regard to the patterned uneven shape on the upper surface 21, from the viewpoint of suppressing the detachment of ceramic particles by preventing the surface pressure from becoming too high when the wafer W is placed on it, it is preferable that the ratio of the convex area on the upper surface 21 to the projected area of ​​the upper surface 21 be 3% or more, more preferably 5% or more, and even more preferably 7% or more. Therefore, the ratio of the convex area on the upper surface 21 to the projected area of ​​the upper surface 21 is, for example, preferably 3 to 50%, more preferably 5 to 30%, and even more preferably 7 to 10%.

[0053] i) The pattern, which consists of multiple striated protrusions extending from the center of gravity toward the outer circumference of the upper surface 21 of the ceramic substrate 20, is exemplified by the uneven shape No. 1 in Figure 4. The line width of each striated protrusion (corresponding to the protrusion region) in a plan view can be, for example, 20 to 200 μm.

[0054] ii) Patterns composed of multiple point-like protrusions are exemplified by the uneven shapes No. 2 and No. 3 in Figure 4. Each of the dot-like protrusions in No. 2 is relatively small. It is preferable that the multiple dot-like protrusions are arranged evenly on the upper surface 21. The number density of dot-like protrusions per unit area in a plan view is, for example, 0.05 to 7 per mm. 2 It can be done this way. Each of the dot-like protrusions in No. 3 is relatively large. It is preferable that the multiple dot-like protrusions are arranged evenly on the upper surface 21. The number density of dot-like protrusions per unit area in a plan view is, for example, 0.003 to 0.15 per mm. 2 It can be done this way.

[0055] iii) The pattern composed of a plurality of dimples is exemplified by the concavo-convex shape No. 4 in FIG. 4. The concavo-convex shape No. 4 has a pattern composed of a reference plane (corresponding to the convex portion region) and a plurality of dimples (dot-shaped concave portions) provided on the reference plane. The plurality of dimples are preferably arranged evenly on the upper surface 21. The number density per unit area of the dimples in a plan view can be, for example, 0.05 to 7 pieces / mm 2 can be set as such.

[0056] iv) The pattern composed of a reticular convex portion where a plurality of linear convex portions (corresponding to the convex portion region) intersect is exemplified by the concavo-convex shape No. 5 in FIG. 4. In the illustrated embodiment, each mesh of the reticular convex portion is hexagonal (honeycomb-shaped), but each mesh of the reticular convex portion may be other polygonal shapes such as triangular, quadrangular, pentagonal, octagonal, or a combination of a plurality of polygonal shapes such as pentagonal and triangular. The line width per one of the linear convex portions in a plan view can be, for example, 20 to 200 μm. The number density per unit area of each mesh in a plan view can be, for example, 0.003 to 0.15 pieces / mm 2 can be set as such.

[0057] <0********>The member 10B for a semiconductor manufacturing apparatus according to the present embodiment is the same as the member 10A for a semiconductor manufacturing apparatus according to the above-described embodiment except that the structure of the upper surface 21 of the ceramic substrate 20 is different, and thus redundant descriptions are omitted.

Explanation of Reference Numerals

[0058] 10A: Member for semiconductor manufacturing apparatus 10B: Member for semiconductor manufacturing apparatus 20: Ceramic substrate 20a: Central portion 20b: Outer peripheral portion 21: Upper surface 21a: Upper end surface 21b: Reference plane 21c: Upper end surface 22: Protrusion 23: Lower surface 25: Seal band 26: Electrode 27:Top surface 30: Base plate 31:Top surface 32: Refrigerant flow path 36: Refrigerant inlet 38: Refrigerant discharge part 40: Bonding layer 50: Gas hole 55: Plug 60: Insulating film 110: Laminate 120: Ceramic sintered body 130: MMC Block 131:MMC disc member 132: Groove 133: Through hole 134: Through hole 135: Metal bonding material 136: Disc member 137:Metal bonding material W: wafer

Claims

1. A ceramic substrate having an upper surface having a plurality of protrusions for placing a wafer, wherein each of the plurality of protrusions has an upper end surface, at least one of the upper end surfaces having a patterned uneven shape, and at least one of the upper end surfaces having the patterned uneven shape has a pattern composed of a plurality of striated protrusions extending from the center of gravity of the upper surface of the ceramic substrate toward the outer circumference.

2. A ceramic substrate having an upper surface with a plurality of protrusions for placing a wafer, wherein each of the plurality of protrusions has an upper end surface, at least one of the upper end surfaces having a patterned uneven shape, and at least one of the upper end surfaces having the patterned uneven shape has a ceramic substrate having a pattern composed of a plurality of dimples.

3. A ceramic substrate having an upper surface having a plurality of protrusions for placing a wafer, wherein each of the plurality of protrusions has an upper end surface, at least one of the upper end surfaces having a patterned uneven shape, and at least one of the upper end surfaces having the patterned uneven shape has a ceramic substrate having a pattern composed of a mesh-like protrusion formed by the intersection of a plurality of linear protrusions.

4. The semiconductor manufacturing apparatus member according to any one of claims 1 to 3, wherein the patterned uneven shape has a convex region and a concave region that is lower in height than the convex region, and the ratio of the convex region on at least one upper end surface to the projected area of ​​said upper end surface is 50% or less.

5. A semiconductor manufacturing apparatus component according to any one of claims 1 to 3, wherein the ratio of the total projected area of ​​the upper end faces of the plurality of protrusions to the projected area of ​​the upper surface of the ceramic substrate is 3% or less.

6. A component for semiconductor manufacturing equipment comprising a ceramic substrate having an upper surface for mounting a wafer, wherein the upper surface is a ceramic substrate having one or more patterned uneven shapes of any of the following i), iii), and iv): i) A pattern consisting of multiple striated protrusions extending from the center of gravity toward the outer circumference of the upper surface of the ceramic substrate. iii) Pattern composed of multiple dimples iv) A pattern composed of a network of intersecting linear protrusions.

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