Method for monitoring the thermal impedance of power modules

Abstract

1. A method for monitoring thermal impedance of a power module of a power converter used to convert DC current to AC current or vice versa, the power module comprising at least one semiconductor die attached to a material stack of layers for heat dissipation and / or electrical connection thereof, the semiconductor producing asymmetric losses between two half cycles of an AC frequency f of the AC current, the method comprising: sampling and measuring a signal related to a junction temperature Tj of the semiconductor die at a frequency greater than twice the AC frequency of the AC current; calculating a time span Δt=tTjmax-tTjmin between a time point tTjmax at which the junction temperature of the semiconductor die is at its maximum value and a time point tTjmin at which the junction temperature is at its minimum value in one cycle of the AC current; storing the time span Δt in a memory; and measuring the time span Δt at different times t during operation of the power module. x =t0~t m , by repeatedly sampling and measuring the signal and calculating the time widths to obtain a series of time widths Δt t0 ~Δt tm and the time span Δt tm Δt t0 and monitoring the transition of the time width Δt by comparing the time width Δt with the time width Δt, thereby determining the transition of degradation of the thermal impedance of the power module.

Description

[Technical Field]

[0001] This disclosure relates to the art of protecting power semiconductor modules from failures caused by overheating, particularly overheating due to interface degradation, and to maintaining equipment that uses such modules. [Background technology]

[0002] Degradation of the thermal interface in power modules is caused by delamination and void formation somewhere in the substructure between the semiconductor die and the heat sink. This degradation leads to an increase in the semiconductor die temperature, resulting in an unsafe operating temperature range. High temperatures can cause semiconductor failure and power module malfunction. Therefore, monitoring the thermal interface is crucial for maintaining power modules within a safe temperature range and guiding maintenance and replacement phases.

[0003] The degradation phenomenon is caused by temperature fluctuations and mismatches in CTE (coefficient of thermal expansion) between the various materials constituting the power module stack shown in Figure 1. The power module stack includes at least a semiconductor die 3 (e.g., silicon), a die attach 4 (e.g., solder), a conductive layer 6 (e.g., copper), an electrical insulator layer 7, and a heat sink 8 (e.g., aluminum).

[0004] The power module 1 may also include elements such as a thermal conductive layer 9 (e.g., copper), a bonding layer 10 (e.g., solder), a base plate 11 (e.g., copper), and a thermal interface 12 (e.g., graphite or thermal paste). In a symmetrical laminate of materials in which the aforementioned laminate is repeated on the upper surface 5 of the semiconductor die 3, bilateral cooling is also conceivable.

[0005] Figure 2 shows a crack 2 that can occur in a layer like layer 4. Such cracks reduce the thermal conductivity of the layer.

[0006] Non-patent document 1 discloses a method for extracting the thermal impedance frequency response function of a power module without interrupting the operation of a normal converter. The temperature response of such a power device is extracted by sinusoidal small-signal loss excitation to the power device, and the thermal impedance at the excitation frequency is estimated by correlating both signals. Because this method relies on phase information rather than gain, it is unaffected by measurement errors in loss and / or temperature. This requires a small-signal loss excitation method that affects torque ripple, for example, in motor driver applications.

[0007] Non-patent document 2 describes how the spatiotemporal dynamic thermal response of a semiconductor assembly's response change due to degradation is measured using heat injection with specific frequency components (sine and square waves). The semiconductor die temperature is estimated via a thermal-sensitive electrical parameter (TSEP), the frequency response function (FRF) is calculated for each system identification experiment, the FRF segments are combined, and the function model is interpreted for thermal interface degradation.

[0008] Non-patent document 3 describes a method for monitoring solder fatigue in an inverter using an IGBT power module by detecting changes in output harmonics. It has been shown that low-order harmonics generated by non-ideal switching are affected by the device junction temperature, which depends on the solder condition of the module. Because this method lacks precision, the inverter controller is set to induce harmonic resonance at a given frequency.

[0009] Standard JESD51-14 describes a method for measuring "transient thermal resistance measurements." This method preferably consists of measuring the junction temperature after the heating power has been switched off (cooling curve). Although not recommended, in principle, a heating curve can also be used if the heating power is constant during the heating pulse time. In the first case, the measurement is required to be performed after the power module has been operated in a known thermal steady state and then switched off. In both cases, the power loss must be known, which is difficult to estimate during online operation (in field applications).

[0010] Thermal impedance measurement is a powerful transient thermal response technique that can provide information about the degradation of various interfaces in power modules. This technique typically consists of the following: Firstly, a semiconductor switch is used as the active device to apply an initial steady-state thermal condition to the power module. This initial condition is either a zero-power condition or a condition in which a known, measured constant power is consumed by the semiconductor.

[0011] Secondly, a controlled power step increase (when the starting condition is zero power) or power step decrease (when the starting condition is constant power) is applied, and then the semiconductor temperature change is recorded until a new steady-state thermal condition is reached.

[0012] Finally, the recorded temperature transient behavior is described using an equivalent Foster-Cauer network, which represents the thermal structure of the power module using multiple RC elements. By fitting the temperature change using Foster's equations, the resistance and capacitance of various parts of the power module can be extracted, providing information on the transitions of thermal resistance and capacitance.

[0013] Lock-in thermography is a well-proven, commercially available technique for detecting damage to materials and systems (e.g., delamination cracks, voids, etc. in composite materials), as described in Non-Patent Document 4.

[0014] Lock-in thermography techniques employ a process that excites the material or system being analyzed thermally with a transient signal (e.g., a pulsed or sinusoidal signal) at a specific frequency (related to the material's thickness or damage depth). For example, an infrared radiation source, such as a set of halogen lamps, is used to record an image of the system / material's transient temperature response, and specific software and algorithms are used to calculate the phase and amplitude between the response and excitation, generating phase and amplitude images. These techniques are used under thermal steady-state conditions.

[0015] The following are the issues regarding state-of-the-art methods for thermal impedance monitoring: The power consumption within a semiconductor must be known, that is, measured or estimated. This can be a difficult task when the semiconductor is incorporated into a power converter. The thermal measurement techniques described above cannot provide information about which layer of the power module stack is degraded (because the measurement is performed in a thermal steady state). [Prior art documents] [Non-patent literature]

[0016] [Non-Patent Document 1] Broeck & al., "In situ thermal impedance spectroscopy of Power electronic modules for localized degradation identification", PCIM Europe 2019;International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management, 07-09 May 2019 Nuremberg, Germany;VDE ISBN:978-3-8007-4938-6 [Non-Patent Document 2] Polom & al., "Real-Time, In Situ Degradation Monitoring in Power Semiconductor Converters" 2019 IEEE Applied Power Electronics Conference and Exposition (APEC), 17-21 March 2019, IEEE, DOI:10.1109 / APEC.2019.872182 [Non-Patent Document 3] Xiang & al., "Condition Monitoring Power Module Solder Fatigue Using Inverter Harmonic Identification", IEEE Transactions on Power Electronics, Volume:27, Issue:1, January 2012 Pages 235-247, DOI:10.1109 / TPEL.2011.2160988 [Non-Patent Document 4] Gerd Busse "Lockin-Thermography: Principles", NDE-applications and trends, January 2014 Conference: 2014 Quantitative InfraRed Thermography, DOI:10.21611 / qirt.2014.e [Overview of the Initiative]

[0017] This disclosure proposes a measurement method that uses lock-in techniques in transient states rather than steady states.

[0018] More precisely, the present disclosure proposes a method for monitoring the thermal impedance of a power module of a power conversion device used to convert DC current to AC current or vice versa. In this method, the power module includes at least one semiconductor die attached to a material laminate for heat dissipation and / or electrical connection, and the semiconductor generates asymmetric losses between two half-cycles of the AC frequency f of the AC current. The method includes sampling and measuring a signal related to the junction temperature Tj of the semiconductor die at a frequency higher than 10 times the AC frequency of the AC current, calculating, within one period of the AC current, the time width Δt = tTjmax - tTjmin between the time point tTjmax when the junction temperature of the semiconductor die is at its maximum value and the time point tTjmin when the junction temperature is at its minimum value, and storing the time width Δt in a memory, at different times t x = t0 to t p during the operation of the power module, repeating sampling and measuring the signal and calculating the time width to provide a series of time widths Δt t0 ~Δt tp monitoring the transition of the time width Δt by comparing the time width Δt tp with the time width Δt t0 to determine the transition of the degradation of the thermal impedance of the power module, x and including.

[0019] The method includes measuring the AC frequency and storing pairs of the time width Δt tx and the AC frequency f fund values.

[0020] The method changes the AC frequency during a dedicated operating period of the conversion device to provide a plurality of different AC frequencies f m = f1, f2,..., f n at which the thermal impedance of a specific layer of the laminate can be detected respectively, and sampling and measuring and the time widths Δt txf1 corresponding to such different AC frequencies, Δt txf2,...,Δt txfn Repeated calculations, During the operation of the power module, the signal is sampled and measured, and the time width is calculated repeatedly, to obtain a series of Δt0~Δt for each of the different AC frequencies. x To provide AC frequency f m =f1, f2, ..., f n For each of these, Δt txfm Δt t0fm By comparing with Δt xfm By monitoring the changes, we can determine the progression of the deterioration of the thermal impedance of a specific layer, It can include...

[0021] This method may include measuring the time difference Δtmin between two consecutive minimum values ​​of the junction temperature and calculating the AC frequency as f = 1 / Δtmin.

[0022] The signal related to the junction temperature Tj may be a temperature-sensitive electrical parameter of the semiconductor.

[0023] In such cases, the signal may be an uncalibrated temperature-sensitive electrical parameter of the semiconductor.

[0024] The AC frequency is f d =D die / l die 2 It can be made lower than, in the formula, l die This is the thickness of the die, D die This is the diffusion coefficient of the die.

[0025] The AC frequency may be less than 2 kHz.

[0026] The AC frequency may be less than 1 kHz.

[0027] The AC frequency is the fundamental frequency that supplies power to the converter or the fundamental output frequency of the converter f fund That's fine.

[0028] This disclosure also relates to a converter comprising a power semiconductor switch die on which a sensor means for detecting the temperature of the power semiconductor switch die, an analog-to-digital converter means, a sampling means, and a processor having memory means for storing and executing software configured to perform the thermal impedance monitoring method described above. In particular, the sensor means is designed to detect the temperature-sensitive electrical parameters of the die. This disclosure also proposes software including instructions for performing the thermal impedance monitoring method disclosed above.

[0029] A detailed description of the exemplary embodiments described herein is discussed below with reference to the accompanying drawings. [Brief explanation of the drawing]

[0030] [Figure 1] This is an example of a conventional laminated structure for power modules. [Figure 2] This is a diagram of a cracked solder layer. [Figure 3] This is a diagram of the conventional technology showing the phase shift of the surface temperature response with respect to defect depth. [Figure 4] This is an example of a Cauer network in a stack of power modules. [Figure 5] This is the first Bode plot of the first example of a defective layer in a laminate. [Figure 6] This is a second Bode plot of a second example of a defective layer in a laminate. [Figure 7] This is a third Bode plot of a third example of a defective layer in a laminate. [Figure 8] Figure 5 is an enlarged Bode plot of the first example of a defective layer in the laminate. [Figure 9] This is a simplified schematic diagram of an example of a converter with a processor. [Figure 10A] This diagram shows the temperature-time and loss-time ratios for the joints of the initial and degraded laminates. [Figure 10B]It is a diagram of the joint temperature versus time and loss versus time for an initial laminate and a deteriorated laminate. [Figure 11] It is a diagram showing loss waveforms for different modulation types in a DC / AC converter under different controls. [Figure 12] It is a diagram of the equivalent phase shift versus the fundamental frequency for different deteriorations of the layer. [Figure 13A] It is a diagram showing the method steps of this method. [Figure 13B] It is a diagram showing the method steps of this method. [Figure 13C] It is a diagram showing the method steps of this method.

Mode for Carrying Out the Invention

[0031] In order to characterize the behavior of the power module, in the heat wave theory, it is predicted that the thermal response of the surface of a homogeneous infinite material half - space subjected to a thermal excitation P0 = P0(1 + cosθ(ωt)) / 2 is shifted by +π / 4 (+45 degrees). Due to the wave nature of the excitation, the heat propagation in the material can be analyzed from the wave theory. A defect or interface existing at a distance d below the surface of the material can be modeled by the reflection coefficient R (0 < R < 1) of the heat wave, and the phase of the thermal response of the surface changes compared to the case of a semi - infinite body. When voids or defects exist at the interface, the reflection coefficient is a function of the material properties and the contact resistance between different materials. The reflection coefficient also depends on the frequency. The curve in Figure 3 shows the influence of a defect with an intensity R located at a depth d on the phase shift of the surface temperature response, as disclosed in the literature Rigert “Induktions - Lockin - Thermografie: ein neues Verfahren zur zerstoerungsfreien Pruefung” http: / / dx.doi.org / 10.18419 / opus - 1734. This graph shows the influence of the defect depth d (normalized by μ, which is a material parameter), and the reflection coefficient R (R = 0 → no defect (complete transmission), R = 1 → strong defect (complete reflection)).

[0032] When a defect is located at d < 1.55 μm and has a reflectance coefficient R > 0.4, the surface temperature response phase shift can be seen to change from a semi-infinite value at 45 degrees to a lower value that depends on R and the location of the defect.

[0033] Therefore, Figure 3 illustrates the basic principle of lock-in thermography for characterizing defects and interfaces in devices, including materials and modular laminates.

[0034] The important point is that the value of μ is frequency-dependent, and sensitivity to defects deep within the material increases by lowering the excitation frequency. Therefore, by changing the excitation frequency, information about the interface (degradation) of various laminates or interfaces can be obtained.

[0035] While this simple model can provide good guidance on how to detect damage using thermal waves, power semiconductor stacks cannot be modeled by a semi-infinite body because each layer of the stack has different thermal properties. To analyze this system more accurately, a 1D electrical equivalent of the thermal model can be used, one of which can be analyzed as a frequency response function.

[0036] Thermal impedance: Electrical equivalent model: Based on the fact that both heat conduction and electron conduction are physical processes modeled by the same phenomenon (diffusion), the thermal impedance of a semiconductor module can be modeled by analogy with scaled heat conduction and telegrapher equations. Therefore, the equivalent electrical network of the thermal system can be estimated. The resistance and capacitance of the electrical equivalent are defined by analogy with thermal resistance Rth and capacitance Cth using the following equations.

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[0037] In a simple model of a power module composed of laminates of different materials, each layer exhibits thermal resistance and thermal capacitance. Thus, the electrical network, referred to as a Kauer network, can represent the thermal system of a five-layer laminate as shown in Figure 4. Ploss is the heat flux from the top surface 5 of the semiconductor die in Figure 1 (the electrical equivalent is a current source), corresponding to the loss occurring on the semiconductor die; Cth and Rth are the equivalent capacitance and resistance of each layer starting from the die layer 3 and the heat sink layer 8; and Tamb is the ambient heat sink temperature.

[0038] The total thermal impedance of the network in Figure 4 can be calculated using the following formula, where s is the Laplace operator.

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[0039] In the case of a degraded layer, the new (increased) resistance R th,v This is calculated using the void percentage f, as explained by the following formula. Since the amount of material is not modified, the heat capacity C th It remains the same.

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[0040] For example, we use the nine-layer laminate shown in Figure 1 and the material data in Table 1 below. [Table 1]

[0041] Thermal impedance can be plotted on a Bode plot, and gain and phase are plotted as functions of sinusoidal excitation frequency. In the curves in Figures 5 to 7, measurements were taken while increasing frequency, and a comparison was made between the initial, undegraded module and the degraded module, as shown in Figure 1.

[0042] Figure 5 is a Bode plot of the laminate according to Figure 1, with 40% voids in layers 4 and 10. Figure 6 is a Bode plot of the laminate according to Figure 1, with 40% voids in layer 4. Figure 7 is a Bode plot of the laminate according to Figure 1, with 40% voids in layer 10. These figures show that the gain and phase of the thermal impedance change with degradation.

[0043] Curves 32 and 33 in Figure 5, curves 36 and 37 in Figure 6, and curves 40 and 41 in Figure 7 represent the phase difference between the temperature changes of the die in the initial layer (shown by the dotted line) and the degraded layer (shown by the solid line). Curves 30 and 31 in Figure 5, curves 34 and 35 in Figure 6, and curves 38 and 39 in Figure 7 represent the gain between the temperature changes of the die in the initial layer (shown by the dotted line) and the degraded layer (shown by the solid line).

[0044] The degradation of layer 4, located near the excitation source, can be best detected by the phase shift of curve 33 relative to curve 32 at excitation of approximately 100 Hz, as shown in Figures 5 and 6. On the other hand, as shown in Figure 7, a relatively low excitation frequency of approximately 1 Hz to 10 Hz is required to detect the frequency shift between curves 40 and 41 corresponding to damage to layer 10, which is located further away from the heat source. Note that if damage is introduced to layer 10, no change in phase shift is observed at 100 Hz. Therefore, by changing the excitation frequency, it becomes possible to obtain information about which layer is damaged.

[0045] Power semiconductor die loss: The previous section described the thermal response of the system to sinusoidal excitation. In practical applications, power consumption does not always follow sinusoidal behavior. The purpose of this section is to describe the necessary conditions for the semiconductor operating point that produce a proper thermal response of the system, so that information about layer degradation can be obtained. To support the loss profile requirements, the Bode plot in Figure 6 is plotted over a wider frequency range, such as in Figure 8, with a spacing of 1 Hz to 1 MHz.

[0046] In this example, Figure 8 shows the following information. The gain in a Bode plot provides essentially the same information as that in a thermal impedance plot. The phase information shows that curve 44 for the undegraded case and curve 45 for the degraded case merge at f > 1 kHz. Therefore, it is not possible to obtain information about degradation by analyzing the phase response of the system above this frequency.

[0047] The reason why it is not possible to separate the degraded and non-degraded cases at f>1kHz is that, in the high frequency range, the thermal impedance of the heat source (silicon die) acts as a filter for electrical excitation. The thermal response time scale of the die is τ d =Rth d Cth d This is straightforward once you realize it's of order. We'll use the following definition:

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[0048] In diffusion theory,

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[0049] Using the values ​​for material 3 in Table 1, D d =4.88 10 -5 m 2 / s and die thickness l d If you use =0.14mm, τ d =4.01 10 -4 It can be seen that it is s. Therefore, the thermal system response bandwidth is f d = 1 / τ d It is limited by 2.5 kHz. This is on the same order as 1 kHz, which was found by examining the Bode plot in Figure 8.

[0050] Therefore, the applicability of the present invention means that the target electrical excitation frequency is f d =D si / 1 d 2 It is significantly lower than that, that is, preferably less than 2 kHz, and more preferably less than 1 kHz.

[0051] Advantageous to the present invention is that typical signal modulation strategies, such as PWM modulation in a converter, are usually operated at frequencies higher than 1 kHz, such as 5 kHz or 10 kHz. As a result, the thermal system's response is weak in this frequency range, and temperature oscillations due to the PWM frequency are weak, as seen in the Bode plot of Figure 8 with a gain of <-60 dB. Therefore, advantageously, the thermal system is unaffected by PWM excitation. Using the model described in the previous section, this means that losses are averaged over the PWM period.

[0052] Advantageous to the present invention is that the typical excitation frequency may be limited by the load impedance, load requirements, or external control of the system, and as a result, the system is typically excited at the target frequency range, i.e., frequencies lower than 1 kHz, such as 50 Hz, 60 Hz, 100 Hz, 400 Hz, or 1 Hz.

[0053] Another implication of this analysis is that low-frequency electrical excitation signals are τ dThis means that the power value must not decrease from its maximum value to zero value within a shorter time.

[0054] Therefore, to summarize the power semiconductor loss requirements in the present invention, the loss waveform of the power semiconductor die depends on the application in which the power module or system is installed.

[0055] The present invention relates to DC / AC or AC / DC power converter topologies, and to cases where the loss is a low-frequency periodic pulse wave having the following characteristics. a. The maximum pulse duration corresponds to half a cycle of the fundamental frequency of the AC current, and zero loss time exists. and b. There is at least one maximum value or an asymmetric loss occurrence between two half-cycles within the pulse. and c. The time difference between the last maximum value and the zero loss time is τ d =l d 2 / D d It is larger than l. d D is the thickness of the semiconductor chip. d This is the thermal diffusivity of the semiconductor chip. This is because the frequency of the modulated loss is f d =D die / (l die ) 2 It means lower than, and here, l die D is the thickness of the die. die This is the diffusion coefficient of the die.

[0056] As an example, under condition c, the semiconductor chip has a thickness l die If the silicon chip is 100 μm thick, the thermal diffusivity of silicon is D die = 4.89 × 10 -4 m 2 Since / s, therefore f die =4.89kHz, τ die This equals 205 μs.

[0057] An example of a DC / AC power topology is shown in Figure 9. Here, the DC power supply 51 functions to construct a three-phase AC power supply 52 using the power semiconductor switch 1. The DC / AC power converter has a three-phase configuration supplied by the DC bus voltage. The semiconductor die can be any IGBT, diode, MOSFET, or MISFET and can be arranged in any configuration in the power converter topology. In the following example, the semiconductor die in question within the power module is located in one leg at the high-side position.

[0058] The switching and conduction losses of the semiconductor die 50 occur during normal operation of a power module in a motor control application, assuming load current and bus voltage during switching and conduction events.

[0059] The occurrence of semiconductor die loss in a power module during DC / AC or AC / DC operation is related to the following variables associated with the operating point, namely, I cond Current passing through, switching current I sw , switching voltage V sw , switching frequency f sw , junction temperature T j , proportional to the duty cycle modulation strategy / PWM technique.

[0060] In such applications, periodic pulse loss waveforms typically occur at the fundamental frequency, e.g., a grid frequency of 50 Hz or an electric motor rotation control frequency of 1 Hz to 2 kHz. In either case, semiconductor losses occur only during the time corresponding to the first half-cycle of the fundamental frequency, and no losses occur in the semiconductor during the second half-cycle of the fundamental frequency.

[0061] Consider that the power converter generates a sinusoidal current waveform with a fundamental frequency of 100 Hz at the output of phase A, B, and C, and generates a chopped voltage waveform when operating at a switching frequency of 20 kHz.

[0062] Figures 10A and 10B show the junction temperature and loss of an initial and degraded power module at a fundamental AC frequency of 100 Hz. Figure 10A is a schematic diagram of the power and junction temperature waveforms over time. Figure 10B is a magnified view of one loss period, including a measured time width of the die temperature Tj. In this example, the loss wave 70 on the semiconductor die in Figure 10A has only a positive sinusoidal shape. In other words, the loss is measured at the fundamental frequency f f Within this range, it follows a sinusoidal shape between 0 and 180 degrees (0 and π), and has zero values ​​between 180 and 360 degrees (π and 2π).

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[0063] The die temperature responses Tj71,72 in Figure 10A are calculated using thermal impedance. The temperature waveform has one minimum value 71a, 72a and one maximum value 71b, 72b within the fundamental period, respectively. Measuring the time between the lowest and highest temperature points provides an indicator of module degradation. In Figure 10B, which shows a single loss period, it can be seen that when a degraded power module with 40% voids in layer 4 of Figure 1 is operating at a 100 Hz AC current, the time width Δt=td is longer than the time width Δt=tp of the initial power module. This can be explained by the Bode plot in Figure 6. Figure 6 shows that at 100 Hz, the absolute value of the phase angle of the degraded thermal impedance is larger than the absolute value of the phase angle of the initial thermal impedance.

[0064] The key point is that rapid power changes cause a kink in the temperature response, so by simply examining the temperature response, the start of the pulse corresponding to tTjmin can be identified. Therefore, the information Δt=tTjmax-tTjmin has the advantage of being related to the phase angle between the temperature response and power excitation.

[0065] Figure 11 shows the losses at the fundamental frequency of a DC / AC power converter plotted for various modulation strategies when the converter drives an electric motor. The various modulation strategies are sine wave60, DPWM161, DPWM362, and spatial vector63. The losses are calculated considering both the conduction loss and switching loss of the semiconductor die and are averaged over the modulation period.

[0066] The topology of the converter is not limited to the converters given as examples, but can be multilevel topologies such as NPC (neutral point clamped) inverters, ANPC (Active-neutral-point-clamped) inverters, MMC (modular multilevel converter), FC (flying capacitor), and other state-of-the-art topologies.

[0067] This indicates that in an AC / DC power converter or DC / AC power converter having a power module comprising at least one semiconductor die attached to a material laminate for heat dissipation and / or electrical connections, if the semiconductor generates asymmetric losses between two half-cycles of an AC frequency, during the AC period, a signal related to the temperature of the semiconductor at that frequency is measured, and the time width Δt = tTjmax - tTjmin between the temperature Tjmax where the junction temperature is maximum and the temperature Tjmin where it is minimum is measured, and by repeating such measurements during the operation of the power converter, a measure of the degradation of at least one layer in the laminate of layers between the die and the heat sink to which the die is attached can be obtained.

[0068] Therefore, since degradation is sensitive to the temperature rise time delay Δt and not to the magnitude of temperature or power loss, the estimation of thermal degradation is not sensitive to the accuracy of junction temperature measurement, and if there is a monotonic relationship between temperature and signal, any signal related to the semiconductor temperature can be used, which is an advantage. Consequently, since it is not necessary to estimate or measure power loss within the semiconductor, the number of sensors and calculation time are reduced, and the accuracy of degradation measurement is improved.

[0069] During the operation of the converter, measurements are repeated and compared. In order to compare them, the temperature rise time delay Δt = tTjmax - tTjmin is calculated and stored in memory at each iteration, and compared with the initial value and / or previous value, t x = t0~t p Such a time delay Δt x By monitoring the changes in thermal impedance, the degradation state can be obtained.

[0070] In addition to measuring the temperature rise time delay, the fundamental frequency f at which the loss is measured is also measured. fund It measures and stores the time width Δt(f) at the fundamental frequency. fund The state of deterioration can be determined by this.

[0071] Therefore, the damage indicator Δt x Because the fluctuations are sensitive to the fundamental frequency, there is an advantage in being able to obtain degradation information for a specific laminate layer.

[0072] For example, the basic loss frequency can be measured using an AC load current probe, specified by a controller reference, or specified by the user's AC frequency request.

[0073] As explained below, damage at different heights within the laminate causes different phase shifts in the temperature rise curve, resulting in different frequency f fund,i In the damage indicator Δti(f fund,iBy measuring the frequency (Frequency), information can be obtained about the degradation progression in various layers of the laminate. High frequencies are used to monitor the degradation of the laminate layers closer to the semiconductor, while low frequencies are used to monitor the degradation of the laminate layers further away from the semiconductor.

[0074] The effect of degradation on the frequency response function of a particular layer of the laminate can be determined, for example, by identifying the degradation of the particular layer using equation (4), measuring the phase shift associated with this degradation using the Z(s) estimation of equation (3), and plotting Bode plots as shown in Figures 5 to 7.

[0075] For example, one or more frequencies between 20Hz and 500Hz are used to monitor the degradation of layer 4 according to Figure 6, and one or more frequencies between 1Hz and 10Hz are used to monitor layer 10, which yields the curve shown in Figure 7.

[0076] In cases of multiple degradation combinations, monitoring time delays at multiple frequencies allows for the separation of the contributions of each degradation, as shown in the example in Figure 5.

[0077] To support the relationship between Δt and phase angle, as a first approximation, the change in phase angle Ph in units of angle due to degradation, i.e., the change from Δt=tp to Δt=td, can be approximated by the following equation.

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[0078] Figure 12 shows a comparison between the first-order estimation of phase Ph using equation (7) and the phase extracted from calculations using the impedance method with respect to the fundamental frequency. In this figure, curve 80 is the estimated phase curve of degraded layers 4 and 10 in Figure 1, curve 81 is the theoretical curve of degraded layers 4 and 10, curve 82 is the estimated phase curve of degraded layer 4, curve 83 is the theoretical curve of degraded layer 4, curve 84 is the estimated phase curve of degraded layer 10, and curve 85 is the theoretical curve of degraded layer 10. This shows that at frequencies above approximately 10 Hz, the first-order estimation shows a similar trend to the more rigorous model, and thus demonstrates that the information at Δt is the same as that at the phase in the Bode plots of Figures 5 to 8.

[0079] Next, if the fundamental frequency f of the AC current is changed, this method allows monitoring the time difference for different fundamental frequencies. This makes it possible to estimate which layer is the degraded layer.

[0080] By measuring the time difference Δtmin between two consecutive minimum values ​​of the junction temperature, the fundamental frequency is f fund It can be calculated as =1 / Δtmin.

[0081] Therefore, this has the advantage of allowing the fundamental frequency to be recorded without using additional sensors or obtaining fundamental frequency information from a separate algorithm. Consequently, the algorithm for degradation analysis has the advantage of being able to function independently of the converter's control algorithm or any other operating conditions of the power module.

[0082] For example, in Figure 10A, the time interval between two consecutive minimum values ​​is Δtmin = 0.02s, so the fundamental frequency is f fund It can be calculated by setting =1 / Δtmin = 50Hz.

[0083] The signal used to measure the temperature may be any temperature-sensitive electrical parameter (TSEP) of the associated semiconductor switch.

[0084] Therefore, the complexity of the system is reduced because degradation can be identified and quantified without the need for complex prior calibration of TSEP.

[0085] For example, if TSEP can have a value X between Xa and Xb corresponding to the temperature range [-20°C; 200°C], then the relationship between temperature and TSEP is linear as follows:

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[0086] In this example, since only the variable X is measured, it is not necessary to calibrate TSEP, i.e., determine A and B, before implementing the method. In the lower example, A > 0, and the points tTjmax and tTjmin where the junction temperature is maximum and minimum correspond to the points where X takes its maximum and minimum values, respectively. In another lower example, A < 0, and the points tTjmax and tTjmin where the junction temperature is maximum and minimum correspond to the points where X takes its minimum and maximum values, respectively.

[0087] More generally, it is sufficient that the function T(X) is monotonically increasing or decreasing, for example, that its first derivative does not change sign in the interval [Xa;Xb]. Therefore, an advantage is that uncalibrated TSEPs with nonlinear temperature characteristics can also be used within the scope of the present invention.

[0088] Figure 13A shows the method steps of this disclosure, and this method is Step 100 involves sampling and measuring a signal S related to the junction temperature Tj of a semiconductor die at a frequency higher than 10 times the AC frequency of the AC current, Step 110 calculates the time interval Δt = tTjmax - tTjmin between the time point tTjmax, when the junction temperature of the semiconductor die is at its maximum value, and the time point tTjmin, when the junction temperature is at its minimum value, in one cycle of the AC current; and Step 120 stores the time interval Δt in memory. To monitor the change of the time width Δt and determine the change of the deterioration of the thermal impedance of the power module, for t = t0 to t p the time width Δt t0 is denoted as Δt tp and compared in step 130, During different times tx = t0 to t p while the power module is operating, the signal is repeatedly sampled and measured, and the time width is calculated (140, 150), to provide a series of time widths Δt t0 ~Δt tp This includes including.

[0089] Step 100 can also include measuring the AC frequency. Step 120 can include storing pairs of the time width Δt tx and the AC frequency f fund The measurement in step 100 can be performed using various means such as thermocouples, infrared images, TSEP, etc.

[0090] Since there may be noise in the measurement, averaging of Δt may be required. The comparison may not be performed strictly using the measured first Δt0 value, but rather may be performed using the average value in several measurements at the start of product use. In such cases, averaging can be performed for about 2 to 10 measurements.

[0091] The iterations of sampling, measurement, and comparison may be performed regularly daily, weekly, monthly, or for each change in the AC frequency corresponding to the use of the conversion device related to the estimated deterioration rate (e.g., every 1 / 10 or several hundred hours). When the difference between Δt tx and Δt0 becomes larger than a predetermined warning value, the repetition rate can also be accelerated.

[0092]

[0093] ​The method also modifies the AC frequency during the dedicated operation period of the conversion device, as shown in FIG. 13B, to provide a plurality of different AC frequencies f that enable detection of the thermal impedance of a specific layer of the laminate, respectively m = f1, f2, ..., f n and performs one or more steps of repeating the operations of providing 260, sampling and measuring 200 the TSEP signal S and the frequency, and calculating 210 the time widths Δt txf1 , Δt txf2 , ..., Δt txfn corresponding to such different AC frequencies, and monitors 230 the transition of Δt for each of the AC frequencies to determine the transition of the deterioration of the thermal impedance of the specific layer. For each of the AC frequencies, one or more steps of comparing 230 Δt with the Δt t0fm value are included, and in order to compare 230 the Δt tpfm value with the Δt0 value, during the operation of the power module, sampling and measuring the signal and repeating the calculation of the time width to provide a series of Δt Δt x = Δt0 to Δt m values for each of the different AC frequencies f x can be included. p Here, the repetitions of sampling, measuring, and comparing may also be performed periodically daily, weekly, monthly, or for each variation number of the AC frequency corresponding to the use of the conversion device related to the estimated deterioration rate (for example, 1 / 10 or several hundred hours). When the difference between Δt

[0094] and Δt0 becomes larger than a predetermined warning value, the repetition rate can also be accelerated. tx In addition, the test using the adaptation of the AC frequency may be performed in a specific situation such as a test related to the ramping of the grid frequency or the motor speed.

[0095]

[0096] The method may also include one or more steps 300 of measuring the time difference Δtmin between two consecutive minimum values ​​of the junction temperature, as shown in Figure 13C, and a step 310 of calculating the AC frequency as f = 1 / Δtmin. This eliminates the need to measure the frequency using a means other than the signal S associated with the junction temperature Tj, which may be an uncalibrated temperature-sensitive electrical parameter of the semiconductor.

[0097] To advance this method, the conversion device shown in Figure 9 may include, on the power semiconductor switch die of the conversion device, a sensor means 53 for detecting the TSEP signal of the power semiconductor switch die, an analog-to-digital converter means 54, a sampling means 55, and a processor 56 equipped with necessary memory means 57 and a calculation means for storing and executing software configured to perform the thermal impedance monitoring method of this disclosure.

Claims

1. A method for monitoring the thermal impedance of a power module of a power converter used to convert DC current to AC current, or vice versa, wherein the power module comprises at least one semiconductor die mounted on a material laminate for heat dissipation and / or electrical connection, the semiconductor generates asymmetric losses between two half-cycles of the AC current at an AC frequency f, and the thermal impedance monitoring method is: The process involves sampling and measuring a signal related to the junction temperature Tj of the semiconductor die at a frequency higher than 10 times the AC frequency of the AC current, In one cycle of the AC current, the time interval Δt = tTjmax - tTjmin is calculated between the time point tTjmax when the junction temperature of the semiconductor die is at its maximum value and the time point tTjmin when the junction temperature is at its minimum value, and the time interval Δt is stored in memory. Different time intervals t during the operation of the power module ｘ = t ０ ~t ｐ In this process, the process of sampling and measuring the signal, and calculating the time width, is repeated until a series of time widths Δt are obtained. ｔ０ ~Δt ｔｐ To provide the time width Δt ｔｐ the aforementioned time width Δt ｔ０ By comparing it with the time width Δt ｘ By monitoring the trend, the trend of deterioration of the thermal impedance of the power module is determined, A thermal impedance monitoring method, including the following.

2. The thermal impedance monitoring method according to claim 1, comprising averaging the measured values ​​of the time width Δt over a period of time in order to reduce noise in the measured values.

3. Measuring an AC frequency and the time width Δt ｔｘ and storing pairs thereof with an AC frequency f ｆｕｎｄ The thermal impedance monitoring method according to claim 1 or 2, comprising:

4. Multiple different AC frequencies f are used to modify the AC frequency during the dedicated operating period of the power converter, each enabling the detection of the thermal impedance of a specific layer of the material laminate. ｍ = f １ , f ２ , . . . , f ｎ To provide the sampling and measurement and the time width Δt corresponding to the different AC frequencies. ｔｘｆｍ = Δt ｔｘｆ１ ,Δt ｔｘｆ２ , . . . ,Δt ｔｘｆｎ Repeated calculations, During the operation of the power module, the signal is sampled and measured, and the time width is calculated, and a series of Δt values ​​are obtained for each of the different AC frequencies. ０ｆｍ ~Δt ｘｆｍ To provide the AC frequency f ｍ = f １ , f ２ , . . . , f ｎ For each of these, Δt ｔｍ Δt ｔ０ By comparing with this, the trend of Δt is monitored to determine the trend of deterioration of the thermal impedance of the specific layer, The thermal impedance monitoring method according to claim 3, including the method described in claim 3.

5. The thermal impedance monitoring method according to claim 3, comprising measuring the time difference Δtmin between two consecutive minimum values ​​of the junction temperature and calculating the AC frequency as f = 1 / Δtmin.

6. The thermal impedance monitoring method according to claim 1 or 2, wherein the signal related to the junction temperature Tj is a temperature-sensitive electrical parameter of the semiconductor.

7. The thermal impedance monitoring method according to claim 6, wherein the signal related to the junction temperature Tj is an uncalibrated temperature-sensitive electrical parameter of the semiconductor.

8. The aforementioned AC frequency is f ｄ = D ｄｉｅ / l ｄｉｅ ２ Lower than, in the formula, l ｄｉｅ D is the thickness of the die. ｄｉｅ The thermal impedance monitoring method according to claim 1 or 2, wherein is the diffusion coefficient of the die.

9. The thermal impedance monitoring method according to claim 1 or 2, wherein the AC frequency is less than 2 kHz.

10. The thermal impedance monitoring method according to claim 1 or 2, wherein the AC frequency is less than 1 kHz.

11. The AC frequency is the fundamental frequency for supplying power to the power converter or the fundamental output frequency f of the power converter. ｆｕｎｄ The thermal impedance monitoring method according to claim 1 or 2.

12. A converter comprising a power semiconductor switch die of the converter, a sensor means for detecting the temperature of the power semiconductor switch die, an analog-to-digital converter means, a sampling means, and a processor having a memory means for storing and executing software configured to perform the thermal impedance monitoring method described in claim 1 or 2.

13. The converter according to claim 12, wherein the sensor means is designed to detect the temperature-sensitive electrical parameter of the power semiconductor switch die.

14. Permanent memory means including software that, when executed by a processor, includes instructions for performing the thermal impedance monitoring method according to claim 1 or 2.

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