Substrate processing method and substrate processing system

Abstract

The present invention provides a substrate processing method for processing a substrate, the method comprising: a step in which one surface of the substrate is ground so as to form a recess wherein the central part of the one surface is recessed from the outer peripheral part; a step in which the thickness distribution of the substrate is acquired by measuring the thickness of the substrate after the grinding; a step in which the optimum etching conditions for optimizing the etching amount deviation distribution during the etching of the one surface are calculated on the basis of the thickness distribution; and a step in which the one surface is etched by supplying an etching liquid from an etching liquid supply unit to the one surface of the substrate after the grinding on the basis of the optimum etching conditions.

Description

Substrate processing method and substrate processing system

[0001] The present disclosure relates to a substrate processing method and a substrate processing system.

[0002] Patent Document 1 discloses a method for manufacturing a semiconductor wafer, which includes a step of planarizing at least the front surface of a wafer obtained by slicing a semiconductor ingot, and a step of etching the front surface of the planarized wafer by spin etching.

[0003] Japanese Patent Application Publication No. 11-135464

[0004] The technology according to the present disclosure appropriately controls the surface shape of a substrate during etching processing.

[0005] One aspect of the present disclosure is a substrate processing method for processing a substrate, comprising: grinding one surface of the substrate to form a recess in which a center portion of the surface is recessed more than an outer periphery; measuring a thickness of the substrate after grinding to obtain a thickness distribution of the substrate; calculating, based on the thickness distribution, optimal etching conditions for optimizing an etching amount deviation distribution when etching the one surface; and supplying an etching liquid from an etching liquid supply unit to the one surface of the substrate after grinding, based on the optimal etching conditions.

[0006] According to the present disclosure, the surface shape of a substrate can be appropriately controlled during etching processing.

[0007] 1 is a plan view showing an outline of the configuration of a wafer processing system; FIG. 2 is a side view showing an outline of the configuration of an etching apparatus; FIG. 3 is an explanatory diagram showing how a nozzle moves in a radial direction; FIG. 4 is a side view showing an outline of the configuration of a grinding unit; FIG. 5 is an explanatory diagram showing how a wafer surface is ground by the grinding unit; FIG. 6 is a flow diagram showing main steps of wafer processing; FIG. 7 is an explanatory diagram showing main steps of wafer processing; FIG. 8 is an explanatory diagram showing an example of an etching amount deviation distribution; FIG. 9 is an explanatory diagram showing main steps of a method for optimizing an etching amount deviation distribution; FIG. 10 is an explanatory diagram showing an example of a plurality of parts; FIG. 11 is an explanatory diagram showing an example of parts used for overlay; FIG. 12 is an explanatory diagram showing an example of an overlay of optimized multiple parts; FIG. 13 is a flow diagram showing main steps of wafer processing; FIG. 14 is an explanatory diagram showing main steps of wafer processing; FIG. 15 is an explanatory diagram showing main steps of wafer processing; FIG. 16 is an explanatory diagram showing main steps of wafer processing; FIG. 17 is an explanatory diagram showing main steps of wafer processing; FIG. 18 is an explanatory diagram showing main steps of wafer processing;

[0008] In the manufacturing process of semiconductor devices, the cut surfaces of disk-shaped silicon wafers (hereinafter simply referred to as "wafers") obtained by cutting a single crystal silicon ingot using a wire saw or the like are flattened and smoothed to make the wafers uniform in thickness. The flattening of the cut surfaces is carried out, for example, by surface grinding or lapping. The smoothing of the cut surfaces is carried out, for example, by spin etching, in which an etching solution is supplied from above the cut surfaces of the wafer while the wafer is rotating.

[0009] The aforementioned Patent Document 1 discloses that at least the front surface of a wafer obtained by slicing a semiconductor ingot is flattened by surface grinding or lapping, and then the front surface is etched by spin etching. In the spin etching process described in Patent Document 1, a spray nozzle is moved above the outer periphery of the wafer at the start of the spin etching, and then the spray nozzle is fixed above the center of the wafer whose outer periphery has been etched, and an etching solution is supplied to perform spin etching.

[0010] However, the inventors have discovered that when the etching solution is supplied from a nozzle fixed above the center of the wafer using the method disclosed in Patent Document 1, the surface shape of the wafer after etching cannot be appropriately controlled, particularly directly below the discharge of the etching solution. Specifically, they have discovered that the amount of etching at the center of the wafer, which is directly below the discharge of the etching solution, is smaller than the amount of etching at the outer periphery surrounding the center. At the outer periphery of the wafer, the etching solution supplied to the center flows due to centrifugal force, causing etching to proceed. Meanwhile, at the center, which is directly below the discharge of the etching solution, the supplied etching solution is removed by centrifugal force, and the removal by centrifugal force fails to form the flow (flow rate and flow rate of the etching solution) necessary to proceed with etching on the wafer surface.

[0011] The technology disclosed herein has been made in light of the above findings, and appropriately controls the surface shape of a substrate during etching. Hereinafter, a wafer processing system as a substrate processing system and a wafer processing method as a substrate processing method according to this embodiment will be described with reference to the drawings. Note that in this specification and the drawings, elements having substantially the same functional configurations are designated by the same reference numerals, and redundant description will be omitted.

[0012] In the wafer processing system 1 according to this embodiment, processing is performed on a wafer W as a substrate obtained by slicing an ingot to improve the in-plane thickness uniformity. Hereinafter, the slicing surface of the wafer W will be referred to as a first surface Wa as one surface and a second surface Wb as the other surface. The first surface Wa is the surface opposite the second surface Wb. In addition, the first surface Wa and the second surface Wb may be collectively referred to as the surface of the wafer W.

[0013] 1, the wafer processing system 1 has a configuration in which a loading / unloading station 10 and a processing station 11 are integrally connected. The loading / unloading station 10 loads / unloads a cassette C, which can accommodate a plurality of wafers W, between the loading / unloading station 10 and the outside. The processing station 11 is equipped with various processing devices that perform desired processing on the wafers W.

[0014] The carry-in / out station 10 is provided with a cassette mounting table 20. In the illustrated example, the cassette mounting table 20 is configured to be able to mount a plurality of cassettes C, for example, two cassettes C, in a line in the Y-axis direction.

[0015] For example, three processing blocks G1 to G3 are provided in the processing station 11. The first processing block G1, the second processing block G2, and the third processing block G3 are arranged in this order from the negative side of the X axis (the side of the loading / unloading station 10) to the positive side.

[0016] The first processing block G1 is provided with reversing devices 30 and 31, a thickness measuring device 40, etching devices 50 and 51, and a wafer transfer device 60. The reversing device 30 and the etching device 50 are arranged in this order from the negative side to the positive side of the X axis. The reversing devices 30 and 31 and the thickness measuring device 40 are stacked in this order, for example, vertically from the bottom up. The etching devices 50 and 51 are stacked in this order, for example, vertically from the bottom up. The wafer transfer device 60 is arranged on the positive side of the Y axis from the etching devices 50 and 51. Note that the number and arrangement of the reversing devices 30 and 31, the thickness measuring device 40, the etching devices 50 and 51, and the wafer transfer device 60 are not limited to these.

[0017] The reversing devices 30 and 31 vertically reverse the first surface Wa and the second surface Wb of the wafer W. The reversing devices 30 and 31 may have any configuration.

[0018] In one example, the thickness measurement device 40 includes a measurement unit (not shown) and a calculation unit (not shown). The measurement unit includes a sensor that measures the thickness of the wafer W at multiple points after grinding or etching. The calculation unit acquires the thickness distribution of the wafer W from the measurement results (thickness of the wafer W) obtained by the measurement unit, and further calculates the flatness (TTV: Total Thickness Variation) of the wafer W. Note that the calculation of the thickness distribution and flatness of the wafer W may be performed by the control device 140 described below instead of the calculation unit. In other words, a calculation unit (not shown) may be provided within the control device 140 described below. Note that the configuration of the thickness measurement device 40 is not limited to this and may be configured as desired.

[0019] The etching devices 50 and 51 etch silicon (Si) on the first surface Wa or the second surface Wb after grinding in the processing device 110 described below.

[0020] 2, etching apparatuses 50 and 51 include a wafer holder 52 as a substrate holder, a rotation mechanism 53, and a nozzle 54 as an etching liquid supply unit. The wafer holder 52 holds the outer edge of the wafer W at multiple points (three points in this embodiment). The configuration of the wafer holder 52 is not limited to the example shown in the figure; for example, the wafer holder 52 may include a chuck that suction-holds the wafer W from below. The rotation mechanism 53 rotates the wafer W held by the wafer holder 52 about a vertical rotation center line 52a.

[0021] The nozzle 54 supplies the etching liquid E to the first surface Wa or the second surface Wb of the wafer W held by the wafer holder 52. The nozzle 54 is connected to an etching liquid supply source (not shown) that supplies the etching liquid E to the nozzle 54. The nozzle 54 is provided above the wafer holder 52 and configured to be movable in the horizontal and vertical directions by a movement mechanism 55. In one example, the nozzle 54 is configured to be capable of reciprocating movement (scan movement) through a rotation center line 52a of the wafer holder 52, that is, above the center of the wafer W as shown in FIG. 3 .

[0022] The etching solution E contains at least hydrofluoric acid or nitric acid to properly etch silicon of the wafer W, which may be an etching target. The etching solution E may also contain phosphoric acid or sulfuric acid.

[0023] 1 , the wafer transfer device 60 has, for example, two transfer arms 61 that hold and transfer the wafer W. Each transfer arm 61 is configured to be movable horizontally, vertically, around a horizontal axis, and around a vertical axis. The wafer transfer device 60 is configured to be able to transfer the wafer W to the cassette C on the cassette mounting table 20, the inverting devices 30 and 31, the thickness measuring device 40, the etching devices 50 and 51, the buffer device 70 (described later), the cleaning device 80 (described later), and the inverting device 90 (described later).

[0024] The second processing block G2 is provided with a buffer apparatus 70, a cleaning apparatus 80, an inverting apparatus 90, and a wafer transfer apparatus 100. The buffer apparatus 70, the cleaning apparatus 80, and the inverting apparatus 90 are stacked vertically in this order from the bottom up. The wafer transfer apparatus 100 is disposed on the negative Y-axis side of the buffer apparatus 70, the cleaning apparatus 80, and the inverting apparatus 90. Note that the number and arrangement of the buffer apparatus 70, the cleaning apparatus 80, the inverting apparatus 90, and the wafer transfer apparatus 100 are not limited to this.

[0025] The buffer device 70 temporarily holds unprocessed wafers W that are transferred from the first processing block G1 to the second processing block G2. The buffer device 70 may have any configuration.

[0026] The cleaning device 80 cleans the first surface Wa or the second surface Wb after grinding by the processing device 110 described below. For example, a brush is brought into contact with the first surface Wa or the second surface Wb to clean the first surface Wa or the second surface Wb. Note that a pressurized cleaning liquid may be used to clean the first surface Wa or the second surface Wb. Furthermore, the cleaning device 80 may be configured to be able to simultaneously clean the first surface Wa and the second surface Wb when cleaning the wafer W.

[0027] The reversing device 90 reverses the first surface Wa and the second surface Wb of the wafer W in the vertical direction, similar to the reversing devices 30 and 31. The reversing device 90 may have any configuration.

[0028] The wafer transfer device 100 has, for example, two transfer arms 101 that hold and transfer a wafer W. Each transfer arm 101 is configured to be movable horizontally, vertically, around a horizontal axis, and around a vertical axis. The wafer transfer device 100 is configured to be able to transfer the wafer W to the etching devices 50 and 51, the buffer device 70, the cleaning device 80, the inversion device 90, and a processing device 110, which will be described later.

[0029] The third processing block G3 is provided with a processing device 110. Note that the number and arrangement of the processing devices 110 are not limited to this.

[0030] The processing apparatus 110 has a rotary table 111. The rotary table 111 is configured to be rotatable about a vertical rotation center line 112 by a rotation mechanism (not shown). Four chucks 113 for suction-holding wafers W are provided on the rotary table 111. Of the four chucks 113, two first chucks 113a are chucks used for grinding at a first processing position B1. These two first chucks 113a are arranged in positions symmetrical with respect to a point across the rotation center line 112. The remaining two second chucks 113b are chucks used for grinding at a second processing position B2. These two second chucks 113b are also arranged in positions symmetrical with respect to a point across the rotation center line 112. That is, the first chucks 113a and the second chucks 113b are arranged alternately in the circumferential direction.

[0031] A porous chuck, for example, is used as the chuck 113. The surface of the chuck 113, i.e., the surface for holding the wafer W, has a convex shape in which the center protrudes compared to the edges in a side view. Note that although this protrusion in the center is very small, in FIG. 4 , the protrusion in the center of the chuck 113 is exaggerated for clarity of explanation.

[0032] As shown in FIG. 4 , the chuck 113 is held by a chuck base 114. The chuck base 114 is provided with a tilt adjustment unit 115 that adjusts the relative tilt between the chuck 113 and grinding wheels 121 and 131 provided in each grinding unit 120 and 130, which will be described later. The tilt adjustment unit 115 has a fixed shaft 116 provided on the underside of the chuck base 114 and multiple, for example, two, lift shafts 117. Each lift shaft 117 is configured to be extendable and retractable, and raises and lowers the chuck base 114. The tilt adjustment unit 115 can tilt the chuck 113 and the chuck base 114 by vertically raising and lowering the other end of the chuck base 114 using the lift shafts 117, starting from one end of the outer periphery of the chuck base 114 (a position corresponding to the fixed shaft 116). This makes it possible to adjust the relative inclination between the surface of the chuck 113 and the surfaces of the grinding wheels 121 and 131 provided in the grinding units 120 and 130 at the processing positions B1 to B2, which will be described later.

[0033] 1, the four chucks 113 can be moved to delivery positions A1-A2 and processing positions B1-B2 by rotating the rotary table 111. Furthermore, each of the four chucks 113 is configured to be rotatable around a vertical axis by a rotation mechanism (not shown).

[0034] The first transfer position A1 is a position on the negative X-axis side and the positive Y-axis side of the turntable 111, where the wafer W is transferred to the first chuck 113a when the first surface Wa is ground. The second transfer position A2 is a position on the negative X-axis side and the negative Y-axis side of the turntable 111, where the wafer W is transferred to the second chuck 113b when the second surface Wb is ground.

[0035] The first processing position B1 is a position on the X-axis positive side and the Y-axis negative side of the turntable 111, and a first grinding unit 120 is disposed thereat. The first grinding unit 120, for example, grinds the first surface Wa or the second surface Wb of the wafer W held by the first chuck 113a. The second processing position B2 is a position on the X-axis positive side and the Y-axis positive side of the turntable 111, and a second grinding unit 130 is disposed thereat. The second grinding unit 130, for example, grinds the second surface Wb or the first surface Wa of the wafer W held by the second chuck 113b.

[0036] A thickness measuring device (not shown) for measuring the thickness of the wafer W after grinding may be provided at the transfer positions A1, A2 or the processing positions B1, B2.

[0037] 4, the first grinding unit 120 has a grinding wheel 122 with an annular grinding stone 121 on its underside, a mount 123 that supports the grinding wheel 122, a spindle 124 that rotates the grinding wheel 122 via the mount 123, and a drive unit 125 that incorporates, for example, a motor (not shown). The first grinding unit 120 is configured to be movable in the vertical direction along a support column 126 shown in FIG.

[0038] The second grinding unit 130 has a configuration similar to that of the first grinding unit 120. That is, the second grinding unit 130 has a grinding wheel 132 with an annular grinding stone 131, a mount 133, a spindle 134, a drive unit 135, and a support 136.

[0039] As shown in FIG. 5 , when grinding the first surface Wa using the first grinding unit 120, the first chuck 113a is tilted so that the first surface Wa of the wafer W held by the first chuck 113a is at a desired angle to the surface of the grinding wheel 121. For example, by aligning the first surface Wa with the surface of the grinding wheel 121 parallel to each other, the first surface Wa can be ground flat. Furthermore, by tilting the surface of the grinding wheel 121 radially outward relative to the first surface Wa, the first surface Wa can be ground into a V-shape in cross section. Furthermore, the first grinding unit 120 can also grind the first surface Wa into an A-shape, M-shape, or W-shape in vertical cross section. The annular grinding stone 121 contacts the wafer W in an arcuate line from the center to the outer peripheral edge, and the entire first surface Wa is ground by rotating the first chuck 113a and the grinding wheel 122 in this state. The same applies when the second surface Wb is ground using the second grinding unit 130.

[0040] The wafer processing system 1 described above is provided with a control device 140 as shown in FIG. 1 . The control device 140 is, for example, a computer including a CPU, a memory, and the like, and has a program storage unit (not shown). The program storage unit stores a program for controlling the processing of wafers W in the wafer processing system 1. As described above, the control device 140 may also have a calculation unit (not shown) for acquiring the thickness distribution of the wafer W from the measurement results (thickness of the wafer W) obtained by the thickness measurement device 40 and for calculating the flatness of the wafer W. The program may be recorded in a computer-readable storage medium H and installed in the control device 140 from the storage medium H. The storage medium H may be temporary or non-temporary.

[0041] Next, a description will be given of wafer processing performed using the wafer processing system 1 configured as described above. In this embodiment, a wafer W is cut from an ingot using a wire saw or the like and lapped, and then processed to improve the in-plane thickness uniformity.

[0042] First, a cassette C containing a plurality of wafers W is placed on the cassette mounting table 20 of the loading / unloading station 10. The wafers W are stored in the cassette C with their first surfaces Wa facing upward and their second surfaces Wb facing downward. Next, the wafer transfer device 60 removes the wafers W from the cassette C and transfers them to the buffer device 70.

[0043] Next, the wafer W is transferred to the processing device 110 by the wafer transfer device 100 and transferred to the first chuck 113a at the first transfer position A1. The second surface Wb of the wafer W is held by suction on the first chuck 113a.

[0044] Next, the turntable 111 is rotated to move the wafer W to the first processing position B1. Then, the first grinding unit 120 grinds the first surface Wa of the wafer W (step S101 in FIG. 6). In step S101, the control device 140 controls the processing device 110 to grind the first surface Wa into a V-shape so as to form a recess War in the first surface Wa after grinding, the recess War being recessed in the center portion relative to the outer periphery, as shown in FIG. 7(a). Details of this V-shape will be described later.

[0045] Next, the turntable 111 is rotated to move the wafer W to the first transfer position A1. At the first transfer position A1, the first surface Wa of the wafer W after grinding may be cleaned by a cleaning unit (not shown).

[0046] Next, the wafer W is transferred to the cleaning device 80 by the wafer transfer device 100. In the cleaning device 80, the first surface Wa and the second surface Wb of the wafer W are cleaned (step S102 in FIG. 6).

[0047] Next, the wafer W is transferred to the reversing device 90 by the wafer transfer device 100. In the reversing device 90, the first surface Wa and the second surface Wb of the wafer W are reversed upside down (step S103 in FIG. 6). That is, the wafer W is reversed so that the first surface Wa faces downward and the second surface Wb faces upward.

[0048] Next, the wafer W is transferred to the processing device 110 by the wafer transfer device 100 and transferred to the second chuck 113b at the second transfer position A2. The first surface Wa of the wafer W is suction-held by the second chuck 113b.

[0049] Next, the turntable 111 is rotated to move the wafer W to the second processing position B2. Then, the second grinding unit 130 grinds the second surface Wb of the wafer W (step S104 in FIG. 6). In step S104, the control device 140 controls the processing device 110 to grind the second surface Wb into a V-shape so as to form a recess Wbr in the second surface Wb after grinding, the central portion of which is recessed more than the outer periphery, as shown in FIG. 7(b). Details of this V-shape will be described later.

[0050] Next, the turntable 111 is rotated to move the wafer W to the second transfer position A2. At the second transfer position A2, the second surface Wb of the wafer W after grinding may be cleaned by a cleaning unit (not shown).

[0051] Next, the wafer W is transferred by the wafer transfer device 100 to the cleaning device 80. In the cleaning device 80, the second surface Wb and the first surface Wa of the wafer W are cleaned (step S105 in FIG. 6).

[0052] Next, the wafer W is transferred by the wafer transfer device 60 to the thickness measurement device 40. The thickness measurement device 40 measures the thickness of the wafer W after both the first surface Wa and the second surface Wb have been ground (step S106 in FIG. 6). Note that if the processing device 110 is provided with a thickness measurement device, the thickness of the wafer W after grinding may be measured by the thickness measurement device of the processing device 110.

[0053] In step S106, the thickness measuring device 40 measures the thickness of the wafer W after double-side grinding at multiple points to obtain the thickness distribution of the wafer W after grinding, and further calculates the flatness of the wafer W. The calculated thickness distribution and flatness of the wafer W are output to, for example, the control device 140.

[0054] The control device 140 determines optimal etching conditions for the subsequent etching process of the first surface Wa and the second surface Wb from the thickness distribution and flatness of the output wafer W, and optimizes the etching amount deviation distribution (step S107 in FIG. 6). A detailed method for optimizing the etching amount deviation distribution in the control device 140 will be described later. The etching amount deviation indicates a value (deviation) obtained by subtracting the average value of the etching amount from the etching amount within the wafer surface. The average value of the etching amount is a value obtained by averaging the etching amount within the wafer surface.

[0055] Next, the wafer W is transferred by the wafer transfer device 60 to the etching device 51. In the etching device 51, the second surface Wb of the wafer W is etched with the etching solution E under the optimal etching conditions determined in step S107 (step S108 in FIG. 6).

[0056] In step S108, first, the wafer W is held by the wafer holder 52 with the second surface Wb facing upward (toward the nozzle 54). Next, the wafer holder 52 (wafer W) is rotated about the vertical rotation center line 52a, and the discharge of the etching solution E from the nozzle 54 is started, thereby starting etching of the second surface Wb.

[0057] 3, while continuing to discharge the etching solution E from the nozzle 54, the nozzle 54 is moved back and forth (scanned) above the center of rotation of the wafer W, i.e., passing through the rotation center line 52a, with the rotation center line 52a as the midpoint. Note that detailed methods for determining etching conditions such as the rotation speed of the wafer W, the scan width of the nozzle 54, and the scan speed when the nozzle 54 is moved back and forth will be described later.

[0058] When etching of the second surface Wb under the optimum etching conditions is completed, the supply of the etching solution E from the nozzle 54 is stopped, and the second surface Wb of the wafer W is rinsed with pure water and then shaken off to dry. Thereafter, the rotation of the wafer holder 52 (wafer W) is stopped, and etching of the wafer W is completed.

[0059] Here, the optimal etching conditions for the wafer W are determined in step S107 based on the thickness distribution and flatness of the wafer W after grinding, as described above. Specifically, the optimal etching conditions are determined based on the difference between the thickness distribution and flatness of the wafer W measured by the thickness measuring device 40 and the thickness distribution and flatness of the target surface shape of the wafer W after etching (hereinafter referred to as the "target shape"). Then, in step S108, the second surface Wb is etched under the optimal etching conditions, thereby optimizing the etching amount deviation distribution and processing the second surface Wb into the target shape, which is flat in this embodiment, as shown in FIG. 7C.

[0060] Next, the wafer W is transferred to the reversing device 31 by the wafer transfer device 60. In the reversing device 31, the first surface Wa and the second surface Wb of the wafer W are reversed upside down (step S109 in FIG. 6). That is, the wafer W is reversed so that the first surface Wa faces upward and the second surface Wb faces downward.

[0061] Next, the wafer W is transferred by the wafer transfer device 60 to the etching device 50. In the etching device 50, the first surface Wa of the wafer W is etched with the etching solution E under the optimal etching conditions determined in step S107 (step S110 in FIG. 6).

[0062] In step S110, the first surface Wa is etched in the same manner as the second surface Wb in step S108. That is, first, the wafer W is held by the wafer holder 52 with the first surface Wa facing upward. Next, the wafer holder 52 (wafer W) is rotated, and the discharge of the etching solution E from the nozzle 54 begins, thereby starting etching of the first surface Wa. Thereafter, while continuing to discharge the etching solution E from the nozzle 54, the nozzle 54 is moved back and forth (scanned) with the rotation center line 52a as the midpoint, as shown in FIG. 3, to etch the first surface Wa.

[0063] In step S110, similarly to step S108, the first surface Wa is etched under optimal etching conditions to optimize the etching amount deviation distribution, and the first surface Wa is processed into a target shape, which is flat in this embodiment, as shown in Fig. 7(d). That is, the target shape of the wafer W is flat, and the thickness distribution of the wafer W becomes uniform.

[0064] Next, the wafer W is transferred by the wafer transfer device 60 to the thickness measurement device 40. The thickness measurement device 40 measures the thickness of the wafer W after etching on both the first surface Wa and the second surface Wb (step S111 in FIG. 6).

[0065] In step S111, the thickness measurement device 40 measures the thickness of the wafer W after double-side etching at multiple points to obtain the thickness distribution of the wafer W after etching, and further calculates the flatness of the wafer W. The calculated thickness distribution and flatness of the wafer W are output to, for example, the control device 140, and are used, for example, in processing another wafer W to be processed next in the wafer processing system 1.

[0066] Thereafter, the wafer W that has undergone all the processing is transferred by the wafer transfer device 60 to the cassette C on the cassette mounting table 20. This completes the series of wafer processing steps in the wafer processing system 1. Note that the wafer W that has undergone processing in the wafer processing system 1 may be polished outside the wafer processing system 1.

[0067] Next, detailed methods for grinding the first surface Wa (step S101), grinding the second surface Wb (step S104), and optimizing the etching amount deviation distribution between the first surface Wa and the second surface Wb (step S107) will be described.

[0068] As described above, in step S108, the wafer W is rotated, and the nozzle 54 is reciprocated (scanned) in a radial direction passing through the center of the wafer W, while supplying the etching solution E from the nozzle 54 to the first side Wa of the wafer W, thereby etching the first side Wa. Hereinafter, this type of etching may be referred to as "scan etching." Also, in step S110, the second side Wb of the wafer W is scan-etched.

[0069] Here, in order to control the surface shape of the wafer W after etching, it is necessary to optimize the etching amount deviation distribution (etching profile) in the wafer radial direction. Then, in step S107, the etching amount deviation distribution is optimized by adjusting etching conditions (etching recipe) such as the rotation speed (number of rotations) of the wafer W, the scan speed and scan width in the reciprocating movement of the nozzle 54, etc.

[0070] On the other hand, due to the nature of the process, the etching amount deviation distribution in scan etching tends to have a downwardly concave V-shape, as shown in FIG. 8 , with the etching amount deviation being small near the center of the wafer W (zero on the horizontal axis). The horizontal axis in FIG. 8 represents the radial position from the center of the wafer (zero on the horizontal axis) to the outer edge (±R on the horizontal axis), and the vertical axis represents the etching deviation (the difference from the average etching amount). In other words, the wafer surface after etching tends to have an upwardly protruding A-shape. For this reason, if, for example, the shape of the wafer surface after grinding is not V-shaped, optimizing the etching amount deviation distribution in step S107 to flatten the wafer surface may fail to generate the desired etching amount deviation, resulting in an unflat wafer surface after etching. In other words, if the shape of the wafer surface after grinding is not V-shaped, the error in optimizing the etching amount deviation distribution in step S107 may be large. Therefore, it is preferable to form the wafer surface after grinding into a V-shape.

[0071] Furthermore, due to the nature of the scan etching process, the etching amount deviation distribution has an upper limit to the height He of the V-shaped shape. This limit height He of the etching amount deviation distribution is the difference between the maximum and minimum values ​​of the etching amount deviation distribution and is the upper limit value that can be controlled in etching. Therefore, for example, if the height of the V-shaped shape on the wafer surface after grinding is large, attempting to optimize the etching amount deviation distribution in step S107 to flatten the wafer surface may result in the desired etching amount deviation not being generated by the optimization calculation, and the wafer surface after etching may not be flat. In other words, if the height of the V-shaped shape after grinding is large, the error in optimizing the etching amount deviation distribution in step S107 may be large. Therefore, it is preferable to set the height of the V-shaped shape on the wafer surface after grinding to be equal to or less than the limit height He of the etching amount deviation distribution.

[0072] In consideration of the above, in step S101, the control device 140 controls the processing device 110 to grind the first surface Wa into a V-shape so as to form a recess War on the ground first surface Wa, the center of which is recessed more than the outer periphery, as shown in FIG. 7A. The height Ha of the recess War is set to be equal to or less than the critical height He of the etching amount deviation distribution. This critical height He is determined based on etching conditions, such as the supply time of the etching solution E, the rotation speed of the wafer W, the scanning speed and scanning width during the reciprocating movement of the nozzle 54, etc. The critical height He is, for example, equal to or less than 1.0 μm.

[0073] Similarly, in step S104, the control device 140 controls the processing device 110 to grind the second surface Wb into a V-shape so as to form a recess War whose center is recessed more than its outer periphery on the ground second surface Wb as shown in Fig. 7B. The height Hb of the recess Wbr is set to be equal to or less than the limit height He of the etching amount deviation distribution.

[0074] In this way, by grinding the first surface Wa and the second surface Wb into a shape that can be controlled by etching in steps S101 and S104, it is possible to appropriately optimize the etching amount deviation distribution of the first surface Wa and the second surface Wb in steps S108 and S110.

[0075] In step S107, optimal etching conditions for the subsequent etching process of the first surface Wa and the second surface Wb are determined based on the thickness distribution and flatness of the wafer W after double-side grinding obtained in step S106, and the etching amount deviation distribution is optimized.

[0076] When determining the optimal etching conditions (optimizing the etching amount deviation distribution), a plurality of parts to be used in the optimization process described below are acquired (step S107-0 in FIG. 9 ) prior to processing the wafer W in the wafer processing system 1. Note that the parts are the etching amount deviation distribution of the wafer W for certain etching conditions.

[0077] In step S107-0, the dummy wafer is etched under, for example, a plurality of different etching conditions. Specifically, the dummy wafer is etched by changing, for example, the rotation speed of the dummy wafer during etching, the scanning speed of the nozzle 54, or the scanning width of the nozzle 54 (see scanning width L in FIG. 3). In this case, the etching processing time for each dummy wafer is the same. As with the etching in steps S108 and S110, the dummy wafer is etched by rotating the dummy wafer and supplying etching solution E from the nozzle 54 to the dummy wafer while the nozzle 54 is moving back and forth. In the following description, the reciprocating movement of the nozzle 54 between both ends of the dummy wafer is considered to be one loop.

[0078] Etching of the dummy wafer under each etching condition is carried out for a predetermined desired time (desired number of loops). Then, the etching amount deviation distribution of the dummy wafer is acquired and output to the control device 140. Furthermore, the control device 140 compresses the output etching amount deviation distribution under each etching condition into an etching amount deviation distribution per unit time (unit number of loops), and stores each compressed etching amount deviation distribution as the above-mentioned part.

[0079] Fig. 10 shows an example of a plurality of parts. The horizontal axis of Fig. 10 indicates the radial position from the center of the wafer (0 (zero) on the horizontal axis) to the outer edge (±R on the horizontal axis), and the vertical axis indicates the etching deviation. The example shown in Fig. 10 is an example in which a total of 36 types of parts are stored in the control device 140, in other words, an example in which the etching amount deviation distribution is obtained under a total of 36 types of different etching conditions.

[0080] The unit time (number of unit loops) can be set arbitrarily depending on the purpose, but it is desirable that the unit time (number of unit loops) be short in order to appropriately obtain a target etching amount deviation distribution in the part overlay described below. In one example, the unit time for a part stored in the control device 140 may be a time for one loop (one round trip of the scan width L shown in FIG. 3), preferably a time for 0.5 loops (half of the round trip of the scan width L shown in FIG. 3).

[0081] Although the above description has been given taking the example of obtaining the above-mentioned parts by etching a dummy wafer as an example, the etching target for obtaining the parts is not limited to a dummy wafer. Specifically, for example, the etching processing results of a wafer W actually processed in the wafer processing system 1 may be stored as the above-mentioned parts.

[0082] When processing wafers in the wafer processing system 1 according to the present disclosure, the optimum etching conditions are determined using the plurality of parts (FIG. 10) acquired in this manner.

[0083] First, based on the thickness distribution in the target shape of the wafer W after etching and the thickness distribution in the surface shape of the wafer W after grinding (hereinafter referred to as the "measured shape") acquired in step S106, the target etching amount deviation distributions for the etching process in steps S108 and S110 are acquired (step S107-1 in FIG. 9). In this embodiment, the target shapes of the first surface Wa and the second surface Wb are each flat. The target etching amount deviation distributions for the first surface Wa and the second surface Wb can be acquired by, for example, calculating the difference between the thickness distribution of the target shape of the wafer W and the thickness distribution of the measured shape, subtracting the average value of the difference, and then halving the result. Specifically, the target etching amount deviation distributions for the first surface Wa and the second surface Wb are each V-shaped, as shown in FIG. 8.

[0084] Next, a plurality of parts are overlapped, and an optimization method is used to optimize the parts to be overlapped and the number of times the parts are overlapped, so that the target etching amount deviation distribution obtained in step S107-1 is achieved (step S107-2 in FIG. 9).

[0085] In step S107-2, for example, the control of the etching amount deviation distribution is applied to a knapsack problem to optimize the number of overlapping parts. For example, the etching amount deviation distribution is the knapsack of the knapsack problem, and the parts are the items in the knapsack problem. Then, the number of overlapping parts is optimized so that the difference between the overlapped etching amount deviation distribution and the target etching amount deviation distribution is minimized.

[0086] As this optimization method, for example, a genetic algorithm or dynamic programming can be used. Then, by performing an optimization calculation, one or more parts to be used for superimposition are selected from the plurality of parts shown in Fig. 10, as shown in Fig. 111, and the selected parts are superimposed as shown in Fig. 12. As a result, the superimposed etching amount deviation distribution (solid line in Fig. 12) approximates the target etching amount deviation distribution (dashed line in Fig. 12).

[0087] Furthermore, in this optimization calculation, the number of overlapping times of parts is optimized so as to minimize the time for supplying the etching liquid E from the nozzle 54 to the wafer W during the etching process. As described above, in this embodiment, so-called multi-objective optimization is performed to optimize both the etching amount deviation distribution, i.e., the etching accuracy, and the supply time for the etching liquid E. Specifically, optimization is performed using the following equation (1). Note that the etching accuracy is the accuracy of the etching amount deviation distribution within the wafer surface.

[0088] where α is a coefficient between 0 (zero) and 1, TTV is the flatness of the measured shape, and RMSE ｃｅｎｔｅｒｉｚｅｄ : Variation in wafer thickness distribution, t ｄｉｓｐｅｎｓｅ : supply time of etching solution E, L ｌｏｗｅｒ : Arbitrarily set lower limit value, L ｕｐｐｅｒ : Arbitrarily set upper limit

[0089] In step S107-2, as shown in the above formula (1), the loss function of the etching amount deviation distribution (etching accuracy) is calculated as a weighted linear sum of the flatness of the measured shape and the variation in the thickness distribution of the measured shape. For example, when the coefficient α in the above formula (1) is 0.5, the flatness (TTV) and the variation in the thickness distribution (RMSE) have the same weight. On the other hand, when the coefficient α is 1, for example, the algorithm places emphasis on flatness, and when the coefficient α is 0 (zero), the algorithm places emphasis on the variation in the thickness distribution.

[0090] In step S107-2, when optimizing the number of overlapping times of the parts, the number of overlapping times may be optimized in units of 0.5 loops. In such a case, for example, it becomes possible to start and finish supplying the etching solution E from the center of the wafer W.

[0091] Once the number of overlaps of the parts has been optimized, the etching conditions corresponding to the parts optimized in step S107-2 are integrated to determine the optimal etching conditions (step S107-3 in FIG. 9). Specifically, the optimal etching conditions are determined by integrating the selected etching conditions so that the optimal number of overlaps is achieved. The optimal etching conditions include, for example, the rotation speed of the wafer W during etching, the scanning speed or scanning width of the nozzle 54, etc.

[0092] As described above, the optimum etching conditions for the first surface Wa and the second surface Wb are determined, and the etching amount deviation distributions for the first surface Wa and the second surface Wb are optimized.

[0093] According to the above embodiment, in steps S101 and S104, the first surface Wa and the second surface Wb are ground into a V-shape, and the heights Ha and Hb of the recesses War and Wbr are set to be equal to or less than the critical height He of the etching amount deviation distribution. In this way, by grinding the first surface Wa and the second surface Wb into a shape that can be controlled by etching in steps S101 and S104, it is possible to improve the accuracy of optimizing the etching amount deviation distribution of the first surface Wa and the second surface Wb in steps S108 and S110.

[0094] Furthermore, in step S107, the optimal etching conditions for the subsequent etching process of the first surface Wa and the second surface Wb are determined from the thickness distribution and flatness of the wafer W after double-side grinding obtained in step S106, thereby optimizing the etching amount deviation distribution.

[0095] Furthermore, in step S107, the optimization method is used to optimize the parts to be overlapped and the number of times the parts are overlapped to determine the optimal etching conditions, and then in steps S108 and S110, the first surface Wa and the second surface Wb can be etched under the optimal etching conditions. This allows the etching amount deviation distribution in the etching process to approach the target etching amount deviation distribution, and as a result, the surface shape of the wafer W after etching can be made to be the target shape. In other words, the optimal etching conditions can be determined from variable etching conditions, and the surface shape of the wafer W after etching can be appropriately controlled.

[0096] Furthermore, since steps S101 to S111 are performed for each wafer W, the surface shape of the etched wafer W can be controlled for each wafer.

[0097] In the above embodiment, in step S107, optimal etching conditions for the subsequent etching process of the first surface Wa and the second surface Wb are determined based on the thickness distribution and flatness of the wafer W after double-side grinding acquired in step S106, and the etching amount deviation distribution is optimized. In this regard, the thickness distribution and flatness of the wafer W may be acquired each time before optimizing the etching amount deviation distribution of the first surface Wa and the second surface Wb.

[0098] Specifically, as shown in Fig. 13, steps S201 to S206 are performed to perform double-sided grinding, double-sided cleaning, and thickness measurement. These steps S201 to S206 are the same as steps S101 to S106 in the above embodiment. In steps S201 and S204, the first surface Wa and the second surface Wb are ground into a V-shape as shown in Figs. 7(a) and 7(b).

[0099] In step S207, optimal etching conditions for the second side Wb are determined based on the thickness distribution and flatness of the wafer W acquired in step S206, and the etching amount deviation distribution for the second side Wb is optimized. Then, in step S208, the second side Wb is etched under the optimal etching conditions, as shown in FIG. 7C. These steps S207 and S208 are similar to steps S107 and S108 in the above embodiment. Then, in step S209, the first side Wa and the second side Wb are inverted. This step S209 is similar to step S109 in the above embodiment.

[0100] In step S210, the thickness of the wafer W is measured at multiple points to obtain the thickness distribution of the wafer W after grinding, and further, the flatness of the wafer W is calculated. Then, in step S211, optimal etching conditions for the first surface Wa are determined from the thickness distribution and flatness of the wafer W to optimize the etching amount deviation distribution of the first surface Wa, and then in step S212, the first surface Wa is etched under the optimal etching conditions. These steps S210 to S212 are similar to steps S106, S107, and S110 in the above embodiment.

[0101] In step S213, the thickness of the wafer W is measured at multiple points to obtain the thickness distribution of the wafer W after grinding, and further, the flatness of the wafer W is calculated. This step S213 is similar to step S111 in the above embodiment. In this case, the first surface Wa and the second surface Wb can be precisely etched.

[0102] In the above embodiment, both surfaces of the wafer W are ground into a V-shape, and then the etching amount deviation distribution on both surfaces is optimized. However, the grinding shape of the wafer W and the optimization of the etching amount deviation distribution may be performed in other patterns.

[0103] As shown in FIGS. 14 and 15, after both surfaces of the wafer W are ground into a V-shape, the etching amount deviation distribution on only one surface may be optimized.

[0104] Steps S301 to S305 are performed to perform double-sided grinding and double-sided cleaning. These steps S301 to S305 are similar to steps S101 to S105 in the above embodiment. In step S301, as shown in FIG. 15(a), the first surface Wa after grinding is ground into a V-shape so as to form a recess War whose center is recessed from the outer periphery on the first surface Wa. In step S304, as shown in FIG. 15(b), the second surface Wb after grinding is ground into a V-shape so as to form a recess Wbr whose center is recessed from the outer periphery on the second surface Wb.

[0105] In step S306, the second surface Wb is etched as shown in FIG. 15C. At this time, the etching amount deviation of the second surface Wb is uniform within the surface, i.e., the etching amount deviation distribution is uniform. Then, in step S307, the first surface Wa and the second surface Wb are inverted. This step S307 is similar to step S109 in the above embodiment.

[0106] In step S308, the thickness of the wafer W is measured at multiple points to obtain the thickness distribution of the wafer W after grinding, and further, the flatness of the wafer W is calculated. In step S309, optimal etching conditions for the etching process of the first surface Wa are determined based on the thickness distribution and flatness of the wafer W obtained in step S308, and the etching amount deviation distribution is optimized. These steps S308 and S309 are similar to steps S106 and S107 in the above embodiment.

[0107] 15D, the first surface Wa is etched under the optimal etching conditions determined in step S309. That is, in this embodiment, after etching, the thickness distribution of the wafer W becomes uniform. This step S310 is similar to step S110 in the above embodiment.

[0108] Thereafter, in step S311, the thickness of the wafer W is measured at multiple points to obtain the thickness distribution of the wafer W after grinding, and further, the flatness of the wafer W is calculated. This step S311 is similar to step S111 in the above embodiment.

[0109] In this embodiment, when steps S301 to S311 are performed consecutively on a plurality of wafers W, the etching amount deviation on the second surface Wb is uniform within the surface in step S306. In other words, the second surface Wb is etched for a plurality of wafers W under the same etching conditions.

[0110] As shown in FIGS. 16 and 17, one side of the wafer W may be ground into a V-shape, and after the other side is ground flat, the etching amount deviation distribution on both sides may be optimized.

[0111] Steps S401 to S406 are performed to perform double-sided grinding, double-sided cleaning, and thickness measurement. These steps S401 to S406 are similar to steps S101 to S106 in the above embodiment, but the second surface Wb is ground flat. In step S401, as shown in FIG. 17(a), the first surface Wa after grinding is ground into a V-shape so as to form a recess War whose center is recessed more than its outer periphery. In step S304, as shown in FIG. 17(b), the second surface Wb is ground flat.

[0112] In step S407, optimal etching conditions for the etching process of the second surface Wb are determined based on the thickness distribution and flatness of the wafer W after double-side grinding acquired in step S406, and the etching amount deviation distribution is optimized. This step S407 is similar to step S107 in the above embodiment.

[0113] 17C, in step S408, the second surface Wb is etched under the optimal etching conditions determined in step S407. Then, in step S409, the first surface Wa and the second surface Wb are inverted. These steps S408 and S409 are similar to steps S108 and S109 in the above embodiment.

[0114] In step S410, the thickness of the wafer W is measured at multiple points to obtain the thickness distribution of the wafer W after grinding, and further, the flatness of the wafer W is calculated. In step S411, optimal etching conditions for the etching process of the first surface Wa are determined based on the thickness distribution and flatness of the wafer W obtained in step S410, and the etching amount deviation distribution is optimized. These steps S410 and S411 are similar to steps S106 and S107 in the above embodiment.

[0115] 17D, the first surface Wa is etched under the optimal etching conditions determined in step S411. That is, in this embodiment, after etching, the thickness distribution of the wafer W becomes uniform. This step S412 is similar to step S110 in the above embodiment.

[0116] Thereafter, in step S413, the thickness of the wafer W is measured at multiple points to obtain the thickness distribution of the wafer W after grinding, and further, the flatness of the wafer W is calculated. This step S413 is similar to step S111 in the above embodiment.

[0117] As shown in FIGS. 18 and 19, one side of the wafer W may be ground into a V-shape, and after the other side is ground flat, the etching amount deviation distribution on only one side may be optimized.

[0118] Steps S501 to S505 are performed to perform double-sided grinding and double-sided cleaning. These steps S501 to S505 are similar to steps S101 to S105 in the above embodiment, but the second surface Wb is ground flat. In step S501, as shown in FIG. 19(a), the first surface Wa after grinding is ground into a V-shape so that a recess War is formed in the center, recessed from the outer periphery. In step S504, as shown in FIG. 19(b), the second surface Wb is ground flat.

[0119] In step S506, the second surface Wb is etched as shown in FIG. 19C. At this time, the etching amount deviation of the second surface Wb is uniform within the surface, i.e., the etching amount deviation distribution is uniform. Then, in step S307, the first surface Wa and the second surface Wb are inverted. This step S507 is similar to step S109 in the above embodiment.

[0120] In step S508, the thickness of the wafer W is measured at multiple points to obtain the thickness distribution of the wafer W after grinding, and further, the flatness of the wafer W is calculated. In step S509, optimal etching conditions for the etching process of the first surface Wa are determined based on the thickness distribution and flatness of the wafer W obtained in step S508, and the etching amount deviation distribution is optimized. These steps S508 and S509 are similar to steps S106 and S107 in the above embodiment.

[0121] 19D, the first surface Wa is etched under the optimal etching conditions determined in step S509. That is, in this embodiment, after etching, the thickness distribution of the wafer W becomes uniform. This step S310 is similar to step S110 in the above embodiment.

[0122] Thereafter, in step S511, the thickness of the wafer W is measured at multiple points to obtain the thickness distribution of the wafer W after grinding, and further, the flatness of the wafer W is calculated. This step S511 is similar to step S111 in the above embodiment.

[0123] In this embodiment, when steps S501 to S511 are performed consecutively on a plurality of wafers W, the deviation in the etching amount on the second surface Wb is uniform within the surface in step S506. In other words, the second surface Wb is etched on the plurality of wafers W under the same etching conditions.

[0124] The pattern for performing grinding and etching shown in FIGS. 7, 15, 17, and 19 can be selected arbitrarily based on the target shape after etching, the grinding and etching processing time, the amount of etching solution E to be consumed, etc.

[0125] As described above, in the grinding in steps S101 and S104, the shape can be controlled up to the outermost periphery of the surface of the wafer W. On the other hand, in the scan etching in steps S108 and S110, in order to prevent the etching solution E from splashing, the etching amount deviation distribution can be controlled only in the region inside the scan width L as shown in Fig. 20, but in the region outside the scan width L, the etching amount deviation distribution may become flat and uncontrollable. In such a case, the error in optimizing the etching amount deviation distribution in step S107 may become large.

[0126] Therefore, in step S101, as shown in FIG. 21 , the first surface Wa after grinding may be formed with a recess War whose central portion is recessed from the outer periphery, and a flat portion Waf provided around the recess War. The recess War has a V-shape in cross section and is formed into a circular shape concentric with the first surface Wa in plan view. The diameter D of the recess War is equal to or less than the scan width L. The flat portion Waf is formed into a ring shape concentric with the first surface Wa in plan view. The boundary point between the recess War and the flat portion Waf is determined, for example, according to the inflection point of grinding in the processing device 110.

[0127] Similarly, in step S104, the second surface Wb after grinding may be formed with a recess Wbr whose central portion is recessed from the outer periphery, and a flat portion Wbf provided around the recess Wbr.

[0128] When optimizing the etching amount deviation distribution of the first surface Wa in step S107, a plurality of parts shown in Fig. 22 are obtained in step S107-0. The subsequent steps of determining the target etching amount deviation distribution in step S107-1, optimizing the parts and the number of overlaps in step S107-2, and determining the optimal etching conditions in step S107-3 are the same as those in the above embodiment.

[0129] According to this embodiment, by grinding the first surface Wa and the second surface Wb into shapes that can be controlled by etching in steps S101 and S104, it is possible to further improve the accuracy of optimizing the etching amount deviation distribution of the first surface Wa and the second surface Wb in steps S108 and S110.

[0130] In addition, when forming a recess War and a flat portion Waf on the first surface Wa after grinding in step S101, the processing device 110 may have two types of grinding units (grinding shafts). For example, in this embodiment, after the first grinding unit 120 forms the entire surface of the first surface Wa flat, the second grinding unit 130 grinds the periphery of the center of the first surface Wa to form the recess War.

[0131] In the above embodiment, the etching process of the first surface Wa and the second surface Wb of the wafer W is controlled based on the etching amount deviation distribution (the distribution of values ​​obtained by subtracting the average value of the etching amount from the etching amount within the wafer surface). However, it may also be controlled based on the distribution of the etching amount (absolute value). For example, optimizing the etching amount deviation distribution enables precise control of the shape (profile) of the wafer W after etching, and optimizing the etching amount enables precise control of the shape of the wafer W after etching and precise control of the thickness of the wafer W. Note that control of the shape of the wafer W based on the etching amount deviation distribution can be more precise than control based on the etching amount. Therefore, if more precise control of the shape of the wafer W is desired, it is preferable to select control based on the etching amount deviation distribution. If precise control of the thickness of the wafer W in accordance with the shape of the wafer W is desired, control based on the etching amount is preferable. Furthermore, in the etching process of the first surface Wa and the second surface Wb of the wafer W, control based on the etching amount deviation distribution and control based on the etching amount may be combined.

[0132] In the above embodiment, an example has been described in which various processes are performed on both sides (first surface Wa and second surface Wb) of a wafer W that has been cut from an ingot using a wire saw or the like and then lapped, but various processes may also be performed on only one side of the wafer W.

[0133] Although the above embodiment has been described with reference to an example in which various processes are performed on a wafer W that has been cut from an ingot using a wire saw or the like and then lapped, the technology of the present disclosure can also be applied to, for example, post-processing steps in the manufacturing process of a semiconductor device. Specifically, for example, in a laminated wafer formed by bonding a first wafer and a second wafer, the technology of the present disclosure can also be applied when, after grinding the first wafer, the surface of the ground first wafer is etched.

[0134] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive, and the above-described embodiments may be omitted, substituted, or modified in various ways without departing from the scope and spirit of the appended claims.

[0135] 1 Wafer processing system 40 Thickness measuring device 50, 51 Etching device 54 Nozzle 110 Processing device 140 Control device W Wafer War Recess

Claims

1. A substrate processing method for processing a substrate, comprising: grinding one surface of the substrate to form a recess in which a center portion of the surface is recessed more than an outer periphery; measuring the thickness of the substrate after grinding to obtain a thickness distribution of the substrate; calculating, based on the thickness distribution, optimal etching conditions for optimizing an etching amount deviation distribution when etching the one surface; and supplying an etching liquid from an etching liquid supply unit to the one surface of the substrate after grinding, based on the optimal etching conditions.

2. The substrate processing method according to claim 1, wherein the height of the recess is equal to or less than the difference between the maximum and minimum values ​​of the etching amount deviation distribution that can be controlled when etching the one surface.

3. The substrate processing method according to claim 2, wherein the difference is determined based on etching conditions for the one surface.

4. The substrate processing method according to claim 3, wherein the difference is 1.0 μm or less.

5. A substrate processing method according to any one of claims 1 to 4, wherein the one surface after grinding has the recess and a flat portion formed in a ring shape around the recess, and the diameter of the recess is equal to or less than the scan width when the etching liquid supply unit is moved back and forth in a radial direction passing through the center of the one surface.

6. The substrate processing method according to claim 5, wherein grinding the one surface includes: grinding the one surface flat; and further grinding a periphery of a center of the one surface that has been ground flat to form the recess.

7. A substrate processing method according to claim 1 or 2, wherein the optimization of the etching amount deviation distribution is performed based on at least one of the rotation speed when rotating the substrate, the scan speed when reciprocating the etching liquid supply unit, and the scan width when reciprocating the etching liquid supply unit.

8. The substrate processing method according to claim 1 or 2, wherein optimizing the etching amount deviation distribution includes: acquiring an etching amount deviation distribution of the one surface when the one surface is etched under a plurality of different etching conditions; and using an optimization technique to superimpose the etching amount deviation distributions corresponding to the plurality of etching conditions, and optimizing a combination of the etching amount deviation distribution used for superimposition and the number of times the etching amount deviation distributions are superimposed, so that the shape of the one surface becomes a target shape.

9. The substrate processing method according to claim 1 or 2, wherein the other surface of the substrate is ground before etching the one surface.

10. The substrate processing method according to claim 9, further comprising: calculating other optimum etching conditions for optimizing the distribution of etching amount deviation when etching the other surface based on the thickness distribution; and etching the other surface after grinding based on the other optimum etching conditions.

11. A substrate processing method according to claim 1 or 2, wherein, before etching the one surface, the other surface of the substrate is ground to form a recess in which the center of the other surface is recessed more than the outer periphery.

12. A substrate processing method according to claim 1 or 2, further comprising grinding the other surface of the substrate before etching the one surface, wherein the grinding of the other surface and the grinding of the one surface are performed consecutively for a plurality of substrates, and the grinding of the other surface is performed for the plurality of substrates under the same etching conditions.

13. A substrate processing system for processing a substrate, comprising: a processing device that grinds one surface of the substrate to form a recess in which the center of the surface is recessed more than the outer periphery; a thickness measuring device that measures the thickness of the substrate; an etching device that supplies an etching liquid to the one surface from an etching liquid supply unit to etch the one surface; and a control device, wherein the control device performs the following operations: acquires a thickness distribution of the substrate from the thickness of the substrate measured by the thickness measuring device after grinding; calculates optimal etching conditions that optimize an etching amount deviation distribution when etching the one surface based on the thickness distribution; and etches the one surface based on the optimal etching conditions using the etching device.

14. The substrate processing system according to claim 13, wherein the control device controls the height of the recessed portion to be equal to or less than the difference between the maximum and minimum values ​​of the controllable etching amount deviation distribution when etching the one surface.

15. The substrate processing system according to claim 14, wherein the control device determines the difference based on etching conditions for the one surface.

16. A substrate processing system according to any one of claims 13 to 15, wherein the control device uses the processing device to control the formation of the recess and a flat portion arranged in a ring shape around the recess on the one surface after grinding, and the diameter of the recess is set to be equal to or less than the scan width when the etching liquid supply unit is moved back and forth in a radial direction passing through the center of the one surface.

17. The substrate processing system according to claim 16, wherein the control device uses the processing device to perform control to grind the one surface flat, and control to further grind the periphery of the center of the one surface that has been ground flat to form the recess.

18. A substrate processing system as described in claim 13 or 14, wherein the control device optimizes the etching amount deviation distribution based on at least one of the rotation speed when rotating the substrate, the scan speed when reciprocating the etching liquid supply unit, and the scan width when reciprocating the etching liquid supply unit.

19. The substrate processing system of claim 13 or 14, wherein, when optimizing the etching amount deviation distribution, the control device acquires the etching amount deviation distribution of the one surface when the one surface is etched under a plurality of different etching conditions, and uses an optimization method to superimpose the etching amount deviation distributions corresponding to the plurality of etching conditions, and optimizes the combination of the etching amount deviation distribution used for superimposition and the number of times the etching amount deviation distributions are superimposed, so that the shape of the one surface becomes a target shape.

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