Electronic device

Abstract

The present invention comprises: a first glass substrate; a first aluminum nitride film covering a first surface of the first glass substrate; a second aluminum nitride film covering a second surface of the first glass substrate; one or more wiring layers disposed on the first aluminum nitride film; a plurality of first terminals disposed on the one or more wiring layers; a first electronic component mounted on the plurality of first terminals; a plurality of second terminals disposed on the second aluminum nitride film; a second electronic component mounted on the plurality of second terminals; and a first through-hole wiring embedded in a through-hole penetrating the first aluminum nitride film, the second aluminum nitride film, and the first glass substrate. A first reference potential terminal among the plurality of first terminals and a second reference potential terminal among the plurality of second terminals are electrically connected via the first through-hole wiring.

Description

electronic equipment

[0001] The present invention relates to electronic devices.

[0002] Patent Document 1 (Japanese Patent Laid-Open Publication No. 05-243416) describes a semiconductor package that uses an aluminum nitride multilayer substrate as a wiring substrate on which a semiconductor element is mounted.

[0003] Furthermore, Patent Document 2 (Japanese Patent Laid-Open Publication No. 09-050936) describes a thin-film capacitor built-in module in which a thin-film capacitor is mounted on an aluminum nitride substrate.

[0004] JP-A No. 05-243416 JP-A No. 09-050936

[0005] There is a technology for building a system in a package by mounting multiple electronic components with different functions on a single package substrate. There is also a technology for using a semiconductor wafer as the package substrate on which the multiple electronic components are mounted, and forming the multilayer wiring layer of the package substrate by a wafer process. Electronic components manufactured using this technology are called FOWLP (Fan Out Wafer Level Package). The inventors of the present application are investigating a technology for using a glass substrate as the package substrate on which the multiple electronic components are mounted.

[0006] An object of the present invention is to provide a technique for improving the performance of electronic devices having glass substrates.

[0007] An electronic device according to one embodiment includes a first glass substrate having a first surface and a second surface opposite the first surface, a first aluminum nitride film covering the first surface of the first glass substrate, a second aluminum nitride film covering the second surface of the first glass substrate, one or more wiring layers disposed on the first aluminum nitride film, a plurality of first terminals disposed on the one or more wiring layers, a first electronic component mounted on the plurality of first terminals, a plurality of second terminals disposed on the second aluminum nitride film, a second electronic component mounted on the plurality of second terminals, and first through-hole wiring embedded in through-holes that penetrate the first aluminum nitride film, the second aluminum nitride film, and the first glass substrate. The plurality of first terminals includes a first reference potential terminal capable of supplying a reference potential to the first electronic component. The plurality of second terminals includes a second reference potential terminal capable of supplying the reference potential to the second electronic component. The first reference potential terminal and the second reference potential terminal are electrically connected via the first through-hole wiring.

[0008] 1 is a cross-sectional view showing an example of the configuration of an electronic device according to an embodiment; FIG. 2 is an enlarged cross-sectional view showing a portion of the electronic device shown in FIG. 1; FIG. 3 is an enlarged cross-sectional view showing a modified example of FIG. 2; FIG. 4 is an enlarged cross-sectional view showing a portion of FIG. 4; FIG. 5 is an enlarged cross-sectional view showing another modified example of FIG. 2; FIG. 6 is an enlarged cross-sectional view showing another modified example of FIG. 2; FIG. 7 is an enlarged cross-sectional view showing another modified example of FIG. 7; FIG. 8 is an enlarged cross-sectional view showing another modified example of FIG. 9; FIG. 9 is an enlarged cross-sectional view showing another modified example of FIG. 2; FIG. 10 is an enlarged cross-sectional view showing another modified example of FIG. 2; FIG. 11 is an enlarged cross-sectional view showing another modified example of FIG. 2; FIG. 12 is an enlarged cross-sectional view showing another modified example of FIG. 2; FIG. 13 is an enlarged cross-sectional view showing another modified example of FIG. 2;

[0009] Hereinafter, each embodiment of the present invention will be described with reference to the drawings. The disclosure is merely an example, and appropriate modifications that a person skilled in the art can easily conceive while maintaining the gist of the invention are naturally included within the scope of the present invention. Furthermore, in order to clarify the explanation, the drawings may show the width, thickness, shape, etc. of each part schematically compared to the actual embodiment. However, these are merely examples and are not intended to limit the interpretation of the present invention. Furthermore, in this specification and each drawing, elements similar to those described above with reference to the previous drawings may be designated by the same or related reference numerals, and detailed descriptions may be omitted as appropriate.

[0010] In the following embodiments, a fan-out panel level package (FOPLP) will be described as an example of an electronic device in which multiple electronic components are mounted on a glass substrate. The FOPLP uses a rectangular glass substrate, which has a larger area than a semiconductor wafer, as a package substrate, allowing for more efficient manufacturing than the FOWLP.

[0011] In this application, when describing the materials that constitute a specific component, the expression "component A is made of B" may be used. This means that "among the materials that constitute component A, the material that is contained in the largest amount by weight is B." Therefore, component A may contain no impurities and may be made purely of B, or it may contain materials other than B as impurities.

[0012] <Electronic Device> First, a configuration example of an electronic device according to one aspect of the present embodiment will be described. Fig. 1 is a cross-sectional view showing a configuration example of an electronic device according to one embodiment. Fig. 2 is an enlarged cross-sectional view showing a portion of the electronic device shown in Fig. 1. Fig. 3 is an enlarged cross-sectional view of part A in Fig. 2. Note that in Fig. 2, the electrical connection relationship of conductor patterns that are electrically connected to each other among a plurality of conductor patterns is schematically shown using dotted lines. This is similarly indicated in each of the following drawings showing modified examples of Fig. 2.

[0013] 1 includes a substrate SUB1 and a plurality of electronic components 40 mounted on the substrate SUB1. The substrate SUB1 has a surface SUBt and a surface SUBb opposite the surface SUBt. A plurality of electronic components 40 are mounted on each of the surfaces SUBt and SUBb of the substrate SUB1.

[0014] The electronic device 100, which is a FOPLP, has a wide variety of electronic components 40.

[0015] For example, the plurality of electronic components 40 may include a sensor component. Examples of the sensor component include an optical sensor that detects light, a gas sensor that detects a specific gas, and a physical quantity sensor that measures a physical quantity such as speed or acceleration. The physical quantity sensor is an electronic component 40 that incorporates a semiconductor chip manufactured using technology such as MEMS (Micro Electro Mechanical Systems).

[0016] The electronic components 40 may also include logic components equipped with an arithmetic processing circuit that receives electrical signals from electronic components 40, such as sensor components, and performs arithmetic processing on the received signals. For example, the electronic component 42 shown in FIG. 1 is a logic component. The logic component (electronic component 42) generates new control signals based on the results of the arithmetic processing and transmits these to other electronic components 40 to control the other electronic components 40. The logic component (electronic component 42) is equipped with a high-frequency circuit for transmitting and receiving signals and performing arithmetic processing at high speed.

[0017] The electronic components 40 may also include a memory component that transmits and receives signals to and from the electronic component 42, which is a logic component, and stores data. For example, the electronic component 43 shown in Fig. 1 is a memory component. The electronic components 42 and 43 are electrically connected via the wiring portion 30.

[0018] Furthermore, the plurality of electronic components 40 may include a power supply component (battery component) capable of supplying power to the plurality of electronic components 40. Furthermore, when the plurality of electronic components 40 include a power supply component, the plurality of electronic components 40 preferably include a power supply control component that controls the power supply from the power supply component to the plurality of electronic components 40. For example, electronic component 44 shown in FIG. 1 is a power supply component. Electronic component 45 is a power supply control component. Although power may be supplied to the plurality of electronic components 40 from an external power source (not shown), it is preferable that electronic device 100 include a power supply component because it can shorten the power supply path.

[0019] The electronic components 40 may also include a communication component for wireless communication with an external device. For example, the electronic component 46 shown in Fig. 1 is a communication component. Examples of communication components include electromagnetic wave communication components that transmit and receive electromagnetic wave signals using an antenna or a coil, and optical communication components that transmit and receive optical signals using a light-emitting element or a light-receiving element.

[0020] In the example shown in FIG. 1, each of the electronic components 41, 43, 45, and 46 operates based on a control signal generated by the electronic component 42, which is a logic component.

[0021] The electronic device 100 can be connected to an external device via an external terminal (not shown). For example, a connector (not shown) can be used as the external terminal. In this case, the electronic device 100 is electrically connected to the external device via a flexible wiring board (not shown) connected to the connector. As a variant of the external terminal, terminals such as solder balls may be used. In this case, terminals for connecting the solder balls are provided on the substrate SUB1, and the electronic device 100 is mounted on a mounting substrate (not shown) via the solder balls.

[0022] The substrate SUB1 has a glass substrate 10, an aluminum nitride film 20 covering a surface 10t of the glass substrate 10, and an aluminum nitride film 25 covering a surface 10b of the glass substrate 10. The substrate SUB1 also has a wiring portion 30 disposed on the aluminum nitride film 20. The wiring portion 30 is a transmission path including one or more wiring layers. In the case of this embodiment, as shown in FIG. 2 , the wiring portion 30 is a transmission path having a two-layer structure including wiring layers WL1 and WL2 (a three-layer structure if the layer on which the multiple terminals TM1 are formed is included).

[0023] A plurality of terminals TM1 are arranged on wiring portion 30. A plurality of terminals TM2 are arranged on aluminum nitride film 25. Of the plurality of electronic components 40 shown in FIG. 1 , electronic components 42, 43, and 46 are each mounted on terminal TM1. Of the plurality of electronic components 40, electronic components 41, 44, and 45 are each mounted on terminal TM2.

[0024] The electronic device 100 also has a plurality of through-hole wirings THL embedded in through-holes that penetrate the aluminum nitride film 20 , the aluminum nitride film 25 and the glass substrate 10 .

[0025] As shown in FIG. 2, the glass substrate 10 has a surface 10t and a surface 10b opposite to the surface 10t. The glass constituting the glass substrate 10 is, for example, so-called alkali-free glass, which does not substantially contain alkali metals except for impurities mixed in due to carryover or the like. The glass substrate 10 may also be, for example, a glass containing 55 mol % or more of silicon oxide (SiO ２ ) and 5 mol % or more of aluminum oxide (Al ２ O ３ ) and one or more alkaline earth metal oxides.

[0026] The glass substrate 10 used in this embodiment has the following characteristics: a thickness T1 (the distance from the surface 10t to the surface 10b) of about 0.3 to 0.8 mm; a density of 2.50 to 2.60 g / cm ３The Young's modulus is 70 to 85 GPa. The thermal expansion coefficient is 3.5 to 3.8 × 10 －６ [1 / K]. The strain point is 670 to 750 degrees Celsius. The above characteristics are merely examples, and the characteristics of the glass substrate 10 can be modified in various ways.

[0027] In the case of FOPLP, which uses a glass substrate 10 as a package substrate, the substrate size during the manufacturing process can be made larger than in FOWLP, which uses a semiconductor wafer such as a silicon substrate, etc. In this case, it becomes possible to manufacture a large number of electronic devices 100 at once, thereby improving manufacturing efficiency.

[0028] <Regarding Warpage of the Substrate> When the size of a substrate is increased during manufacturing, problems associated with the increase in size arise. For example, as shown in Fig. 1 , in a structure in which a wiring portion 30 is provided on one side of a glass substrate 10 (the side of surface 10t in Fig. 1 ) and no wiring portion 30 is provided on the other side (the side of surface 10b in Fig. 1 ), warpage of the glass substrate 10 may occur due to a difference in the linear expansion coefficient between the wiring portion 30 and the glass substrate 10. Even when wiring portions 30 are provided on both sides of the glass substrate 10, warpage of the glass substrate 10 may similarly occur if the number of layers or the metal content of the wiring portions 30 are different.

[0029] If warpage occurs in the glass substrate 10 during the manufacturing process of the electronic device 100, depending on the degree of deformation, exposure becomes difficult, which causes a problem of reduced accuracy in forming the pattern of the wiring portion 30.

[0030] In the electronic device 100 of this embodiment, the glass substrate 10 is sandwiched between an aluminum nitride film 20 and an aluminum nitride film 25. That is, the electronic device 100 has the aluminum nitride film 20 covering the surface 10t of the glass substrate 10 and the aluminum nitride film 25 covering the surface 10b of the glass substrate 10. In the example shown in FIGS. 1 and 2 , the aluminum nitride film 20 is in contact with the surface 10t of the glass substrate 10. Furthermore, the aluminum nitride film 25 is in contact with the surface 10b of the glass substrate 10.

[0031] The Young's modulus of aluminum nitride is 300 GPa or more. Therefore, in the case of the substrate SUB1 of the present embodiment, even if stress occurs due to a difference in the linear expansion coefficient between the wiring portion 30 and the glass substrate 10 (and the aluminum nitride films 20 and 25) during the manufacturing process of the wiring portion 30, the degree of warpage deformation can be suppressed.

[0032] Comparing the substrate SUB1 of this embodiment with a so-called aluminum nitride substrate, in which the entire substrate is made of aluminum nitride, the following can be said: That is, the substrate SUB1 of this embodiment, in which the aluminum nitride film 20 is formed on the surface 10t of the glass substrate 10 and the aluminum nitride film 25 is formed on the surface 10b, is preferable compared to the aluminum nitride substrate in that the manufacturing cost can be reduced.

[0033] <Heat Dissipation Characteristics of the Substrate> In the case of FOPLP, which uses the glass substrate 10 as a package substrate, there is room for improvement compared to FOWLP, which uses a semiconductor wafer, in the following respects: For example, the thermal conductivity of the glass substrate 10 is about 1.6 [W / m·K], which is 1% of the thermal conductivity of a silicon wafer, which is about 160 [W / m·K].

[0034] In the FOPLP, a plurality of electronic components 40 are mounted on a substrate SUB1. From the viewpoint of ensuring the normal operation of these electronic components 40, it is preferable that the substrate SUB1 has high heat dissipation characteristics. This is because the operation of the electronic components 40 can be stabilized by efficiently dissipating heat generated from the electronic components 40 to the outside during use.

[0035] In the present embodiment, as described above, the glass substrate 10 is sandwiched between the aluminum nitride film 20 and the aluminum nitride film 25. That is, the electronic device 100 has the aluminum nitride film 20 covering the surface 10t of the glass substrate 10 and the aluminum nitride film 25 covering the surface 10b of the glass substrate 10. The thermal conductivity of aluminum nitride is approximately 80 to 150 [W / m·K]. This thermal conductivity is approximately 50 to 100 times that of the glass substrate 10.

[0036] Therefore, in the case of the substrate SUB1 of this embodiment, the aluminum nitride film 20 and the aluminum nitride film 25 function as heat dissipation members that dissipate to the outside the heat transferred from the electronic component 40. As a result, it is possible to improve the heat dissipation characteristics, which is a concern with the glass substrate 10.

[0037] <Countermeasures against power supply noise> In the case of an FOPLP that is equipped with a plurality of electronic components 40, such as the electronic device 100, it is necessary to take measures against noise in the power supply potential supplied to the plurality of electronic components 40. For example, in the case of an FOPLP that includes a logic component equipped with an arithmetic processing circuit, such as the electronic component 42, instantaneous changes in power demand depending on the operating status of high-frequency circuits such as the arithmetic processing circuit may cause noise (induced voltage due to current changes) in the supply path of the power supply potential.

[0038] One electrical circuit countermeasure against this type of power supply noise is to install a capacitor to connect the power supply potential and reference potential. This capacitor is called a decoupling capacitor. A decoupling capacitor absorbs current changes in a load (such as a processing circuit) using its charge storage and discharge characteristics, thereby suppressing noise from occurring in the power supply potential supply path.

[0039] Furthermore, the decoupling capacitor has the function of confining high frequency current generated in the power supply potential supply path of the load within a loop between the load and the decoupling capacitor, thereby suppressing diffusion to other power supply wiring.

[0040] In order for these decoupling capacitors to function effectively, it is preferable that the transmission distance between the decoupling capacitor and the load is short. For this reason, when using capacitor components as decoupling capacitors, it is necessary to mount a large number of capacitor components near the electronic component 40.

[0041] When a large number of capacitor components are mounted near electronic component 40, the mounting space for the capacitor components is taken into consideration, which increases the effective mounting area of ​​electronic component 40. From the viewpoint of miniaturizing electronic device 100, it is preferable to reduce the mounting area of ​​electronic component 40.

[0042] Therefore, the inventors of the present invention have investigated a technique for using a conductor pattern that constitutes a supply path for a reference potential as a decoupling capacitor in place of the numerous capacitor components described above.

[0043] 2 , the electronic device 100 has a plurality of terminals TM1 arranged on the wiring layers WL1 and WL2, and a plurality of terminals TM2 arranged on the aluminum nitride film 25. The electronic device 100 also has electronic components 42 mounted on the plurality of terminals TM1, and electronic components 45 mounted on the plurality of terminals TM2. The electronic device 100 also has through-hole wiring THL1 embedded in a through-hole that penetrates the aluminum nitride film 20, the aluminum nitride film 25, and the glass substrate 10.

[0044] The plurality of terminals TM1 includes a reference potential terminal TMG1 capable of supplying a reference potential to the electronic component 42. The plurality of terminals TM1 also includes a power supply potential terminal TMD1 capable of supplying a power supply potential to the electronic component 42. The plurality of terminals TM2 includes a reference potential terminal TMG2 capable of supplying a reference potential to the electronic component 45. A power supply potential supply path VDP connected to the power supply potential terminal TMD1 and a reference potential supply path GNDP connected to the reference potential terminal TMG1 are arranged adjacent to each other in either the wiring layer WL1 or the wiring layer WL2. The reference potential terminal TMG1 and the reference potential terminal TMG2 are electrically connected via a through-hole wiring THL1. The potential supplied to the reference potential supply path GNDP is, for example, a ground potential.

[0045] In this embodiment, the reference potential supply path GNDP arranged on the surface 10t of the glass substrate 10 and the reference potential supply path GNDP arranged on the surface 10b are electrically connected via a through-hole wiring THL1. A capacitor portion C1 (see FIG. 3) functioning as a decoupling capacitor is formed at a location where the power supply potential supply path VDP and the reference potential supply path GNDP to the electronic component 42 are adjacent to each other.

[0046] The potential at any location of the conductor pattern to which the reference potential is supplied can be stabilized. In the example shown in Fig. 2, the reference potential supply path GNDP arranged on the surface 10t of the glass substrate 10 and the reference potential supply path GNDP arranged on the surface 10b are electrically connected via a plurality of through-hole wirings THL1. This makes it possible to further stabilize the reference potential.

[0047] 3, one or more wiring layers (wiring section 30) include a wiring layer WL1 disposed on the aluminum nitride film 20. The wiring layer WL1 includes a reference potential pattern CPG1 connected to the through-hole wiring THL1 and a power supply potential pattern CPD1 electrically connected to the power supply potential terminal TMD1. In the wiring layer WL1, a side surface S1 of the reference potential pattern CPG1 and a side surface S2 of the power supply potential pattern CPD1 face each other. The capacitor section C1 is formed between the side surfaces S1 and S2, which are disposed so as to face each other.

[0048] 2, a portion of the reference potential pattern CPG1 and a portion of the power supply potential pattern CPD1 face each other in the thickness direction (Z direction) via an organic insulating film 61. However, the organic insulating film 61 is an insulating film with a low dielectric constant (e.g., a relative dielectric constant of 3.8 or less) from the viewpoint of suppressing wiring delay. Examples of organic materials that form the organic insulating film 61 include acrylic resin, polyimide resin, and benzocyclobutene.

[0049] Specifically, when multiple electronic components 40 mounted on a substrate SUB1 are electrically connected via a wiring section 30 as shown in FIG. 1 , it is necessary to suppress wiring delay according to the value of the time constant (CR), which is the product of the capacitance component (C) and resistance component (R) that occur in the wiring that electrically connects the multiple electronic components 40. The resistance component (R) of the wiring can be reduced by using copper as the wiring material of the wiring section 30 and the through-hole wiring THL. Furthermore, as shown in FIG. 12 , the capacitance component (C) coupled to the wiring can be reduced by reducing the relative dielectric constant of the organic insulating film 61 that covers each of the wiring layers WL1 and WL2.

[0050] In this embodiment, each of the multiple conductor patterns constituting the wiring unit 30 is made of copper or a copper alloy. Specifically, the wiring layers WL1 and WL2 and the multiple terminals TM1 shown in FIG. 2 are each made of copper or a copper alloy. Furthermore, each of the multiple through-hole wirings THL (see FIG. 1), including the through-hole wiring THL1, is made of copper or a copper alloy. In this case, the resistance component of the wiring can be reduced in the conductive path passing through the wiring unit 30. Similarly, the multiple terminals TM2 are made of copper or a copper alloy. Note that, as shown in FIG. 2, if the terminal TM2 is formed directly on the aluminum nitride film 25, the path length of the transmission path passing through the terminal TM2 is shorter than the transmission path passing through the wiring unit 30. Therefore, the effect of using copper or a copper alloy to reduce the time constant (CR product) and thereby reduce wiring delay is particularly effective when applied to the transmission path passing through the wiring unit 30.

[0051] In the present embodiment, the reference potential pattern CPG1 and the power supply potential pattern CPD1 of the wiring layer WL1 are each covered with an organic insulating film 61. The relative dielectric constant of the organic insulating film 61 is lower than the relative dielectric constant of the aluminum nitride film 20. This makes it possible to reduce the capacitance component coupled to the wiring formed in the wiring layer WL1.

[0052] On the other hand, the wiring layer WL1 is in contact with the aluminum nitride film 20. The relative dielectric constant of the aluminum nitride film 20 is, for example, 8.5, which is even higher than the relative dielectric constant (for example, 5.5) of the glass substrate 10. Therefore, in the wiring layer WL1 formed in contact with the aluminum nitride film 20, the capacitor portion C1 formed between the opposing side surfaces S1 and S2 can obtain the capacitance required as a decoupling capacitor due to the influence of the aluminum nitride film 20, which has a high relative dielectric constant.

[0053] <Modification 1> Fig. 4 is an enlarged cross-sectional view showing a modification of Fig. 2. Fig. 5 is an enlarged cross-sectional view of part B in Fig. 4.

[0054] 4 differs from the electronic device 100 shown in Fig. 2 in that the aluminum nitride film 20 has a plurality of recesses 21. At least a portion of each of the reference potential pattern CPG1 and the power supply potential pattern CPD1 is disposed in any one of the plurality of recesses 21 provided in the aluminum nitride film 20.

[0055] 5, a portion of the aluminum nitride film 20 is interposed between the side surface S1 of the reference potential pattern CPG1 and the side surface S2 of the power supply potential pattern CPD1. In the case of the electronic device 100 shown in FIG. 3, the aluminum nitride film 20 is not interposed between the side surface S1 of the reference potential pattern CPG1 and the side surface S2 of the power supply potential pattern CPD1, but an organic insulating film 61 is interposed. The electronic device 101 shown in FIGS. 4 and 5 differs from the electronic device 100 shown in FIGS. 2 and 3 in this respect.

[0056] In the electronic device 101 according to this modification, the capacitor section C1 includes an aluminum nitride film 20 having a higher dielectric constant than the organic insulating film 61. This allows the capacitance of the capacitor section C1 to be increased compared to the electronic device 100 shown in Fig. 2. If the capacitance of the capacitor section C1 functioning as a decoupling capacitor is increased, the margin of voltage fluctuation that can be suppressed by the decoupling capacitor can be increased.

[0057] 5 , a portion of the side surface S1 is covered with the aluminum nitride film 20, and another portion (remaining portion) of the side surface S1 is covered with the organic insulating film 61. In addition, a portion of the side surface S2 is covered with the aluminum nitride film 20, and another portion (remaining portion) of the side surface S2 is covered with the organic insulating film 61.

[0058] Although not shown, as a further modification of the electronic device 101, the side surface S1 and the side surface S2 shown in FIG. 5 may be entirely covered with the aluminum nitride film 20. In other words, each of the conductor patterns constituting the wiring layer WL1 may be embedded in one of the plurality of recesses 21. In this case, the capacitance of the capacitor portion C1 can be further increased compared to the electronic device 101.

[0059] However, when each of the conductor patterns constituting the wiring layer WL1 is embedded in one of the recesses 21, the parasitic capacitance between the wirings in the wiring layer WL1 increases, which may result in an increase in wiring delay according to the value of the time constant (CR), which is the product of the capacitance component (C) and resistance component (R) generated in the wiring.

[0060] Therefore, from the viewpoint of enhancing the function of the capacitor portion C1 as a decoupling capacitor and suppressing wiring delay, it is preferable that the side surface S1 be covered with both the aluminum nitride film 20 and the organic insulating film 61, as in the electronic device 101 shown in Figure 5. It is also preferable that the side surface S2 be covered with both the aluminum nitride film 20 and the organic insulating film 61.

[0061] Except for the above-mentioned differences, the electronic device 101 shown in Figures 4 and 5 is similar to the electronic device 100 shown in Figures 2 and 3. Therefore, a duplicated description will be omitted.

[0062] <Modification 2> FIG. 6 is an enlarged cross-sectional view showing another modification of FIG.

[0063] 6 differs from the electronic device 100 shown in Fig. 2 in that the wiring section 30 has an inorganic insulating layer 51 in addition to an organic insulating film 61. In the electronic device 102, the inorganic insulating layer 51 is interposed between the layer on which the multiple terminals TM1 are arranged and the organic insulating film 61.

[0064] 6, inorganic insulating layers 51 are disposed between the wiring layers WL1 and WL2, and between the wiring layer WL2 and a layer in which the plurality of terminals TM1 are disposed. An organic insulating film 61 is disposed between the plurality of conductor patterns (e.g., the reference potential pattern CPG1 and the power supply potential pattern CPD1) formed on the wiring layer WL1. Furthermore, an organic insulating film 61 is disposed between the plurality of conductor patterns (e.g., the reference potential pattern CPG3) formed on the wiring layer WL2.

[0065] In this modified example, the mechanical strength of the wiring unit 30 can be improved compared to the electronic device 100 shown in Fig. 2. For example, when mounting the electronic component 40, the electronic component 40 is pressed against the terminals TM1 of the substrate SUB1 (see Fig. 3) to electrically connect the electronic component 40 to the terminals TM1. From the viewpoint of preventing damage to the wiring unit 30 due to the mechanical external force applied at this time, it is preferable that some of the multiple insulating layers of the wiring unit 30 be inorganic insulating layers.

[0066] Examples of inorganic materials that form the inorganic insulating layer 51 include silicon oxide (SiO ２ ) and fluorine-doped silicon dioxide (SiOF) can be exemplified.

[0067] 6 is shown as a modified example of Fig. 2. Although not shown, the structure of the electronic device 102 according to this modified example may be applied in combination with the structure of the electronic device 101 shown in Figs.

[0068] Except for the differences described above, the electronic device 102 shown in Fig. 6 is similar to the electronic device 100 shown in Fig. 2 and Fig. 3. Therefore, a duplicated description will be omitted.

[0069] <Modification 3> Fig. 7 is an enlarged cross-sectional view showing another modification of Fig. 2. Fig. 8 is an enlarged cross-sectional view of part C in Fig. 2 and part D in Fig. 7. Note that the electronic device 103 shown in Fig. 7 has the same structure as the electronic device 100 shown in Fig. 2 except for the thickness 25T of the aluminum nitride film 25. Therefore, Fig. 8 corresponds to part C in Fig. 2 and part D in Fig. 7.

[0070] 7, the plurality of terminals TM2 are in contact with the aluminum nitride film 25. In other words, in the case of the electronic device 103, no wiring portion similar to the wiring portion 30 is interposed between the plurality of terminals TM2 and the aluminum nitride film 25.

[0071] In this way, when the wiring portion 30 is formed on one surface (surface 10t shown in Figure 1) of the glass substrate 10 and not on the other surface (surface 10b shown in Figure 1), warping deformation is more likely to occur than when the wiring portion is formed equally on both surfaces.

[0072] Therefore, in this modified example, as shown in Fig. 7, the thickness 25T of the aluminum nitride film 25 is thicker than the thickness 20T of the aluminum nitride film 20. In the case of the electronic device 100 shown in Fig. 2, the thickness of the aluminum nitride film 25 is equal to the thickness of the aluminum nitride film 20. In this respect, the electronic device 103 shown in Fig. 7 differs from the electronic device 100 shown in Fig. 2.

[0073] In the electronic device 103, the thickness 25T of the aluminum nitride film 25 is greater than the thickness 20T of the aluminum nitride film 20, and therefore warpage can be suppressed compared to the electronic device 100 shown in FIG.

[0074] 2 and 7, a plurality of conductor patterns including a plurality of terminals TM2 are disposed on the aluminum nitride film 25. Each of the plurality of conductor patterns is in contact with the aluminum nitride film 25. The plurality of conductor patterns includes a power supply potential terminal TMD2, a reference potential pattern CPG2, and a power supply potential pattern CPD2.

[0075] The power supply potential terminal TMD2 included in the multiple terminals TM2 is a terminal capable of supplying a power supply potential to the electronic component 45. The reference potential pattern CPG2 is connected to the through-hole wiring THL1. The power supply potential pattern CPD2 is connected to the power supply potential terminal TMD2.

[0076] 8, in the layer in which the terminal TM2 is formed, the side surface S3 of the reference potential pattern CPG2 and the side surface S4 of the power supply potential pattern CPD2 face each other. Therefore, as shown in FIG. 8, a capacitor portion C2 functioning as a decoupling capacitor is formed in a location where the power supply potential supply path VDP and the reference potential supply path GNDP to the electronic component 45 are adjacent to each other. The capacitor portion C2 is formed between the side surface S3 and the side surface S4, which are arranged to face each other. This reduces the influence of noise on the power supply path connected to the power supply potential terminal TMD2.

[0077] 7, the power supply potential supplied to the electronic component 42 and the power supply potential supplied to the electronic component 45 are the same potential. Therefore, the power supply potential terminal TMD2 and the power supply potential terminal TMD1 are electrically connected via a power supply potential supply path VDP. However, as a variant, the power supply potential (first power supply potential) supplied to the electronic component 42 and the power supply potential (second power supply potential) supplied to the electronic component 45 may be different from each other. In this case, the power supply potential terminal TMD2 and the power supply potential terminal TMD1 are electrically separated. Furthermore, the first power supply potential is supplied to the electronic component 42 via the first power supply potential supply path, and the second power supply potential is supplied to the electronic component 45 via a second power supply potential supply path electrically separated from the first power supply potential supply path.

[0078] Fig. 7 shows a modified example of Fig. 2. Although not shown, the structure of the electronic device 103 according to this modified example may be applied in combination with either or both of the structure of the electronic device 101 shown in Fig. 4 and Fig. 5 and the structure of the electronic device 102 shown in Fig. 6.

[0079] Except for the above-mentioned differences, the electronic device 103 shown in Figures 7 and 8 is similar to the electronic device 100 shown in Figures 2 and 3. Therefore, a duplicated description will be omitted.

[0080] <Modification 4> Fig. 9 is an enlarged cross-sectional view showing a modification of Fig. 7. Fig. 10 is an enlarged cross-sectional view of a portion E in Fig. 9.

[0081] 9 and 10 differs from the electronic device 100 shown in Fig. 7 in that the aluminum nitride film 25 has a plurality of recesses 26. At least a portion of each of the reference potential pattern CPG2 and the power supply potential pattern CPD2 is disposed in any one of the plurality of recesses 26 provided in the aluminum nitride film 25.

[0082] 10, a portion of the aluminum nitride film 25 is interposed between the side surface S3 of the reference potential pattern CPG2 and the side surface S4 of the power supply potential pattern CPD2. In the case of the electronic device 103 shown in FIG. 8, the aluminum nitride film 25 is not interposed between the side surface S3 of the reference potential pattern CPG2 and the side surface S4 of the power supply potential pattern CPD2. The electronic device 104 shown in FIGS. 9 and 10 differs from the electronic device 103 shown in FIGS. 7 and 8 in this respect.

[0083] In the electronic device 104 according to this modification, the capacitor section C2 includes an aluminum nitride film 25 having a higher dielectric constant than the organic insulating film 61. This allows the capacitance of the capacitor section C2 to be increased compared to the electronic device 100 shown in Fig. 2 and the electronic device 103 shown in Fig. 7. If the capacitance of the capacitor section C2 functioning as a decoupling capacitor is increased, the margin of voltage fluctuation that can be suppressed by the decoupling capacitor can be increased.

[0084] 10, part of the side surface S3 is covered with the aluminum nitride film 25, and the other part (remaining part) of the side surface S3 is exposed to the outside. Also, part of the side surface S4 is covered with the aluminum nitride film 25, and the other part (remaining part) of the side surface S4 is exposed to the outside.

[0085] 4 and 5, as a further modification of the electronic device 104 shown in Figures 9 and 10, the entire side surfaces S3 and S4 shown in Figure 10 may be covered with the aluminum nitride film 25. In this case, the capacitance of the capacitor portion C2 can be further increased compared to the electronic device 104.

[0086] However, when each of the multiple terminals TM2 is embedded in one of the multiple recesses 26, the parasitic capacitance of the wiring path connected to the terminal TM2 increases, which may result in an increase in wiring delay according to the value of the time constant (CR), which is the product of the capacitance component (C) and resistance component (R) generated in the wiring.

[0087] 10 , from the viewpoint of enhancing the function of the capacitor portion C2 as a decoupling capacitor and suppressing wiring delay, it is preferable that only a portion of the side surface S3 is covered with the aluminum nitride film 25. It is also preferable that only a portion of the side surface S4 is covered with the aluminum nitride film 25.

[0088] The electronic device 104 shown in Figures 9 and 10 is shown as a modified example of the electronic device 103 shown in Figure 7. Although not shown, the structure of the electronic device 104 according to this modified example may be applied in combination with one or more of the structure of the electronic device 100 shown in Figures 2 and 3, the structure of the electronic device 101 shown in Figures 4 and 5, and the structure of the electronic device 102 shown in Figure 6.

[0089] For example, as a modification of the electronic device 104 shown in FIG. 9, the thickness of the aluminum nitride film 20 may be equal to the thickness of the aluminum nitride film 25, similar to the electronic device 100 shown in FIG.

[0090] Except for the above-mentioned differences, the electronic device 104 shown in Figures 9 and 10 is similar to the electronic device 103 shown in Figures 7 and 8. Therefore, a duplicated description will be omitted.

[0091] <Modification 5> Fig. 11 is an enlarged cross-sectional view showing another modification of Fig. 2. Fig. 12 is an enlarged cross-sectional view of part F in Fig. 11.

[0092] In the electronic device 105 shown in Figures 11 and 12, a metal film 71 is disposed between the surface 10t (see Figure 11) of the glass substrate 10 and the aluminum nitride film 20. The metal film 71 covers the surface 10t and is connected to the through-hole wiring THL1. Of the multiple through-hole wirings THL, the through-hole wiring THL2 to which the power supply potential is supplied is separated from the metal film 71. In other words, the power supply potential terminal TMD1 and the power supply potential pattern CPD1 electrically connected thereto are each electrically isolated from the metal film 71. However, as will be described later, the power supply potential pattern CPD1 and the metal film 71 are capacitively coupled.

[0093] The metal material constituting the metal film 71 is not particularly limited as long as it is a conductive material that can be brought into close contact with the glass substrate 10 and the aluminum nitride film 20, and titanium (Ti) is an example of such a material.

[0094] In the electronic device 105, the metal film 71 is connected to the reference potential supply path GNDP. 11 and 12 , at least a portion of the power supply potential pattern CPD1 faces the metal film 71 via the aluminum nitride film 20. Therefore, as shown in FIG. 12 , a capacitor portion C3 is formed in which the power supply potential pattern CPD1 and the metal film 71 are capacitively coupled.

[0095] The capacitance of the capacitor section C3 is proportional to the area of ​​the region where the power supply potential pattern CPD1 and the metal film 71 face each other, so it is easier to increase the capacitance compared to the capacitor section C1 shown in FIG.

[0096] 1 includes a through-hole wiring THLS serving as a signal transmission path connected to any one of the electronic components 40. The metal film 71 shown in FIG. 11 is electrically isolated from the through-hole wiring THLS serving as the signal transmission path.

[0097] Fig. 11 shows a modified example of Fig. 2. Although not shown, the structure of the electronic device 103 according to this modified example may be applied in combination with one or more of the structure of the electronic device 101 shown in Fig. 4 and Fig. 5, the structure of the electronic device 102 shown in Fig. 6, the structure of the electronic device 103 shown in Fig. 7 and Fig. 8, and the structure of the electronic device 104 shown in Fig. 9 and Fig. 10.

[0098] Except for the differences described above, the electronic device 103 shown in Figures 11 and 12 is similar to the electronic device 100 shown in Figures 2 and 3. Therefore, a duplicated description will be omitted.

[0099] <Modification 6> Fig. 13 is an enlarged cross-sectional view showing another modification of Fig. 2. Fig. 14 is an enlarged cross-sectional view of part G in Fig. 13.

[0100] In the electronic device 106 shown in Figures 13 and 14, a metal film 72 is disposed between the surface 10b (see Figure 13) of the glass substrate 10 and the aluminum nitride film 25. The metal film 72 covers the surface 10b and is connected to the through-hole wiring THL1. Of the multiple through-hole wirings THL, the through-hole wiring THL2 to which the power supply potential is supplied is separated from the metal film 72. In other words, the power supply potential terminal TMD2 and the power supply potential pattern CPD2 electrically connected thereto are each electrically isolated from the metal film 72. However, the power supply potential pattern CPD2 and the metal film 72 are capacitively coupled.

[0101] The metal material constituting the metal film 72 is not particularly limited as long as it is a conductive material that can be adhered to the glass substrate 10 and the aluminum nitride film 25, but as with the metal film 71 described using Figure 11, an example of the metal material is titanium (Ti).

[0102] In the case of the electronic device 106, the metal film 72 is connected to the reference potential supply path GNDP. Also, as shown in Fig. 13, at least a portion of the power supply potential pattern CPD2 faces the metal film 72 via the aluminum nitride film 20. Also, in the example shown in Fig. 14, the power supply potential terminal TMD2 that supplies the power supply potential to the electronic component 45 faces the metal film 72. Therefore, as shown in Fig. 14, a capacitor portion C4 is formed in which the power supply potential terminal TMD2 and the metal film 72 are capacitively coupled.

[0103] The capacitance of the capacitor section C4 is proportional to the area of ​​the region where the power supply potential terminal TMD2 and the metal film 72 face each other, so it is easier to increase the capacitance compared to the capacitor section C2 shown in FIG.

[0104] The metal film 72 shown in FIG. 13 is electrically isolated from the through-hole wiring THLS shown in FIG.

[0105] Fig. 13 is shown as a modified example of Fig. 2. Although not shown, the structure of the electronic device 106 according to this modified example may be applied in combination with one or more of the structure of the electronic device 101 shown in Fig. 4 and Fig. 5, the structure of the electronic device 102 shown in Fig. 6, the structure of the electronic device 103 shown in Fig. 7 and Fig. 8, the structure of the electronic device 104 shown in Fig. 9 and Fig. 10, and the structure of the electronic device 105 shown in Fig. 11 and Fig. 12.

[0106] Except for the differences described above, the electronic device 106 shown in Figures 13 and 14 is similar to the electronic device 100 shown in Figures 2 and 3. Therefore, a duplicated description will be omitted.

[0107] <Modification 7> Fig. 15 is an enlarged cross-sectional view showing another modification to Fig. 2. Fig. 16 is an enlarged cross-sectional view showing another modification to Fig. 2.

[0108] 2, each of the multiple conductor patterns constituting the wiring unit 30 is made of, for example, copper or a copper alloy. Specifically, each of the wiring layer WL1, the wiring layer WL2, and the multiple terminals TM1 shown in FIG. 2 is made of copper or a copper alloy. This reduces the resistance component of the signal transmission path passing through the wiring unit 30, thereby reducing wiring delay caused by the CR product.

[0109] Furthermore, each of the plurality of terminals TM2, the power supply potential pattern CPD2, and the reference potential pattern CPG2 formed on the surface 10b of the glass substrate 10 is made of copper or a copper alloy, thereby reducing the resistance component of a signal transmission path passing through any one of the plurality of terminals TM2.

[0110] In consideration of adhesion with a conductor pattern made of copper or a copper alloy, the underlying insulating layer of the wiring layer WL1 and the underlying insulating layer of the plurality of terminals TM2 are preferably made of an insulating material that has higher adhesion with copper or a copper alloy than aluminum nitride. This modification is capable of improving adhesion between the wiring material made of copper or a copper alloy and the underlying insulating layer.

[0111] 15 , an inorganic insulating layer 52, which is an inorganic oxide film containing silicon or a metal oxide film containing aluminum, is interposed between the wiring layer WL1 and the aluminum nitride film 20. The inorganic insulating layer 52 is in contact with the wiring layer WL1. In other words, in the electronic device 107, the inorganic insulating layer 52 serves as the underlying insulating layer of the wiring layer WL1.

[0112] Examples of materials that can be used to form the inorganic insulating layer 52 include silicon oxide (SiO2), silicon oxynitride (SiON), aluminum oxide (AlO), and aluminum oxynitride (AlON). These inorganic materials (more specifically, inorganic insulators containing oxygen) have higher adhesion to copper or copper alloys than the aluminum nitride film 20. Therefore, by providing the inorganic insulating layer 52 as an underlying insulating layer, it is possible to improve the adhesion between the wiring layer WL1 and the underlying insulating layer. As a result, peeling of the wiring layer WL1 can be suppressed, and reliability can be improved.

[0113] 16 , an inorganic insulating layer 53, which is an inorganic oxide film containing silicon or a metal oxide film containing aluminum, is interposed between the multiple terminals TM2 and the aluminum nitride film 25. The inorganic insulating layer 53 is in contact with the multiple terminals TM2. In other words, in the electronic device 108, the inorganic insulating layer 53 serves as the underlying insulating layer for the multiple terminals TM2.

[0114] 15 , examples of materials constituting the inorganic insulating layer 53 include silicon oxide (SiO2), silicon oxynitride (SiON), aluminum oxide (AlO), and aluminum oxynitride (AlON). These inorganic materials (specifically, inorganic insulators containing oxygen) have higher adhesion to copper or copper alloys than the aluminum nitride film 25. Therefore, by disposing the inorganic insulating layer 53 as an underlying insulating layer, it is possible to improve adhesion between the multiple terminals TM2 and the underlying insulating layer. As a result, peeling of the multiple terminals TM2 can be suppressed, and reliability can be improved.

[0115] Note that, although an example in which either the inorganic insulating layer 52 or the inorganic insulating layer 53 is formed has been described in Figures 15 and 16, as a modified example, there is a case in which both the inorganic insulating layer 52 and the inorganic insulating layer 53 are formed.

[0116] 15 and 16 are shown as modified examples of FIG. 2. Although not shown, the structure of the electronic device 107 according to this modified example may be applied in combination with one or more of the structure of the electronic device 102 shown in FIG. 6, the structure of the electronic device 103 shown in FIG. 7 and FIG. 8, the structure of the electronic device 104 shown in FIG. 9 and FIG. 10, the structure of the electronic device 105 shown in FIG. 11 and FIG. 12, and the structure of the electronic device 106 shown in FIG. 13 and FIG. 14. The structure of the electronic device 108 according to this modified example may be applied in combination with one or more of the structure of the electronic device 101 shown in FIG. 4 and FIG. 5, the structure of the electronic device 102 shown in FIG. 6, the structure of the electronic device 103 shown in FIG. 7 and FIG. 8, the structure of the electronic device 105 shown in FIG. 11 and FIG. 12, and the structure of the electronic device 106 shown in FIG. 13 and FIG. 14.

[0117] Except for the above-mentioned differences, the electronic device 107 shown in Fig. 15 and the electronic device 108 shown in Fig. 16 are similar to the electronic device 100 shown in Fig. 2 and Fig. 3. Therefore, a duplicated description will be omitted.

[0118] Although the embodiment and representative modifications have been described above, the above-described technology can be applied to various modifications other than the modifications exemplified. For example, the above-described modifications may be combined with each other.

[0119] Within the scope of the concept of the present invention, a person skilled in the art may conceive of various modifications and alterations, and it is understood that these modifications and alterations also fall within the scope of the present invention. For example, to the above-described embodiments, a person skilled in the art may appropriately add, delete, or modify components, or add, omit, or change conditions of steps, and these modifications are also included within the scope of the present invention as long as they maintain the gist of the present invention.

[0120] The present invention can be used in electronic devices.

[0121] 10 Glass substrate 10b, 10t, SUBb, SUBt Surface 20, 25 Aluminum nitride film 21, 26 Recess 30 Wiring portion 40, 41, 42, 43, 44, 45, 46 Electronic component 51, 52, 53 Inorganic insulating layer 61 Organic insulating film 71, 72 Metal film 100, 101, 102, 103, 104, 105, 106, 107, 108 Electronic device C1, C2, C3, C4 Capacitor portion CPD1, CPD2 Power supply potential pattern CPG1, CPG2, CPG3 Reference potential pattern GNDP Reference potential supply path S1, S2, S3, S4 Side SUB1 Substrate THL, THL1, THL2, THLS Through-hole wiring TM1, TM2 Terminals TMD1, TMD2 Power supply potential terminals TMG1, TMG2 Reference potential terminals VDP Power supply potential supply path WL1, WL2 Wiring layer

Claims

a first glass substrate having a first surface and a second surface opposite to the first surface; a first aluminum nitride film covering the first surface of the first glass substrate; a second aluminum nitride film covering the second surface of the first glass substrate; one or more wiring layers disposed on the first aluminum nitride film; a plurality of first terminals disposed on the one or more wiring layers; a first electronic component mounted on the plurality of first terminals; a plurality of second terminals disposed on the second aluminum nitride film; a second electronic component mounted on the plurality of second terminals; and first through-hole wirings embedded in through-holes penetrating the first aluminum nitride film, the second aluminum nitride film and the first glass substrate, wherein the plurality of first terminals include a first reference potential terminal capable of supplying a reference potential to the first electronic component; and a first power supply potential terminal capable of supplying a first power supply potential to the first electronic component, and the plurality of second terminals include a second reference potential terminal capable of supplying the reference potential to the second electronic component, an electronic device, wherein a first power supply potential supply path connected to the first power supply potential terminal and a first reference potential supply path connected to the first reference potential terminal are arranged adjacent to each other in any one of the one or more wiring layers, and the first reference potential terminal and the second reference potential terminal are each electrically connected via the first through-hole wiring.

2. An electronic device according to claim 1, wherein the one or more wiring layers include a first wiring layer disposed on the first aluminum nitride film, the first wiring layer including: a first reference potential pattern connected to the first through-hole wiring; and a first power supply potential pattern electrically connected to the first power supply potential terminal, and in the first wiring layer, a first side of the first reference potential pattern and a second side of the first power supply potential pattern face each other.

3. An electronic device according to claim 2, wherein each of the first reference potential pattern and the first power supply potential pattern of the first wiring layer is covered with a first organic insulating film, and the relative dielectric constant of the first organic insulating film is lower than the relative dielectric constant of the first aluminum nitride film.

4. An electronic device according to claim 3, wherein at least a portion of each of the first reference potential pattern and the first power supply potential pattern is disposed in any one of a plurality of first recesses provided in the first aluminum nitride film, and a portion of the first aluminum nitride film is interposed between a first side surface of the first reference potential pattern and a second side surface of the first power supply potential pattern.

5. The electronic device according to claim 3, wherein a first inorganic insulating layer is interposed between the layer on which the plurality of first terminals are arranged and the first organic insulating layer.

6. An electronic device according to claim 2, wherein each of the plurality of first terminals, the first wiring layer, and the first through-hole wiring is made of copper or a copper alloy.

7. An electronic device according to claim 2, wherein the plurality of second terminals are in contact with the second aluminum nitride film, and the thickness of the second aluminum nitride film is greater than the thickness of the first aluminum nitride film.

8. An electronic device according to claim 7, further comprising: a plurality of second conductor patterns including the plurality of second terminals arranged on the second aluminum nitride film; each of the plurality of second conductor patterns being in contact with the second aluminum nitride film; the plurality of second conductor patterns including: a second power supply potential terminal included in the plurality of second terminals and capable of supplying a second power supply potential to the second electronic component; a second reference potential pattern connected to the first through-hole wiring; and a second power supply potential pattern connected to the second power supply potential terminal; and in a layer in which the second terminals are formed, a third side of the second reference potential pattern and a fourth side of the second power supply potential pattern face each other.

9. An electronic device according to claim 8, wherein at least a portion of each of the second reference potential pattern and the second power supply potential pattern is disposed in any one of a plurality of second recesses provided in the second aluminum nitride film, and a portion of the second aluminum nitride film is interposed between a third side surface of the second reference potential pattern and a fourth side surface of the second power supply potential pattern.

10. An electronic device according to claim 2, further comprising a first metal film disposed between the first surface of the first glass substrate and the first aluminum nitride film, the first metal film covering the first surface and connected to the first through-hole wiring.

11. An electronic device according to claim 2, wherein a second metal film is disposed between the second surface of the first glass substrate and the second aluminum nitride film, the second metal film covering the second surface and connected to the first through-hole wiring.

12. An electronic device according to claim 6, wherein a second inorganic insulating layer which is an inorganic oxide film containing silicon or a metal oxide film containing aluminum is interposed between the first wiring layer and the first aluminum nitride film, and the second inorganic insulating layer is in contact with the first wiring layer.

13. An electronic device according to claim 2, wherein each of the first wiring layer, the plurality of second terminals and the first through-hole wiring is made of copper or a copper alloy, a third inorganic insulating layer which is an inorganic oxide film containing silicon or a metal oxide film containing aluminum is interposed between the plurality of second terminals and the second aluminum nitride film, and the third inorganic insulating layer is in contact with the plurality of second terminals.