Printed wiring board
Patent Information
- Application Number
- JP2025556246
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Priority Date
- 2023-11-07
- Filing Date
- 2024-09-20
- Publication Date
- 2025-05-15
AI Technical Summary
Existing printed wiring boards face connection defects between signal pattern lands on opposite surfaces of the substrate, particularly when the through holes become smaller with smaller conductor patterns, leading to inadequate conductor layer formation.
The printed wiring board design includes a substrate with overlapping signal pattern lands on opposite surfaces, through holes with a larger opening width in one direction than the other, and a conductor layer on the inner wall of the through holes to ensure electrical connection between the lands.
This design effectively suppresses connection defects between the signal pattern lands by maintaining a sufficient opening area for conductor layer formation, even as the conductor patterns shrink, while also maintaining reflective characteristics at the connection points.
Abstract
Description
printed wiring board
[0001] The present disclosure relates to a printed wiring board. This application claims priority to Japanese Patent Application No. 2023-190111, filed November 7, 2023. The entire contents of the Japanese patent application are incorporated herein by reference.
[0002] For example, Japanese Patent Laid-Open Publication No. 2000-216603 (Patent Document 1) describes a printed wiring board. The printed wiring board described in Patent Document 1 has a dielectric substrate and a first conductor pattern. The dielectric substrate has a first main surface and a second main surface opposite to the first main surface. The first conductor pattern is disposed on the first main surface. The first conductor pattern extends in a first direction in a plan view.
[0003] Japanese Patent Application Laid-Open No. 2000-216603
[0004] The printed wiring board of the present disclosure includes a substrate, a first signal pattern, a second signal pattern, and a conductor layer. The substrate has a first main surface and a second main surface opposite the first main surface. The first signal pattern is disposed on the first main surface. The second signal pattern is disposed on the second main surface. The first signal pattern and the second signal pattern extend along a first direction in a plan view. The first signal pattern has a first land at an end in the first direction. The second signal pattern has a second land at an end in the first direction. The first land and the second land overlap in a plan view. A through hole exposing the second land is formed in the first land and the substrate. The first opening width, which is the opening width of the through hole in the first direction, is larger than the second opening width in a second direction perpendicular to the first direction of the through hole. The conductor layer is disposed on an inner wall surface of the through hole and is electrically connected to the second land.
[0005] FIG. 1 is a first plan view of a printed wiring board 100. FIG. 2 is a second plan view of the printed wiring board 100. FIG. 3 is a cross-sectional view taken along line III-III in FIG. 2. FIG. 4 is a plan view of the printed wiring board 100 according to Modification 1. FIG. 5 is an enlarged plan view of the printed wiring board 100 according to Modification 2. FIG. 6 is an enlarged plan view of the printed wiring board 100 according to Modification 3. FIG. 7 is an enlarged plan view of the printed wiring board 100 according to Modification 4. FIG. 8 is an enlarged plan view of the printed wiring board 100 according to Modification 5. FIG. 9 is a cross-sectional view of the printed wiring board 100 according to Modification 6. FIG. 10A is a first plan view of the printed wiring board 100 according to Modification 7. FIG. 10B is a second plan view of the printed wiring board 100 according to Modification 7. FIG. 11 is a diagram illustrating a manufacturing process for the printed wiring board 100. FIG. 12 is a cross-sectional view illustrating a preparation step S1. FIG. 13 is a cross-sectional view illustrating a patterning step S2. Fig. 14 is a cross-sectional view illustrating the hole drilling step S3. Fig. 15 is a plan view of the printed wiring board 200. Fig. 16 is a cross-sectional view taken along line XVI-XVI in Fig. 15. Fig. 17 shows simulation results illustrating the relationship between the frequency of the signals flowing through the first signal pattern 21 and the second signal pattern 23 and the reflection characteristics at the connection portion between the first land 21a and the second land 23a.
[0006] [Problem to be Solved by the Present Disclosure] A conductor pattern (referred to as a second conductor pattern) separate from the first conductor pattern may be disposed on the second main surface. The second conductor pattern extends along a first direction in a plan view. In this case, the first conductor pattern and the second conductor pattern each have a first land and a second land at their ends in the first direction. The first land and the second land overlap in a plan view. Through holes exposing the second lands are formed in the dielectric substrate and the first lands. The first lands and the second lands are electrically connected by a conductor layer formed by plating or the like on the inner wall surfaces of the through holes and on the second lands exposed from the through holes.
[0007] When the through hole is formed in a circular shape in a planar view, if the opening area of the through hole becomes smaller as the first conductor pattern and the second conductor pattern become finer, poor connection between the first land and the second land by the conductor layer may occur.
[0008] The present disclosure has been made in consideration of the above-described problems of the conventional technology. More specifically, the present disclosure provides a printed wiring board that can suppress poor connection between a land of a signal pattern on one main surface of the board and a land of a signal pattern on the other main surface of the board.
[0009] Effect of the Present Disclosure The printed wiring board of the present disclosure can prevent connection failures between lands of a signal pattern on one main surface of the board and lands of a signal pattern on the other main surface of the board.
[0010] [Description of Embodiments of the Present Disclosure] First, embodiments of the present disclosure will be listed and described.
[0011] (1) A printed wiring board according to one embodiment includes a substrate, a first signal pattern, a second signal pattern, and a conductor layer. The substrate has a first main surface and a second main surface opposite the first main surface. The first signal pattern is disposed on the first main surface. The second signal pattern is disposed on the second main surface. The first signal pattern and the second signal pattern extend along a first direction in a plan view. The first signal pattern has a first land at an end in the first direction. The second signal pattern has a second land at an end in the first direction. The first land and the second land overlap in a plan view. A through hole exposing the second land is formed in the first land and the substrate. The first opening width, which is the opening width of the through hole in the first direction, is larger than the second opening width in a second direction perpendicular to the first direction of the through hole. The conductor layer is disposed on an inner wall surface of the through hole and is electrically connected to the second land. According to the printed wiring board of (1) above, connection defects between the first lands and the second lands can be suppressed.
[0012] (2) In the printed wiring board of (1) above, the value obtained by dividing the first opening width by the second opening width may be equal to or less than 3. According to the printed wiring board of (2) above, it is possible to suppress poor connection between the first land and the second land while maintaining the reflection characteristics at the connection portion between the first land and the second portion.
[0013] (3) In the printed wiring board of (1) or (2) above, the through hole may have a tapered shape in which the opening area of the through hole decreases as it approaches the second land.
[0014] [Details of the embodiment of the present disclosure] Next, details of the embodiment of the present disclosure will be described with reference to the drawings. In the following drawings, the same or corresponding parts are designated by the same reference numerals, and redundant description will not be repeated. A printed wiring board according to the embodiment is referred to as a printed wiring board 100.
[0015] (Configuration of Printed Wiring Board 100) The configuration of the printed wiring board 100 will be described below.
[0016] FIG. 1 is a first plan view of printed wiring board 100. FIG. 2 is a second plan view of printed wiring board 100. FIG. 2 shows a plan view of printed wiring board 100 seen from the opposite side to that of FIG. 1. FIG. 3 is a cross-sectional view taken along line III-III in FIG. 2. As shown in FIGS. 1 to 3, printed wiring board 100 has a substrate 10, a first signal pattern 21, a first ground pattern 22, a second signal pattern 23, a second ground pattern 24, and a conductor layer 30. A high-frequency signal is applied to first signal pattern 21 and second signal pattern 23 with respect to first ground pattern 22 and second ground pattern 24.
[0017] The substrate 10 has a first main surface 10a and a second main surface 10b. The second main surface 10b is the surface opposite to the first main surface 10a. The first main surface 10a and the second main surface 10b are end surfaces in the thickness direction of the substrate 10. The substrate 10 is formed of an electrically insulating material. Specific examples of materials for the substrate 10 include fluororesin, epoxy resin, polyimide, and LCP (Liquid Crystal Polymer). The substrate 10 may also be made of FRP (Fiber Reinforced Plastics), which includes glass cloth and any of fluororesin, epoxy resin, and polyimide. However, the materials for the substrate 10 are not limited to these.
[0018] The plan view refers to the case where the printed wiring board 100 is viewed along the normal direction of the first main surface 10a (second main surface 10b). One of the directions in the plan view is the first direction DR1, and the direction perpendicular to the first direction DR1 in the plan view is the second direction DR2. The thickness direction is the direction perpendicular to both the first direction DR1 and the second direction DR2.
[0019] The first signal pattern 21 and the first ground pattern 22 are arranged on the first main surface 10a. The first signal pattern 21 extends along a first direction DR1 in a plan view. The first signal pattern 21 has a first land 21a at an end in the first direction DR1. The first ground pattern 22 surrounds the first signal pattern 21 in a plan view. The first ground pattern 22 is spaced apart from the first signal pattern 21.
[0020] The second signal pattern 23 and the second ground pattern 24 are arranged on the second main surface 10b. The second signal pattern 23 extends along the first direction DR1 in a plan view. The second signal pattern 23 has a second land 23a at an end in the first direction DR1. The second ground pattern 24 surrounds the second signal pattern 23 in a plan view. The second ground pattern 24 is spaced apart from the second signal pattern 23.
[0021] The first signal pattern 21, the first ground pattern 22, the second signal pattern 23, and the second ground pattern 24 are formed of a conductor such as a metal material. Specific examples of the material of the first signal pattern 21, the first ground pattern 22, the second signal pattern 23, and the second ground pattern 24 include copper or a copper alloy. However, the material of the first signal pattern 21, the first ground pattern 22, the second signal pattern 23, and the second ground pattern 24 is not limited to this.
[0022] The first land 21a and the second land 23a are arranged to overlap in a plan view. A through hole 10c is formed in the first land 21a and the substrate 10. The through hole 10c penetrates the first land 21a in the thickness direction and also penetrates the substrate 10 in the thickness direction. The second land 23a is exposed from the lower end of the through hole 10c.
[0023] The through hole 10c has a first opening width W1 and a second opening width W2. The first opening width W1 is the opening width of the through hole 10c in the first direction DR1. The second opening width W2 is the opening width of the through hole 10c in the second direction DR2. The first opening width W1 and the second opening width W2 are measured at the upper end of the through hole 10c. The first opening width W1 is larger than the second opening width W2. From another perspective, the longitudinal direction of the through hole 10c in a plan view is along the first direction DR1.
[0024] The value obtained by dividing the first opening width W1 by the second opening width W2 may be, for example, 3 or less. In other words, the first opening width W1 may be 3 times or less the second opening width W2. The through hole 10c may have a tapered shape in which the opening area becomes smaller as it approaches the second land 23a. The through hole 10c has, for example, an elliptical shape in a plan view. Here, an ellipse is a shape formed by connecting two semicircular arcs with two straight lines.
[0025] The conductor layer 30 is disposed on the inner wall surface of the through hole 10c and on the second lands 23a exposed from the lower end of the through hole 10c. The conductor layer 30 may also be disposed on the first lands 21a around the through hole 10c. The conductor layer 30 electrically connects the first lands 21a and the second lands 23a (the first signal pattern 21 and the second signal pattern 23).
[0026] The conductor layer 30 is formed of a conductor such as a metal material. The conductor layer 30 is, for example, a plating layer (a layer formed by plating). Specific examples of the material of the conductor layer 30 include copper and copper alloys. However, the material of the conductor layer 30 is not limited to these.
[0027] Although not shown, a through hole other than through hole 10c is formed in first ground pattern 22 and substrate 10. A second ground pattern 24 is exposed from the lower end of this through hole. A conductor layer other than conductor layer 30 is formed on the inner wall surface of this through hole and on second ground pattern 24 exposed from the lower end of this through hole, so that first ground pattern 22 and second ground pattern 24 are electrically connected to each other.
[0028] 1 to 3, the first signal pattern 21 extends from one side (the right side in the figure) to the other side (the left side in the figure) in the first direction DR1, and the second signal pattern 23 also extends from one side to the other side in the first direction DR1. That is, in the example shown in FIGS. 1 to 3, the first signal pattern 21 and the second signal pattern 23 are arranged so as not to overlap each other in a plan view, except for the first lands 21a and the second lands 23a. FIG. 4 is a plan view of a printed wiring board 100 according to the first modification. As shown in FIG. 4, the first signal pattern 21 and the second signal pattern 23 may extend along the first direction DR1 so as to overlap each other in a plan view.
[0029] (Variations 2 to 5) Fig. 5 is an enlarged plan view of printed wiring board 100 according to Variation 2. Note that conductor layer 30 is not shown in Fig. 5. As shown in Fig. 5, through hole 10c may have an elliptical shape with its major axis direction aligned with first direction DR1 in plan view. Fig. 6 is an enlarged plan view of printed wiring board 100 according to Variation 3. Conductive layer 30 is not shown in Fig. 6. As shown in Fig. 6, through hole 10c may have a dumbbell shape with its longitudinal direction aligned with first direction DR1 in plan view.
[0030] FIG. 7 is an enlarged plan view of a printed wiring board 100 according to Modification 4. Note that the conductor layer 30 is not shown in FIG. 7 . As shown in FIG. 7 , the through hole 10c may have a shape that combines a rectangular shape whose longitudinal direction is along the first direction DR1 with a semicircle in a plan view. FIG. 8 is an enlarged plan view of a printed wiring board 100 according to Modification 5. The conductor layer 30 is not shown in FIG. 8 . As shown in FIG. 8 , the through hole 10c may have a rectangular shape whose longitudinal direction is along the first direction DR1 in a plan view. In short, the planar shape of the through hole 10c is not particularly limited as long as the first opening width W1 is larger than the second opening width W2.
[0031] (Variation 6) FIG. 9 is a cross-sectional view of a printed wiring board 100 according to Variation 6. While the above description illustrates an example in which the through hole 10c penetrates the substrate 10 and the first land 21a, as shown in FIG. 9, the through hole 10c may also penetrate the second land 23a. In this case, the conductor layer 30 is also disposed on the second land 23a around the through hole 10c. The conductor layer 30 may be electrically connected to the second land 23a in this manner. Although not shown, in this case, the through hole for connecting the first ground pattern 22 and the second ground pattern 24 penetrates the substrate 10, the first ground pattern 22, and the second ground pattern 24. The first ground pattern 22 and the second ground pattern 24 are electrically connected by disposing conductor layers on the inner wall surface of the through hole, on the first ground pattern 22 around the through hole, and on the second ground pattern 24 around the through hole.
[0032] (Variations 7 and 8) Fig. 10A is a first plan view of printed wiring board 100 according to Variation 7. Fig. 10B is a second plan view of printed wiring board 100 according to Variation 7. The above describes an example in which there is one first signal pattern 21 and one second signal pattern 23, i.e., a single-ended signal line. However, as shown in Figs. 10A and 10B, printed wiring board 100 may have a pair of first signal patterns 21 and a pair of second signal patterns 23, and these signal patterns may form a differential signal line. The above describes an example in which printed wiring board 100 is a single-layer substrate, but printed wiring board 100 may also be a multilayer substrate.
[0033] (Method of Manufacturing Printed Wiring Board 100) A method of manufacturing the printed wiring board 100 will be described below.
[0034] 11 is a manufacturing process diagram of the printed wiring board 100. As shown in FIG. 11, the manufacturing method of the printed wiring board 100 includes a preparation step S1, a patterning step S2, a hole drilling step S3, and a conductor layer forming step S4. The patterning step S2 is performed after the preparation step S1. The hole drilling step S3 is performed after the patterning step S2. The conductor layer forming step S4 is performed after the hole drilling step S3.
[0035] 12 is a cross-sectional view illustrating the preparation step S1. As shown in FIG. 12, in the preparation step S1, the substrate 10 is prepared. At this point, copper foil 25 and copper foil 26 are disposed on the first main surface 10a and the second main surface 10b, respectively.
[0036] 13 is a cross-sectional view illustrating the patterning step S2. As shown in FIG. 13, in the patterning step S2, the copper foils 25 and 26 are patterned to form the first signal pattern 21, the first ground pattern 22, the second signal pattern 23, and the second ground pattern 24. The copper foils 25 and 26 are patterned by etching using resist patterns formed on the copper foils 25 and 26 as masks. The resist patterns are formed by applying dry film resists to the copper foils 25 and 26 and then exposing and developing the applied dry film resists.
[0037] 14 is a cross-sectional view illustrating the hole-making step S3. As shown in FIG. 14, in the hole-making step S3, a through hole 10c is formed at a position where the first land 21a and the second land 23a overlap in a plan view. The through hole 10c is formed by, for example, irradiating with a laser. The through hole 10c may also be formed by, for example, drilling.
[0038] In the conductor layer forming step S4, a conductor layer 30 is formed on the inner wall surface of the through hole 10c, on the second lands 23a exposed at the bottom end of the through hole 10c, and on the first lands 21a around the through hole 10c. The conductor layer 30 is formed by, for example, electrolytic plating or electroless plating. In this manner, the structure of the printed wiring board 100 shown in FIGS. 1 to 3 is formed.
[0039] The conductor layer 30 may be formed not only on the inner wall surface of the through hole 10c and on the second land 23a exposed from the lower end of the through hole 10c, but also over the entire surfaces of the first signal pattern 21 and the first ground pattern 22. In other words, panel plating may be performed in the conductor layer forming step S4.
[0040] (Effects of Printed Wiring Board 100) The effects of printed wiring board 100 will be described below in comparison with a printed wiring board according to a comparative example. The printed wiring board according to the comparative example will be referred to as printed wiring board 200.
[0041] Fig. 15 is a plan view of printed wiring board 200. Fig. 16 is a cross-sectional view taken along line XVI-XVI in Fig. 15. As shown in Figs. 15 and 16, in printed wiring board 200, first opening width W1 is equal to second opening width W2. That is, in printed wiring board 200, through hole 10c is circular in plan view. Except for this point, the configuration of printed wiring board 200 is the same as the configuration of printed wiring board 100.
[0042] As the widths of the first signal pattern 21 and the second signal pattern 23 become narrower, the second opening width W2 also becomes smaller accordingly. When the first opening width W1 is equal to the second opening width W2, as in the case of the printed wiring board 200, the first opening width W1 also becomes smaller as the second opening width W2 becomes smaller. In this case, the opening area at the bottom end of the through hole 10c becomes too small, making it difficult for the conductor layer 30 to be formed on the second lands 23a exposed at the bottom end of the through hole 10c, which may result in poor connection between the first lands 21a and the second lands 23a. This becomes more pronounced when the through hole 10c has a tapered shape in which the opening area becomes smaller as it approaches the bottom end.
[0043] On the other hand, in printed wiring board 100, first opening width W1 is larger than second opening width W2. As a result, in printed wiring board 100, even if the widths of first signal pattern 21 and second signal pattern 23 become narrower and second opening width W2 becomes smaller, first opening width W1 can be maintained, thereby ensuring the opening area at the lower end of through hole 10c. In this way, printed wiring board 100 can prevent poor connection between first land 21a and second land 23a.
[0044] FIG. 17 shows simulation results illustrating the relationship between the frequency of signals flowing through the first signal pattern 21 and the second signal pattern 23 and the reflection characteristics at the connection between the first land 21 a and the second land 23 a. Samples 1 and 2 were used for the simulation shown in FIG. 17 . Samples 1 and 2 correspond to printed wiring boards 100 and 200, respectively. In Sample 1, the through hole 10 c was oval with a first opening width W1 of 0.2 mm and a second opening width W2 of 0.1 mm. In Sample 2, the through hole 10 c was circular with a first opening width W1 and a second opening width W2 of 0.1 mm. The horizontal axis in FIG. 17 represents the frequency (unit: GHz) of the high-frequency signal flowing through the first signal pattern 21 and the second signal pattern 23, and the vertical axis in FIG. 17 represents the voltage standing wave ratio (VSWR), which is an index of the reflection characteristics.
[0045] As the value obtained by dividing the first opening width W1 by the second opening width W2 increases, the reflection characteristics at the connection portion between the first land 21a and the second land 23a deteriorate. However, as shown in Figure 14, when the value obtained by dividing the first opening width W1 by the second opening width W2 is 2, the reflection characteristics at the connection portion between the first land 21a and the second land 23a are maintained even if the first opening width W1 is increased. Although not shown, in a similar simulation, the reflection characteristics at the connection portion between the first land 21a and the second land 23a are maintained when the value obtained by dividing the first opening width W1 by the second opening width W2 is 3 or less.
[0046] The embodiments disclosed herein are illustrative in all respects and should not be considered limiting. The scope of the present invention is defined by the claims, not by the above-described embodiments, and is intended to include all modifications within the meaning and scope of the claims.
[0047] 100 printed wiring board, 200 printed wiring board, 10 substrate, 10a first main surface, 10b second main surface, 10c through hole, 21 first signal pattern, 21a first land, 22 first ground pattern, 23 second signal pattern, 23a second land, 24 second ground pattern, 25, 26 copper foil, 30 conductor layer, DR1 first direction, DR2 second direction, S1 preparation step, S2 patterning step, S3 hole drilling step, S4 conductor layer formation step, W1 first opening width, W2 second opening width.
Claims
1. A printed wiring board comprising: a substrate; a first signal pattern; a second signal pattern; and a conductor layer; the substrate has a first main surface and a second main surface opposite the first main surface; the first signal pattern is disposed on the first main surface; the second signal pattern is disposed on the second main surface; the first signal pattern and the second signal pattern extend along a first direction in a planar view; the first signal pattern has a first land at an end in the first direction; the second signal pattern has a second land at an end in the first direction; the first land and the second land overlap in a planar view; a through hole is formed in the first land and the substrate; a first opening width, which is an opening width of the through hole in the first direction, is larger than a second opening width of the through hole in a second direction perpendicular to the first direction; and the conductor layer is disposed on an inner wall surface of the through hole and is electrically connected to the second land.
2. The printed wiring board according to claim 1, wherein the value obtained by dividing the first opening width by the second opening width is 3 or less.
3. The printed wiring board according to claim 1 or 2, wherein the through hole has a tapered shape in which the opening area of the through hole decreases as it approaches the second land.