Power on / off module
By combining low-precision starter submodule and high-precision enable voltage comparison submodule in the power switch module, the problems of high shutdown energy consumption and low response accuracy in the prior art are solved, and the low energy consumption of battery-powered equipment is achieved. High precision response.
Patent Information
- Application Number
- PCT/CN2024/095434
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-06-16
- Filing Date
- 2024-05-27
- Publication Date
- 2024-12-19
AI Technical Summary
In the prior art, low energy consumption in the shutdown state and high accuracy in response to the power-on signal cannot be taken into account, resulting in excessive energy consumption of battery-powered equipment and unsatisfactory control effect.
A switch module is designed, including a starter submodule and enable voltage comparison submodule. The starter submodule judges the starter conditions with lower accuracy and controls the power supply. The enable voltage comparison submodule judges the starter conditions with higher accuracy and starts or Turn off the functional modules and make rational use of the working characteristics of each submodule to achieve reduced shutdown energy consumption and improved response accuracy.
It realizes reducing energy consumption in the shutdown state while maintaining high-precision response to the power-on signal, solving the problem of taking into account both energy consumption and accuracy in the prior art.
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Figure CN2024095434_19122024_PF_FP_ABST
Abstract
Description
Power on / off module Technical Field
[0001] The present invention relates to the technical field of integrated circuits, and in particular to a power on / off module. Background Art
[0002] Everyday electrical appliances all have a standby function, which has two requirements: the first is that the power consumption during standby mode is as little as possible; the second is that the response accuracy to the power-on control signal is as high as possible.
[0003] If the energy consumption of a product is too high when it is shut down or in standby mode, it can easily reduce the product's competitiveness and put it at a disadvantage in commercial competition. For battery-powered devices, since the power system is always in contact with both ends of the battery, if the system's shutdown current is too large, the battery will be exhausted after a certain period of time due to the shutdown current of the power system, which will also lead to a decline in the competitiveness of the product.
[0004] If the response accuracy to the power-on control signal is not high enough, it may easily lead to unsatisfactory control effects and failure to meet specific requirements.
[0005] The existing technology often uses the following technical means: for the modules involved in power-on determination, a certain current is maintained at all times, so that the modules can respond to the enable signal at any time and with a certain response accuracy. However, this solution will result in the circuit current still being in the uA level when the power is off.
[0006] In summary, the prior art has the problem that low energy consumption in the shutdown state and high precision in responding to the power-on signal cannot be achieved at the same time.
[0007] Summary of the Invention
[0008] The object of the present invention is to provide a power on / off module to solve the problem in the prior art of being unable to achieve both low energy consumption in the power off state and high precision in responding to power on signals.
[0009] In order to solve the above technical problems, the present invention provides a power on / off module applied to a main circuit, the main circuit including the power on / off module and a functional module, the power on / off module including a power on / off enable terminal, a starter module and an enable voltage comparison submodule.
[0010] Wherein, the starter module is used to obtain external power supply.
[0011] The starter module determines with a first accuracy whether the signal of the power on / off enable terminal meets a first power-on condition; if the first power-on condition is met, the external power supply is converted into an internal power supply to directly or indirectly power the enable voltage comparison submodule and the functional module; if the first power-on condition is not met, the power supply of the enable voltage comparison submodule and the functional module is directly or indirectly cut off.
[0012] After the enable voltage comparison submodule is powered on, it determines with a second accuracy whether the signal of the power on / off enable terminal meets the second power-on condition; if the second power-on condition is met, it outputs a control signal to drive at least part of the functional modules to power on; if the second power-on condition is not met, it outputs a control signal to drive at least part of the functional modules not to power on or to power off.
[0013] When the first startup condition is not met, the startup submodule maintains its own judgment function with a first energy consumption; when the enable voltage comparison submodule is powered on, the enable voltage comparison submodule maintains its own judgment function with a second energy consumption.
[0014] The first precision is lower than the second precision, and the first energy consumption is lower than the second energy consumption.
[0015] Optionally, the power on / off module further includes an output submodule. When the output submodule is powered on, the output submodule obtains the output signal of the enable voltage comparison submodule, eliminates oscillation, and outputs a power on / off signal.
[0016] The startup submodule is further configured to, if the first startup condition is met, convert the external power supply into an internal power supply to directly or indirectly power the output submodule; if the first startup condition is not met, directly or indirectly cut off the power supply of the output submodule.
[0017] Optionally, the starter module includes a first judgment unit and a power conversion unit.
[0018] Among them, when the external power supply is connected, the power conversion unit has at least the following working states: non-working state, semi-working state and normal working state; in the non-working state, the power conversion unit outputs electric energy at a power not exceeding the first energy consumption; in the semi-working state, the power conversion unit outputs electric energy at a power exceeding the first energy consumption, and the output electric energy at least does not meet the power and voltage requirements of the functional module; in the normal working state, the electric energy output by the power conversion unit meets the power and voltage requirements of the total circuit.
[0019] When no other control logic intervenes, the first judgment unit determines with the first accuracy whether the signal of the power-on / off enable terminal meets the first power-on condition; if it does not meet the first power-on condition, the power conversion unit is driven to switch to the non-working state; if it meets the first power-on condition, the power conversion unit is driven to switch to the normal working state; if the result is other, the power conversion unit is driven to switch to the semi-working state.
[0020] Optionally, the starter module also includes a second judgment unit, and the power acquisition end of the second judgment unit is connected to the internal power output end of the power conversion unit; when the power conversion unit is operating in the semi-working state or the normal working state and the power supply line between the power conversion unit and the second judgment unit is not disconnected or shielded, the second judgment unit can work normally.
[0021] When no other control logic intervenes, the second judgment unit judges whether the signal of the power-on / off enable terminal meets the first power-on condition; if it does not meet the first power-on condition, the power conversion unit is driven to switch to the non-working state; if it meets the first power-on condition, the power conversion unit is driven to switch to the normal working state; in the event of power failure, the second judgment unit does not hinder the switching of the working state of the power conversion unit.
[0022] When the first judgment unit drives the power conversion unit to switch to the semi-working state, and the second judgment unit drives the power conversion unit to switch to the normal working state, the power conversion unit switches to the normal working state.
[0023] Optionally, the starter module further includes a shut-down unit, and an input end of the shut-down unit is connected to an output end of the power on / off module.
[0024] When the output terminal of the power on / off module outputs a power off signal, the closing unit shields the control effect of the second determination unit on the power conversion unit.
[0025] Optionally, the enabling voltage comparison submodule includes a reference voltage generating unit and a third judging unit.
[0026] When the reference voltage generating unit is powered on, the reference voltage generating unit is configured to output a reference voltage with the second precision, and the reference voltage is set based on the second power-on condition.
[0027] When the third judgment unit is powered on, the third judgment unit directly or indirectly compares the output signal of the reference voltage generating unit and the signal of the power on / off enable terminal with the second precision. When the magnitude relationship changes, the signal output by the third judgment unit changes.
[0028] Optionally, the reference voltage includes a first reference voltage and a second reference voltage, and the reference voltage generating unit obtains a signal that can indicate whether the overall circuit is currently in an on state or an off state.
[0029] When the reference voltage generating unit is powered on, if the overall circuit is currently in the on state, the reference voltage generating unit outputs the second reference voltage; if the overall circuit is currently in the off state, the reference voltage generating unit outputs the first reference voltage.
[0030] The first reference voltage is greater than the second reference voltage.
[0031] Optionally, the output submodule includes a charging and discharging unit and an output unit.
[0032] The charging and discharging unit is used to delay the output signal of the enabling voltage comparison submodule from entering the output unit and filter out oscillation of the output signal of the enabling voltage comparison submodule.
[0033] The output unit determines its own output signal based at least on the output signal of the enable voltage comparison submodule.
[0034] Optionally, the output unit determines its own output signal based on the output signal of the enable voltage comparison submodule and the signal of the power on / off enable terminal.
[0035] Optionally, the output submodule further includes a blocking unit, which is used to block the influence of the charging and discharging unit on the internal components of the enabling voltage comparison submodule and / or increase the driving capability of the output signal of the enabling voltage comparison submodule.
[0036] Compared with the prior art, the present invention provides a power on / off module, wherein the power on / off module includes a power on / off enable terminal, a starter module and an enable voltage comparison submodule. The starter module judges whether the signal of the power on / off enable terminal meets the power on condition with lower precision and lower energy consumption, and supplies power to or stops supplying power to other modules according to the preset logic. After the enable voltage comparison submodule is powered on, it judges whether the signal of the power on / off enable terminal meets the power on condition with higher precision, and starts or shuts down other modules according to the preset logic. The standby energy consumption of the starter module is less than the minimum energy consumption for the enable voltage comparison submodule to work normally. With such a configuration, the working characteristics of each submodule are reasonably utilized, and both shutdown energy consumption and response accuracy are taken into account, thus solving the problem in the prior art that the two cannot be taken into account at the same time. BRIEF DESCRIPTION OF THE DRAWINGS
[0037] Those skilled in the art will appreciate that the accompanying drawings are provided for a better understanding of the present invention and do not constitute any limitation on the scope of the present invention.
[0038] FIG1 is a schematic structural diagram of a power on / off module according to an embodiment of the present invention;
[0039] FIG2 is a circuit diagram of a power on / off module according to an embodiment of the present invention;
[0040] FIG3 is a waveform diagram according to an embodiment of the present invention.
[0041] In the attached figure:
[0042] 1-power on / off enable terminal; 2-start submodule; 3-enable voltage comparison submodule; 4-output submodule;
[0043] 21 - first judgment unit; 22 - power conversion unit; 23 - internal power output terminal; 24 - second judgment unit; 25 - shutdown unit; 31 - reference voltage generation unit; 32 - third judgment unit; 33 - signal conversion unit; 41 - blocking unit; 42 - charging and discharging unit; 43 - output unit. DETAILED DESCRIPTION
[0044] To make the objects, advantages, and features of the present invention more clearly apparent, the present invention is further described below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale. They are only used to conveniently and clearly assist in illustrating the purposes of the embodiments of the present invention. In addition, the structures shown in the drawings are often part of the actual structure. In particular, different drawings may need to illustrate different focuses and sometimes use different scales.
[0045] As used in the present invention, the singular forms "a", "an", and "the" include plural referents, the term "or" is generally used to mean "and / or", the term "several" is generally used to mean "at least one", and the term "at least two" is generally used to mean "two or more". In addition, the terms "first", "second", and "third" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, features defined as "first", "second", and "third" may explicitly or implicitly include one or at least two of the features, "one end" and "the other end" and "proximal end" and "distal end" generally refer to two corresponding parts, which include not only endpoints, and the terms "mounted", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, and it can be a communication between two elements or an interaction relationship between two elements. In addition, as used in the present invention, "one element is disposed on another element" generally only indicates that there is a connection, coupling, cooperation, or transmission relationship between the two elements, and the connection, coupling, cooperation, or transmission between the two elements may be direct or indirect through an intermediate element. It should not be understood as indicating or implying a spatial positional relationship between the two elements. That is, one element can be in any orientation, such as inside, outside, above, below, or to one side of another element, unless the content clearly indicates otherwise. For those skilled in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0046] The core idea of the present invention is to provide a power on / off module to solve the problem in the prior art of being unable to achieve both low energy consumption in the power off state and high precision in responding to power on signals.
[0047] The following description is given with reference to the accompanying drawings.
[0048] Referring to Figure 1 , the present invention provides a power-on / off module for use in a general circuit. The general circuit includes the power-on / off module and a functional module (not shown). The power-on / off module includes a power-on / off enable terminal 1, a starter module 2, and an enable voltage comparison module 3. Because the power-on / off module can be used in general circuits with different functions in different scenarios, the specific functions of the functional modules are not limited.
[0049] The starter module 2 is used to obtain an external power supply VCC.
[0050] The starter module 2 determines with a first precision whether the signal EN of the power-on / off enable terminal 1 meets a first power-on condition; if the first power-on condition is met, the external power supply VCC is converted into an internal power supply VDD to directly or indirectly power the enable voltage comparison submodule 3 and the functional module; if the first power-on condition is not met, the power supply to the enable voltage comparison submodule 3 and the functional module is directly or indirectly cut off. "Power" should be understood as the intention of the relevant module to output a control signal. However, in actual situations, if the subsequent purpose is not achieved due to other reasons (such as the intervention of higher-level control logic or circuit failure), it should also be understood as meeting the description. In the subsequent content, "power" should be understood in the same way.
[0051] The first power-on condition should be understood as the voltage of the enable terminal being greater than a certain value. For ease of understanding, in this embodiment, the first power-on condition is approximately >1.4V (specifically VD1+VT1, the relevant meanings of VD1 and VT1 are introduced later).
[0052] After being powered, the enable voltage comparison submodule 3 determines, with a second precision, whether the signal EN at the power-on / off enable terminal 1 meets a second power-on condition. If the second power-on condition is met, the submodule 3 outputs a control signal to power on at least some of the functional modules. If the second power-on condition is not met, the submodule 3 outputs a control signal to disable or shut down at least some of the functional modules. In this application, the first precision is 0.1V, and the second precision is 0.01V.
[0053] For ease of understanding, in this embodiment, the second power-on condition is >1.6V.
[0054] Ideally, the overall circuit is designed to be inactive if the signal EN is less than 1.6V when the overall circuit is inactive, and to be active if the signal EN is greater than 1.6V. The logic for shutting down the overall circuit after it is activated is described later.
[0055] However, in reality, no circuit can transition state exactly when the signal exceeds 1.6V. Instead, it typically operates according to the following logic: when EN < a, the circuit is disabled; when EN > b, it is enabled; and when a < EN < b, the circuit's state becomes uncontrollable and unpredictable. The size of the interval [a, b] can also be called response accuracy; the smaller the value, the higher the accuracy.
[0056] Based on the above design purpose, this embodiment divides the power-on condition into the first power-on condition and the second power-on condition; the first power-on condition is set to >1.4V; the second power-on condition includes: if the total circuit is in the unpowered state, it will be powered on if >1.6V, otherwise it will not be powered on.
[0057] It is understandable that the present invention can modify the above-mentioned 1.6V and 1.4V to other values by modifying the parameters of each component, which is only illustrated here.
[0058] It is understandable that in different embodiments, the first power-on condition and the second power-on condition may be set to be the same.
[0059] When the first power-on condition is not met, the starter module 2 maintains its judgment function at a first energy consumption. When the enable voltage comparison module is powered, the enable voltage comparison module 3 maintains its judgment function at a second energy consumption. In this application, the first and second energy consumptions are measured by current. The first energy consumption is in the pA to nA range, and the second energy consumption is in the uA range.
[0060] The first precision is lower than the second precision, and the first energy consumption is lower than the second energy consumption.
[0061] It can be understood that in this embodiment, it is not believed that energy consumption can be reduced as long as the accuracy is reduced. Instead, it is believed that when the accuracy is reduced, more elements and structures can be selected, so that a solution with relatively low energy consumption can be selected to achieve a low-precision response. That is, reducing the accuracy brings the possibility of selecting more solutions, thereby reducing energy consumption.
[0062] With this configuration, this embodiment splits the startup of the overall circuit into two independent processes: powering each module and receiving the power-on signal. These two processes are controlled by modules with varying precision and energy consumption. During the shutdown phase, the internal power supply is shut down, limiting the overall circuit's energy consumption to the startup module 2, thus structurally reducing energy consumption. Furthermore, while reducing the precision of the startup module 2 further reduces energy consumption, the enable voltage comparison submodule 3 ensures the overall accuracy of the power-on / off module. This balances low energy consumption in the shutdown state with high precision in responding to the power-on signal.
[0063] 1 , the power on / off module further includes an output submodule 4 . When the output submodule is powered, the output submodule 4 obtains the output signal of the enable voltage comparison submodule 3 , eliminates oscillation, and outputs a power on / off signal.
[0064] The startup submodule 2 is further configured to, if the first startup condition is met, convert the external power supply VCC into an internal power supply VDD to directly or indirectly power the output submodule 4; and to directly or indirectly cut off the power supply of the output submodule 4 if the first startup condition is not met.
[0065] Such a configuration optimizes the output signal and avoids oscillation caused when the signal stays at a critical value, thereby causing the problem of frequent switching of the total circuit.
[0066] Based on the above inventive concept, those skilled in the art may configure functional units in different forms to implement the above-mentioned starter module 2 , enable voltage comparison module 3 and output module 4 .
[0067] FIG1 shows a preferred implementation method, in which the starter module 2 includes a first judgment unit 21 and a power conversion unit 22 .
[0068] Among them, when the external power supply VCC is connected, the power conversion unit 22 has at least the following working states: non-working state, semi-working state and normal working state; in the non-working state, the power conversion unit 22 outputs electric energy at a power not exceeding the first energy consumption; in the semi-working state, the power conversion unit 22 outputs electric energy at a power exceeding the first energy consumption, and the output electric energy at least does not meet the power and voltage requirements of the functional module; in the normal working state, the electric energy output by the power conversion unit 22 meets the power and voltage requirements of the total circuit.
[0069] When no other control logic intervenes, the first judgment unit 21 judges with the first accuracy whether the signal EN of the power-on / off enable terminal 1 meets the first power-on condition; if the first power-on condition is not met, the power conversion unit 22 is driven to switch to the non-working state; if the result is between meeting the first power-on condition and not meeting the first power-on condition, the power conversion unit 22 is driven to switch to the semi-working state; if the first power-on condition is met, the power conversion unit 22 is driven to switch to the normal working state.
[0070] The result between meeting the first power-on condition and not meeting the first power-on condition should be understood as the accuracy of the first judgment unit 21 is limited and the correctness of the current judgment result cannot be guaranteed. This description also implies that the first judgment unit 21 is an analog circuit judgment logic.
[0071] It is understood that the inclusion of the semi-operating state in the operating state of the power conversion unit 22 is a technical feature designed to coordinate with the first precision. If the operating state of the power conversion unit 22 does not include the semi-operating state, it means that additional logic and structure are required within the power conversion unit 22 to ensure that the operating state of the power conversion unit 22 has the characteristics of a digital circuit. Therefore, the inclusion of the semi-operating state in the power conversion unit 22 does not necessarily mean that the starter module 2 has low energy consumption characteristics, but it does provide more options for achieving low energy consumption in the starter module 2, allowing the starter module 2 to select a low-energy solution.
[0072] The semi-operating state imposes certain restrictions on the operating efficiency of the overall circuit. Therefore, in a preferred embodiment, the starter module 2 further includes a second judgment unit 24, the power acquisition terminal of which is connected to the internal power output terminal 23 of the power conversion unit 22. When the power conversion unit 22 is operating in the semi-operating state or the normal operating state and the energy supply line between the power conversion unit 22 and the second judgment unit 24 is not disconnected or shielded, the second judgment unit 24 can operate normally. In other words, the energy consumption of the second judgment unit 24 during normal operation is higher than the first energy consumption, but lower than the energy consumption required for the normal operation of the overall circuit.
[0073] When no other control logic intervenes, the second judgment unit 24 judges whether the signal EN of the power-on / off enable terminal 2 meets the first power-on condition; if it does not meet the first power-on condition, it drives the power conversion unit 22 to switch to the non-working state; if it meets the first power-on condition, it drives the power conversion unit 22 to switch to the normal working state; in the event of a power failure, the second judgment unit 24 does not hinder the switching of the working state of the power conversion unit 22. In other words, the judgment accuracy of the second judgment unit 24 is actually higher than the first accuracy. When the judgment result of the first judgment unit 21 is between meeting the first power-on condition and not meeting the first power-on condition, the judgment result of the second judgment unit 24 is that the first power-on condition is met. The difference between the two judgment results is not a contradiction, but is caused by different accuracy.
[0074] If the power conversion unit 22 and the second judgment unit 24 are regarded as a whole, which is called a power component, the external performance of the power component is that the working state of the power component does not include the semi-working state.
[0075] It is also important to emphasize the control priority of the first judgment unit 21 and the second judgment unit 24. When the first judgment unit 21 drives the power conversion unit 22 to switch to the semi-working state, and the second judgment unit 24 drives the power conversion unit 22 to switch to the normal working state, the power conversion unit 22 switches to the normal working state.
[0076] Taking shutdown efficiency into consideration, the starter module 2 further includes a shutdown unit 25 , and an input end of the shutdown unit 25 is connected to the output end of the switch module.
[0077] When the output terminal of the power on / off module outputs a shutdown signal, the shutdown unit 25 blocks the control effect of the second judgment unit 24 on the power conversion unit 22. At this time, the working state of the power conversion unit 22 switches to a semi-working state. This configuration can speed up the shutdown process.
[0078] Based on the functional description of each unit above, those skilled in the art can set up a related circuit structure. FIG2 shows a preferred implementation manner.
[0079] Please refer to Figure 2, the starter module 2 includes a first diode D1, a second diode D2, a first enhancement-type PMOS transistor PM1, a second enhancement-type PMOS transistor PM2, a third enhancement-type PMOS transistor PM3, a fourth enhancement-type PMOS transistor PM4, a fifth enhancement-type PMOS transistor PM5, a first enhancement-type NMOS transistor NM1, a second enhancement-type NMOS transistor NM2, a third enhancement-type NMOS transistor NM3, a first depletion-type NMOS transistor DNM1, a second depletion-type NMOS transistor DNM2, a first voltage clamping circuit CLAMP1, a second voltage clamping circuit CLAMP2, a third voltage clamping circuit CLAMP3 and a Schmitt trigger SMT1.
[0080] The first, second, and third voltage clamps, CLAMP1, CLAMP2, and CLAMP3, are configured to attempt to draw a small amount of current, typically 1uA or less. If the current does not reach this value, the voltage across the circuit is very low, approaching 0V. If the current exceeds this value, the voltage clamping occurs. Furthermore, large changes in the current do not significantly affect the voltage across the circuit (e.g., for a current of 1uA to 100uA, the voltage does not change by more than 1V). This circuit can be implemented in a variety of ways, the simplest of which is a parallel connection of a Zener diode and a large resistor.
[0081] Depletion-mode NMOS transistors have a threshold voltage (VT) less than 0V. Therefore, connecting the GATE and SOURCE terminals together allows current to be drawn from the DRAIN terminal. The specific amount of drawn current can be adjusted by adjusting their width-to-length ratio. DNM1 through DNM3 in Figure 2 can all be considered current sources. In applications where implementation requirements are lower or process limitations are unavailable, the first, second, and third depletion-mode NMOS transistors DNM1, DNM2, and DNM3 (DNM3 belongs to the enable voltage comparison submodule 3 and is described in advance here) can also be replaced with resistors.
[0082] The specific connection relationship of the above elements can be understood by referring to FIG2 , which will not be described in detail here.
[0083] The first diode D1, the first voltage clamping circuit CLAMP1, and the first enhancement-mode NMOS transistor NM1 constitute the first judgment unit 21. The first enhancement-mode PMOS transistor PM1, the second enhancement-mode PMOS transistor PM2, the third enhancement-mode PMOS transistor PM3, the first depletion-mode NMOS transistor DNM1, the second depletion-mode NMOS transistor DNM2, the second voltage clamping circuit CLAMP2, and the third enhancement-mode NMOS transistor NM3 constitute the power conversion unit 22, wherein the source of the third enhancement-mode NMOS transistor NM3 is configured as the internal power output terminal 23. The second enhancement-mode NMOS transistor NM2, the fourth enhancement-mode PMOS transistor PM4, the second diode D2, the third voltage clamping circuit CLAMP3, and the Schmitt trigger SMT1 constitute the second judgment unit 24. The fifth enhancement-mode PMOS transistor PM5 constitutes the shutdown unit.
[0084] The working principle of the promoter module 2 is described as follows.
[0085] When the EN pin voltage is significantly less than VD1 + VT1, NM1 cannot turn on. VD1 is the forward voltage drop of the first diode D1 (the first diode D1 can be implemented using other methods, such as the body diode of a MOS transistor), and VT1 is the turn-on threshold voltage of NM1. The VGS1 voltage of the high-voltage NMOS transistor NM1 is less than its turn-on voltage VT1. Simultaneously, if the voltage at the V1 terminal (i.e., the gate of NM2 or the output of the Schmitt trigger SMT1) is also less than the turn-on voltage VT2 of the high-voltage NMOS transistor NM2, NM2 cannot turn on. Consequently, the high-voltage PMOS transistor PM1 cannot conduct, and PM2, which is of the same type as PM1 and forms a current mirror with it, cannot conduct either. Consequently, the GATE terminal of the high-voltage NMOS transistor NM3 is pulled to a very low voltage by CLAMP2, and NM3 cannot conduct either. From the above description, it can be seen that when the EN pin voltage is low, the current at the VCC end cannot flow into the circuit. At this time, the operating current of the circuit is almost zero (only the leakage current of the device exists, which can usually be ignored). At this time, the energy consumption of the starter module 2 is very small.
[0086] When the EN pin voltage rises to slightly greater than VD1+VT1 (corresponding to the determination result of the first determination unit 21 being between meeting the first power-on condition and not meeting the first power-on condition), NM1 begins to conduct. At this time, PM1 and PM2 begin to conduct slightly (nA level). However, the current of PM2 is not enough to provide the operating current of CLAMP2. Therefore, the voltage of CLAMP2 is low, NM3 cannot conduct, and the subsequent circuit is not powered.
[0087] As the EN pin voltage rises, the current of NM1 increases, and at the same time, the currents of PM1 and PM2 also begin to increase. When the current of PM2 rises to be sufficient to drive CLAMP2, and the VGS voltage of NM3 is greater than VT3 (the turn-on threshold of NM3, ignoring the back-gate effect here), NM3 begins to turn on (at this time, the judgment result of the first judgment unit 21 is still between meeting the first power-on condition and not meeting the first power-on condition).
[0088] The SOURCE of NM3 is the supply voltage VDD of the subsequent circuit modules, with a typical value of less than 5V. DNM2 is a depletion-mode NMOS transistor, used here as a current source to set the operating current of the low-voltage PMOS transistor PM3. PM4 and PM3 form a current mirror, with PM4 providing bias current for diode D2. Without considering PM5, as the VEN voltage rises, the EN1 voltage also rises. At this time, VEN1 = VEN + VD2. After VEN1 reaches the rising threshold voltage of the Schmitt trigger SMT1, V1 outputs a high level. After V1 outputs a high level, NM2 will be fully turned on.
[0089] That is, as long as VEN exceeds VT1 + VD1, the circuit can instantly reach a stable operating state. The current limit of NM1 / PM1 / PM2 is set by DNM1, and the GATE voltage of NM3 and the VDD voltage are determined by the clamping voltage V2 of CLAMP2. The VDD voltage can be roughly written as VDD = V2 - VT3 (ignoring the GATE overdrive voltage and back-gate effect of NM3). Due to the current and voltage limits, the circuit can be prevented from exceeding the normal operating range and being damaged.
[0090] PM5 is used to turn off the current mirror formed by PM3 and PM4. During normal operation, the output signal VOFF of the switch module is high, and PM5 is not conducting. When shutdown is required, VOFF is low, PM5 is conducting, and no current flows through PM3 and PM4, thereby quickly shutting down the power conversion unit 22.
[0091] Continuing to refer to FIG. 1 , the enabling voltage comparison submodule 3 includes a reference voltage generating unit 31 and a third judging unit 32 .
[0092] When the reference voltage generating unit is powered on, the reference voltage generating unit 31 is configured to output a reference voltage with the second precision, and the reference voltage is set based on the second power-on condition.
[0093] When the third determination unit is powered, the third determination unit 32 directly or indirectly compares the output signal of the reference voltage generation unit with the signal EN at the power-on / off enable terminal at the second precision. When the magnitude relationship changes, the signal output by the third determination unit 32 changes. For example, when the former is greater than the latter, the third determination unit 32 outputs a high level; when the former is less than the latter, the third determination unit 32 outputs a low level. The condition in which the two are equal can be arbitrarily set based on the characteristics of the component itself.
[0094] To prevent the overall circuit from oscillating under certain circumstances, the reference voltage includes a first reference voltage and a second reference voltage. The reference voltage generation unit 31 obtains a signal indicating whether the overall circuit is currently powered on or powered off. For example, in the embodiment shown in FIG1 , the reference voltage generation unit 31 obtains the output signal of the third determination unit 32 based on the signal conversion unit 33. In other embodiments, the output signal of the power on / off module may also be used as a basis for determination.
[0095] When the reference voltage generating unit is powered on, if the overall circuit is currently in the on state, the reference voltage generating unit 31 outputs the second reference voltage; if the overall circuit is currently in the off state, the reference voltage generating unit 31 outputs the first reference voltage.
[0096] The first reference voltage is greater than the second reference voltage.
[0097] In one embodiment, the first reference voltage is 1.6V, and the second reference voltage is 1.2V.
[0098] Referring to Figure 2 , the enable voltage comparison submodule 3 includes a bandgap reference voltage component BG1, a first transmission gate TG1, a second transmission gate TG2, a first PNP transistor Q1, a second PNP transistor Q2, a sixth enhancement-mode PMOS transistor PM6, a seventh enhancement-mode PMOS transistor PM7, and a comparator COMP1. The first transmission gate TG1 is configured such that when the high-level enable terminal of the first transmission gate TG1 receives a high level and the low-level enable terminal of the first transmission gate TG1 receives a low level, the input and output terminals of the first transmission gate TG1 are connected; otherwise, the input and output terminals of the first transmission gate TG1 are disconnected. The operating principle of the second transmission gate TG2 is the same as that of the first transmission gate TG1.
[0099] The enable voltage comparison submodule 3 further includes a first inverter INV1 . Although in FIG. 2 , the first inverter INV1 appears to be subordinate to the output submodule 4 , in the field of electrical technology, it is common and understandable that one component is subordinate to two functional submodules.
[0100] The bandgap reference voltage component BG1, the first transmission gate TG1, and the second transmission gate TG2 constitute the reference voltage generation unit 31. The high-level enable terminal of the first transmission gate TG1 and the low-level enable terminal of the second transmission gate TG2 are connected and configured as the first control terminal of the reference voltage generation unit 31. The low-level enable terminal of the first transmission gate TG1 and the high-level enable terminal of the second transmission gate TG2 are connected and configured as the second control terminal of the reference voltage generation unit 31. The first transistor Q1, the second transistor Q2, the sixth enhancement-mode PMOS transistor PM6, the seventh enhancement-mode PMOS transistor PM7, and the comparator COMP1 constitute the third determination unit 32. The gates of PM6 and PM7 are used to obtain a bias voltage VPBS. In one embodiment, they are connected to the gate of PM4 (not shown).
[0101] The first inverter INV1 constitutes the signal conversion unit 33 . In different embodiments, the signal conversion unit 33 may not be provided, or a signal conversion function may be provided inside the reference voltage generation unit 31 .
[0102] The second control terminal of the reference voltage generating unit 31 is used to obtain the output signal VC of the comparator COMP1 , and the first control terminal of the reference voltage generating unit 31 is used to obtain the inverted signal VCB of the output signal of the comparator COMP1 . The VCB signal is converted by the signal conversion unit 33 .
[0103] BG1 is a bandgap reference circuit. In other embodiments, it can be replaced with a reference voltage generating circuit based on other principles. The bandgap reference circuit can generate a stable reference voltage and current source. The power supply voltage of BG1 is VDD. BG1 outputs two voltage sources, namely the first reference voltage ENH and the first reference voltage ENL, where the voltage of ENH is greater than ENL. ENH is used to set the system's power-on voltage, and ENL is used to set the system's power-off voltage.
[0104] TG1 and TG2 are transmission gates controlled by a pair of opposing signals, VC and VCB. When VC is high and VCB is low, TG2 conducts and TG1 shuts off, so VENTH = VENL. Conversely, when VC is low and VCB is high, TG1 conducts and TG2 shuts off, so VENTH = VENH. VENTH is the voltage at the output of the reference voltage generation unit 31.
[0105] PM6 and PM7 are low-voltage PMOS transistors of the same type and size, forming a current mirror. VPBS is its bias voltage source. In various embodiments, this signal can be generated independently using conventional biasing techniques, or connected to the gate of another PMOS current mirror, such as PM4. Q1 and Q2 are PNP transistors of the same size and type. PM6 and PM7 provide bias currents for Q1 and Q2, respectively. Since the current flowing through Q1 and Q2 is the same, and Q1 and Q2 are also of the same size and type, VEB1 for Q1 and VEB2 for Q2 can be assumed to be the same, i.e., VEB1 = VEB2 = VEB.
[0106] At this time, VM=VENTH+VEB, VP=VEN+VEB, VM is the inverting terminal voltage of the comparator COMP1, and VP is the non-inverting terminal voltage of the comparator COMP1.
[0107] From the above analysis, we can know that when VP is greater than VM, VEN is also greater than VEHTH, and vice versa.
[0108] COMP1 is a comparator used to compare the voltages of VP and VM. When VP is greater than VM (i.e., VEN is greater than VENTH), VC is at a high level; otherwise, it is at a low level. It should be noted that in different embodiments, the specific location of the comparator COMP1 and the connection method of the non-inverting terminal and the inverting terminal can be set according to different needs. Figure 2 only shows one possibility.
[0109] When VEN is greater than VENH, the switch module outputs a power-on signal to turn on the functional modules of the total circuit. When VEN is less than VENL, the switch module outputs a power-off signal to turn off other modules in the circuit and simultaneously turn off the circuit itself, achieving a technical effect of almost zero shutdown current. When the VEN voltage is between VENL and VENH, the system maintains its previous state. There is a window between VENH and VENL, which can effectively avoid false triggering. In addition, VENH must be greater than VD1+VT1 while leaving a certain margin, with a typical value of VENH>=1.6V; VENL must be less than VD1+VT1 while leaving a certain margin, with a typical value of VENL<=1.2V.
[0110] Since VENL and VENH are both generated by a bandgap reference circuit, their accuracy is relatively high. At the same time, the bias current and type of Q1 and Q2 are also the same, so VEB of Q1 and Q2 can also be considered the same, thereby achieving high-precision enable control voltage.
[0111] Please continue to refer to FIG. 1 . Further, the output submodule 4 includes a charging and discharging unit 42 and an output unit 43 .
[0112] The charging and discharging unit 42 is used to delay the output signal of the enabling voltage comparison submodule 3 from entering the output unit 43 and filter out oscillation of the output signal of the enabling voltage comparison submodule 3 .
[0113] The output unit 43 determines its own output signal based at least on the output signal of the enable voltage comparison submodule 3 .
[0114] Furthermore, the output unit 43 determines its own output signal based on the output signal of the enable voltage comparison submodule 3 and the signal EN of the power on / off enable terminal. This configuration further improves the accuracy of the power on / off module and prevents erroneous actions caused by sudden changes in a single signal.
[0115] Preferably, the output submodule 4 further includes a blocking unit 41, which is used to block the influence of the charging and discharging unit 42 on the internal components of the enable voltage comparison submodule 3 and / or increase the driving capability of the output signal of the enable voltage comparison submodule 3.
[0116] Continuing with FIG2 , the output submodule 4 includes: the seventh enhancement-mode PMOS transistor PM7, the fourth enhancement-mode NMOS transistor NM4, the third depletion-mode NMOS transistor DNM3, the second triode Q2, the first inverter INV1, the second inverter INV2, the third inverter INV3, the charge-discharge resistor R1, the charge-discharge capacitor C1, the SR flip-flop SRFF1, and a power-on reset component (not shown). The first inverter INV1, the second inverter INV2, the third inverter INV3, and the SR flip-flop SRFF1 are powered by VDD (not shown). Q2 and PM7 are common modules of the enable voltage comparison submodule 3 and the output submodule 4.
[0117] The first inverter INV1, the second inverter INV2, and the third inverter INV3 constitute the blocking unit 41. The charge-discharge resistor R1 and the charge-discharge capacitor C1 constitute the charge-discharge unit 42. The seventh enhancement-mode PMOS transistor PM7, the fourth enhancement-mode NMOS transistor NM4, the third depletion-mode NMOS transistor DNM3, the second transistor Q2, the power-on reset component, and the SR flip-flop SRFF1 constitute the output unit 43, wherein the base of the second transistor Q2 is configured as an input terminal of the output unit 43, and the inverting output terminal of the SR flip-flop SRFF1 is configured as an output terminal of the output unit 43.
[0118] The working logic of the SR trigger SRFF1 can be understood based on common knowledge in the art and will not be described in detail here.
[0119] In this embodiment, the output unit 43 utilizes some components of the enable voltage comparison submodule 3 to obtain the signal EN of the power enable end. In other embodiments, an input end for obtaining the signal EN of the power enable end may also be independently provided.
[0120] In other embodiments, the barrier unit 41 may be configured in other forms, or may not be provided if it is confirmed that the barrier unit 41 is not necessary.
[0121] NM4 is an enhancement-mode low-voltage NMOS, and DNM3 is a depletion-mode NMOS. Together, NM3 and DNM3 generate voltage EN2 for subsequent stages, where VEN2 = VEN + VEB2 - VT4. VT4 is the turn-on threshold voltage of NM4. Generally, VEN2 is slightly lower than VEN, with the difference typically being around 0.1 to 0.3V.
[0122] R1 and C1 form a charging circuit that serves as a shutdown delay. The RC time constant can be adjusted to adjust the time from when VEN triggers shutdown to when the circuit of the present invention shuts down. When VEN is lower than VENTH, VC outputs a low level and V3 outputs a high level. C1 is charged for a certain period of time through R1. After the voltage of V4 rises and reaches the trigger threshold of the SR trigger, the S terminal of SRFF1 is high. At the same time, the voltage of EN2 is low at this time, so the output VOFF of the SR trigger SRFF1 is low, controlling PM5 in STAGE1 to conduct, so that PM4 has no current. EN1 drops, V1 outputs a low level, and NM2 does not conduct. Because VENL is less than VD + VT1, NM1 also does not conduct, and the system is completely shut down.
[0123] The power-on reset component is used to prevent the initial state of the SR trigger from being abnormal. Under the influence of the power-on reset component, the initial state of the inverting output terminal of the SR trigger is to output a high level when powered on.
[0124] Please refer to Figure 3, which shows the operating waveforms of an embodiment of the present invention. The top waveform shows the current flowing from VCC into the overall circuit, the middle waveform shows the voltage at the EN pin, and the bottom waveform shows the output signal VCB of the first inverter INV1. It can be assumed that the VCB signal reflects the VOFF signal.
[0125] As shown in Figure 3, when the EN pin voltage VEN is much smaller than VD1+VT1 (0s~0.25s, 1.75s~2s), the VCC current is less than 1nA, and a shutdown current of almost zero can be achieved.
[0126] During the VEN rising phase, at about 1.4V, the internal circuit starts to work, which is manifested as a linear rise in IVCC. However, since VEN has not reached 1.6V, that is, VENH is set, the shutdown signal VCB is high. This signal can be used to control the functional module to shut down / not start up. When VEN reaches 1.6V, VCB becomes low and the shutdown signal is released.
[0127] When VEN is in the falling stage, at about 1.2V, which is the VEHL voltage, VCB appears at a short high level, indicating that the shutdown threshold has been reached. After that, the overall circuit is turned off, and the VCC current IVCC drops rapidly, realizing the shutdown function.
[0128] As can be seen from FIG3 , this embodiment fully meets the design expectations and performs well in both energy consumption and response accuracy.
[0129] In summary, this embodiment provides a power on / off module. The power on / off module includes a power on / off enable terminal, a starter module, and an enable voltage comparison submodule. The starter module determines whether the signal of the power on / off enable terminal meets the power on condition with lower precision and lower energy consumption, and supplies power to or stops supplying power to other modules according to a preset logic. After the enable voltage comparison submodule is powered on, it determines whether the signal of the power on / off enable terminal meets the power on condition with higher precision, and starts or shuts down other modules according to a preset logic. The standby energy consumption of the starter module is less than the minimum energy consumption for the enable voltage comparison submodule to work normally. With such a configuration, the working characteristics of each submodule are reasonably utilized, and both shutdown energy consumption and response accuracy are taken into account, thus solving the problem in the prior art that the two cannot be taken into account at the same time.
[0130] The above description is only a description of the preferred embodiment of the present invention and does not limit the scope of the present invention. Any changes and modifications made by ordinary technicians in the field of the present invention based on the above disclosure are within the scope of protection of the technical solution of the present invention.
Claims
1. A power on / off module, characterized in that: Applied to a total circuit, the total circuit includes the switch module and the functional module, the switch module includes a switch enable terminal, a starter module and an enable voltage comparison submodule; wherein, The starter module is used to obtain external power supply; The starter module determines with a first accuracy whether the signal of the power on / off enable terminal meets a first start-up condition; if the first start-up condition is met, the external power supply is converted into an internal power supply to directly or indirectly drive the enable voltage comparison submodule and the functional module to be powered; if the first start-up condition is not met, the power supply of the enable voltage comparison submodule and the functional module is directly or indirectly cut off; After the enable voltage comparison submodule is powered on, the enable voltage comparison submodule determines with a second accuracy whether the signal of the power on / off enable terminal meets the second power-on condition; if the second power-on condition is met, the control signal is output to drive at least a part of the functional modules to be powered on; if the second power-on condition is not met, the control signal is output to drive at least a part of the functional modules not to be powered on or to be powered off; When the first startup condition is not met, the starter module maintains its own judgment function with the first energy consumption; when the enable voltage comparison submodule is powered on, the enable voltage comparison submodule maintains its own judgment function with the second energy consumption; The first accuracy is lower than the second accuracy, and the first energy consumption is lower than the second energy consumption.
2. The switch module according to claim 1, characterized in that: The power on / off module further comprises an output submodule. When the output submodule is powered, the output submodule obtains the output signal of the enable voltage comparison submodule, and outputs a power on / off signal after eliminating oscillation. The starter module is also used to, if the first startup condition is met, convert the external power supply into an internal power supply to directly or indirectly drive the output submodule to be powered; if the first startup condition is not met, directly or indirectly cut off the power supply of the output submodule.
3. The switch module according to claim 1, characterized in that: The starter module includes a first judgment unit and a power conversion unit; wherein, When connected to the external power source, the power conversion unit has at least the following working states: a non-working state, a semi-working state and a normal working state; in the non-working state, the power conversion unit outputs electric energy at a power not exceeding the first energy consumption; in the semi-working state, the power conversion unit outputs electric energy at a power exceeding the first energy consumption, and the output electric energy does not at least meet the requirements of the first energy consumption. The power requirements and voltage requirements of the functional modules; in the normal working state, the electric energy output by the power conversion unit meets the power requirements and voltage requirements of the total circuit; When no other control logic intervenes, the first judgment unit judges with the first accuracy whether the signal of the power-on / off enable terminal meets the first power-on condition; if it does not meet the first power-on condition, the power conversion unit is driven to switch to the non-working state; if it meets the first power-on condition, the power conversion unit is driven to switch to the normal working state; if the result is other circumstances, the power conversion unit is driven to switch to the semi-working state.
4. The switch module according to claim 3, characterized in that: The starter module further includes a second judgment unit, wherein a power acquisition end of the second judgment unit is connected to an internal power output end of the power conversion unit; when the power conversion unit is operating in the semi-operating state or the normal operating state and the energy supply line between the power conversion unit and the second judgment unit is not disconnected or shielded, the second judgment unit can operate normally; When no other control logic intervenes, the second judgment unit judges whether the signal of the power on / off enable terminal meets the first power on condition; If the first power-on condition is not met, the power conversion unit is driven to switch to the non-working state; if the first power-on condition is met, the power conversion unit is driven to switch to the normal working state; in the case of power failure, the second judgment unit does not hinder the switching of the working state of the power conversion unit; When the first judgment unit drives the power conversion unit to switch to the semi-working state, and the second judgment unit drives the power conversion unit to switch to the normal working state, the power conversion unit switches to the normal working state.
5. The switch module according to claim 4, characterized in that: The starter module further includes a closing unit, the input end of which is connected to the output end of the switch module; When the output end of the on / off module outputs a shutdown signal, the closing unit shields the control effect of the second determination unit on the power conversion unit.
6. The switch module according to claim 1, characterized in that: The enabling voltage comparison submodule includes a reference voltage generating unit and a third judging unit, wherein: When the reference voltage generating unit is powered on, the reference voltage generating unit is used to output a reference voltage with the second precision, and the reference voltage is set based on the second power-on condition; When the third judgment unit is powered on, the third judgment unit directly or indirectly compares the output signal of the reference voltage generating unit and the signal of the power on / off enable terminal with the second accuracy, and when the size relationship changes, the signal output by the third judgment unit changes.
7. The switch module according to claim 6, characterized in that: The reference voltage includes a first reference voltage and a second reference voltage, and the reference voltage generation unit obtains a signal that can indicate whether the overall circuit is currently in a power-on state or a power-off state; When the reference voltage generating unit is powered on, if the main circuit is currently in a power-on state, the reference voltage generating unit outputs the second reference voltage; If the overall circuit is currently in a shutdown state, the reference voltage generating unit outputs the first reference voltage; The first reference voltage is greater than the second reference voltage.
8. The switch module according to claim 2, characterized in that: The output submodule includes a charge and discharge unit and an output unit; wherein, The charging and discharging unit is used to delay the output signal of the enabling voltage comparison submodule from entering the output unit, and filter out the oscillation of the output signal of the enabling voltage comparison submodule; The output unit determines its own output signal based at least on the output signal of the enable voltage comparison submodule.
9. The power on / off module according to claim 8, characterized in that: The output unit determines its own output signal based on the output signal of the enable voltage comparison submodule and the signal of the power on / off enable terminal.
10. The switch module according to claim 8, characterized in that: The output submodule further includes a blocking unit, which is used to block the influence of the charging and discharging unit on the internal components of the enabling voltage comparison submodule and / or to increase the driving capability of the output signal of the enabling voltage comparison submodule.
11. The switch module according to claim 4, characterized in that: The first judgment unit includes a first diode, a first voltage clamping circuit and a first enhancement NMOS tube; the power conversion unit includes a first enhancement PMOS tube, a second enhancement PMOS tube, a third enhancement PMOS tube, a first depletion NMOS tube, a second depletion NMOS tube, a second voltage clamping circuit and a third enhancement NMOS tube.
12. The power on / off module according to claim 11, characterized in that: The source of the third enhancement mode NMOS tube is configured as the internal power output terminal.
13. The switch module according to claim 5, characterized in that: The second judgment unit includes a second enhancement mode NMOS tube, a fourth enhancement mode PMOS tube, a second diode, a third voltage clamping circuit and a Schmitt trigger; the shutdown unit includes a fifth enhancement mode PMOS tube.
14. The switch module according to claim 10, characterized in that: The blocking unit includes a first inverter, a second inverter and a third inverter; the charging and discharging unit includes a charging and discharging resistor and a charging and discharging capacitor; the output unit includes a seventh enhancement-type PMOS tube, a fourth enhancement-type NMOS tube, a third depletion-type NMOS tube, a second triode, a power-on reset component and an SR trigger.
15. The switch module according to claim 14, characterized in that: The base of the second transistor is configured as an input terminal of the output unit, and the inverting output terminal of the SR trigger is configured as an output terminal of the output unit.
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