Semiconductor process device and pulse-based plasma adjustment method therefor

Abstract

A semiconductor process device and a pulse-based plasma adjustment method therefor, which belong to semiconductor process technology. The pulse-based plasma adjustment method comprises the following steps: setting a first pulse, so as to control the synchronous turning on and off of a high-frequency radio-frequency power supply and a low-frequency radio-frequency power supply by means of the first pulse; setting a second pulse, so as to sequentially form a plurality of different power control periods within each radio-frequency period of the low-frequency radio-frequency power supply by means of the second pulse; and in the different power control periods, adjusting the power amplitude of the high-frequency radio-frequency power supply to different power values, so as to adjust the plasma of a semiconductor process device. By means of the present technical solution, in each radio-frequency period of a low-frequency radio-frequency power supply, different pulse modes can be formed by means of changing the power amplitudes of a high-frequency radio-frequency power supply in different stages, so as to meet different etching requirements of products.

Description

Semiconductor process equipment and pulsed plasma adjustment method thereof Technical Field

[0001] The present application belongs to the field of semiconductor process technology, and in particular relates to a semiconductor process equipment and a pulsed plasma regulation method thereof. Background Art

[0002] According to Moore's Law, the number of transistors on a chip of the same area doubles every 18-24 months. As chip processing becomes more sophisticated, the chip etching line width continues to decrease, and the problem of plasma induced damage (PID) becomes more and more prominent. In order to achieve separate control of plasma density and energy, two RF power supplies of different frequencies are usually used in capacitively coupled plasma (CCP) etching, that is, a high-frequency RF power supply is used to control the plasma density, and a low-frequency RF power supply is used to control the plasma energy. However, since these RF power supplies are all traditional continuous wave (CW) RF sources, they will cause large plasma-induced damage to the surface of the etched material during etching, which cannot meet the current etching process requirements. For this reason, synchronized pulse technology was invented. Subsequently, in order to improve the plasma process window of synchronized pulse technology, level-level synchronized pulse technology was invented based on synchronized pulse technology.

[0003] However, both synchronized pulse technology and level-level synchronized pulse technology can adjust plasma parameters by changing the pulse frequency and duty cycle to reduce plasma-induced damage. However, since the power variation period of their high-frequency RF power supplies is based on the period of the synchronized pulse, and the pulse period of the synchronized pulse is generally equivalent to dozens or even thousands of RF cycles, the power variation period of the high-frequency RF power supplies in these technologies will be dozens or even thousands of RF cycles. This will further limit the power variation methods of the high-frequency RF power supplies and make them unable to meet the more extensive etching requirements of products.

[0004] Summary of the Invention

[0005] The embodiments of the present application provide a semiconductor process equipment and a pulse-regulated plasma method thereof, aiming to solve the technical problem that the power variation cycle of the high-frequency RF power supply in the existing pulse-regulated plasma method is dozens or even thousands of RF cycles, which limits the power variation mode of the high-frequency RF power supply and makes it impossible to meet more etching requirements of the product.

[0006] In a first aspect, an embodiment of the present application provides a method for pulse-regulated plasma in a semiconductor process device, wherein the semiconductor process device includes a high-frequency radio frequency power supply and a low-frequency radio frequency power supply for plasma etching, and the pulse-regulated plasma method includes the following steps:

[0007] Setting a first pulse to control the high-frequency radio frequency power supply and the low-frequency radio frequency power supply to be synchronously switched on and off by the first pulse;

[0008] Setting a second pulse so as to sequentially form a plurality of different power control periods in each radio frequency cycle of the low-frequency radio frequency power supply through the second pulse;

[0009] During different power control periods, the power amplitude of the high-frequency radio frequency power supply is adjusted to different power values ​​to regulate the plasma of the semiconductor process equipment.

[0010] In some embodiments, the frequency range of the high-frequency RF power source is greater than 40 MHz, and the frequency range of the low-frequency RF power source is 200 kHz to 3.2 MHz.

[0011] In some embodiments, the multiple different power control periods are sequentially a first power control period, a second power control period, a third power control period, and a fourth power control period;

[0012] The first power control period corresponds to the period when the power of the low-frequency RF power source changes from zero to a maximum positive voltage;

[0013] The second power control period corresponds to the period when the power of the low-frequency RF power source changes from a maximum positive voltage to a zero value;

[0014] The third power control period corresponds to the period when the power of the low-frequency RF power source changes from zero to a maximum negative voltage;

[0015] The fourth power control period corresponds to a period when the power of the low-frequency RF power source changes from a negative voltage maximum value to a zero value.

[0016] In some embodiments, the duration of the first power control period and the duration of the second power control period are both less than 1 / 4 of the RF cycle of the low-frequency RF power supply, and the duration of the first power control period is less than the duration of the second power control period; and / or,

[0017] The sum of the duration of the third power control period and the duration of the fourth power control period is greater than 1 / 2 of the RF cycle of the low-frequency RF power supply, and the duration of the third power control period is less than the duration of the fourth power control period.

[0018] In some embodiments, the step of adjusting the power amplitude of the high-frequency RF power supply to different power values ​​during different power control periods includes:

[0019] During the first power control period, the power amplitude of the high-frequency radio frequency power supply is adjusted to a first power value;

[0020] During the second power control period, the power amplitude of the high-frequency radio frequency power supply is adjusted to a second power value;

[0021] During the third power control period, the power amplitude of the high-frequency radio frequency power supply is adjusted to a third power value;

[0022] During the fourth power control period, the power amplitude of the high-frequency radio frequency power supply is adjusted to a fourth power value.

[0023] In some embodiments, the first power value is equal to the initial power value of the high-frequency RF power supply, the second power value, the third power value, and the fourth power value are all less than the initial power value of the high-frequency RF power supply, and the second power value is the smallest among the second power value, the third power value, and the fourth power value.

[0024] In some embodiments, the first power value and the second power value are both located in a first power value interval, the third power value and the fourth power value are both located in a second power value interval, and the first power value interval is smaller than the second power value interval.

[0025] In some embodiments, the first power value and the second power value are both located in a third power value interval, the third power value and the fourth power value are both located in a fourth power value interval, and the third power value interval is larger than the fourth power value interval.

[0026] In a second aspect, an embodiment of the present application provides a semiconductor process equipment, comprising a radio frequency device and a process chamber, wherein the process chamber has a first electrode and a second electrode placed opposite to each other, the first electrode is grounded, the radio frequency device is connected to the second electrode, and the radio frequency device performs the above-mentioned pulse-regulated plasma method when working.

[0027] In some embodiments, the radio frequency device includes a high-frequency radio frequency power supply, a low-frequency radio frequency power supply, a low-pass filter, a clock signal generator, a pulse controller, and a synchronization signal generator;

[0028] The low-frequency radio frequency power supply and the high-frequency radio frequency power supply are respectively connected to the second electrode;

[0029] The clock signal device is connected to the low-frequency RF power supply and the synchronization signal generator respectively, the synchronization signal generator is connected to the pulse controller, and the pulse controller is connected to the high-frequency RF power supply and the low-frequency RF power supply respectively.

[0030] In the present application, when the high-frequency RF power supply and the low-frequency RF power supply of the semiconductor process equipment perform plasma etching, on the one hand, a first pulse is set to control the high-frequency RF power supply and the low-frequency RF power supply to be synchronously turned on and off (including synchronous opening and synchronous closing) through the first pulse. This process is the same as the existing synchronous pulse technology. On the other hand, a second pulse is set to form a plurality of different power control periods in each RF cycle of the low-frequency RF power supply through the second pulse, and the power amplitude of the high-frequency RF power supply is adjusted to different power values ​​in different power control periods to regulate the plasma of the semiconductor process equipment. In this way, the present technical solution can focus on the plasma state change within a RF cycle of the low-frequency RF power supply, that is, the power amplitude of the high-frequency RF power supply (i.e., the amplitude of the incident power) is set according to the multiple different states of the plasma within a RF cycle of the low-frequency RF power supply, so as to form different pulse modes by changing the power amplitude of the high-frequency RF power supply at different stages to meet the different etching requirements of the product. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The following detailed description of the specific embodiments of the present application in conjunction with the accompanying drawings will make the technical solutions and beneficial effects of the present application apparent.

[0032] FIG1 is a first principle diagram of a related art synchronous pulse technology.

[0033] FIG. 2 is a second schematic diagram of a related art synchronous pulse technology.

[0034] FIG3 is a flowchart of a pulsed plasma regulation method for semiconductor process equipment provided in an embodiment of the present application.

[0035] FIG. 4 is a first principle diagram of the pulsed plasma method shown in FIG. 1 .

[0036] FIG. 5 is a second schematic diagram of the pulsed plasma method shown in FIG. 1 .

[0037] FIG. 6 is a third schematic diagram of the pulsed plasma method shown in FIG. 1 .

[0038] FIG7 is a schematic structural diagram of a semiconductor process equipment provided in an embodiment of the present application. DETAILED DESCRIPTION

[0039] The following, in conjunction with the accompanying drawings, clearly and completely describes the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of this application. In the absence of conflict, the following embodiments and their technical features can be combined with each other.

[0040] According to Moore's Law, the number of transistors on a chip of the same area doubles every 18-24 months. As chip processing becomes more sophisticated, the chip etching line width continues to decrease, and the problem of plasma induced damage (PID) becomes more and more prominent. In order to achieve separate control of plasma density and energy, two RF power supplies of different frequencies are usually used in capacitively coupled plasma (CCP) etching, that is, a high-frequency RF power supply is used to control the plasma density, and a low-frequency RF power supply is used to control the plasma energy. However, since these RF power supplies are all traditional continuous wave (CW) RF sources, they will cause large plasma-induced damage to the surface of the etched material during etching, which cannot meet the current etching process requirements. For this reason, synchronized pulse technology was invented. Subsequently, in order to improve the plasma process window of synchronized pulse technology, level-level synchronized pulse technology was invented based on synchronized pulse technology.

[0041] Related technology 1: Synchronous pulse technology is mainly reflected in the addition of a pulse synchronization signal between two RF power supplies of different frequencies, which provides an additional control device for the on / off of the RF power supply, thereby expanding the control window of the plasma parameters and improving the flexibility of process control. The schematic diagram of the synchronous pulse plasma action is shown in Figure 1. By changing the pulse frequency and duty cycle, the purpose of adjusting the plasma parameters (such as plasma density) can be achieved. This is because, during the etching process, the positive ions that play an etching role will adhere to the bottom of the groove. Because like charges repel each other, the positive ions that subsequently enter the groove will be repelled by the accumulated positive charge at the bottom of the groove, and the movement path will change, resulting in an abnormal etching profile. Synchronous pulse technology uses the on / off of the pulse to reduce the ignition time. At the same time, during the pulse off period, the charge accumulated at the bottom of the groove can be effectively neutralized to improve the etching morphology. In addition, it also avoids damage to the wafer caused by long-term ion bombardment. However, since the existing synchronized pulse technology only achieves the purpose of plasma parameter adjustment by controlling the on and off of the RF power supply, and the pulse period is generally equivalent to dozens or even thousands of RF cycles, this will make the power change period of the high-frequency RF power supply in the synchronized pulse technology dozens or even thousands of RF cycles, which in turn makes the power change method of the high-frequency RF power supply limited, resulting in the inability to meet more etching requirements of the product.

[0042] Related Technology 2: The invention of Level-Level Synchronous Pulse Technology is based on synchronous pulse technology. It only reduces the incident power of the high-frequency RF power supply during the low-level pulse period, but the power still exists, so that the plasma will not be extinguished during the pulse off period, thereby expanding the usable process window. At the same time, during the pulse off period, the movement of free radicals is enhanced, and they can accumulate on the sidewalls of the etched grooves to form a protective layer, effectively protecting the groove sidewalls and further improving the etching morphology. However, the power of the high-frequency RF power supply of Level-Level Synchronous Pulse Technology is also tens or even thousands of RF cycles. Therefore, there is still a problem that the power variation of the high-frequency RF power supply is limited, resulting in an inability to meet the product's more extensive etching requirements.

[0043] Based on this, it is necessary to provide a new solution for the pulse-regulated plasma method to solve the technical problem that the power change cycle of the high-frequency RF power supply in the existing pulse-regulated plasma method is dozens or even thousands of RF cycles, which makes the power change mode of the high-frequency RF power supply limited, resulting in the inability to meet more etching requirements of the product.

[0044] In one embodiment, as shown in FIG3 , the present invention provides a method for pulse-regulated plasma in a semiconductor process equipment. The semiconductor process equipment may include a high-frequency RF power supply and a low-frequency RF power supply for plasma etching. The method includes the following steps:

[0045] Step S110: setting a first pulse to control the high-frequency RF power supply and the low-frequency RF power supply to be synchronously switched on and off by the first pulse.

[0046] It can be understood that the pulse-regulated plasma method of the embodiment of the present application is a further improvement based on the existing synchronous pulse technology. Therefore, as shown in Figure 4, it sets a first pulse that is the same as the synchronous pulse of the existing synchronous pulse technology, so as to control the high-frequency RF power supply and the low-frequency RF power supply to be synchronously turned on and off by the first pulse, that is, when the first pulse switches from a low level to a high level, the high-frequency RF power supply and the low-frequency RF power supply are controlled to be synchronously turned on, and when the first pulse switches from a high level to a low level, the high-frequency RF power supply and the low-frequency RF power supply are controlled to be synchronously turned off, so as to utilize the on and off of the first pulse to reduce the ignition time. At the same time, during the off period of the first pulse, the charge accumulated at the bottom of the groove can be effectively neutralized to improve the etching morphology. In addition, it also avoids damage to the chip caused by long-term ion bombardment.

[0047] Step S120: setting a second pulse, so as to sequentially form a plurality of different power control periods in each radio frequency cycle of the low-frequency radio frequency power supply through the second pulse.

[0048] It can be understood that, as shown in Figure 4, the second pulse is a pulse added to the pulse-regulated plasma method of an embodiment of the present application on the basis of the existing synchronous pulse technology, so that while the first pulse controls the high-frequency RF power supply and the low-frequency RF power supply to be synchronously turned on and off, a plurality of different power control periods are formed in sequence by the second pulse within each RF cycle of the low-frequency RF power supply, that is, one pulse cycle of the second pulse is equal to one RF cycle of the low-frequency RF power supply, and the second pulse can undergo four level changes of different durations within one pulse cycle to form a plurality of different power control periods accordingly.

[0049] Step S130: During different power control periods, the power amplitude of the high-frequency radio frequency power supply is adjusted to different power values ​​to regulate the plasma of the semiconductor process equipment.

[0050] It can be understood that after the above-mentioned method steps are used to sequentially form multiple different power control periods in each RF cycle of the low-frequency RF power supply through the second pulse, that is, after the second pulse can undergo four level changes of different durations within one pulse cycle, each level change of the second pulse can be used as a response basis for changing the power amplitude of the high-frequency RF power supply (that is, the amplitude of the incident power), and the power amplitude of the high-frequency RF power supply can be adjusted to different power values ​​in different power control periods, thereby regulating the plasma of the semiconductor process equipment, such as adjusting the plasma density.

[0051] In this way, in the embodiment of the present application, the focus can be on the changes in the plasma state within one RF cycle of the low-frequency RF power supply, that is, the power amplitude of the high-frequency RF power supply (that is, the amplitude of the incident power) is set according to the various different states of the plasma within one RF cycle of the low-frequency RF power supply, so as to form different pulse modes by changing the power amplitude of the high-frequency RF power supply at different stages to meet the different etching requirements of the product.

[0052] In some examples, as shown in FIG4 , the multiple different power control periods are, in order, a first power control period A, a second power control period B, a third power control period C, and a fourth power control period D. The first power control period A corresponds to a period when the power of the low-frequency RF power source changes from zero to a maximum positive voltage. The second power control period B corresponds to a period when the power of the low-frequency RF power source changes from a maximum positive voltage to zero. The third power control period C corresponds to a period when the power of the low-frequency RF power source changes from zero to a maximum negative voltage. The fourth power control period D corresponds to a period when the power of the low-frequency RF power source changes from a maximum negative voltage to zero.

[0053] It is understandable that in existing synchronized pulse technology, as the incident power of the low-frequency RF power source changes, the plasma has roughly four states within one RF cycle of the low-frequency RF power source, as shown in Figure 2. The first stage is the sheath collapse stage (corresponding to the first power control period A in this example). In this stage, the chip voltage is positive and the voltage is large. The electron mass is small, so it is easily accelerated by the electric field. The electrons near the chip are accelerated toward the chip. At this time, the electron current flowing into the electrode is large, and the plasma impedance is minimum in this stage. The second stage is the mixing stage (corresponding to the second power control period B in this example). At this time, the chip voltage is still positive, but due to the collision and annihilation of electrons near the chip with the positively charged chip, only ions exist around the chip. The ion mass is large and difficult to be accelerated by the electric field. At this time, the current around the chip is mainly ion current, which is small. Therefore, the plasma impedance is maximum at this time. In the process of transitioning from the first stage to the second stage, the plasma impedance changes dramatically, and it is difficult for the matcher to quickly complete the matching in a short time. Therefore, the reflected power of the high-frequency RF power source will rise rapidly during the transition process. The third stage is the sheath expansion phase (corresponding to the third power control period C in this example). During this phase, the wafer voltage is negative, and positive ions are attracted to the wafer and move toward it. Sheath edge electrons are accelerated toward the upper electrode. Because ion mobility is much lower than electron mobility, the ion current is low, and the plasma impedance is relatively low. The fourth stage is the sheath contraction phase (corresponding to the fourth power control period D in this example). Due to the positive ions moving toward the wafer surface in the third phase, a certain amount of positive charge accumulates on the wafer surface. At this point, sheath edge electrons are attracted to the wafer by the positive ions, resulting in a relatively high plasma impedance.

[0054] It can be seen that the first power control period A, the second power control period B, the third power control period C and the fourth power control period D in this example can be well fitted with the duration of the four plasma states within one RF cycle of the low-frequency RF power supply, so as to better make corresponding changes to the power amplitude of the high-frequency RF power supply to better meet the corresponding etching requirements of the product.

[0055] At the same time, based on the above description and Figure 2, it can be seen that the plasma impedance changes greatly within one RF cycle of the low-frequency RF power supply, and it is difficult for the matcher to complete multiple matching within one RF cycle. Therefore, during the process of the plasma transitioning between the four states, the reflected power of the high-frequency RF power supply increases accordingly. That is, the existing synchronous pulse technology cannot solve the problem of excessive reflected power caused by intermodulation distortion (IMD) during the etching process. The so-called intermodulation distortion refers to the interaction of various spectral components in the nonlinear impedance when multiple frequency signals are input, generating new spectral components. Assuming the high-frequency frequency is f h , the low frequency is f l , then the frequency of the new spectral component generated by IMD is mf h +nfl , where m is a positive integer and n is an integer. Since the frequency of the new spectral component often exceeds the operating frequency range of the matcher, the matcher cannot perform impedance matching on the frequency of the new spectral component generated by IMD, which results in a large reflected power of the new spectral component (while the frequency of the initial spectrum can be recognized and impedance matched by the matcher, so the reflected power of the frequency of the initial spectrum is very small). High reflected power will not only affect the power feeding efficiency, but in severe cases may exceed the reflected power upper limit of the high-frequency RF power supply, affecting the high-frequency RF power supply. Therefore, this example can also better make corresponding changes to the power amplitude of the high-frequency RF power supply by setting the first power control period A, the second power control period B, the third power control period C and the fourth power control period D, in accordance with the duration of the four states of the plasma within one RF cycle of the low-frequency RF power supply, so as to solve the problem of high reflected power caused by IMD.

[0056] In some examples, the frequency range of the high-frequency RF power supply is greater than 40 MHz, and the frequency range of the low-frequency RF power supply is 200 kHz to 3.2 MHz. This is because the embodiment of the present application needs to complete multiple changes in the power amplitude of the high-frequency RF power supply within each RF cycle of the low-frequency RF power supply. Therefore, the frequency of the high-frequency RF power supply and the frequency of the low-frequency RF power supply need to be selected in a suitable range to ensure that the high-frequency RF power supply can smoothly complete multiple changes in the power amplitude within each RF cycle of the low-frequency RF power supply. At the same time, when the frequency of the high-frequency RF power supply and the frequency of the low-frequency RF power supply are close, such as 40.68 MHz and 13.56 MHz, the new spectrum generated by intermodulation distortion (IMD) cannot pass through the filter because it is too different from the frequency of the initial high-frequency RF power supply. Therefore, there is no need to consider the influence of the reflected power caused by IMD.

[0057] Furthermore, the duration of the first power control period A and the duration of the second power control period B are both less than 1 / 4 of the RF cycle of the low-frequency RF power source, and the duration of the first power control period A is shorter than the duration of the second power control period B. And / or, the sum of the duration of the third power control period C and the duration of the fourth power control period D is both greater than 1 / 2 of the RF cycle of the low-frequency RF power source, and the duration of the third power control period C is shorter than the duration of the fourth power control period D. This allows for better alignment with the durations of the four plasma states within a low-frequency RF cycle, enabling better adjustments to the power amplitude of the high-frequency RF power source to better meet the etching requirements of the product.

[0058] In some examples, the multiple different power control periods are, in order, a first power control period A, a second power control period B, a third power control period C, and a fourth power control period D. The specific process of executing the above method step of "adjusting the power amplitude of the high-frequency RF power supply to different power values ​​in different power control periods" is as follows: in the first power control period A, the power amplitude of the high-frequency RF power supply is adjusted to a first power value. In the second power control period B, the power amplitude of the high-frequency RF power supply is adjusted to a second power value. In the third power control period C, the power amplitude of the high-frequency RF power supply is adjusted to a third power value. In the fourth power control period D, the power amplitude of the high-frequency RF power supply is adjusted to a fourth power value.

[0059] In this way, different pulse modes can be formed by reasonably adjusting the value ranges of the first power value, the second power value, the third power value and the fourth power value to meet different etching requirements of the product.

[0060] In some examples, as shown in FIG4 , the first power value can be equal to the initial power value of the high-frequency RF power source, and the second, third, and fourth power values ​​can all be less than the initial power value of the high-frequency RF power source, with the second power value being the smallest of the second, third, and fourth power values. In this case, a first pulse mode can be formed. In the first pulse mode, during the first power control period A, where the plasma impedance is lowest, the power amplitude of the high-frequency RF power source (i.e., the amplitude of the incident power) remains the same as in the prior art (i.e., both are at the initial power value). During the second power control period B, where the plasma impedance is highest, the power amplitude of the high-frequency RF power source (i.e., the amplitude of the incident power) is significantly reduced to a minimum value. During the third and fourth power control periods C and D, where the plasma impedance is lower than during the first power control period A, the power amplitude of the high-frequency RF power source (i.e., the amplitude of the incident power) is also significantly reduced relative to the first power control period A. In other words, the third and fourth power values ​​are both less than the initial power value of the high-frequency RF power source (and both are higher than the second power value). Preferably, the fourth power value is less than the third power value, and the third power value is less than half the initial power value of the high-frequency RF power source. This ensures that the power amplitude (i.e., the amplitude of the incident power) of the high-frequency RF power source is significantly reduced during the third power control period C and the fourth power control period D relative to the first power control period A. Because semiconductor process equipment performs plasma etching with varying gas, pressure, and RF power within the process chamber, as well as varying plasma states and impedance, the specific values ​​of the second, third, and fourth power values ​​can be determined based on the current gas, pressure, and RF power within the process chamber, provided that the aforementioned conditions are met. In this way, the first pulse mode of this example can reduce the reflected power of the high-frequency RF power supply in the second power control period B, the third power control period C and the fourth power control period D (i.e., the amplitude of the incident power) by respectively reducing the power amplitude of the second power control period B, the third power control period C and the fourth power control period D, thereby significantly reducing the reflected power caused by IMD, reducing the overall reflected power, increasing the power feeding efficiency, and reducing the risk of damage to the RF power supply due to reflected power, so as to meet the product's higher etching requirements for solving the problem of excessive reflected power caused by IMD.

[0061] In some examples, as shown in FIG5 , the first power value and the second power value are both within a first power value interval, and the third power value and the fourth power value are both within a second power value interval, where the first power value interval is smaller than the second power value interval. Furthermore, the first power value interval may specifically be a power value interval that is less than 1 / 4 of the initial power value of the high-frequency RF power source. In this case, the first power value and the second power value may be equal and both are less than 1 / 4 of the initial power value of the high-frequency RF power source. The second power value interval may specifically be a power value interval where the difference from the initial power value of the high-frequency RF power source is less than a preset threshold. In this case, the third power value and the fourth power value may be equal and both are equal to the initial power value of the high-frequency RF power source. In this way, a second pulse mode can be formed. In the second pulse mode, the power amplitude of the first power control period A and the second power control period B (i.e., the amplitude of the incident power) is reduced relative to the initial power value, and the power amplitude of the third power control period C and the fourth power control period D (i.e., the amplitude of the incident power) remains unchanged at the initial power value, that is, when the chip surface is negatively charged, the power values ​​of the third power control period C and the fourth power control period D are greatly increased relative to the first power control period A and the fourth power control period B, and the positive ions move toward the chip surface. At this time, the ion energy is larger and the electron energy is smaller, which can effectively increase the plasma etching rate, and can meet the etching requirements of the product that is insensitive to ion damage and pursues etching rate.

[0062] In some examples, as shown in FIG6 , the first power value and the second power value are equal and both fall within a third power value interval, and the third power value and the fourth power value are both within a fourth power value interval, with the third power value interval being greater than the fourth power value interval. Furthermore, the third power value interval may specifically be a power value interval in which the difference from the initial power value of the high-frequency RF power source is less than a preset threshold. In this case, the first power value and the second power value may be equal and both equal to the initial power value of the high-frequency RF power source. The fourth power value interval may specifically be a power value interval that is less than 1 / 4 of the initial power value of the high-frequency RF power source. In this case, the third power value and the fourth power value may be equal and both less than 1 / 4 of the initial power value of the high-frequency RF power source. In this way, a third pulse mode can be formed. Under the third pulse mode, the power amplitudes of the first power control period A and the second power control period B (i.e., the amplitude of the incident power) maintain the initial power value unchanged, and the power amplitudes of the third power control period C and the fourth power control period D (i.e., the amplitude of the incident power) are reduced relative to the initial power value, that is, when the chip surface is positively charged, the power values ​​of the first power control period A and the second power control period B are greatly increased relative to the third power control period C and the fourth power control period D. At this time, polymer deposition and the offset of the accumulated positive charges in the grooves are carried out. Compared with the existing technology, the etching profile can be greatly improved (etching profile refers to the shape of the etching groove. During etching, especially deep hole etching, we hope that the etching groove wall is deep and straight, and long-term ignition will cause excessive accumulation of positive charge at the bottom of the groove. Due to the repulsion of like charges, the motion trajectory of the positive ions entering the groove later will be offset. The groove wall will also become curved. Improvement means that the accumulated charge is offset, and the ions can reach the bottom of the groove straightly for etching. This is the so-called improved etching profile), which can meet the etching needs of products with high requirements for etching profile and no pursuit of etching rate.

[0063] In addition, the examples of this application can even adopt different pulse modes in different process stages of the product, so as to present different process effects through the combination of several pulse modes, thereby meeting more etching requirements of the product. For example: when the reflected power will not damage the RF power supply and the etching profile and etching rate are not extremely pursued, the second pulse mode and the third pulse mode can be combined, and the second pulse mode and the third pulse mode can be interspersed, such as three second pulse modes plus three third pulse modes are used in a cycle, which can improve the etching profile while maintaining a certain etching rate. However, it is not recommended to use the first pulse mode at the same time as the second pulse mode or the third pulse mode.

[0064] In one embodiment, as shown in Figure 7, the embodiment of the present application also provides a semiconductor process equipment 1, which includes a radio frequency device 100 and a process chamber 200. The process chamber 200 has a first electrode 210 and a second electrode 220 placed opposite to each other. The first electrode 210 is grounded, and the radio frequency device 100 is connected to the second electrode 220. When the radio frequency device 100 is working, the pulse-regulated plasma method in the above embodiment is performed, which will not be repeated here.

[0065] It is understood that the RF device 100 may specifically include a high-frequency RF power supply 101, a low-frequency RF power supply 104, a clock signal generator 108, a pulse controller 109, and a synchronization signal generator 110. The low-frequency RF power supply 104 and the high-frequency RF power supply 101 are connected to the second electrode 220. The clock signal generator 108 is respectively connected to the low-frequency RF power supply 104 (specifically, its clock output terminal) and the synchronization signal generator 110. The synchronization signal generator 110 is connected to the pulse controller 109. The pulse controller 109 is respectively connected to the high-frequency RF power supply 101 and the low-frequency RF power supply 104. Further, the RF device 100 may also specifically include a high-pass filter 102, a high-frequency matcher 103, a low-pass filter 105, a low-frequency matcher 106, and a directional coupler 107. In this case, the low-frequency RF power supply 104 may be connected to the second electrode 220 in sequence through the low-frequency matcher 106 and the low-pass filter 105. The high-frequency RF power source 101 may be connected to the second electrode 220 through the directional coupler 107 , the high-frequency matcher 103 and the high-pass filter 102 in sequence, and the directional coupler 107 is further connected to the synchronization signal generator 110 .

[0066] As can be seen, the RF device 100 of the embodiment of the present application connects a directional coupler 107 between the synchronization signal generator 110 and the high-frequency RF power supply 101, which can prevent the large reflected power generated by IMD on the high-frequency side from affecting the pulse signal of the synchronization signal generator 110. At the same time, the clock signal generator 108 of the present application is connected to the clock output terminal of the low-frequency RF power supply 104 to set more than four power types for the high-frequency RF power supply 101 based on the phase of the low-frequency RF power supply 104. The synchronization signal generator 110 is connected to the pulse controller 109 to generate the corresponding synchronization pulse signal. The pulse controller 109 is respectively connected to the high-frequency RF power supply 101 (specifically, to its pulse input terminal) and the low-frequency RF power supply 104 (specifically, to its pulse input terminal), and generates two pulse signals. Among them, the first pulse signal has the same function as that in the synchronous pulse technology, and is used to control the synchronous on and off of the high-frequency RF power supply 101 and the low-frequency RF power supply 104. The second pulse signal realizes the control of the change of the power amplitude (i.e., the amplitude of the incident power) of the high-frequency RF power supply 101 in each RF cycle of the low-frequency RF power supply 104.

[0067] In this way, in the embodiment of the present application, the semiconductor process equipment 1 can focus on the changes in the plasma state within one RF cycle of the low-frequency RF power supply 104, that is, the power amplitude of the high-frequency RF power supply 101 (that is, the amplitude of the incident power) is set according to the various different states of the plasma within one RF cycle of the low-frequency RF power supply 104, so as to form different pulse modes by changing the power amplitude of the high-frequency RF power supply 101 at different stages to cope with different etching requirements of the product, and even different pulse modes can be used in different process stages of the product to present different process effects through the combination of several pulse modes, thereby meeting more etching requirements of the product.

[0068] Although the present application has been shown and described with respect to one or more implementations, equivalent variations and modifications will occur to those skilled in the art based on reading and understanding this specification and the accompanying drawings. The present application includes all such modifications and variations and is limited only by the scope of the appended claims. In particular, with respect to the various functions performed by the above-mentioned components, the terms used to describe such components are intended to correspond to any component (unless otherwise indicated) that performs the specified function of the component (e.g., it is functionally equivalent), even if it is not structurally equivalent to the disclosed structure that performs the function in the exemplary implementation of this specification shown herein.

[0069] That is, the above description is merely an embodiment of the present application and does not limit the patent scope of the present application. Any equivalent structural or equivalent process transformations made using the contents of the description and drawings of this application, such as the mutual combination of technical features between the various embodiments, or direct or indirect application in other related technical fields, are also included in the patent protection scope of the present application.

[0070] In addition, in the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. In addition, for structural elements with the same or similar characteristics, the present application may use the same or different reference numerals to identify them. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more features. In the description of the present application, "multiple" means two or more, unless otherwise clearly and specifically defined.

[0071] In this application, the word "exemplary" is used to mean "serving as an example, illustration or description". Any embodiment described in this application as "exemplary" is not necessarily to be construed as being more preferred or more advantageous than other embodiments. The above description is provided to enable any person skilled in the art to implement and use the present application. In the above description, various details are listed for the purpose of explanation. It should be understood that a person of ordinary skill in the art can recognize that the present application can be implemented without using these specific details. In other embodiments, well-known structures and processes will not be elaborated in detail to avoid obscuring the description of the present application with unnecessary details. Therefore, the present application is not intended to be limited to the embodiments shown, but is consistent with the widest scope consistent with the principles and features disclosed in this application.

Claims

1. A pulsed plasma method for semiconductor process equipment, wherein the semiconductor process equipment comprises a high-frequency radio frequency power supply and a low-frequency radio frequency power supply for plasma etching, characterized in that: The pulsed plasma method comprises the following steps: Setting a first pulse to control the high-frequency RF power source and the low-frequency RF power source to be synchronously switched on and off by the first pulse; Setting a second pulse so as to sequentially form a plurality of different power control periods in each radio frequency cycle of the low-frequency radio frequency power source through the second pulse; In different power control periods, the power amplitude of the high-frequency radio frequency power supply is adjusted to different power values ​​to regulate the plasma of the semiconductor process equipment.

2. The pulsed plasma method according to claim 1, characterized in that: The frequency range of the high-frequency radio frequency power supply is greater than 40 MHz, and the frequency range of the low-frequency radio frequency power supply is 200 kHz to 3.2 MHz.

3. The pulsed plasma method according to claim 2, characterized in that: The multiple different power control periods are sequentially a first power control period, a second power control period, a third power control period and a fourth power control period; The first power control period corresponds to the period when the power of the low-frequency RF power source changes from zero value to the maximum positive voltage; The second power control period corresponds to the period when the power of the low-frequency RF power source changes from a maximum positive voltage value to a zero value; The third power control period corresponds to the period when the power of the low-frequency RF power source changes from zero value to the maximum negative voltage; The fourth power control period corresponds to the period when the power of the low-frequency RF power source changes from a negative voltage maximum value to a zero value.

4. The pulsed plasma method according to claim 3, characterized in that: The duration of the first power control period and the duration of the second power control period are both less than 1 / 4 of the RF cycle of the low-frequency RF power supply, and the duration of the first power control period is less than the duration of the second power control period; and / or, The sum of the duration of the third power control period and the duration of the fourth power control period is greater than 1 / 2 of the RF cycle of the low-frequency RF power supply, and the duration of the third power control period is less than the duration of the fourth power control period.

5. The pulsed plasma method according to claim 3, characterized in that: The step of adjusting the power amplitude of the high-frequency radio frequency power supply to different power values ​​during different power control periods includes: During the first power control period, adjusting the power amplitude of the high-frequency radio frequency power supply to a first power value; During the second power control period, the power amplitude of the high-frequency radio frequency power supply is adjusted to a second power value; During the third power control period, the power amplitude of the high-frequency radio frequency power supply is adjusted to a third power value; In the fourth power control period, the power amplitude of the high-frequency radio frequency power supply is adjusted to a fourth power value.

6. The pulsed plasma method according to claim 5, characterized in that: The first power value is equal to the initial power value of the high-frequency RF power supply, the second power value, the third power value and the fourth power value are all less than the initial power value of the high-frequency RF power supply, and the second power value is the smallest among the second power value, the third power value and the fourth power value.

7. The pulsed plasma method according to claim 5, characterized in that: The first power value and the second power value are both located in a first power value interval, the third power value and the fourth power value are both located in a second power value interval, and the first power value interval is smaller than the second power value interval.

8. The pulsed plasma method according to claim 5, characterized in that: The first power value and the second power value are both located in a third power value interval, the third power value and the fourth power value are both located in a fourth power value interval, and the third power value interval is greater than the fourth power value interval.

9. A semiconductor process equipment, characterized in that: The invention comprises a radio frequency device and a process chamber, wherein the process chamber has a first electrode and a second electrode placed opposite to each other, the first electrode is grounded, the radio frequency device is connected to the second electrode, and when the radio frequency device is in operation, the pulsed plasma regulation method as described in any one of claims 1 to 8 is performed.

10. The semiconductor process equipment according to claim 9, characterized in that: The radio frequency device includes a high-frequency radio frequency power supply, a low-frequency radio frequency power supply, a clock signal device, a pulse controller and a synchronization signal generator; The low-frequency radio frequency power source and the high-frequency radio frequency power source are respectively connected to the second electrode; The clock signal device is connected to the low-frequency RF power supply and the synchronization signal generator respectively, the synchronization signal generator is connected to the pulse controller, and the pulse controller is connected to the high-frequency RF power supply and the low-frequency RF power supply respectively.

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