Multilayer ceramic capacitor
The integration of a sulfur-containing layer on the glass and a tin layer on the copper in the external electrode of multilayer ceramic capacitors addresses the reliability issues caused by glass melting and hydrogen diffusion, enhancing the capacitors' performance and reliability.
Patent Information
- Application Number
- PCT/JP2024/015286
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-06-21
- Filing Date
- 2024-04-17
- Publication Date
- 2024-12-26
AI Technical Summary
Conventional multilayer ceramic capacitors face reliability issues due to the melting of glass materials and hydrogen diffusion during the plating film formation process, leading to decreased performance.
The use of a multilayer ceramic capacitor design featuring an external electrode composed of barium-boron-silicon glass and copper, with a sulfur-containing layer on the glass surface and a tin layer on the copper surface, which helps prevent moisture and hydrogen intrusion, thereby enhancing reliability.
This design significantly improves the reliability of multilayer ceramic capacitors by effectively suppressing the intrusion of moisture and hydrogen diffusion, ensuring sufficient moisture resistance even with reduced external electrode thickness.
Smart Images

Figure JP2024015286_26122024_PF_FP_ABST
Abstract
Description
Multilayer ceramic capacitors
[0001] The present invention relates to a multilayer ceramic capacitor.
[0002] A plating film is sometimes formed on the surface of the external electrodes of a multilayer ceramic capacitor to improve the wettability of solder when the multilayer ceramic capacitor is mounted. A plating solution is usually used to form the plating film. Cited Document 1 describes the formation of a sulfur-containing layer in the external electrodes to suppress a decrease in reliability caused by the plating solution.
[0003] Japanese Patent Application Laid-Open No. 2020-72246
[0004] However, conventional techniques do not sufficiently prevent the deterioration of the reliability of multilayer ceramic capacitors. In conventional techniques, the glass material contained in the external electrodes can dissolve during the plating film formation process. Furthermore, hydrogen can diffuse into the external electrodes. The dissolution of the glass material and the diffusion of hydrogen into the external electrodes can lead to a deterioration in the reliability of multilayer ceramic capacitors.
[0005] SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a multilayer ceramic capacitor with improved reliability.
[0006] The multilayer ceramic capacitor of the present invention comprises a ceramic body including a plurality of laminated dielectric layers and a plurality of laminated internal electrode layers, the ceramic body having six surfaces: a first main surface and a second main surface opposing each other in a height direction, a first side surface and a second side surface opposing each other in a width direction perpendicular to the height direction, and a first end surface and a second end surface opposing each other in a length direction perpendicular to the height direction and the width direction; and external electrodes provided on the ceramic body and connected to some of the internal electrode layers, wherein the external electrodes contain glass selected from the group consisting of barium-boron-silicon glass, strontium-boron-silicon glass, and barium-strontium-boron-silicon glass, and copper, the glass and the copper being exposed on surfaces of the external electrodes, a layer containing sulfur being formed on at least a portion of the surface of the glass exposed on the surfaces of the external electrodes, and a tin layer being formed on at least a portion of the surface of the copper exposed on the surfaces of the external electrodes.
[0007] According to the present invention, it is possible to provide a multilayer ceramic capacitor with improved reliability.
[0008] It is a perspective view of the multilayer ceramic capacitor of the present embodiment. It is a cross-sectional view taken along line II in Fig. 1. It is a cross-sectional view taken along line II-II in Fig. 1. It is an enlarged view of the framed portion in Fig. 2. It is a diagram showing the results of an example and a comparative example.
[0009] (Multilayer Ceramic Capacitor) An embodiment of the present invention will be described with reference to FIG. 1. FIG. 1 is a perspective view of a multilayer ceramic capacitor 1 according to an embodiment of the present invention. FIG. 1 shows a two-terminal multilayer ceramic capacitor. The multilayer ceramic capacitor 1 of the present invention is not limited to a two-terminal multilayer ceramic capacitor. The multilayer ceramic capacitor 1 of the present invention may also be a multi-terminal multilayer ceramic capacitor, such as a three-terminal multilayer ceramic capacitor.
[0010] The multilayer ceramic capacitor 1 includes a ceramic body 2 and terminal electrodes 20. The terminal electrodes 20 include a first terminal electrode 21 and a second terminal electrode 22.
[0011] (Ceramic body) The ceramic body 2 includes a plurality of laminated dielectric layers 40 and a plurality of internal electrode layers 30. The dielectric layers 40 and the internal electrode layers 30 are illustrated in Fig. 2. The ceramic body 2 has a roughly rectangular parallelepiped shape.
[0012] In the ceramic body 2, the direction in which the dielectric layers 40 and the internal electrode layers 30 are stacked is defined as a height direction T. The direction perpendicular to the height direction T is defined as a width direction W. The direction perpendicular to the height direction T and the width direction W is defined as a length direction L.
[0013] Of the two surfaces of the ceramic body 2 that face each other in the height direction T, one surface is designated as a first main surface 3. The remaining surface is designated as a second main surface 4. Of the two surfaces of the ceramic body 2 that face each other in the width direction W, one surface is designated as a first side surface 5. The remaining surface is designated as a second side surface 6. Of the two surfaces of the ceramic body 2 that face each other in the length direction L, one surface is designated as a first end surface 7. The remaining surface is designated as a second end surface 8.
[0014] 1 is referred to as an LT cross section, and the cross section of the ceramic body 2 taken along line II in FIG. 1 is referred to as a WT cross section.
[0015] A portion where three faces of the ceramic body 2 intersect is called a corner of the ceramic body 2. A portion where two faces of the ceramic body 2 intersect is called a ridge of the ceramic body 2. The corners and ridges are preferably rounded.
[0016] (Dielectric Layer) The main material of the dielectric layer 40 is a ceramic material. Examples of ceramic materials include dielectric ceramics containing barium titanate, calcium titanate, strontium titanate, calcium zirconate, or the like as their main components. The ceramic material may also be a dielectric ceramic in which a secondary component such as a manganese compound, an iron compound, a chromium compound, a cobalt compound, or a nickel compound is added to these main components.
[0017] The division of the ceramic body 2 in the longitudinal direction L will be described with reference to Figure 2. Figure 2 is a cross-sectional view taken along line II in Figure 1. The ceramic body 2 can be divided into a first main surface side outer layer portion 10, an effective portion 11, and a second main surface side outer layer portion 12 in the height direction T.
[0018] The first main surface side outer layer portion 10 is a portion between the first main surface 3 and the internal electrode layer 30 closest to the first main surface 3. The effective portion 11 is a portion where the internal electrode layer 30 faces the internal electrode layer 30. The second main surface side outer layer portion 12 is a portion between the second main surface 4 and the internal electrode layer 30 closest to the second main surface 4.
[0019] Of the dielectric layers 40, the dielectric layers 40 arranged in the first main surface side outer layer portion 10 and the second main surface side outer layer portion 12 are referred to as outer dielectric layers 41. Of the dielectric layers 40, the dielectric layers 40 arranged in the effective portion 11 are referred to as inner dielectric layers 42.
[0020] The division of the ceramic body 2 in the length direction L will be described. The ceramic body 2 can be divided into a first end face side outer layer portion 13, a longitudinally facing portion 14, and a second end face side outer layer portion 15 in the length direction L.
[0021] The longitudinally facing portion 14 is a portion where the internal electrode layers 30 face each other in the height direction T. The first end face side outer layer portion 13 is a portion between the longitudinally facing portion 14 and the first end face 7. The second end face side outer layer portion 15 is a portion between the longitudinally facing portion 14 and the second end face 8.
[0022] The longitudinally opposing portions 14 are portions corresponding to opposing electrode portions in the internal electrode layers 30. The first end face side outer layer portion 13 and the second end face side outer layer portion 15 are portions corresponding to lead-out electrode portions in the internal electrode layers 30. The first end face side outer layer portion 13 and the second end face side outer layer portion 15 are also referred to as L gaps.
[0023] The division of the ceramic body 2 in the width direction W will be described with reference to Figure 3. Figure 3 is a cross-sectional view taken along line II-II in Figure 1. The ceramic body 2 can be divided in the width direction W into a first side surface outer layer portion 16, a widthwise opposing portion 17, and a second side surface outer layer portion 18.
[0024] The widthwise facing portion 17 is a portion where the internal electrode layers 30 face each other in the height direction T. The first side surface side outer layer portion 16 is a portion between the widthwise facing portion 17 and the first side surface 5. The second side surface side outer layer portion 18 is a portion between the widthwise facing portion 17 and the second side surface 6.
[0025] The first side surface side outer layer portion 16 and the second side surface side outer layer portion 18 are portions where no internal electrode layer 30 exists in the height direction T. The first side surface side outer layer portion 16 and the second side surface side outer layer portion 18 are also called W gaps.
[0026] (Internal electrode layers) The internal electrode layers 30 include a plurality of first internal electrode layers 31 and a plurality of second internal electrode layers 32. The first internal electrode layers 31 are internal electrode layers 30 exposed at the first end face 7. The second internal electrode layers 32 are internal electrode layers 30 exposed at the second end face 8.
[0027] The first internal electrode layer 31 can be divided into a first opposing electrode portion 34 and a first lead electrode portion 36. The first opposing electrode portion 34 is a portion that faces the second internal electrode layer 32. The first lead electrode portion 36 is a portion that is led out from the first opposing electrode portion 34 to the first end face 7.
[0028] The second internal electrode layer 32 can be divided into a second opposing electrode portion 35 and a second lead electrode portion 37. The second opposing electrode portion 35 is a portion that faces the first internal electrode layer 31. The second lead electrode portion 37 is a portion that is led out from the second opposing electrode portion 35 to the second end face 8.
[0029] The material of the internal electrode layers 30 is at least one of metals such as nickel, copper, silver, palladium, and gold, and alloys containing at least one of the above metals, such as a silver-palladium alloy.
[0030] In the multilayer ceramic capacitor 1, capacitance is formed by the first opposing electrode portion 34 and the second opposing electrode portion 35 facing each other via the inner dielectric layer 42. This allows the multilayer ceramic capacitor 1 to exhibit capacitor characteristics.
[0031] The thickness of the internal electrode layer 30 is preferably 0.2 μm or more and 2.0 μm or less. The total number of the first internal electrode layers 31 and the second internal electrode layers 32 is preferably 15 or more and 2000 or less.
[0032] (Terminal Electrodes) The terminal electrodes 20 will be described. The terminal electrodes 20 include a first terminal electrode 21 and a second terminal electrode 22. The first terminal electrode 21 is the terminal electrode 20 connected to the first internal electrode layer 31. The second terminal electrode 22 is the terminal electrode 20 connected to the second internal electrode layer 32.
[0033] The first terminal electrode 21 is arranged on the first end face 7, part of the first main face 3, part of the second main face 4, part of the first side face 5, and part of the second side face 6. The second terminal electrode 22 is arranged on the second end face 8, part of the first main face 3, part of the second main face 4, part of the first side face 5, and part of the second side face 6.
[0034] The terminal electrode 20 includes an external electrode 25, a nickel plating film 27, and a tin plating film 28. The external electrode 25, the nickel plating film 27, and the tin plating film 28 are arranged in this order from the end face of the ceramic body 2.
[0035] (External Electrode) The external electrode 25 is disposed on and covers the end face of the ceramic body 2. The external electrode 25 extends from the end face to part of the main surface and part of the side face.
[0036] The external electrode 25 contains glass and metal. The external electrode 25 is formed by applying an electrode paste containing glass and metal to the ceramic body 2 and firing the electrode paste. The metal includes copper. The metal is contained in the electrode paste as metal powder. The glass includes barium-boron-silicon glass. The glass is contained in the electrode paste as glass powder. The glass improves adhesion between the ceramic body 2 and the external electrode 25. The thickness of the external electrode 25 is preferably 3 μm or more and 20 μm or less.
[0037] The glass is not limited to barium-boron-silicon glass, and may be at least one of barium-boron-silicon glass, strontium-boron-silicon glass, and barium-strontium-boron-silicon glass.
[0038] The electrode paste may be prepared by mixing a barium-boron-silicon glass powder with a strontium-boron-silicon glass powder, thereby adding both barium and strontium to the external electrode 25.
[0039] The thickness of the thickest part of the external electrode 25 formed on the first end face 7 or the second end face 8 is preferably 15 μm or less. The thickness of the thickest part of the external electrode 25 formed on the first side face 5 or the second side face 6 is preferably 5 μm or less.
[0040] (Plating Film) The nickel plating film 27 is disposed so as to cover the external electrodes 25. The tin plating film 28 is disposed so as to cover the nickel plating film 27.
[0041] The thickness of the nickel plating film 27 is preferably 2 μm or more and 5 μm or less, and the thickness of the tin plating film 28 is preferably 3 μm or more and 5 μm or less.
[0042] The nickel plating film 27 prevents the external electrodes 25 from being corroded by solder when mounting the multilayer ceramic capacitor 1. The tin plating film 28 improves the wettability of the solder when mounting the multilayer ceramic capacitor 1, making mounting easier.
[0043] The terminal electrode 20 may include only one of the nickel plating film 27 and the tin plating film 28 .
[0044] In Fig. 2, the length in the length direction L of the multilayer ceramic capacitor 1 including the ceramic body 2 and the terminal electrodes 20 is indicated by length 70. In Figs. 2 and 3, the length in the height direction T of the multilayer ceramic capacitor 1 including the ceramic body 2 and the terminal electrodes 20 is indicated by length 71. In Fig. 3, the length in the width direction W of the multilayer ceramic capacitor 1 including the ceramic body 2 and the terminal electrodes 20 is indicated by length 72.
[0045] The length 70 is preferably 10 mm or less, more preferably 0.6 mm or less, and the lengths 71 and 72 are preferably 5 mm or less, more preferably 0.3 mm or less.
[0046] (Sulfur-Containing Layer and Tin Layer) The external electrode 25 of this embodiment will be described in more detail. FIG. 4 is an enlarged view of the boxed area 68 in FIG. 2. FIG. 4 is an enlarged LT cross section of a portion of the external electrode 25. The external electrode 25 contains copper 50 and barium-boron-silicon-based glass 52. The barium-boron-silicon-based glass 52 is in particulate form. The barium-boron-silicon-based glass 52 is dispersed as particles in the copper 50. The copper 50 and the barium-boron-silicon-based glass 52 are exposed on a surface 58 of the external electrode 25.
[0047] In the external electrode 25 of this embodiment, a sulfur-containing layer 56 is formed on the surface of the barium-boron-silicon glass 52 exposed at the surface 58 of the external electrode 25. A tin layer 54 is formed on the surface of the copper 50 exposed at the surface 58 of the external electrode 25. The nickel plating film 27 is formed on the surface of the surface 58 of the external electrode 25 on which the sulfur-containing layer 56 or the tin layer 54 is not formed, on the surface of the sulfur-containing layer 56 formed at the surface 58 of the external electrode 25, and on the surface of the tin layer 54 formed at the surface 58 of the external electrode 25. The sulfur-containing layer 56 may be formed on at least a portion of the surface of the barium-boron-silicon glass 52 exposed at the surface 58 of the external electrode 25. The tin layer 54 may be formed on at least a portion of the surface of the copper 50 exposed at the surface 58 of the external electrode 25.
[0048] In this embodiment, a layer 56 containing sulfur is present on the surface of the barium-boron-silicon-based glass 52 that is exposed at the surface 58. Therefore, when forming a plating film, it is possible to prevent moisture from penetrating into the interior of the external electrode 25 from the surface 58 of the external electrode 25 via the barium-boron-silicon-based glass 52.
[0049] In this embodiment, the tin layer 54 is present on the surface of the copper 50 exposed at the surface 58. Therefore, when forming a plating film, it is possible to suppress diffusion of hydrogen atoms from the surface 58 of the external electrode 25 through the copper 50 into the interior of the external electrode 25.
[0050] The suppression of moisture penetration and the suppression of diffusion of hydrogen atoms improves the reliability of the multilayer ceramic capacitor 1. In particular, even when the film thickness of the external electrodes 25 is reduced, sufficient moisture resistance reliability can be ensured.
[0051] The thickness of the sulfur-containing layer 56 and the thickness of the tin layer 54 will now be described. In Figure 4, the thickness of the sulfur-containing layer 56 is indicated by thickness 76. The thickness of the nickel plating film 27 in contact with the sulfur-containing layer 56 is indicated by thickness 77. The thickness of the tin layer 54 is indicated by thickness 78. The thickness of the nickel plating film 27 in contact with the tin layer 54 is indicated by thickness 79.
[0052] The thickness ratio of the sulfur-containing layer 56 to the nickel plating film 27 at a portion in contact with the sulfur-containing layer 56 is preferably 0.07 or more and 0.56 or less. The thickness ratio of the tin layer 54 to the nickel plating film 27 at a portion in contact with the tin layer 54 is preferably 0.07 or more and 0.56 or less.
[0053] By setting the thickness ratio of the sulfur-containing layer 56 to the nickel plating film 27 to be 0.07 or more and 0.56 or less, when the plating film is formed, the penetration of moisture from the surface 58 of the external electrode 25 through the barium-boron-silicon glass 52 into the interior of the external electrode 25 is more reliably suppressed.
[0054] Furthermore, by having a thickness ratio of the tin layer 54 to the nickel plating film 27 of 0.07 or more and 0.56 or less, when the plating film is formed, the diffusion of hydrogen atoms from the surface 58 of the external electrode 25 through the copper 50 into the interior of the external electrode 25 is more reliably suppressed.
[0055] The thickness 76 of the sulfur-containing layer 56 is preferably 0.14 μm or more and 2.80 μm or less, and the thickness 78 of the tin layer 54 is preferably 0.14 μm or more and 2.80 μm or less.
[0056] The thickness 77 and the thickness 79 of the nickel plating film 27 are preferably 2 μm or more and 5 μm or less.
[0057] Each of the thicknesses 76 to 79 is measured by observing the cross section of the corresponding portion.
[0058] The length 70 of the multilayer ceramic capacitor 1 in the length direction L is preferably 0.6 mm or less. The length 71 of the multilayer ceramic capacitor 1 in the height direction T and the length 72 of the multilayer ceramic capacitor 1 in the width direction W are preferably both 0.3 mm or less. The thickness of the thickest part of the external electrode 25 is preferably 20 μm or less.
[0059] 2, the thickness of the external electrode 25 formed on the first end face 7 is indicated by a thickness 80. In FIG. 3, the thickness of the external electrode 25 formed on the first side face 5 is indicated by a thickness 82.
[0060] The thickness of the thickest part of the external electrode 25 formed on the first end face 7 or the second end face 8 is preferably 15 μm or less. The thickness of the thickest part of the external electrode 25 formed on the first side face 5 or the second side face 6 is preferably 5 μm or less.
[0061] Even if the thickness of the thickest part of the external electrodes 25 formed on the main surfaces, side surfaces, and end surfaces of the ceramic body 2 is 20 μm or less, the multilayer ceramic capacitor 1 of this embodiment can ensure reliability by forming the tin layer 54 and the sulfur-containing layer 56.
[0062] In a small multilayer ceramic capacitor 1 in which the length 70 in the longitudinal direction L of the multilayer ceramic capacitor 1 is 0.6 mm or less and the length 71 in the height direction T and the length 72 in the width direction W are both 0.3 mm or less, the thickness of the external electrodes 25 is thin. The thickness of the external electrodes 25 may be 20 μm or less at their thickest portions. In the multilayer ceramic capacitor 1 of this embodiment, the formation of the tin layer 54 and the sulfur-containing layer 56 enables the multilayer ceramic capacitor 1 to be miniaturized, and deterioration in reliability can be suppressed even when the thickness of the external electrodes 25 is thin.
[0063] In particular, even when the thickness of the thickest part of the external electrode 25 formed on the first end face 7 or the second end face 8 is 15 μm or less, and the thickness of the thickest part of the external electrode 25 formed on the first side face 5 or the second side face 6 is 15 μm or less, a decrease in reliability can be suppressed.
[0064] (Formation of Sulfur-Containing Layer 56) The formation of the sulfur-containing layer 56 will be described. An example of the sulfur-containing layer 56 is a layer containing barium sulfate. The barium source in the barium sulfate is the barium-boron-silicon glass 52 contained as glass in the external electrode 25.
[0065] The ceramic body 2, on which the external electrodes 25 are formed but no plating film is formed, is immersed in an aqueous solution containing added sulfuric acid. By immersing the ceramic body 2 in the sulfuric acid aqueous solution, the barium oxide contained in the barium-boron-silicon glass 52 reacts with the sulfuric acid. As a result, barium sulfate is formed on the surface of the barium-boron-silicon glass 52. This barium sulfate is a sparingly soluble salt.
[0066] The sulfur-containing layer 56 is formed on the surface of the barium-boron-silicon based glass 52 that is exposed to the surface 58 of the external electrode 25. This is because the surface of the barium-boron-silicon based glass 52 that is exposed to the surface 58 of the external electrode 25 comes into contact with sulfuric acid.
[0067] (Formation of Tin Layer 54) The formation of the tin layer 54 will be described. The tin layer 54 is formed by a substitution reaction between the nickel plating and the tin media, and the dissolved tin ions are re-precipitated on the copper. The tin layer 54 can be formed using a barrel plating device or the like.
[0068] The ceramic body 2 with the external electrodes 25 formed but no plating film formed thereon and a medium containing tin are placed in a barrel plating device. Then, the mixture is stirred without applying current to form a tin layer 54.
[0069] (Examples and Comparative Examples) Examples and Comparative Examples will be described. FIG. 5 shows the evaluation results of the Examples and Comparative Examples. The ceramic body 2 is the same in the Examples and Comparative Examples. The ceramic body 2 has nickel internal electrodes exposed alternately on both end faces. The length of the ceramic body 2 in the length direction L was 0.4 mm, the length in the height direction T was 0.2 mm, and the length in the width direction W was 0.2 mm.
[0070] The electrode paste for the external electrodes 25 was prepared by kneading the following raw materials using a roll mill. Three types of glass powder were used: barium-boron-silicon glass, strontium-boron-silicon glass, and barium-strontium-boron-silicon glass. 4 μm diameter flat copper powder: 67.8 wt % Glass (powder): 8.3 wt % Acrylic resin: 6.6 wt % Terpineol: 17.3 wt %
[0071] As shown in Figure 5, the glasses in Example 1, Comparative Example 1A, and Comparative Example 1B are barium-boron-silicon-based glasses. The glasses in Example 2, Comparative Example 2A, and Comparative Example 2B are strontium-boron-silicon-based glasses. The glasses in Example 3, Comparative Example 3A, and Comparative Example 3B are barium-strontium-boron-silicon-based glasses.
[0072] The electrode paste was applied to the ceramic body 2, and the applied electrode paste was fired. First, one end face of the ceramic body 2 was immersed in the electrode paste. Then, it was dried at 100°C for 10 minutes. Next, the other end face was similarly immersed in the electrode paste and dried. Next, the electrode paste was fired at 800°C in nitrogen gas. This resulted in a chip on which the external electrode 25 was formed.
[0073] In this example, the obtained chips were placed in an electrolytic plating barrel together with tin media. The electrolytic plating barrel was immersed in a nickel plating bath containing sulfate ions and stirred without applying current. The plating bath was a Watts bath. This process formed a barium sulfate layer on the surface of the glass. The barium sulfate constituted the sulfur-containing layer 56.
[0074] This treatment also caused a substitution reaction between the nickel plating and the tin media, causing the eluted tin to be redeposited on the copper surface. This tin originated from the media. The deposited tin is the tin layer 54.
[0075] Comparative Examples 1A, 2A, and 3A differ from Comparative Examples 1B, 2B, and 3B in whether or not the chips were immersed in a sulfuric acid aqueous solution. In Comparative Examples 1A, 2A, and 3A, the chips were immersed in a sulfuric acid aqueous solution. In Comparative Examples 1B, 2B, and 3B, the chips were not immersed in a sulfuric acid aqueous solution.
[0076] In Comparative Examples 1A, 2A, and 3A, the obtained chips were divided into 5×10 -5 The glass was immersed in a 1000 mol / L aqueous sulfuric acid solution and stirred for 3 minutes. This treatment formed a barium sulfate layer on the surface of the glass.
[0077] Next, in all of the examples and comparative examples, a plating film was formed. The plating films were formed in the order of a nickel plating film 27 and a tin plating film 28. The nickel plating film 27 was formed under the following conditions: Type of plating bath: Watts bath pH of plating bath: 4.0 Temperature of plating bath: 60°C Current value: 6 A Plating time: 51 minutes
[0078] The tin plating film 28 was formed under the following conditions: Type of plating bath: Neutral plating bath pH of plating bath: 6.0 Temperature of plating bath: 25°C Current value: 3 A Plating time: 66 minutes
[0079] (Moisture Resistance Reliability Evaluation) The samples of the prepared examples and comparative examples were subjected to moisture resistance reliability evaluation and film structure analysis. The moisture resistance reliability evaluation will be explained. The moisture resistance reliability evaluation was performed by a PCBT test. The conditions for the PCBT (pressure cooker bias test) test were as follows: Temperature: 125°C Relative humidity: 95% Applied voltage: 3.2V Load time: 72 hours Number of samples: 15 After the PCBT test, the insulation resistance (IR) of each sample was measured. A decrease of 0.5 or more in the LogIR value at the end of the PCBT test from the start of the test was considered to be IR degradation.
[0080] No IR degradation was observed in the samples of Examples 1 to 3. IR degradation was observed in the samples of Comparative Examples 1A to 3A and Comparative Examples 1B to 3B. The time period during which IR degradation was observed in Comparative Examples 1B to 3B was shorter than the time period during which IR degradation was observed in Comparative Examples 1A to 3A.
[0081] (Membrane Structure Analysis) The membrane structure analysis will be described. The sample was embedded in resin, polished, and cross-sectioned. After that, the polished surface was subjected to five-degree processing using a high-performance focused ion beam (FIB) device (Hitachi High-Tech SMI-3050R). The cross section was taken at the position of the frame 68 in Figure 2.
[0082] Subsequently, the sample was platinum coated for 30 seconds, and elemental mapping was performed using a field emission electron probe microanalyzer (FE-WDX) (JEOL JXA-8530F) under the following conditions: Acceleration voltage: 15 kV, Exposure current: 50 nA, Number of pixels: 256 × 256, Pixel size: 0.24 μm, Dwell time: 40 ms.
[0083] The element mapping images confirmed the following: In the samples of Examples 1 to 3, a layer containing sulfur was formed on the glass on the surface 58 of the external electrode 25 to a thickness of 0.4 μm or more and 1.0 μm or less; and a tin layer 54 was formed on the copper on the surface 58 of the external electrode 25 to a thickness of 0.6 μm or more and 1.0 μm or less.
[0084] In the samples of Comparative Examples 1A to 3A, a layer 56 containing sulfur was formed to a thickness of 0.4 μm or more and 1.0 μm or less on the glass on the surface 58 of the external electrode 25. No tin layer 54 was formed on the copper on the surface 58 of the external electrode 25.
[0085] In the samples of Comparative Examples 1B to 3B, a layer 56 containing sulfur was formed on the glass on the surface 58 of the external electrode 25, but it was sparse. No tin layer 54 was formed on the copper on the surface 58 of the external electrode 25.
[0086] In the samples of Examples 1 to 3, the sulfur-containing layer 56 was formed on the glass, which prevented moisture from penetrating the glass portion into the external electrode 25. Furthermore, the tin layer 54 was formed on the copper, which prevented hydrogen atoms from diffusing into the external electrode 25 through the copper portion. Therefore, moisture resistance reliability was ensured in Comparative Examples 1A to 3A.
[0087] In the samples of Comparative Examples 1A to 3A, the sulfur-containing layer 56 was formed, but the tin layer 54 was not formed, so the moisture resistance reliability was not sufficiently ensured.
[0088] In the samples of Comparative Examples 1B to 3B, the tin layer 54 was not formed, and the sulfur-containing layer 56 was only sparsely formed. When the nickel plating film was formed, a small amount of the sulfur-containing layer was formed on the glass, but this was insufficient to prevent moisture from penetrating into the external electrode 25. Furthermore, since the tin layer 54 was not formed on the copper, the moisture resistance reliability was significantly low.
[0089] 4, in the LT cross section, one end of the surface of barium-boron-silicon glass 52 exposed to surface 58 of external electrode 25 is indicated by point 91, and the other end is indicated by point 92. The length from point 91 to point 92 on the surface of barium-boron-silicon glass 52 exposed to surface 58 of external electrode 25 is indicated by length 93.
[0090] The sulfur coverage is defined as the proportion of the length 93 in which the sulfur-containing layer 56 is in contact with the barium-boron-silicon-based glass 52. The sulfur coverage is preferably 67.0% or more.
[0091] (Measurement Method) Unless otherwise specified, the method for measuring the length and thickness of each part will be described below. The multilayer ceramic capacitor 1 is polished to the center position in the width direction W. The LT cross section exposed by polishing is then observed with an optical microscope. The length or thickness is measured from the observed LT cross section.
[0092] (Method for manufacturing a multilayer ceramic capacitor) A method for manufacturing the multilayer ceramic capacitor 1 will be described. First, a dielectric sheet that will become the dielectric layer 40 and a conductive paste that will become the internal electrode layer 30 are prepared. The dielectric sheet and the conductive paste contain a binder and a solvent. The binder and the solvent may be a known organic binder and organic solvent, etc.
[0093] A conductive paste is printed in a predetermined pattern on the dielectric sheet, and the pattern of the internal electrode layer 30 is formed by printing the conductive paste. The printing is performed by screen printing, gravure printing, or the like.
[0094] A predetermined number of dielectric sheets that will become the outer layer portions are stacked. No conductive paste is printed on the dielectric sheets that will become the outer layer portions. A predetermined number of dielectric sheets on which the patterns of the internal electrode layers 30 are printed are stacked on top of the stacked dielectric sheets. A predetermined number of dielectric sheets that will become the outer layer portions are stacked on top of these. A laminated sheet is produced by stacking these layers.
[0095] The number of laminated dielectric sheets is preferably 15 to 2000. The thickness of each dielectric sheet is preferably 0.3 μm to 10 μm.
[0096] The laminated sheets are pressed in the height direction to produce a laminated block by isostatic pressing.
[0097] The laminated block is cut to a predetermined size. This cutting process cuts out laminated chips. When cutting, the corners and ridges of the laminated chips may be rounded. The rounding method is barrel polishing.
[0098] The laminated chip is fired. This firing produces a ceramic body. The firing temperature is preferably 900° C. or higher and 1110° C. or lower. The firing temperature can be changed depending on the material of the dielectric layers 40 and the material of the internal electrode layers 30.
[0099] Next, the terminal electrodes 20 are formed. First, an electrode paste that will become the external electrodes 25 is applied to the two end surfaces of the ceramic body 2. The electrode paste contains glass, metal, etc. The electrode paste is applied by a method such as dipping. After application, the external electrodes 25 are formed by firing. The firing temperature is preferably 500°C or higher and 900°C or lower. The firing time is preferably 30 minutes or higher and 2 hours or lower.
[0100] A nickel plating film 27 is formed on the surface of the external electrode 25. Furthermore, a tin plating film 28 is formed on the surface of the nickel plating film 27. The nickel plating film 27 and the tin plating film 28 are formed by barrel plating.
[0101] When forming the nickel plating film 27, a tin material media is added and stirred in the barrel plating bath without applying current, thereby forming the tin layer 54.
[0102] Thereafter, a current is passed through the substrate to perform barrel plating, thereby forming a nickel plating film 27 .
[0103] The sulfur-containing layer 56 is formed during stirring without current flow in the barrel plating bath and during stirring with current flow, as described above.
[0104] The bath may be different for the stirring without current and the stirring with current. For example, a bath containing tin media is used in the step of forming the tin layer 54. A Watts bath without tin media is used in the step of forming the nickel plating film 27.
[0105] In this manner, the multilayer ceramic capacitor 1 is manufactured.
[0106] Although the present invention has been described above as an embodiment, it is not limited to the above embodiment and various changes and modifications are possible.
[0107] <1> A multilayer ceramic capacitor comprising: a ceramic body including a plurality of laminated dielectric layers and a plurality of laminated internal electrode layers, the ceramic body having six surfaces: a first main surface and a second main surface opposing each other in a height direction, a first side surface and a second side surface opposing each other in a width direction perpendicular to the height direction, and a first end surface and a second end surface opposing each other in a length direction perpendicular to the height direction and the width direction; and external electrodes provided on the ceramic body and connected to some of the internal electrode layers, wherein the external electrodes contain, as glass, at least one of barium-boron-silicon glass, strontium-boron-silicon glass, or barium-strontium-boron-silicon glass, and copper, the glass and the copper are exposed on surfaces of the external electrodes, a layer containing sulfur is formed on at least a portion of a surface of the glass exposed on the surface of the external electrodes, and a tin layer is formed on at least a portion of a surface of the copper exposed on the surface of the external electrodes.
[0108] <2> The multilayer ceramic capacitor according to <1>, wherein nickel plating films are formed on surfaces of the external electrodes on which the sulfur-containing layer or the tin layer is not formed, on surfaces of the sulfur-containing layers formed on the surfaces of the external electrodes, and on surfaces of the tin layers formed on the surfaces of the external electrodes, and wherein a thickness ratio of the sulfur-containing layer to the nickel plating film at a portion in contact with the sulfur-containing layer and a thickness ratio of the tin layer to the nickel plating film at a portion in contact with the tin layer are both 0.07 or more and 0.56 or less.
[0109] <3> The multilayer ceramic capacitor according to <1> or <2>, wherein the length in the length direction is 0.6 mm or less, the length in the height direction and the length in the width direction are both 0.3 mm or less, and the thickness of the thickest part of the external electrode is 20 μm or less.
[0110] <4> The multilayer ceramic capacitor according to any one of <1> to <3>, wherein the thickness of the thickest portion of the external electrode formed on the first end face or the second end face is 15 μm or less, and the thickness of the thickest portion of the external electrode formed on the first side face or the second side face is 5 μm or less.
[0111] REFERENCE SIGNS LIST 1 Multilayer ceramic capacitor 2 Ceramic body 3 First main surface 4 Second main surface 5 First side surface 6 Second side surface 7 First end surface 8 Second end surface 10 First main surface side outer layer portion 11 Effective portion 12 Second main surface side outer layer portion 13 First end surface side outer layer portion 14 Lengthwise opposing portion 15 Second end surface side outer layer portion 16 First side surface side outer layer portion 17 Widthwise opposing portion 18 Second side surface side outer layer portion 20 Terminal electrode 21 First terminal electrode 22 Second terminal electrode 25 External electrode 27 Nickel plating film 28 Tin plating film 30 Internal electrode layer 31 First internal electrode layer 32 Second internal electrode layer 34 First opposing electrode portion 35 Second opposing electrode portion 36 First lead electrode portion 37 Second lead electrode portion 40 Dielectric layer 41 Outer dielectric layer 42 Inner dielectric layer 50 Copper 52 Barium-boron-silicon glass 54 Tin layer 56 Sulfur-containing layer 58 Surface of external electrode 68 Frame 70 Length in longitudinal direction 71 Length in height direction 72 Length in width direction 76 Thickness of sulfur-containing layer 77 Thickness of nickel plating film 78 Thickness of tin layer 79 Thickness of nickel plating film 80 Thickness of external electrode formed on end surface 82 Thickness of external electrode formed on side surface 91 One end of the surface of the barium-boron-silicon glass that is exposed on the surface of the external electrode 92 The other end of the surface of the barium-boron-silicon glass that is exposed on the surface of the external electrode 93 Length from point 91 to point 92 L Length direction T Height direction W Width direction
Claims
1. A multilayer ceramic capacitor comprising: a ceramic body including a plurality of laminated dielectric layers and a plurality of laminated internal electrode layers, the ceramic body having six surfaces: a first main surface and a second main surface opposing each other in a height direction, a first side surface and a second side surface opposing each other in a width direction perpendicular to the height direction, and a first end surface and a second end surface opposing each other in a length direction perpendicular to the height direction and the width direction; and external electrodes provided on the ceramic body and connected to some of the internal electrode layers, the external electrodes containing copper and at least one of barium-boron-silicon glass, strontium-boron-silicon glass, or barium-strontium-boron-silicon glass as glass, the glass and the copper being exposed on a surface of the external electrode, a layer containing sulfur being formed on at least a portion of the surface of the glass exposed on the surface of the external electrode, and a tin layer being formed on at least a portion of the surface of the copper exposed on the surface of the external electrode.
2. The multilayer ceramic capacitor according to claim 1, wherein a nickel plating film is formed on surfaces of said external electrodes on which said sulfur-containing layer or said tin layer is not formed, on surfaces of said sulfur-containing layers formed on said external electrodes, and on surfaces of said tin layers formed on said external electrodes, and a thickness ratio of said sulfur-containing layers to said nickel plating film at a portion in contact with said sulfur-containing layer and a thickness ratio of said tin layer to said nickel plating film at a portion in contact with said tin layer are both 0.07 or more and 0.56 or less.
3. The multilayer ceramic capacitor according to claim 1 or 2, wherein the length in the longitudinal direction is 0.6 mm or less, the length in the height direction and the length in the width direction are both 0.3 mm or less, and the thickness of the thickest part of each of the external electrodes is 20 μm or less.
4. A multilayer ceramic capacitor as claimed in any one of claims 1 to 3, wherein the thickness of the thickest part of the external electrode formed on the first end face or the second end face is 15 µm or less, and the thickness of the thickest part of the external electrode formed on the first side face or the second side face is 5 µm or less.
Citation Information
Patent Citations
Method for forming electrode of chip type ceramic electronic parts
JP2003082492A
Plating device, plating method, and method for manufacturing laminated ceramic electronic component
JP2007016290A
Multilayer ceramic electronic component and manufacturing method therefor
JP2012199353A
Ceramic electronic component
JP2013110363A
Laminated electronic component and method for manufacturing same
WO2007119281A1
Cited By
Multilayer ceramic capacitor
JP7893379B2
Multilayer ceramic capacitor
JPWO2025009269A1
