Optical module
By setting inwardly recessed spacer grooves and solder ball connections in the optical module, the problem of excessively long wire length between the optical receiving chip and the transimpedance amplifier chip is solved, reducing parasitic inductance and improving signal integrity.
Patent Information
- Application Number
- PCT/CN2023/121405
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-06-29
- Filing Date
- 2023-09-26
- Publication Date
- 2025-01-02
AI Technical Summary
In optical communication technology, the wire between the optical receiving chip and the transimpedance amplifier chip is longer, resulting in a large parasitic inductance, affecting the integrity of the light-speed signal.
Design an optical module in which the light receiving component and the digital signal processing chip are located on the upper surface of the circuit board, connected by solder balls, a recessed inward spacer slot is set to place the light receiving chip, and a solder ball is set on the upper surface of the circuit board Connect the high-frequency signal pins to ensure that the height difference between the high-frequency signal pins and the solder balls is within the preset range, thereby shortening the length of the wire and reducing parasitic inductance.
It effectively shortens the bonding length between the high-frequency signal pins of the optical receiving chip and the solder ball, and improves the signal integrity and transmission efficiency.
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Figure CN2023121405_02012025_PF_FP_ABST
Abstract
Description
optical modules
[0001] This application claims priority to application number 202321698812.9 filed with the China Patent Office on June 29, 2023; priority to application number 202321695259.3 filed with the China Patent Office on June 29, 2023; all contents of which are incorporated by reference into this application. Technical Field
[0002] The present disclosure relates to the field of optical fiber communication technology, and in particular to an optical module. Background Art
[0003] With the development of new services and applications such as cloud computing, mobile internet, and video, advances in optical communication technology are becoming increasingly important. In optical communication technology, optical modules are tools for converting optical and electrical signals, and are key components in optical communication equipment. Furthermore, with the advancement of optical communication technology, the transmission rate of optical modules is required to continue to increase.
[0004] The optical module consists of a light receiving chip and a transimpedance amplifier chip, which are connected by bonding wires. However, the bonding wires between the light receiving chip and the transimpedance amplifier chip are long, and the parasitic inductance between the light receiving chip and the transimpedance amplifier chip is large, which affects the integrity of the optical signal.
[0005] Summary of the Invention
[0006] The present disclosure provides an optical module comprising: a circuit board, a light receiving component, and a digital signal processing chip. The light receiving component and the digital signal processing chip are both located on the upper surface of the circuit board. The light receiving component includes a light receiving chip to receive optical signals. The digital signal processing chip is a flip chip, that is, the digital signal processing chip is connected to the circuit board via solder balls. A transimpedance amplifier chip is integrated within the digital signal processing chip, and a first solder ball of the transimpedance amplifier chip is provided on the lower surface of the digital signal processing chip. The light receiving chip is connected to the first solder ball of the digital signal processing chip. A first inwardly recessed storage groove is provided on the upper surface of the circuit board, and a light receiving chip is provided in the first storage groove. The light receiving chip is provided in the first storage groove, that is, the bottom surface of the light receiving chip is connected to the first storage groove, and a photosensitive surface is provided on the top surface of the light receiving chip. The difference between the depth of the first storage groove and the thickness of the light receiving chip is within a first preset range, so that the height difference between the high-frequency signal pin of the light receiving chip and the first solder ball is within the first preset range. The height difference between the high-frequency signal pin of the optical receiving chip and the first solder ball is within a first preset range, shortening the bonding length between the high-frequency signal pin of the optical receiving chip and the first solder ball, reducing the parasitic inductance between the high-frequency signal pin and the first solder ball, and improving signal integrity. BRIEF DESCRIPTION OF THE DRAWINGS
[0007] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the following briefly introduces the drawings required for use in the embodiments or descriptions of the prior art. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.
[0008] FIG1 is a partial architecture diagram of an optical communication system according to some embodiments of the present disclosure;
[0009] FIG2 is a partial structural diagram of a host computer provided according to some embodiments of the present disclosure;
[0010] FIG3 is a structural diagram of an optical module provided according to some embodiments of the present disclosure;
[0011] FIG4 is an exploded view of an optical module according to some embodiments of the present disclosure;
[0012] FIG5 is a structural diagram of an optical module provided by some embodiments of the present disclosure without a housing and an unlocking component;
[0013] FIG6 is an exploded view of a light receiving component and a circuit board according to some embodiments of the present disclosure;
[0014] FIG7 is an assembly diagram of some components of a light receiving component and a circuit board according to some embodiments of the present disclosure;
[0015] FIG8 is an assembly diagram of some components of a light receiving component and a circuit board from another perspective according to some embodiments of the present disclosure;
[0016] FIG9 is another assembly diagram of some components of a light receiving component and a circuit board according to some embodiments of the present disclosure;
[0017] FIG10 is a structural diagram of another optical module provided according to some embodiments of the present disclosure without a housing and an unlocking component;
[0018] FIG11 is a structural diagram of another optical module provided by some embodiments of the present disclosure, with the housing and unlocking components removed, from another perspective;
[0019] FIG12 is a third assembly diagram of some components of a light receiving component and a circuit board according to some embodiments of the present disclosure;
[0020] FIG13 is a structural diagram of a via provided according to some embodiments of the present disclosure;
[0021] FIG14A is a fourth assembly diagram of some components of a light receiving component and a circuit board according to some embodiments of the present disclosure;
[0022] FIG14B is a schematic diagram of the exploded structure of FIG14A;
[0023] FIG15A is a fifth assembly diagram of some components of a light receiving component and a circuit board according to some embodiments of the present disclosure;
[0024] FIG15B is a schematic diagram of the exploded structure of FIG15A;
[0025] FIG16A is a sixth assembly diagram of some components of a light receiving component and a circuit board according to some embodiments of the present disclosure;
[0026] FIG16B is a schematic diagram of the exploded structure of FIG16A;
[0027] FIG17A is a seventh assembly diagram of some components of a light receiving component and a circuit board according to some embodiments of the present disclosure;
[0028] FIG17B is a schematic diagram of the exploded structure of some components and a circuit board of a light receiving component provided according to some embodiments of the present disclosure. DETAILED DESCRIPTION
[0029] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in some embodiments of the present disclosure. Obviously, the embodiments described are only some embodiments of the present disclosure, not all embodiments. Based on the embodiments provided by the present disclosure, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of the present disclosure.
[0030] Unless the context requires otherwise, throughout the specification and claims, the term "comprise" and its other forms, such as the third person singular form "comprises" and the present participle form "comprising", are to be interpreted as open and inclusive, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "example", "specific example" or "some examples" are intended to indicate that the particular features, structures, materials or characteristics associated with the embodiment or example are included in at least one embodiment or example of the present disclosure. The schematic representation of the above terms does not necessarily refer to the same embodiment or example. In addition, the particular features, structures, materials or characteristics may be included in any one or more embodiments or examples in any appropriate manner.
[0031] In the following, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present disclosure, unless otherwise specified, "plurality" means two or more.
[0032] When describing some embodiments, the expressions "coupled" and "connected" and their derivatives may be used. For example, when describing some embodiments, the term "connected" may be used to indicate that two or more components are in direct physical or electrical contact with each other. For another example, when describing some embodiments, the term "coupled" may be used to indicate that two or more components are in direct physical or electrical contact. However, the term "coupled" or "communicatively coupled" may also refer to two or more components that are not in direct contact with each other, but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the contents of this document.
[0033] “At least one of A, B and C” has the same meaning as “at least one of A, B or C” and both include the following combinations of A, B and C: A only, B only, C only, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B and C.
[0034] “A and / or B” includes the following three combinations: A only, B only, and a combination of A and B.
[0035] The use of "adapted to" or "configured to" herein is intended to be open and inclusive language that does not exclude devices adapted or configured to perform additional tasks or steps.
[0036] As used herein, "about," "substantially," or "approximately" includes the stated value and an average value that is within an acceptable range of deviation from the particular value as determined by one of ordinary skill in the art taking into account the measurements in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system).
[0037] In optical communication technology, to establish information transmission between information processing devices, it is necessary to load the information onto light and use the propagation of light to achieve information transmission. Here, the light loaded with information is an optical signal. When transmitting optical signals within information transmission equipment, they can reduce optical power loss, thereby enabling high-speed, long-distance, and low-cost information transmission. The signals that information processing equipment can recognize and process are electrical signals. Information processing equipment typically includes optical network units (ONUs), gateways, routers, switches, mobile phones, computers, servers, tablets, televisions, etc., and information transmission equipment typically includes optical fibers and optical waveguides.
[0038] Optical modules can convert optical signals into electrical signals between information processing devices and information transmission devices. For example, at least one of the optical signal input or output ends of an optical module is connected to an optical fiber, and at least one of the electrical signal input or output ends of the optical module is connected to an optical network terminal. A first optical signal from the optical fiber is transmitted to the optical module, which converts the first optical signal into a first electrical signal and transmits the first electrical signal to the optical network terminal. A second electrical signal from the optical network terminal is transmitted to the optical module, which converts the second electrical signal into a second optical signal and transmits the second optical signal to the optical fiber. Because multiple information processing devices can transmit information via electrical signals, at least one of the multiple information processing devices needs to be directly connected to the optical module, rather than all of them. Here, the information processing device directly connected to the optical module is referred to as the optical module's host computer. Furthermore, the optical signal input or output end of the optical module can be referred to as an optical port, and the electrical signal input or output end of the optical module can be referred to as an electrical port.
[0039] Figure 1 is a partial architecture diagram of an optical communication system according to some embodiments of the present disclosure. As shown in Figure 1, the optical communication system partially comprises a remote information processing device 1000, a local information processing device 2000, a host computer 100, an optical module 200, an optical fiber 101, and a network cable 103.
[0040] One end of optical fiber 101 extends toward remote information processing device 1000, and the other end connects to the optical interface of optical module 200. Optical signals can undergo total internal reflection within optical fiber 101, maintaining nearly their original optical power as they propagate in the direction of total internal reflection. Multiple total internal reflections within optical fiber 101 transmit optical signals from the direction of remote information processing device 1000 into optical module 200, or transmit light from optical module 200 toward remote information processing device 1000, enabling long-distance, low-power information transmission.
[0041] The number of optical fibers 101 may be one or more (two or more); the optical fiber 101 and the optical module 200 may be connected in a pluggable movable manner or in a fixed manner.
[0042] The host computer 100 has an optical module interface 102, which is configured to connect to the optical module 200, so that the host computer 100 establishes a unidirectional / bidirectional electrical signal connection with the optical module 200; the host computer 100 is configured to provide data signals to the optical module 200, or receive data signals from the optical module 200, or monitor and control the working status of the optical module 200.
[0043] The host computer 100 has an external electrical interface, such as a Universal Serial Bus (USB) interface and a network cable interface 104, which can be connected to an electrical signal network. For example, the network cable interface 104 is configured to connect to a network cable 103, thereby establishing a unidirectional / bidirectional electrical signal connection between the host computer 100 and the network cable 103.
[0044] Optical Network Unit (ONU), Optical Line Terminal (OLT), Optical Network Equipment (ONT) and data center servers are common host computers.
[0045] One end of the network cable 103 is connected to the local information processing device 2000 , and the other end is connected to the host computer 100 . The network cable 103 establishes an electrical signal connection between the local information processing device 2000 and the host computer 100 .
[0046] For example, the third electrical signal emitted by the local information processing device 2000 is transmitted to the host computer 100 through the network cable 103. The host computer 100 generates a second electrical signal based on the third electrical signal. The second electrical signal from the host computer 100 is transmitted into the optical module 200. The optical module 200 converts the second electrical signal into a second optical signal. The optical module 200 transmits the second optical signal into the optical fiber 101. The second optical signal is transmitted to the remote information processing device 1000 in the optical fiber 101.
[0047] For example, a first optical signal from the direction of the remote information processing device 1000 propagates through the optical fiber 101, and the first optical signal from the optical fiber 101 is transmitted into the optical module 200. The optical module 200 converts the first optical signal into a first electrical signal. The optical module 200 transmits the first electrical signal into the host computer 100. The host computer 100 generates a fourth electrical signal based on the first electrical signal, and the host computer 100 transmits the fourth electrical signal to the local information processing device 2000.
[0048] Optical modules are tools for converting optical signals into electrical signals. During this conversion process, the information remains unchanged, but the encoding and decoding methods of the information can change.
[0049] FIG2 is a partial structural diagram of a host computer provided according to some embodiments of the present disclosure. In order to clearly illustrate the connection relationship between the optical module 200 and the host computer 100, FIG2 only shows the structure of the host computer 100 related to the optical module 200. As shown in FIG2, the host computer 100 also includes a PCB circuit board 105 disposed within the housing, a cage 106 disposed on the surface of the PCB circuit board 105, a heat sink 107 disposed on the cage 106, and an electrical connector (not shown) disposed inside the cage 106. The heat sink 107 has a raised structure that increases the heat dissipation area. A fin-like structure is a common raised structure.
[0050] Optical module 200 is inserted into cage 106 of host computer 100. Cage 106 secures optical module 200, and heat generated by optical module 200 is transferred to cage 106 and then dissipated through heat sink 107. After optical module 200 is inserted into cage 106, the electrical interface of optical module 200 connects to the electrical connector inside cage 106.
[0051] Figure 3 is a structural diagram of an optical module provided according to some embodiments of the present disclosure. Figure 4 is an exploded view of an optical module provided according to some embodiments of the present disclosure. As shown in Figures 3 and 4, the optical module 200 includes a housing, a circuit board 300 disposed within the housing, a light emitting component 400, and a light receiving component 500. However, the present disclosure is not limited thereto. In some embodiments, the optical module 200 includes either the light emitting component 400 or the light receiving component 500.
[0052] The housing includes an upper housing 201 and a lower housing 202 . The upper housing 201 covers the lower housing 202 to form the housing having two openings 204 and 205 . The outer contour of the housing is generally a square.
[0053] In some embodiments, the lower shell 202 includes a bottom plate 2021 and two lower side plates 2022 located on both sides of the bottom plate 2021 and arranged perpendicular to the bottom plate 2021; the upper shell 201 includes a cover plate 2011, which covers the two lower side plates 2022 of the lower shell 202 to form the above-mentioned shell.
[0054] In some embodiments, the lower shell 202 includes a base plate 2021 and two lower side plates 2022 located on both sides of the base plate 2021 and arranged perpendicularly to the base plate 2021; the upper shell 201 includes a cover plate 2011 and two upper side plates located on both sides of the cover plate 2011 and arranged perpendicularly to the cover plate 2011. The two upper side plates are combined with the two lower side plates 2022 to achieve the upper shell 201 covering the lower shell 202.
[0055] The direction of the line connecting the two openings 204 and 205 can be aligned with or inconsistent with the length of the optical module 200. For example, opening 204 is located at the end of the optical module 200 (the right end in FIG3 ), and opening 205 is also located at the end of the optical module 200 (the left end in FIG3 ). Alternatively, opening 204 is located at the end of the optical module 200, while opening 205 is located on the side of the optical module 200. Opening 204 is an electrical interface, from which the gold fingers of the circuit board 300 extend and are inserted into the electrical connector of the test host. Opening 205 is an optical port, configured to receive the optical fiber 101, so that the optical fiber 101 can connect to the optical emitting component 400 and / or the optical receiving component 500 in the optical module 200.
[0056] The combined assembly of the upper and lower housings 201 and 202 facilitates the installation of components such as the circuit board 300, light emitting component 400, and light receiving component 500 within the housings. These components are encapsulated and protected by the upper and lower housings 201 and 202. Furthermore, during assembly of the circuit board 300, light emitting component 400, and light receiving component 500, positioning components, heat dissipation components, and electromagnetic shielding components are easily positioned, facilitating automated production.
[0057] In some embodiments, the upper shell 201 and the lower shell 202 are made of metal materials, which facilitates electromagnetic shielding and heat dissipation.
[0058] In some embodiments, the optical module 200 further includes an unlocking component 600 located outside its housing. The unlocking component 600 is configured to achieve a fixed connection between the optical module 200 and the test host, or to release the fixed connection between the optical module 200 and the test host.
[0059] For example, the unlocking member 600 is located on the outside of the two lower side panels 2022 of the lower housing 202 and includes engaging components that mate with the cage 106 of the test host. When the optical module 200 is inserted into the cage 106, the engaging components of the unlocking member 600 secure the optical module 200 within the cage 106. When the unlocking member 600 is pulled, the engaging components of the unlocking member 600 move accordingly, thereby changing the connection between the engaging components and the test host, releasing the fixed engagement between the optical module 200 and the test host, and allowing the optical module 200 to be removed from the cage 106.
[0060] The circuit board 300 includes circuit traces, electronic components, and chips. The electronic components and chips are connected together according to the circuit design through the circuit traces to achieve functions such as power supply, electrical signal transmission, and grounding. Electronic components may include, for example, capacitors, resistors, transistors, and metal-oxide-semiconductor field-effect transistors (MOSFETs). Chips may include, for example, microcontroller units (MCUs), laser driver chips, transimpedance amplifiers (TIAs), limiting amplifiers, clock and data recovery chips (CDRs), power management chips, and digital signal processing (DSP) chips.
[0061] The circuit board 300 is generally a rigid circuit board. Due to its relatively hard material, the rigid circuit board can also realize the load-bearing function. For example, the rigid circuit board can stably carry the above-mentioned electronic components and chips; the rigid circuit board is also easy to insert into the electrical connector in the test host cage.
[0062] The circuit board 300 also includes gold fingers formed on its end surfaces. These gold fingers consist of multiple independent pins. The circuit board 300 is inserted into the cage 106, with the gold fingers providing electrical connection to the electrical connector within the cage 106. The gold fingers can be located only on one side of the circuit board 300 (e.g., the top surface shown in FIG4 ), or on both the top and bottom surfaces of the circuit board 300 to provide more pins. The gold fingers are configured to establish an electrical connection with the test host to provide power, grounding, I2C signal transmission, data signal transmission, and the like.
[0063] Of course, flexible circuit boards are also used in some optical modules. Flexible circuit boards are generally used in conjunction with rigid circuit boards to supplement rigid circuit boards.
[0064] The light emitting component 400 and / or the light receiving component 500 are located on the side of the circuit board 300 away from the gold finger; in some embodiments, the light emitting component 400 and the light receiving component 500 are physically separated from the circuit board 300, and then electrically connected to the circuit board 300 through corresponding flexible circuit boards or electrical connectors; in some embodiments, the light emitting component and / or the light receiving component can be directly set on the circuit board 300, can be set on the surface of the circuit board, and can also be set on the side of the circuit board.
[0065] Figure 5 is a structural diagram of an optical module provided in accordance with some embodiments of the present disclosure, excluding the housing and unlocking components. Figure 6 is an exploded view of an optical receiving component and a circuit board provided in accordance with some embodiments of the present disclosure. Figure 7 is an assembly diagram of some components of an optical receiving component and a circuit board provided in accordance with some embodiments of the present disclosure. As shown in Figures 5, 6, and 7, in some embodiments, the circuit board 300 has a card interface, and the optical emitting component 400 is snapped onto the card interface. The optical emitting component 400 is used to transmit an optical signal.
[0066] In some embodiments, the optical emitting component 400 includes an emitting cavity, which is internally provided with a laser array, a lens array, and an optical multiplexing assembly. The laser array emits multiple optical signals, the lens array collimates the multiple optical signals, and the optical multiplexing assembly combines the collimated multiple optical signals into one optical signal, which is then transmitted to the outside via optical fiber. For example, the laser array includes four lasers, and the corresponding lens array includes four collimating lenses. The laser array emits four optical signals, which enter the optical multiplexing assembly and are combined into one optical signal by the optical multiplexing assembly. The one optical signal is then transmitted to the outside of the optical module.
[0067] As shown in FIG. 5 , FIG. 6 and FIG. 7 , in some embodiments, a light receiving component 500 is placed on the upper surface of the circuit board 300 , and the light receiving component 500 is used to receive optical signals.
[0068] In some embodiments, the light receiving component 500 includes a snap-fit plate 501 , which is snap-fitted to the upper surface of the circuit board 300 . The snap-fit plate 501 and the upper surface of the circuit board 300 form a storage cavity.
[0069] In some embodiments, the optical receiving component 500 further includes a photodetector chip (PD) 504, which is located on the upper surface of the circuit board 300 and is configured to convert received optical signals into current signals. The photodetector chip 504 includes a bottom surface and a top surface. The bottom surface of the photodetector chip 504 is connected to the upper surface of the circuit board 300, and the top surface of the photodetector chip 504 is provided with a photosensitive surface and a high-frequency signal pin, which is connected to the photosensitive surface.
[0070] In some embodiments, the optical receiving component 500 also includes an arrayed waveguide grating (AWG) 503, one end of which is covered on the photosensitive surface of the optical receiving chip 504. The arrayed waveguide grating 503 is used to split the received optical signal according to the wavelength and transmit the split optical signal to the corresponding optical receiving chip 504.
[0071] In some embodiments, the optical receiving component 500 further includes a substrate (SUB) 502, which is placed in the storage cavity and is used to provide support for the arrayed waveguide grating 503, so that the optical signal after being split by the arrayed waveguide grating 503 is reflected to the corresponding optical receiving chip 504. For example, the lower surface of the substrate 502 is connected to the upper surface of the circuit board 300, and the arrayed waveguide grating 503 is provided on the upper surface of the substrate 502, so that the arrayed waveguide grating 503 reflects the split optical signal to the corresponding optical receiving chip 504.
[0072] As shown in FIG. 6 , in some embodiments, a first placement groove is provided on the upper surface of the circuit board 300 , and the first placement groove is used to place the light receiving chip 504 and the substrate 502 .
[0073] In some embodiments, the first storage groove 310a includes a first sub-slot 302a and a second sub-slot 303a. The first sub-slot 302a is not connected to the second sub-slot 303a. The first sub-slot 302a is used to place the light receiving chip 504, and the second sub-slot 303 is used to place the substrate 502.
[0074] The small size of the second sub-slot 303a makes the processing of the circuit board 300 more difficult. The small size of the second sub-slot 303a makes it difficult for the placement mechanism for the light receiving chip 504 to be placed within the second sub-slot 303a, making placement of the light receiving chip 504 difficult and, in turn, making it difficult to ensure the placement accuracy of the light receiving chip 504. Therefore, in some embodiments, the first slot is only one slot, which is used to place the substrate 502 and the light receiving chip 504.
[0075] In some embodiments, a portion of the circuit board layer is removed from the upper surface of the circuit board 300 in the area corresponding to the light receiving component to form a stepped circuit board. The first storage slot is located at the bottom of the step, and the upper surface of the circuit board without the first storage slot is located at the top of the step. For example, a circuit board 300 having 10 layers has the upper four layers of the circuit board removed from the area corresponding to the light receiving component. The area corresponding to the first storage slot also includes six layers of the circuit board, and the area of the circuit board excluding the first storage slot includes ten layers of the circuit board.
[0076] As shown in FIG7 , in some embodiments, a DSP chip 301 is provided on the upper surface of the circuit board 300. The DSP chip 301 integrates a transimpedance amplifier chip. The power supply circuit that powers the TIA chip can also power other devices in the DSP chip 301, thereby reducing the power supply circuit inside the DSP chip and effectively reducing power consumption.
[0077] In some embodiments, the DSP chip 301 is a flip chip, that is, the DSP chip 301 is connected to the circuit board 300 via solder balls. For example, a solder ball layer is provided on the bottom surface of the DSP chip 301. The solder ball layer includes multiple solder balls, one of which is the first solder ball of the TIA chip. A second solder pad is provided on the top surface of the circuit board 300. The second solder pad is connected to the other solder balls in the solder ball layer except the first solder ball.
[0078] The DSP chip integrates a TIA chip internally. The lower surface of the DSP chip has the TIA chip's first solder ball. Therefore, the connection between the light receiving chip and the TIA chip becomes a connection between the light receiving chip and the DSP chip's first solder ball. However, due to the light receiving chip's inherent height, there is a significant height difference between the light receiving chip's high-frequency signal pin and the DSP chip's first solder ball, resulting in longer bonding wires between the light receiving chip and the first solder ball. Therefore, a solution has been devised to reduce the height difference between the light receiving chip's high-frequency signal pin and the DSP chip's first solder ball. However, since the digital signal processing chip is connected not only to the light receiving component but also to the light transmitting component, raising the height of the DSP chip's first solder ball to address this issue could result in longer bonding wires between the light transmitting component and the DSP chip. Therefore, it is necessary to reduce the height of the light receiving chip's high-frequency signal pin to address this issue.
[0079] Figure 8 is an assembly diagram of some components of an optical receiver and a circuit board according to some embodiments of the present disclosure, viewed from another perspective. Figure 9 is another assembly diagram of some components of an optical receiver and a circuit board according to some embodiments of the present disclosure. As shown in Figures 8 and 9, in some embodiments, a first, inwardly recessed slot is provided on the upper surface of the circuit board 300, with a light receiving chip disposed within the first slot. The light receiving chip is disposed within the first slot, i.e., the bottom surface of the light receiving chip is connected to the first slot, and the top surface of the light receiving chip is provided with a photosensitive surface and a high-frequency signal pin, with the photosensitive surface being connected to the high-frequency signal pin. The difference between the depth of the first slot and the thickness of the light receiving chip is within a first preset range, such that the height difference between the high-frequency signal pin of the light receiving chip and the first solder ball is within the first preset range. This height difference between the high-frequency signal pin of the light receiving chip and the first solder ball is within the first preset range, shortening the bond length between the high-frequency signal pin of the light receiving chip and the first solder ball, reducing parasitic inductance between the high-frequency signal pin and the first solder ball, and improving signal integrity.
[0080] To further shorten the bonding length between the high-frequency signal pin of the optical receiver chip and the first solder ball, in some embodiments, the depth of the first placement groove is equal to the thickness of the optical receiver chip, so that the height of the high-frequency signal pin of the optical receiver chip is equal to the height of the first solder ball. The height of the high-frequency signal pin of the optical receiver chip is equal to the height of the first solder ball, further shortening the bonding length between the high-frequency signal pin of the optical receiver chip and the first solder ball, reducing the parasitic inductance between the high-frequency signal pin and the first solder ball, and improving signal integrity. For example, the thickness of the optical receiver chip is 402μm to 472μm, and the depth of the first placement groove is 402μm to 472μm.
[0081] If the depth of the first placement groove is less than the thickness of the optical receiver chip, the height of the high-frequency signal pin of the optical receiver chip is greater than the height of the first solder ball, and the first preset range is less than zero. If the depth of the first placement groove is greater than the thickness of the optical receiver chip, the height of the high-frequency signal pin of the optical receiver chip is less than the height of the first solder ball, and the first preset range is greater than zero.
[0082] As shown in Figure 8, the high-frequency signal pin of the optical receiving chip is connected to the first solder ball by wire bonding. The height difference between the high-frequency signal pin of the optical receiving chip and the first solder ball is a negative number, zero, or a positive number. The difference between the depth of the first placement groove and the thickness of the optical receiving chip is a negative number, zero, or a positive number. Therefore, the first preset range is -50μm to 50μm. For example, the difference between the depth of the first placement groove and the thickness of the optical receiving chip is -50μm to 50μm, and the height difference between the high-frequency signal pin of the optical receiving chip and the first solder ball is -50μm to 50μm.
[0083] As shown in Figure 9, the high-frequency signal pin of the optical receiver chip is directly soldered to the first solder ball. The height between the high-frequency signal pin of the optical receiver chip and the first solder ball can only be a negative number or zero, and the difference between the depth of the first storage groove and the thickness of the optical receiver chip can only be zero or a positive number. Therefore, the first preset range is 0 to 50 μm. For example, the difference between the depth of the first storage groove and the thickness of the optical receiver chip is 0 to 50 μm, and the height difference between the high-frequency signal pin of the optical receiver chip and the first solder ball is 0 to 50 μm.
[0084] As shown in FIG8 , in some embodiments, the first solder ball is not located directly above the light receiving chip, but is located to the upper right of the light receiving chip (ie, close to the electrical interface and away from the optical port relative to the light receiving chip).
[0085] Because the first solder ball is located to the upper right of the optical receiver chip, i.e., the horizontal distance between the first solder ball and the optical receiver chip is relatively large, it is not possible to directly solder the first solder ball to the optical receiver chip. Therefore, a first solder pad is provided on the upper surface of the circuit board 300 to connect the first solder ball to the optical receiver chip. Specifically, the upper surface of the circuit board 300 is further provided with a first solder pad, one end of which is connected to the first solder ball, the other end of which is connected to the high-frequency signal pin of the optical receiver chip, and the middle portion of the first solder pad transmits high-speed signals. For example, one end of the first solder pad is soldered to the first solder ball, and the other end of the first solder pad is connected to the high-frequency signal pin of the optical receiver chip via wire bonding.
[0086] The first solder ball is located in the upper right corner of the optical receiver chip. One end of the first solder pad is connected to the first solder ball, and the other end of the first solder pad is connected to the high-frequency signal pin of the optical receiver chip. This shortens the wire length between the optical receiver chip and the TIA chip, reduces the parasitic inductance between the optical receiver chip and the TIA chip, and improves the integrity of the high-speed signal.
[0087] As shown in FIG. 9 , in some embodiments, the first solder ball is located directly above the light receiving chip.
[0088] Because the first solder ball is located directly above the light receiving chip, i.e., the horizontal distance between the first solder ball and the light receiving chip is small, the first solder ball can be directly soldered to the light receiving chip. Therefore, the first solder ball and the light receiving chip can be connected without providing a first solder pad on the top surface of circuit board 300. Specifically, the first solder ball is connected to the high-frequency signal pin of the light receiving chip. For example, the first solder ball is soldered to the high-frequency signal pin of the light receiving chip.
[0089] Since the first solder ball is located at the outermost layer of the solder ball layer of the DSP chip, the first solder ball only needs to be passed over the edge of the first storage groove and placed directly above the light receiving chip to achieve a welding connection between the first solder ball and the light receiving chip without blocking the photosensitive surface of the light receiving chip.
[0090] The first solder ball is located directly above the optical receiving chip and is soldered to the high-frequency signal pin of the optical receiving chip. This not only eliminates the need to set a high-frequency signal line on the circuit board 300, further saving the layout space of the circuit board 300, but also controls the bonding distance between the optical receiving chip and the TIA chip to the shortest, reduces the parasitic inductance between the optical receiving chip and the TIA chip, and ensures the integrity of the high-speed signal to the greatest extent.
[0091] In some embodiments, the upper surface of the circuit board has a first placement groove, the optical receiving chip is located in the first placement groove, and the difference between the depth of the first placement groove and the thickness of the optical receiving chip is within a first preset range, so that the height difference between the high-frequency signal pin of the optical receiving chip and the first solder ball is within the first preset range, thereby shortening the bonding length between the high-frequency signal pin of the optical receiving chip and the first solder ball, reducing the parasitic inductance between the high-frequency signal pin and the first solder ball, and improving the signal integrity.
[0092] The present application also provides another optical module. Figure 10 is a structural diagram of another optical module provided according to some embodiments of the present disclosure, excluding the housing and unlocking components. Figure 11 is a structural diagram of another optical module provided according to some embodiments of the present disclosure, excluding the housing and unlocking components, from another perspective. As shown in Figures 10 and 11, in some embodiments, the circuit board 300 has a card interface, and the optical emitting component 400 is snapped onto the card interface, and the optical emitting component 400 is used to emit optical signals.
[0093] In some embodiments, the optical emitting component 400 includes an emitting cavity, which is internally provided with a laser array, a lens array, and an optical multiplexing assembly. The laser array emits multiple optical signals, the lens array collimates the multiple optical signals, and the optical multiplexing assembly combines the collimated multiple optical signals into one optical signal, which is then transmitted to the outside via optical fiber. For example, the laser array includes four lasers, and the corresponding lens array includes four collimating lenses. The laser array emits four optical signals, which enter the optical multiplexing assembly and are combined into one optical signal by the optical multiplexing assembly. The one optical signal is then transmitted to the outside of the optical module.
[0094] As shown in FIG. 10 and FIG. 11 , in some embodiments, a light receiving component 500 is placed on the lower surface of the circuit board 300 , and the light receiving component 500 is used to receive optical signals.
[0095] FIG12 is a third assembly diagram of a portion of the components of a light receiving component and a circuit board according to some embodiments of the present disclosure. As shown in FIG12 , in some embodiments, the light receiving component 500 further includes a light receiving chip (PD), which is located on the lower surface of the circuit board 300 and is used to convert the received optical signal into a current signal. The light receiving chip includes a bottom surface and a top surface, the bottom surface of the light receiving chip being connected to the lower surface of the circuit board 300, and the top surface of the light receiving chip being provided with a photosensitive surface and a high-frequency signal pin, which is connected to the photosensitive surface.
[0096] In some embodiments, the optical receiving component 500 also includes an arrayed waveguide grating (AWG), one end of which is covered on the photosensitive surface of the optical receiving chip. The arrayed waveguide grating is used to split the received optical signal according to the wavelength and transmit the split optical signal to the corresponding optical receiving chip.
[0097] In some embodiments, the optical receiving component 500 further includes a substrate (SUB) for supporting the arrayed waveguide grating (AWG) so that the optical signals split by the AWG are reflected to the corresponding optical receiving chips. For example, the upper surface of the substrate is connected to the upper surface of the circuit board 300, and the AWG is provided on the lower surface of the substrate so that the AWG reflects the split optical signals to the corresponding optical receiving chips.
[0098] As shown in FIG. 12 , in some embodiments, a second placement groove is provided on the lower surface of the circuit board 300 , and the second placement groove is used to place the light receiving chip and the substrate.
[0099] In some embodiments, the second storage slot includes a third sub-slot and a fourth sub-slot, the third sub-slot is not connected to the fourth sub-slot, the third sub-slot is used to place the light receiving chip, and the fourth sub-slot is used to place the substrate.
[0100] The smaller size of the fourth sub-slot makes the processing of the circuit board 300 more difficult. This smaller size makes it difficult for the mounting mechanism to place the light receiving chip within the fourth sub-slot, making placement of the light receiving chip difficult and, in turn, making it difficult to ensure placement accuracy. Therefore, in some embodiments, the second slot is a single slot, used to hold the substrate and light receiving chip.
[0101] The optical receiver chip is located on the bottom surface of the circuit board, and the digital signal processing chip is located on the top surface. Therefore, a via 304a is designed to penetrate the circuit board at the location corresponding to the first solder ball, as shown in Figure 12. The first end of via 304a is connected to the first solder ball, and the second end of via 304a is connected to the high-frequency signal pin of the optical receiver chip, thereby connecting the optical receiver chip to the first solder ball of the digital signal processing chip.
[0102] However, due to the height of the optical receiver chip itself, there is a significant height difference between the high-frequency signal pin of the optical receiver chip and the second end of the via, resulting in a long bonding wire between the optical receiver chip and the second end of the via. Therefore, a solution was designed to reduce the height difference between the high-frequency signal pin of the optical receiver chip and the second end of the via. Specifically, a second, inwardly recessed storage groove is provided on the lower surface of the circuit board, and the optical receiver chip is placed in the second storage groove, as shown in Figure 12.
[0103] A light receiving chip is disposed within the second storage slot, i.e., the bottom surface of the light receiving chip is connected to the second storage slot, and a photosensitive surface and a high-frequency signal pin are disposed on the top surface of the light receiving chip, with the photosensitive surface being connected to the high-frequency signal pin. The difference between the depth of the second storage slot and the thickness of the light receiving chip is within a first preset range, so that the height difference between the high-frequency signal pin of the light receiving chip and the second end of the via is within the first preset range. The height difference between the high-frequency signal pin of the light receiving chip and the second end of the via is within the first preset range, shortening the bonding length between the high-frequency signal pin of the light receiving chip and the second end of the via, reducing the parasitic inductance of the bonding, and improving signal integrity.
[0104] In order to further shorten the bonding distance between the high-frequency signal pin of the optical receiving chip and the first solder ball, in some embodiments, the depth of the second placement groove is equal to the thickness of the optical receiving chip, so that the height of the high-frequency signal pin of the optical receiving chip is equal to the height of the second end of the via. The height of the high-frequency signal pin of the optical receiving chip is equal to the height of the second end of the via, further shortening the bonding length between the high-frequency signal pin of the optical receiving chip and the first solder ball, reducing the parasitic inductance of the bonding wire, and improving signal integrity. For example, the thickness of the optical receiving chip is 402μm to 472μm, and the depth of the second placement groove is 402μm to 472μm.
[0105] If the depth of the second placement groove is less than the thickness of the optical receiver chip, then the height of the high-frequency signal pin of the optical receiver chip is greater than the height of the second end of the via hole, and the first preset range is less than zero. If the depth of the second placement groove is greater than the thickness of the optical receiver chip, then the height of the high-frequency signal pin of the optical receiver chip is less than the height of the second end of the via hole, and the first preset range is greater than zero.
[0106] As shown in Figure 12, the high-frequency signal pin of the optical receiver chip is connected to the second end of the via via by a wire bond. The height difference between the high-frequency signal pin of the optical receiver chip and the second end of the via is a negative number, zero, or a positive number. The difference between the depth of the second placement groove and the thickness of the optical receiver chip is a negative number, zero, or a positive number. Therefore, the first preset range is -50μm to 50μm. For example, the difference between the depth of the second placement groove and the thickness of the optical receiver chip is -50μm to 50μm, and the height difference between the high-frequency signal pin of the optical receiver chip and the second end of the via is -50μm to 50μm.
[0107] Figure 13 is a structural diagram of a via provided according to some embodiments of the present disclosure. As shown in Figure 13, in some embodiments, via 304a includes a signal layer 341. The first end of signal layer 341 is connected to the first solder ball, and the second end of signal layer 341 is connected to the high-frequency signal pin of the optical receiver chip, so that the high-frequency signal is introduced from the optical receiver signal to the DSP chip.
[0108] As shown in FIG13 , in some embodiments, via 304 a further includes a ground layer 342, which is located outside of signal layer 341 and supported by an insulating medium between ground layer 342 and signal layer 341. Ground layer 342 not only provides shielding to reduce crosstalk between signals and external noise interference, but also reduces electromagnetic radiation.
[0109] In some embodiments, the circuit board has a via hole passing through it, and the lower surface of the circuit board has a second storage groove, the optical receiving chip is located in the second storage groove, and the difference between the depth of the second storage groove and the thickness of the optical receiving chip is within a first preset range, so that the height difference between the high-frequency signal pin of the optical receiving chip and the second end of the via hole is within the first preset range, thereby shortening the bonding length between the high-frequency signal pin of the optical receiving chip and the second end of the via hole, reducing the parasitic inductance between the high-frequency signal pin and the second end of the via hole, and improving the signal integrity.
[0110] Figure 14A is a fourth assembly diagram of some components of the optical receiving component and the circuit board provided according to some embodiments of the present disclosure. Figure 14B is a schematic diagram of the decomposed structure of Figure 14A. As shown in Figures 14A and 14B, in some embodiments, the optical receiving component 500 also includes a light receiving chip (PD), which is located on the upper surface of the circuit board 300, and the light receiving chip is used to convert the received light signal into a current signal. The light receiving chip includes a bottom surface and a top surface, the bottom surface of the light receiving chip is connected to the upper surface of the circuit board 300, and the top surface of the light receiving chip is provided with a photosensitive surface and a high-frequency signal pin, and the high-frequency signal pin is connected to the photosensitive surface.
[0111] In some embodiments, the optical receiving component 500 also includes an arrayed waveguide grating (AWG), one end of which is covered on the photosensitive surface of the optical receiving chip. The arrayed waveguide grating is used to split the received optical signal according to the wavelength and transmit the split optical signal to the corresponding optical receiving chip.
[0112] In some embodiments, a digital signal processing chip (DSP) is located on the bottom surface of the circuit board and receives the current signal generated by the optical receiver chip. A via 304b is designed to penetrate the circuit board at a location corresponding to the first solder ball. The first end of via 304b is connected to the first solder ball, and the second end of via 304a is connected to a high-frequency signal pin of the optical receiver chip, thereby connecting the optical receiver chip to the first solder ball of the digital signal processing chip.
[0113] In some embodiments, to accommodate the heights of the photosensitive surfaces of the arrayed waveguide grating and the photoreceiving chip, a first storage groove 310b is provided on the top surface of the PCB. For example, the first storage groove 310b includes a first sub-slot 302b and a second sub-slot 303b having different heights. The arrayed waveguide grating is placed in the first sub-slot 302b, and the photoreceiving chip is placed in the second sub-slot 303b. The first sub-slot 302b is connected to the second sub-slot 303b. The photosensitive surface of the photoreceiving chip is located below the arrayed waveguide grating. To achieve optical coupling between the photosensitive surface of the photoreceiving chip and the arrayed waveguide grating, the bottom surface of the first sub-slot 302b is higher than the bottom surface of the second sub-slot 303b.
[0114] Via 304a is located on the bottom surface of the second sub-slot 303b, and the high-frequency signal pin of the optical receiver chip is connected to the via via via bonding. The height difference between the bottom surface of the first sub-slot 302b and the bottom surface of the second sub-slot 303b is within a preset range, so that the height difference between the high-frequency signal pin of the optical receiver chip and the second end of the via is within the first preset range. This height difference between the high-frequency signal pin of the optical receiver chip and the second end of the via is within the first preset range, shortening the bonding wire length between the high-frequency signal pin of the optical receiver chip and the second end of the via, reducing the parasitic inductance of the bonding wire, and improving signal integrity.
[0115] In order to further reduce the bonding length between the high-frequency signal pin of the optical receiving chip and the second end of the via, Figure 15A is a fifth assembly diagram of some components of the optical receiving component and the circuit board provided according to some embodiments of the present disclosure. Figure 15B is a schematic diagram of the decomposed structure of Figure 15A. As shown in Figures 15A and 15B, in some embodiments, the optical receiving component 500 includes a light receiving chip (PD), which is used to convert the received light signal into a current signal. The optical receiving chip includes a bottom surface and a top surface, and the top surface of the optical receiving chip is provided with a photosensitive surface and a high-frequency signal pin, and the high-frequency signal pin is connected to the photosensitive surface.
[0116] In some embodiments, the optical receiving component 500 also includes an arrayed waveguide grating (AWG), one end of which is covered on the photosensitive surface of the optical receiving chip. The arrayed waveguide grating is used to split the received optical signal according to the wavelength and transmit the split optical signal to the corresponding optical receiving chip.
[0117] In some embodiments, the optical receiving component 500 further includes a substrate (SUB) for supporting the arrayed waveguide grating (AWG) so that the optical signals split by the AWG are reflected to the corresponding optical receiving chips. For example, the upper surface of the substrate is connected to the lower surface of the circuit board 300, and the AWG is disposed on the upper surface of the substrate so that the AWG reflects the split optical signals to the corresponding optical receiving chips.
[0118] The light receiving chip is located on the upper surface of the substrate, with the photosensitive surface of the light receiving chip facing the arrayed waveguide grating. In some embodiments, to accommodate the height difference between the photosensitive surface of the light receiving chip and the arrayed waveguide grating, a chip placement groove 5021 is provided on the upper surface of the substrate, and the light receiving chip is positioned within the groove. The upper surface of the groove is recessed downward relative to the upper surface of the rest of the substrate, ensuring that the height difference between the photosensitive surface of the light receiving chip and the arrayed waveguide grating is within a predetermined range.
[0119] In some embodiments, a digital signal processing chip (DSP) is located on the bottom surface of the circuit board. The DSP receives the current signal generated by the optical receiver chip. A via 304c is designed to penetrate the circuit board at a location corresponding to the first solder ball. The first end of via 304c is connected to the first solder ball, and the second end of via 304c is connected to a high-frequency signal pin of the optical receiver chip, thereby connecting the optical receiver chip to the first solder ball of the digital signal processing chip.
[0120] One side of the circuit board 300 extends outward to form a connecting plate 320. The thickness of the connecting plate 320 is smaller than that of other areas of the circuit board 300. A via 304c is located on the connecting plate 320. The first end of the via 304c is connected to the first solder ball, and the second end of the via 304c is connected to the high-frequency signal pin of the optical receiver chip.
[0121] In some embodiments, the substrate and the arrayed waveguide grating may be located on the side of the circuit board 300 or in the hollowed-out area of the circuit board 300. One side of the substrate extends to the bottom of the connecting plate 320, providing support for the connecting plate 320 and preventing the connecting plate 320 from being damaged due to excessive thickness. In order to reduce the length of the bonding wire between the second end of the via 304c and the high-frequency signal pin of the optical receiving chip, the height of the high-frequency signal pin of the optical receiving chip is the same as the height of the second end of the via 304c. The high-frequency signal pin is flush with the second end of the via 304c, further shortening the bonding length between the high-frequency signal pin of the optical receiving chip and the first solder ball, reducing the parasitic inductance of the bonding wire, and improving the integrity of the signal.
[0122] FIG16A is a sixth assembly diagram of some components and a circuit board of a light receiving component provided according to some embodiments of the present disclosure. FIG16B is a schematic diagram of the exploded structure of FIG16A. As shown in FIG16A and FIG16B, in some embodiments, the light receiving component 500 includes a light receiving chip (PD), which is used to convert the received light signal into a current signal. The light receiving chip includes a bottom surface and a top surface, and the top surface of the light receiving chip is provided with a photosensitive surface and a high-frequency signal pin, and the high-frequency signal pin is connected to the photosensitive surface.
[0123] In some embodiments, the optical receiving component 500 also includes an arrayed waveguide grating (AWG), one end of which is covered on the photosensitive surface of the optical receiving chip. The arrayed waveguide grating is used to split the received optical signal according to the wavelength and transmit the split optical signal to the corresponding optical receiving chip.
[0124] A digital signal processing chip (DSP) is located on the top surface of the circuit board. The digital signal processing chip receives the current signal generated by the optical receiver chip. A through hole 305 is provided at the position of the circuit board corresponding to the first solder ball, and the optical receiver chip is located within the through hole 305. The photosensitive surface of the optical receiver chip faces the arrayed waveguide grating. The high-frequency signal pin of the optical receiver chip is connected to the first solder ball by wire bonding. The length of the wire bonding between the high-frequency signal pin and the first solder ball is related to the thickness of the optical receiver chip itself. The through hole 305 runs through the top and bottom surfaces of the circuit board 300.
[0125] In some embodiments, the difference between the thickness of the circuit board and the thickness of the optical receiver chip is less than the predetermined height difference between the arrayed waveguide grating and the optical surface. Therefore, the optical receiver component 500 further includes a substrate (SUB) for supporting the arrayed waveguide grating, thereby reflecting the optical signal split by the arrayed waveguide grating to the corresponding optical receiver chip. For example, the upper surface of the substrate is connected to the lower surface of the circuit board 300, and the arrayed waveguide grating is disposed on the upper surface of the substrate, so that the arrayed waveguide grating reflects the split optical signal to the corresponding optical receiver chip.
[0126] FIG17A is a seventh assembly diagram of some components of an optical receiving component and a circuit board according to some embodiments of the present disclosure. FIG17B is a schematic diagram of the exploded structure of some components of an optical receiving component and a circuit board according to some embodiments of the present disclosure. As shown in FIG17A and FIG17B , in some embodiments, when the first solder ball of the digital signal processing chip is close to the edge of the digital signal processing chip, in order to facilitate the fixation of the optical receiving chip, the optical receiving component 500 further includes: a support plate 505, and the support plate 505 is located above the circuit board 300. One end of the support plate 505 covers above the through hole 305, the optical receiving chip is located on the lower surface of the support plate 505, and the high-frequency signal pin is connected to the first solder ball by wire bonding.
[0127] The first solder ball of the digital signal processing chip is located at the through hole 305, which facilitates the bonding between the high-frequency signal pin and the first solder ball.
[0128] To adjust the distance between the photosensitive surface and the arrayed waveguide grating, a second slot 330b is provided on the lower surface of the circuit board 300. The arrayed waveguide grating and substrate are located within the second slot 330b. A through hole 305 communicates with the second slot, and the light receiving chip is located within the through hole 305.
[0129] In some embodiments, to further shorten the bonding length between the high-frequency signal pin and the first solder ball, the lower surface of the support plate 505 is recessed to form a chip recess 5051. The chip recess 5051 allows the bottom surface of the optical receiver chip 504 to be higher than the bottom surface of the DSP chip, thereby reducing the height difference between the high-frequency signal pin and the first solder ball and shortening the bonding length between the high-frequency signal pin and the first solder ball.
[0130] The structure provided in the embodiments of this application is also applicable to optical emitting components. The positional relationship between the optical emitting chip and the digital signal processing chip is equivalent to the positional relationship between the optical receiving chip and the digital signal processing chip in this application. The optical emitting chip is a vertically emitting laser, meaning that the light emitting surface of the optical emitting chip is perpendicular to the circuit board.
[0131] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present disclosure, rather than to limit them. Although the present disclosure has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present disclosure.
Claims
1. An optical module, comprising: A circuit board, the upper surface of which has a first storage slot, and the upper surface of which is provided with a light receiving component and a digital signal processing chip; The light receiving component comprises: A light receiving chip, wherein the light receiving chip is configured to receive a light signal and convert the light signal into an electrical signal; the light receiving chip is located in the first storage slot; An arrayed waveguide grating, one end of which covers the photosensitive surface of the light receiving chip, and is used to split the received optical signal, and transmit the split optical signal to the corresponding light receiving chip; A transimpedance amplifier chip is integrated inside the digital signal processing chip, and a first solder ball of the transimpedance amplifier chip is provided on the lower surface of the digital signal processing chip; The difference between the depth of the first placement groove and the thickness of the light receiving chip is within a first preset range, so that the height difference between the high-frequency signal pin of the light receiving chip and the first solder ball is within the first preset range.
2. The optical module according to claim 1, wherein: A first solder pad is disposed on the upper surface of the circuit board, one end of the first solder pad is connected to the first solder ball, and the other end of the first solder pad is connected to the high-frequency signal pin of the optical receiving chip, wherein the first preset range is -50 μm to 50 μm.
3. The optical module according to claim 1, wherein: The first solder ball is located directly above the optical receiving chip, and the first solder ball is connected to a high-frequency signal pin of the optical receiving chip, wherein the first preset range is 0 to 50 μm.
4. The optical module according to claim 1, wherein: The depth of the first placement groove is equal to the thickness of the optical receiving chip, so that the height of the high-frequency signal pin of the optical receiving chip is equal to the height of the first solder ball, wherein the depth of the first placement groove is 402 μm to 472 μm.
5. The optical module according to claim 1, wherein: The bottom surface of the light receiving chip is connected to the first storage groove, and the top surface of the light receiving chip is provided with a photosensitive surface and the high-frequency signal pin, and the photosensitive surface and the high-frequency signal pin are connected.
6. The optical module according to claim 1, wherein: Also included is a light emitting component; The light emitting component is connected to the circuit board and the digital signal processing chip, and is used to emit light signals; The light receiving component also includes: A clamping plate, clamped on the upper surface of the circuit board, and forming a storage cavity with the upper surface of the circuit board; A substrate is placed in the storage cavity and located in the first storage groove; The arrayed waveguide grating is placed in the placement cavity and is located on the substrate.
7. An optical module, wherein: include: A circuit board, the upper surface of which is provided with a digital signal processing chip, the lower surface of which is provided with a light receiving component, and the lower surface of which has a second storage groove and a via hole; The light receiving component comprises a light receiving chip; the light receiving chip is located in the second storage groove; A transimpedance amplifier chip is integrated inside the digital signal processing chip, and a first solder ball of the transimpedance amplifier chip is provided on the lower surface of the digital signal processing chip; The second storage slot is located on the lower surface of the circuit board; The via hole is arranged corresponding to the first solder ball, the via hole passes through the circuit board, a first end of the via hole is connected to the first solder ball, and a second end of the via hole is connected to a high-frequency signal pin of the optical receiving chip; The difference between the depth of the second placement groove and the thickness of the optical receiving chip is within a first preset range, so that the height difference between the high-frequency signal pin of the optical receiving chip and the second end of the via hole is within the first preset range.
8. The optical module according to claim 7, wherein: The via hole includes a signal layer, a first end of the signal layer is connected to the first solder ball, and a second end of the signal layer is connected to the high-frequency signal pin, so that a high-frequency signal is introduced from the optical receiving chip to the first solder ball.
9. The optical module according to claim 8, wherein: The via further includes a ground layer located outside the signal layer, and the ground layer is configured to reduce crosstalk between signals.
10. The optical module according to claim 7, wherein: The first preset range is -50 μm to 50 μm.
11. The optical module according to claim 7, wherein: The depth of the second placement groove is equal to the thickness of the optical receiving chip, so that the height of the high-frequency signal pin of the optical receiving chip is equal to the height of the second end of the via hole, wherein the depth of the first placement groove is 402 μm to 472 μm.
12. The optical module according to claim 7, wherein: Also included is a light emitting component; The light emitting component is connected to the circuit board, and the light emitting component is also connected to the digital signal processing chip, and is used to emit light signals; The light receiving component also includes: A substrate, the upper surface of which is connected to the second storage groove, and the substrate is located in the second storage groove; An arrayed waveguide grating is connected to the lower surface of the substrate, one end of which covers the photosensitive surface of the optical receiving chip and is used to split the received optical signal according to the wavelength, and the split optical signal is transmitted to the corresponding optical receiving chip.
13. The optical module according to claim 7, wherein: The bottom surface of the light receiving chip is connected to the second storage groove, and the top surface of the light receiving chip is provided with a photosensitive surface and the high-frequency signal pin, and the photosensitive surface is connected to the high-frequency signal pin.
14. An optical module, comprising: A circuit board, the upper surface of which has a first storage groove, and the upper surface of which is provided with a light receiving component; A digital signal processing chip, located on the lower surface of the digital signal processing chip; Wherein, the light receiving component comprises: an array waveguide grating and a light receiving chip; The optical receiving chip is configured to receive an optical signal and convert the optical signal into an electrical signal; the optical receiving chip is located in the first storage slot; A transimpedance amplifier chip is integrated inside the digital signal processing chip, and a first solder ball of the transimpedance amplifier chip is provided on the surface of the digital signal processing chip; A via hole is provided in the first storage groove, and a first end of the via hole is electrically connected to the light receiving chip; The second end of the via is electrically connected to the first solder ball.
15. The optical module according to claim 14, wherein: The first storage groove includes: a first sub-storage groove and a second sub-storage groove; the first sub-storage groove is connected to the second sub-storage groove, and the first sub-storage groove and the second sub-storage groove have different depths; The arrayed waveguide grating is located in the first sub-slot; The light receiving chip and the via hole are located in the second sub-groove.
16. The optical module according to claim 15, wherein: The light receiving component further includes a substrate, which is located between the circuit board and the arrayed waveguide grating.
17. An optical module, comprising: A circuit board, one side of which extends to form a connecting plate, wherein the thickness of the connecting plate is less than the thickness of the circuit board; A digital signal processing chip, located on the lower surface of the digital signal processing chip; A light receiving component, located on one side of the connecting plate; Wherein, the light receiving component comprises: A substrate, one end of which is located on the lower surface of the circuit board; An array waveguide grating is located on the upper surface of the substrate; A light receiving chip is located on the upper surface of the substrate, and one end of the arrayed waveguide grating is covered above the light receiving chip; The optical receiving chip is configured to receive an optical signal and convert the optical signal into an electrical signal; A transimpedance amplifier chip is integrated inside the digital signal processing chip, and a first solder ball of the transimpedance amplifier chip is provided on the surface of the digital signal processing chip; A via hole is provided in the connection plate, and a first end of the via hole is electrically connected to the light receiving chip; The second end of the via is electrically connected to the first solder ball.
18. The optical module according to claim 14, wherein: The upper surface of the substrate is recessed to form a chip placement groove; the light receiving chip is located in the chip placement groove.
19. An optical module, comprising: A circuit board is provided with a through hole, wherein the through hole penetrates the upper surface and the lower surface of the circuit board; A digital signal processing chip, located on the upper surface of the digital signal processing chip; An array waveguide grating is located on the lower surface of the circuit board; A light receiving chip is located at the through hole, and one end of the arrayed waveguide grating is located below the light receiving chip; the photosensitive surface of the light receiving chip faces the arrayed waveguide grating; and the high-frequency signal pin and the photosensitive surface are located on the same surface of the light receiving chip; Wherein: a transimpedance amplifier chip is integrated inside the digital signal processing chip, and a first solder ball of the transimpedance amplifier chip is provided on the surface of the digital signal processing chip; The high-frequency signal pin of the optical receiving chip is connected to the first solder ball.
20. The optical module according to claim 19, further comprising: A support plate, located on the upper surface of the circuit board; One end of the support plate is located above the through hole, and the light receiving chip is connected to the support plate.
21. The optical module according to claim 19, wherein: The lower surface of the circuit board has a second placement groove, and the arrayed waveguide grating is located in the second placement groove; A chip groove is provided on the lower surface of the support plate, and the light receiving chip is located in the chip groove.
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