Capacitor, mounting substrate, and method for manufacturing capacitor

Abstract

Provided is a capacitor comprising a conductive base material having a first principal surface and a second principal surface opposite from the first principal surface, and a plurality of through-holes that are formed on the base material and extend from the first principal surface to the second principal surface, wherein: on the second principal surface, a plurality of depressions in which bottom sections thereof are respectively connected to the plurality of through-holes are formed; the base material has a plurality of protrusions surrounded by three or more depressions among the plurality of depressions; and the capacitor further includes a dielectric film that covers a surface of the base material and that includes an inner wall surface of each of the plurality of through-holes and inner wall surfaces of the plurality of depressions including surfaces of the plurality of protrusions, and an internal electrode that has a plurality of first regions respectively filling the plurality of through-holes inside the dielectric film and a second region being connected to the plurality of first regions and covering the plurality of protrusions with the dielectric film interposed therebetween.

Description

Capacitor, mounting board, and capacitor manufacturing method

[0001] The present disclosure relates to a capacitor, a mounting substrate, and a method for manufacturing a capacitor.

[0002] When dielectric breakdown occurs in a capacitor, failure modes include short circuit mode and open circuit mode. When a short circuit mode failure occurs, the charge stored in the capacitor is released into the circuit, which may destroy other components connected to it.

[0003] Therefore, in order to induce the failure mode to the open mode, a capacitor has been proposed in which multiple bottomed trenches are formed in a silicon substrate, MIM structures are provided so as to be embedded in the trenches, and ridge-like narrow portions are provided at the top ends of the walls between adjacent trenches. In this capacitor, dielectric breakdown occurring in the MIM structures is induced near the narrow portions, and the electrode layer and dielectric layer melted by the dielectric breakdown are expelled outside the region where the dielectric breakdown occurs, thereby inducing the failure mode of the breakdown to the open mode.

[0004] Japanese Patent Application Publication No. 2020-004825

[0005] Although the above-mentioned conventional capacitors achieve the intended purpose, it is sometimes difficult to induce the failure mode to be an open mode.

[0006] An object of the present disclosure is to provide a capacitor, a mounting substrate, and a method for manufacturing a capacitor that can more stably induce a failure mode to an open mode.

[0007] According to one aspect of the present disclosure, a capacitor includes a conductive substrate having a first main surface and a second main surface opposite the first main surface, a plurality of through holes formed in the substrate and penetrating from the first main surface to the second main surface, a plurality of recesses formed in the second main surface, each of the recesses having a bottom connected to one of the through holes, the substrate having a plurality of protrusions surrounded by three or more of the recesses, a dielectric film covering a surface of the substrate including inner wall surfaces of each of the through holes and inner wall surfaces of the recesses including surfaces of the protrusions, an internal electrode having a plurality of first regions inside the dielectric film filling each of the through holes, and a second region connected to the first regions and covering the protrusions with the dielectric film sandwiched therebetween.

[0008] According to the present disclosure, the failure mode can be induced to the open mode more stably.

[0009] FIG. 1 is a cross-sectional view of a capacitor according to the first embodiment. FIG. 2 is a cross-sectional view of a substrate in the capacitor according to the first embodiment. FIG. 3 is a perspective view of a substrate in the capacitor according to the first embodiment. FIG. 4 is a plan view of a substrate in the capacitor according to the first embodiment. FIG. 5 is a flowchart showing a method for manufacturing the capacitor according to the first embodiment. FIG. 6A is a cross-sectional view showing a method for forming a through hole and a recess. FIG. 6B is a cross-sectional view showing a method for forming a through hole and a recess. FIG. 6C is a cross-sectional view showing a method for forming a through hole and a recess. FIG. 7 is a cross-sectional view showing a failure mode in the capacitor according to the first embodiment. FIG. 8 is a cross-sectional view of a capacitor according to the second embodiment. FIG. 9 is a cross-sectional view of a capacitor according to the third embodiment. FIG. 10 is a cross-sectional view of a capacitor according to the fourth embodiment. FIG. 11 is a cross-sectional view of a capacitor according to the fifth embodiment. FIG. 12 is a front view of a capacitor according to the sixth embodiment. FIG. 13 is a cross-sectional view of a capacitor according to the seventh embodiment. FIG. 14 is a cross-sectional view of a capacitor according to the eighth embodiment. FIG. 15 is a cross-sectional view of a capacitor according to the ninth embodiment. FIG. 16 is a cross-sectional view of a mounting substrate according to the tenth embodiment.

[0010] The following describes embodiments of the present disclosure in detail, but the present disclosure is not limited thereto. In the present specification and drawings, components having substantially the same functional configurations may be designated by the same reference numerals to avoid redundant description. In the following description, an XYZ Cartesian coordinate system is used. However, this coordinate system is defined for the purpose of explanation and does not limit the orientation of the capacitor and the mounting board. When viewed from an arbitrary point, the +Z side may be referred to as the upper side, top side, or top, and the -Z side may be referred to as the lower side, bottom side, or bottom. In this disclosure, "planar view" refers to viewing an object from above, and "planar shape" refers to the shape of an object viewed from above. The S-axis and T-axis in FIGS. 1, 4, and 7 to 16 are axes obtained by rotating the X-axis and Y-axis, respectively, 30 degrees clockwise in the XY plane.

[0011] (First embodiment) First, the first embodiment will be described. The first embodiment relates to a capacitor. FIG. 1 is a cross-sectional view showing a capacitor according to the first embodiment. FIG. 2 is a cross-sectional view showing a substrate in the capacitor according to the first embodiment. FIG. 3 is a perspective view showing a substrate in the capacitor according to the first embodiment. FIG. 4 is a plan view showing a substrate in the capacitor according to the first embodiment. FIG. 1 corresponds to a cross-sectional view taken along line II in FIG. 4. FIG. 2 corresponds to a cross-sectional view taken along line II-II in FIG. 4.

[0012] As shown in FIG. 1, the capacitor 1 according to the first embodiment has a substrate 10, a plurality of through holes 20, a dielectric film 30, an internal electrode 40, an external electrode 70, an external electrode 80, and an insulating layer 90.

[0013] The substrate 10 is electrically conductive. The substrate 10 includes, for example, silicon (Si), hafnium (Hf), lanthanum (La), niobium (Nb), tantalum (Ta), titanium (Ti), or zirconium (Zr). The substrate 10 may be composed of Si, Hf, La, Nb, Ta, Ti, or Zr. When Si is used as the material of the substrate 10, the substrate 10 is doped with an impurity. The substrate 10 has a main surface 11 and a main surface 12 opposite to the main surface 11. In one example, the main surface 11 is perpendicular to the Z-axis direction, the main surface 11 is the bottom surface, and the main surface 12 is the top surface. The main surface 11 is an example of a first main surface, and the main surface 12 is an example of a second main surface. The shape of the substrate 10 is, for example, a substantially rectangular parallelepiped. For example, the dimension of the substrate 10 in the X-axis direction is 100 μm to 5000 μm, the dimension in the Y-axis direction is 50 μm to 3000 μm, and the dimension in the Z-axis direction is 10 μm to 3000 μm.

[0014] A plurality of through holes 20 are formed in the substrate 10. The through holes 20 penetrate the substrate 10 from the main surface 11 to the main surface 12. The cross-sectional shape of the through holes 20 perpendicular to the longitudinal direction is, for example, a circle with a diameter of 0.01 μm to 20 μm. In this embodiment, the plurality of through holes 20 are arranged in a triangular lattice pattern in a planar view. For example, the plurality of through holes 20 are arranged in a regular triangular lattice pattern with one side of the smallest triangle aligned in the X-axis direction. The pitch of the through holes 20 is, for example, 0.02 μm to 50 μm. The cross-sectional shape of the through holes 20 perpendicular to the longitudinal direction does not have to be circular and may be, for example, rectangular or elliptical, but a circular shape is preferable from the viewpoint of ease of processing. The plurality of through holes 20 can be arranged in various ways in a planar view. For example, when arranged in a triangular lattice pattern, it is preferable that the cross-sectional shape of the through holes 20 perpendicular to the longitudinal direction be hexagonal rather than circular, considering the opposing surfaces of the through holes 20. The shape of the cross section perpendicular to the longitudinal direction of the through-hole 20 can be appropriately set depending on the arrangement of the plurality of through-holes 20 in a plan view and the ease of processing.

[0015] A plurality of recesses 15 are formed on the main surface 12, each of whose bottoms is connected to a plurality of through holes 20. The recesses 15 are formed in a cone shape. The substrate 10 has a plurality of protrusions 13 surrounded by three of the plurality of recesses 15. Each protrusion 13 has the inner wall surface of the recess 15 on its surface and has a generally triangular pyramid shape. The protrusions 13 are arranged in a dispersed manner. More specifically, the protrusions 13 are arranged so as to overlap the through holes 20 at the same pitch as the through holes 20 in a planar view. For example, when the through holes 20 are arranged in a regular triangular lattice pattern, the protrusions 13 are also arranged in a regular triangular lattice pattern. When the through holes 20 are arranged in a pattern other than a regular triangular lattice pattern, the protrusions 13 are also arranged in the same manner as the through holes 20. Furthermore, the tips 14 of the protrusions 13 are sharply pointed toward the +Z side. For example, the tips 14 of the protrusions 13 are formed at an acute angle in all cross sections parallel to the Z-axis direction. The radius of curvature of the tip 14 of the protrusion 13 is preferably 50 nm or less in all cross sections parallel to the Z-axis direction.

[0016] The recess 15 widens from the portion connected to the through hole 20 to the tip 14 of the protrusion 13. For example, between adjacent protrusions 13 and recesses 15, the depth L2 from the tip 14 of the protrusion 13 to the boundary with the through hole 20 of the recess 15 is equal to or greater than the distance L1 between the tip 14 of the protrusion 13 and the central axis of the through hole 20. The distance L1 is equal to half the pitch between adjacent through holes 20. The depth L2 is, for example, 0.01 μm to 50 μm.

[0017] The dielectric film 30 covers the surface of the substrate 10. The surface of the substrate 10 includes the inner wall surfaces of the multiple through holes 20 and the inner wall surfaces of the multiple recesses 15, including the surfaces of the multiple protrusions 13. The dielectric film 30 is, for example, an oxide film, nitride film, or oxynitride film containing the same elements as the substrate 10. For example, if the substrate 10 is a conductive Si substrate, the dielectric film 30 is a Si oxide film, nitride film, or oxynitride film. The thickness of the dielectric film 30 is, for example, 1 nm to 1000 nm. The homogeneous and uniform thickness of the dielectric film 30 allows for a capacitor with little variation in capacitance and excellent voltage resistance characteristics. For this reason, separately forming the dielectric film 30 on the surface of the substrate 10 using a thin-film process is not preferable because it is difficult to achieve homogeneous and uniform thickness on the inner wall surfaces of the through holes 20 in the portions close to and away from the main surface.

[0018] The internal electrode 40 has a plurality of first regions 41 and a second region 42. The first regions 41 fill the through holes 20 inside the dielectric film 30. The second regions 42 are connected to the plurality of first regions 41 and cover the plurality of protrusions 13 with the dielectric film 30 sandwiched therebetween. The internal electrode 40 contains, for example, nickel (Ni), copper (Cu), palladium (Pd), platinum (Pt), silver (Ag), gold (Au), ruthenium (Ru), tungsten (W), molybdenum (Mo), titanium (Ti), or conductive silicon. The internal electrode 40 may contain an alloy material containing one or more of these metal elements. The internal electrode 40 may also contain other metal elements.

[0019] The insulating layer 90 covers the dielectric film 30 and the internal electrode 40. The material of the insulating layer 90 is, for example, a resin material such as polyimide, or silicon oxide (SiO ２ The insulating layer 90 may be made of an inorganic material such as silicon nitride (SiN), silicon oxynitride (SiON), or the like. The insulating layer 90 may be made of an insulating material other than these. The insulating layer 90 can protect the substrate 10, the dielectric film 30, and the internal electrodes 40 from the external environment. The thickness of the insulating layer 90 is, for example, 10 nm to 5000 nm.

[0020] A contact hole 30A is formed in the dielectric film 30, penetrating the dielectric film 30 in the Z-axis direction and reaching the main surface 11 of the substrate 10. A contact hole 90A is formed in the insulating layer 90, penetrating the insulating layer 90 in the Z-axis direction and continuing to the contact hole 30A, and a contact hole 90B is formed in the insulating layer 90 in the Z-axis direction and reaching the lower surface of the first region 41. At least a portion of the main surface 11 of the substrate 10 is exposed from the contact hole 90A and the contact hole 30A. At least a portion of the lower surface of the first region 41 is exposed from the contact hole 90B.

[0021] The external electrode 70 is provided so as to contact the lower surface of the insulating layer 90. The external electrode 70 has a lead portion 71 located within the contact hole 90A and the contact hole 30A. The upper end of the lead portion 71 contacts the substrate 10, and the external electrode 70 is electrically connected to the substrate 10. The external electrode 80 is provided so as to contact the lower surface of the insulating layer 90. The external electrode 80 has a lead portion 81 located within the contact hole 90B. The upper end of the lead portion 81 contacts the first region 41, and the external electrode 80 is electrically connected to the internal electrode 40. The external electrodes 70 and 80 contain, for example, copper (Cu), nickel (Ni), tin (Sn), palladium (Pd), platinum (Pt), silver (Ag), or gold (Au). The external electrodes 70 and 80 may contain an alloy material containing one or more of these metal elements. The external electrodes 70 and 80 may also contain other metal elements. The thickness of the external electrode 70 and the external electrode 80 is, for example, 100 nm to 10,000 nm. The lead portion 71 and the lead portion 81 may be formed independently of the external electrode 70 and the external electrode 80, respectively. The lead portion 71 and the lead portion 81 may be part of the substrate 10 and the internal electrode 40, respectively, and may be made of the same material as the substrate 10 and the internal electrode 40, respectively. The lead portion 71 and the lead portion 81 are conductor portions independent of the substrate 10 and the external electrode 70, and the internal electrode 40 and the external electrode 80, respectively, and may be made of a different material from each other; however, taking into consideration the thermal shrinkage rate of the material, it is preferable that the lead portion 71 and the lead portion 81 be made of the same material as either or both of the materials.

[0022] Voltages of opposite polarities are applied between the external electrode 70 and the external electrode 80. The external electrode 70 is an example of a first external electrode, and the external electrode 80 is an example of a second external electrode.

[0023] Next, a method for manufacturing the capacitor 1 according to the first embodiment will be described below. Fig. 5 is a flowchart showing the method for manufacturing the capacitor according to the first embodiment.

[0024] First, a plurality of through holes 20 and a plurality of recesses 15 are formed in the substrate 10 (step S1). Here, a method for forming the through holes 20 and the recesses 15 will be described. Figures 6A to 6C are cross-sectional views showing the method for forming the through holes 20 and the recesses 15.

[0025] First, as shown in FIG. 6A , a substrate 10 having a main surface 11 and a main surface 12 is prepared, and a plurality of bottomed holes 20X are formed in the substrate 10. To form the bottomed holes 20X, for example, a resist mask having openings exposing the areas where the through holes 20 are to be formed is formed on the main surface 11 by photolithography, and deep reactive ion etching (RIE) is performed from the main surface 11 using this resist mask. Deep RIE can be performed, for example, by the Bosch method. Instead of the Bosch method, a wet etching process such as photo-assisted electrolytic etching may be used. Using the wet etching process can reduce costs compared to the Bosch method. Furthermore, while the Bosch method uses greenhouse gases, the wet etching process does not require greenhouse gases, thereby reducing the burden on the global environment.

[0026] 6B , isotropic etching is performed on the substrate 10 from the main surface 12 to remove the bottoms of the bottomed holes 20X. As a result, through holes 20Y having a substantially constant opening diameter in the depth direction are formed. The isotropic etching from the main surface 12 of the substrate 10 is performed by wet etching using, for example, a mixed acid containing hydrofluoric acid, nitric acid, and acetic acid as an etchant solution. The substrate 10 gradually becomes thinner in the Z-axis direction until the bottoms of the bottomed holes 20X are removed.

[0027] Furthermore, isotropic etching of the substrate 10 is continued from the main surface 12. During this isotropic etching, the etchant solution also enters the through holes 20Y. As a result, the main surface 12 is etched into a concave shape at each through hole 20Y. As a result, as shown in FIG. 6C , multiple recesses 15 are formed in the main surface 12, and the remaining portions of the through holes 20Y become through holes 20. Furthermore, as the multiple recesses 15 are formed, multiple sharply pointed protrusions 13 are formed, each surrounded by three recesses 15.

[0028] In this manner, a plurality of through holes 20 and a plurality of recesses 15 can be formed in the substrate 10 .

[0029] After the through holes 20 and the recesses 15 are formed, a dielectric film 30 is formed on the surface of the substrate 10 (step S2). In forming the dielectric film 30, for example, the substrate 10 is thermally oxidized. By thermally oxidizing the substrate 10, an oxide film containing the same elements as the substrate 10 is formed as the dielectric film 30. When forming the dielectric film 30, the substrate 10 may be thermally nitrided or thermally oxynitrided. By thermally nitriding the substrate 10, a nitride film containing the same elements as the substrate 10 is formed as the dielectric film 30, and by thermally oxynitriding the substrate 10, an oxynitride film containing the same elements as the substrate 10 is formed as the dielectric film 30.

[0030] Next, the internal electrodes 40 are formed (step S3). The internal electrodes 40 can be formed by, for example, plating. Alternatively, the internal electrodes 40 may be formed by filling and firing a conductive paste.

[0031] Next, an insulating layer 90 is formed to cover the dielectric film 30 and the internal electrodes 40 (step S4). The insulating layer 90 can be formed by, for example, chemical vapor deposition (CVD). Next, contact holes 90A and 90B are formed in the insulating layer 90, and a contact hole 30A is formed in the dielectric film 30. The contact holes 90A, 90B, and 30A can be formed by, for example, etching using a mask.

[0032] Next, the external electrode 70 having the lead portion 71 and the external electrode 80 having the lead portion 81 are formed so as to be in contact with the lower surface of the insulating layer 90 (step S5). The external electrode 70 and the external electrode 80 can be formed by, for example, a sputtering method.

[0033] In this manner, the capacitor 1 according to the first embodiment can be manufactured.

[0034] In the capacitor 1 according to the first embodiment, the protrusion 13 is surrounded by three recesses 15 and has a generally triangular pyramidal shape, with the tip 14 of the protrusion 13 being formed at an acute angle in all cross sections parallel to the Z-axis direction. Therefore, when a voltage is applied between the external electrode 70 and the external electrode 80, an electric field tends to concentrate at the tip 14 of the protrusion 13. Therefore, when a breakdown occurs between the substrate 10 and the internal electrode 40, the region where the breakdown occurs is guided to the vicinity of the tips 14 of the protrusions 13, which are arranged in a dotted, dispersed manner.

[0035] Dielectric breakdown is likely to occur when a large voltage is applied between the substrate 10 and the internal electrode 40. When dielectric breakdown occurs between the substrate 10 and the internal electrode 40, the electric charge stored in the capacitor 1 flows concentratedly in the region where dielectric breakdown occurs. This causes a high-density current to flow in the region where dielectric breakdown occurs. This high-density current then generates Joule heat, which melts the substrate 10, the dielectric film 30, the internal electrode 40, and the like. When this dielectric breakdown occurs inside the through-hole 20, the melted substrate 10, the dielectric film 30, the internal electrode 40, and the like mix together and remain in the region where dielectric breakdown occurs, which can result in a short-circuit mode failure.

[0036] In contrast, in this embodiment, as described above, the region where breakdown occurs is guided near the tip 14 of the protrusion 13, where the electric field is likely to concentrate. Therefore, the region where breakdown occurs is near the outer surface of the capacitor 1. As a result, the substrate 10, dielectric film 30, internal electrode 40, and other components melted by breakdown are expelled to the outside of the capacitor 1 by evaporation or other means, and the failure mode of breakdown is induced to an open mode. For example, as shown in region 91 in FIG. 7 , a portion of the substrate 10, a portion of the dielectric film 30, a portion of the second region 42 of the internal electrode 40, and a portion of the insulating layer 90 melt and are expelled to the outside by evaporation or other means. Also, as shown in region 92 in FIG. 7 , a portion of the second region 42 of the internal electrode 40 and a portion of the insulating layer 90 may melt and be expelled to the outside by evaporation or other means. FIG. 7 is a cross-sectional view illustrating a failure mode in the capacitor according to the first embodiment. In addition, in a structure in which a narrow width portion is formed in a ridge shape, electric field concentration is less likely to occur compared to a structure in which a protrusion portion 13 is formed, and it may be more difficult to guide the area in which insulation breakdown occurs to the desired area.

[0037] As described above, according to the first embodiment, it is easier to reliably induce the failure mode into the open mode than in a structure in which a narrow width portion is formed in a ridge shape, and higher reliability can be obtained.

[0038] Furthermore, since only a small portion is lost when a dielectric breakdown occurs, the decrease in capacitance due to this loss can be suppressed. Furthermore, since the protrusions 13 are scattered independently of each other, even if there is a protrusion 13 at whose tip 14 an electric field is unlikely to concentrate due to manufacturing variations, if the electric field concentrates at the tip 14 of the protrusion 13 in the vicinity, the failure mode can be stably induced to the open mode.

[0039] Furthermore, since the external electrodes 70 and 80 are provided on the main surface 11 side of the substrate 10 opposite the main surface 12 on which the protrusions 13 are formed, evaporation of the components of the capacitor 1 due to dielectric breakdown is not prevented by the external electrodes 70 and 80.

[0040] When the dielectric film 30 is a silicon nitride film, a higher dielectric constant is more easily obtained and the electric field strength is reduced than when the dielectric film 30 is a silicon oxide film. Furthermore, when the dielectric film 30 is a silicon nitride film, the barrier properties of the substrate 10 can be improved compared to when the dielectric film 30 is a silicon oxide film.

[0041] Furthermore, when the dielectric film 30 is formed by thermal oxidation, thermal nitridation, or thermal oxynitridation of the substrate 10, the manufacturing cost and time can be reduced more easily than when it is formed by atomic layer deposition (ALD) or CVD.

[0042] Furthermore, by arranging the internal electrode 40 inside the through hole 20, the equivalent series inductance (ESL) and equivalent series resistance (ESR) can be reduced compared to when the internal electrode 40 is arranged in a bottomed trench.

[0043] The capacitor 1 according to the first embodiment is mounted on a circuit board, for example, with the main surface 11 facing the circuit board.

[0044] The portion of the dielectric film 30 that covers the main surface 11 of the substrate 10 may be removed.

[0045] Second Embodiment Next, a second embodiment will be described. The second embodiment differs from the first embodiment mainly in the configuration of the external electrodes. Fig. 8 is a cross-sectional view showing a capacitor according to the second embodiment.

[0046] As shown in FIG. 8 , in the capacitor 2 according to the second embodiment, the main surface 12 has a flat portion. The second region 42 of the internal electrode 40 also has a flat portion on its upper surface. A contact hole 230A is formed in the dielectric film 30, penetrating the dielectric film 30 in the Z-axis direction and reaching the flat portion of the main surface 12 of the substrate 10. A contact hole 290A is formed in the insulating layer 90, penetrating the insulating layer 90 in the Z-axis direction and continuing to the contact hole 230A, and a contact hole 290B is formed in the insulating layer 90 in the Z-axis direction and reaching the flat portion of the upper surface of the second region 42. Meanwhile, the contact hole 30A is not formed in the dielectric film 30, and neither the contact hole 90A nor the contact hole 90B is formed in the insulating layer 90.

[0047] The capacitor 2 has external electrodes 270 and 280 instead of the external electrodes 70 and 80. The external electrode 270 is provided so as to contact the upper surface of the insulating layer 90. The external electrode 270 has lead-out portions 271 located in the contact holes 290A and 230A. The lower end of the lead-out portion 271 contacts the base material 10, and the external electrode 270 is electrically connected to the base material 10. The external electrode 280 is provided so as to contact the upper surface of the insulating layer 90. The external electrode 280 has lead-out portion 281 located in the contact hole 290B. The lower end of the lead-out portion 281 contacts the second region 42, and the external electrode 280 is electrically connected to the internal electrode 40. The external electrodes 270 and 280 are made of, for example, the same material as the external electrodes 70 and 80.

[0048] As described above, in the second embodiment, the external electrode 270 and the external electrode 280 are provided above the main surface 12. In other words, the external electrode 270 has an electrode portion 279 whose main surface 12 is located between it and the main surface 11 in the direction in which the plurality of through holes 20 extend (the Z-axis direction), and the external electrode 280 has an electrode portion 289 whose main surface 12 is located between it and the main surface 11 in the Z-axis direction. Furthermore, no protrusions 13 are formed on the main surface 12 in a portion located between the electrode portion 279 and the main surface 11 in the Z-axis direction and in a portion located between the electrode portion 289 and the main surface 11 in the Z-axis direction. The electrode portion 279 is an example of a first electrode portion, and the electrode portion 289 is an example of a second electrode portion.

[0049] Other configurations of the second embodiment are similar to those of the first embodiment.

[0050] In the second embodiment, similarly to the first embodiment, the failure mode can be easily and reliably induced to the open mode, and higher reliability can be obtained.

[0051] Capacitor 2 is mounted on the circuit board with main surface 12 facing the circuit board. When capacitor 2 generates heat during operation, main surfaces 11 and 12 attempt to thermally expand, but the thermal expansion of main surface 12 is restrained by the circuit board. Therefore, although the mechanical strength of main surface 12 is lower than that of main surface 11 due to the formation of multiple recesses 15, damage such as cracks in main surface 12 caused by thermal expansion can be suppressed.

[0052] Furthermore, no protrusions 13 are formed on the main surface 12 in a portion located between the electrode portion 279 and the main surface 11 in the Z-axis direction and in a portion located between the electrode portion 289 and the main surface 11 in the Z-axis direction. Therefore, dielectric breakdown is unlikely to occur between the external electrode 270 and the main surface 12, and dielectric breakdown is also unlikely to occur between the external electrode 280 and the main surface 12. If a protrusion 13 is present between the external electrode 270 or the external electrode 280 and the main surface 12 and dielectric breakdown occurs near the tip 14 of the protrusion 13, there is a risk that substances generated as a result of the dielectric breakdown will be difficult to discharge by the external electrode 270 or the external electrode 280. In contrast, in the present embodiment, it is possible to suppress such hindrance to discharge.

[0053] Third Embodiment Next, a third embodiment will be described. The third embodiment differs from the second embodiment mainly in the configuration of the external electrodes. Fig. 9 is a cross-sectional view showing a capacitor according to the third embodiment.

[0054] As shown in FIG. 9 , the capacitor 3 according to the third embodiment has external electrodes 370 and 380 instead of the external electrodes 270 and 280. The external electrode 370 is in contact with the upper surface of the insulating layer 90 and is provided so as to cover the side surface of the substrate 10 on the +X side from above the dielectric film 30 and the insulating layer 90. The external electrode 370 has lead portions 371 located within the contact holes 290A and 230A. The lower end of the lead portion 371 is in contact with the substrate 10, and the external electrode 370 is electrically connected to the substrate 10. The external electrode 380 is in contact with the upper surface of the insulating layer 90 and is provided so as to cover the side surface of the substrate 10 on the -X side from above the dielectric film 30 and the insulating layer 90. The external electrode 380 has a lead portion 381 located within the contact hole 290B. The lower end of the lead portion 381 is in contact with the second region 42, and the external electrode 380 is electrically connected to the internal electrode 40. The external electrodes 370 and 380 are made of, for example, the same material as the external electrodes 70 and 80 .

[0055] External electrode 370 has electrode portion 379 whose main surface 12 is located between it and main surface 11 in the Z-axis direction, and external electrode 380 has electrode portion 389 whose main surface 12 is located between it and main surface 11 in the Z-axis direction. Furthermore, protrusion portion 13 is not formed on a portion of main surface 12 that is located between electrode portion 379 and main surface 11 in the Z-axis direction, and on a portion that is located between electrode portion 389 and main surface 11 in the Z-axis direction.

[0056] Other configurations of the third embodiment are the same as those of the second embodiment. The third embodiment also provides the same effects as those of the second embodiment. Furthermore, in the third embodiment, when a fluid conductive adhesive is used for mounting on a circuit board, the conductive adhesive can be made to wet and spread over a wide area of ​​the external electrodes 370 and 380, thereby achieving higher mounting reliability.

[0057] Fourth Embodiment Next, a fourth embodiment will be described. The fourth embodiment differs from the second embodiment mainly in the configuration of the external electrodes. Fig. 10 is a cross-sectional view showing a capacitor according to the fourth embodiment.

[0058] 10 , in the capacitor 4 according to the fourth embodiment, contact holes 30A and 230A are formed in the dielectric film 30, and contact holes 90A, 90B, 290A, and 290B are formed in the insulating layer 90. Furthermore, the capacitor 4 has external electrodes 70 and 80 in addition to external electrodes 270 and 280.

[0059] Other configurations of the fourth embodiment are the same as those of the second embodiment. The fourth embodiment also provides the same effects as those of the second embodiment.

[0060] The capacitor 4 according to the fourth embodiment can be mounted on a circuit board with either the main surface 11 or the main surface 12 facing the circuit board.

[0061] Fifth Embodiment Next, a fifth embodiment will be described. The fifth embodiment differs from the fourth embodiment mainly in the configuration of the external electrodes. Fig. 11 is a cross-sectional view showing a capacitor according to the fifth embodiment.

[0062] As shown in FIG. 11 , the capacitor 5 according to the fifth embodiment has an external electrode 570 instead of the external electrodes 70 and 270, and an external electrode 580 instead of the external electrodes 80 and 280. The external electrode 570 has a lead portion 571 located in the contact holes 90A and 30A, and a lead portion 572 located in the contact holes 290A and 230A. The upper end of the lead portion 571 and the lower end of the lead portion 572 contact the substrate 10, and the external electrode 570 is electrically connected to the substrate 10. The external electrode 580 has a lead portion 581 located in the contact hole 90B, and a lead portion 582 located in the contact hole 290B. The upper end of the lead portion 581 contacts the first region 41, and the lower end of the lead portion 582 contacts the second region 42, and the external electrode 580 is electrically connected to the internal electrode 40. The external electrodes 570 and 580 are made of, for example, the same material as the external electrodes 70 and 80 .

[0063] The external electrode 570 has an electrode portion 579 whose main surface 12 is located between it and the main surface 11 in the Z-axis direction, and the external electrode 580 has an electrode portion 589 whose main surface 12 is located between it and the main surface 11 in the Z-axis direction. Furthermore, no protrusions 13 are formed on the portion of the main surface 12 that is located between the electrode portion 579 and the main surface 11 in the Z-axis direction and on the portion that is located between the electrode portion 589 and the main surface 11 in the Z-axis direction.

[0064] Other configurations of the fifth embodiment are the same as those of the fourth embodiment. The fifth embodiment also provides the same effects as those of the fourth embodiment. Furthermore, in the fifth embodiment, when a fluid conductive adhesive is used for mounting on a circuit board, the conductive adhesive can be made to wet and spread over a wide area of ​​the external electrodes 570 and 580, thereby achieving higher mounting reliability.

[0065] Sixth Embodiment Next, a sixth embodiment will be described. The sixth embodiment differs from the fifth embodiment mainly in the configuration of the external electrodes. Fig. 12 is a front view showing a capacitor according to the sixth embodiment.

[0066] As shown in FIG. 12 , the capacitor 6 according to the sixth embodiment has external electrodes 670 and 680 instead of the external electrodes 570 and 580. The external electrode 670 has a lead portion 671 located in the contact holes 90A and 30A and a lead portion 672 located in the contact holes 290A and 230A. The upper end of the lead portion 671 and the lower end of the lead portion 672 contact the substrate 10, and the external electrode 670 is electrically connected to the substrate 10. The external electrode 680 has a lead portion 681 located in the contact hole 90B and a lead portion 682 located in the contact hole 290B. The upper end of the lead portion 681 contacts the first region 41, and the lower end of the lead portion 682 contacts the second region 42, and the external electrode 680 is electrically connected to the internal electrode 40.

[0067] In addition to the configuration of the external electrodes 570 and 580, the external electrodes 670 and 680 each have portions that cover two side surfaces perpendicular to the Y-axis direction. That is, the external electrode 670 covers five surfaces of the substrate 10: the +Z side surface (main surface 12), the -Z side surface (main surface 11), the +X side surface, the +Y side surface, and the -Y side surface. The external electrode 680 also covers five surfaces of the substrate 10: the +Z side surface (main surface 12), the -Z side surface (main surface 11), the -X side surface, the +Y side surface, and the -Y side surface. The external electrodes 670 and 680 are made of, for example, the same material as the external electrodes 70 and 80.

[0068] The external electrode 670 has an electrode portion 679 whose main surface 12 is located between it and the main surface 11 in the Z-axis direction, and the external electrode 680 has an electrode portion 689 whose main surface 12 is located between it and the main surface 11 in the Z-axis direction. Furthermore, no protrusions 13 are formed on the portion of the main surface 12 that is located between the electrode portion 679 and the main surface 11 in the Z-axis direction and on the portion that is located between the electrode portion 689 and the main surface 11 in the Z-axis direction.

[0069] Other configurations of the sixth embodiment are the same as those of the fifth embodiment. The sixth embodiment also provides the same effects as those of the fifth embodiment. Furthermore, in the sixth embodiment, when a fluid conductive adhesive is used for mounting on a circuit board, the conductive adhesive can be made to wet and spread over a wide area of ​​the external electrodes 670 and 680, thereby achieving higher mounting reliability.

[0070] Seventh Embodiment Next, a seventh embodiment will be described. The seventh embodiment differs from the second embodiment mainly in the configuration of the external electrodes. Fig. 13 is a cross-sectional view showing a capacitor according to the seventh embodiment.

[0071] As shown in FIG. 13 , the capacitor 7 according to the seventh embodiment has external electrodes 770 and 780 instead of the external electrodes 270 and 280. The side surface on the +X side of the substrate 10 is exposed from the dielectric film 30 and the insulating layer 90, and the external electrode 770 is in contact with this exposed portion. The external electrode 770 has a portion that covers the upper surface of the insulating layer 90. Furthermore, a part of the second region 42 of the internal electrode 40 is provided so as to cover the side surface on the −X side of the substrate 10 from above the dielectric film 30, and the external electrode 780 is in contact with this portion. The external electrode 780 has a portion that covers the upper surface of the insulating layer 90. The external electrodes 770 and 780 are made of, for example, the same material as the external electrodes 70 and 80.

[0072] The external electrode 770 has an electrode portion 779 whose main surface 12 is located between it and the main surface 11 in the Z-axis direction, and the external electrode 780 has an electrode portion 789 whose main surface 12 is located between it and the main surface 11 in the Z-axis direction. Furthermore, no protrusions 13 are formed on the portion of the main surface 12 that is located between the electrode portion 779 and the main surface 11 in the Z-axis direction and on the portion that is located between the electrode portion 789 and the main surface 11 in the Z-axis direction.

[0073] Other configurations of the seventh embodiment are the same as those of the second embodiment. The seventh embodiment can also achieve the same effects as those of the second embodiment.

[0074] A contact hole 230A may be formed in the dielectric film 30, and a contact hole 290A and a contact hole 290B may be formed in the insulating layer 90.

[0075] Eighth Embodiment Next, an eighth embodiment will be described. The eighth embodiment differs from the seventh embodiment mainly in the configuration of the external electrodes. Fig. 14 is a cross-sectional view showing a capacitor according to the eighth embodiment.

[0076] 14 , the capacitor 8 according to the eighth embodiment has an external electrode 880 instead of the external electrode 780. A plurality of first regions 41 are exposed from the side surface on the −X side of the substrate 10. The external electrode 880 is in contact with the plurality of first regions 41 exposed from the side surface on the −X side of the substrate 10. The external electrode 880 has a portion that covers the upper surface of the insulating layer 90. The external electrode 880 is made of, for example, the same material as the external electrode 80.

[0077] Other configurations of the eighth embodiment are the same as those of the seventh embodiment. The eighth embodiment can also achieve the same effects as those of the seventh embodiment.

[0078] Ninth Embodiment Next, a ninth embodiment will be described. The ninth embodiment differs from the eighth embodiment mainly in the configuration of the external electrodes. Fig. 15 is a cross-sectional view showing a capacitor according to the ninth embodiment.

[0079] 15 , the capacitor 9 according to the ninth embodiment has external electrodes 970 and 980 instead of the external electrodes 770 and 880. The external electrodes 970 differ from the external electrodes 770 in that they do not have a portion that covers the upper surface of the insulating layer 90. The external electrodes 980 differ from the external electrodes 880 in that they do not have a portion that covers the upper surface of the insulating layer 90.

[0080] Other configurations of the ninth embodiment are the same as those of the eighth embodiment. The ninth embodiment also provides the same effects as those of the eighth embodiment.

[0081] In each embodiment, in addition to the plurality of through holes 20 filled with the first regions 41 of the internal electrodes 40, a plurality of second through holes penetrating from the main surface 11 to the main surface 12 may be formed in the substrate 10, a dielectric film 30 may cover the inner wall surfaces of each of the plurality of second through holes, and a plurality of second internal electrodes may be provided to fill each of the plurality of second through holes inside the dielectric film 30. In this case, an external electrode electrically connected to the second internal electrodes may be provided. Voltages of different polarities are applied between the external electrode 70 etc. electrically connected to the internal electrode 40 and the external electrode connected to the second internal electrode, and the internal electrode 40 is used as an internal electrode of a first polarity and the second internal electrode is used as an internal electrode of a second polarity different from the first polarity.

[0082] Furthermore, the multiple first regions 41 of the internal electrode 40 used as internal electrodes of the first polarity and the multiple second internal electrodes used as internal electrodes of the second polarity may be arranged in a regular triangular lattice pattern in plan view in the direction in which the multiple through holes 20 extend (the Z-axis direction). In this case, for example, two first regions 41 and one second internal electrode may be repeatedly arranged between the multiple first regions 41 and the multiple second internal electrodes that are arranged in the closest packed direction in plan view in the Z-axis direction. Furthermore, the arrangement of the multiple first regions 41 and the multiple second internal electrodes that are arranged in the closest packed direction in plan view in the Z-axis direction is not limited to the above example, and for example, one first region 41 and one second internal electrode may be repeatedly arranged.

[0083] Tenth Embodiment Next, a tenth embodiment will be described. The tenth embodiment relates to a mounting board having a capacitor. Fig. 16 is a cross-sectional view showing a mounting board according to the tenth embodiment.

[0084] 16 , the mounting board 100 according to the tenth embodiment has a circuit board 110 and the capacitor 2 according to the second embodiment. The circuit board 110 is provided with a connection land 101 and a connection land 102. The capacitor 2 is mounted on the circuit board 110. An external electrode 270 is joined to the connection land 101, and an external electrode 280 is joined to the connection land 102.

[0085] As described above, when capacitor 2 generates heat during operation, main surfaces 11 and 12 attempt to thermally expand, but the thermal expansion of main surface 12 is restrained by circuit board 110. Therefore, although the mechanical strength of main surface 12 is lower than that of main surface 11 due to the formation of multiple recesses 15, damage such as cracks in main surface 12 caused by thermal expansion can be suppressed.

[0086] The mounting board 100 can be mounted on various electronic devices. Examples of electronic devices that include the mounting board 100 include smartphones, mobile phones, tablet terminals, and game consoles.

[0087] Capacitor 2 may be replaced by capacitors 1, 3, 4, 5, 6, 7, 8, or 9. Capacitor 2 may also be replaced by a capacitor having two types of internal electrodes with different polarities, as described above.

[0088] The shape of the cross section perpendicular to the longitudinal direction of the through hole 20 is not limited to a circular shape, and may be other shapes such as a square, rectangular, triangular, hexagonal, or zigzag. Furthermore, the plurality of through holes 20 may be arranged in other layouts such as a square lattice. Furthermore, the through hole 20 may have a tapered inner wall surface in which the opening area decreases with increasing distance from the main surface 11, or may have a tapered inner wall surface in which the opening area decreases with increasing distance from the main surface 12.

[0089] Although the embodiments have been described in detail above, the present disclosure is not limited to the specific embodiments, and various modifications and changes are possible within the scope of the claims.

[0090] This application claims priority based on Japanese Patent Application No. 2023-108378 filed with the Japan Patent Office on June 30, 2023, the entire contents of which are incorporated herein by reference.

[0091] Aspects of the present disclosure are, for example, as follows.

[0092] <1> A capacitor comprising: a conductive substrate having a first main surface and a second main surface opposite the first main surface; a plurality of through holes formed in the substrate and penetrating from the first main surface to the second main surface; a plurality of recesses formed in the second main surface, each of which has a bottom connected to the plurality of through holes; the substrate having a plurality of protrusions surrounded by three or more of the plurality of recesses; a dielectric film covering a surface of the substrate, the dielectric film including inner wall surfaces of each of the plurality of through holes and inner wall surfaces of the plurality of recesses including surfaces of the plurality of protrusions; and an internal electrode having a plurality of first regions inside the dielectric film and filling the plurality of through holes, respectively, and a second region connected to the plurality of first regions and covering the plurality of protrusions with the dielectric film sandwiched therebetween.

[0093] <2> The capacitor according to <1>, wherein the recess extends from a portion connected to the through hole to a tip of the protrusion.

[0094] <3> The capacitor according to <1> or <2>, wherein, between the protrusion and the recess adjacent to each other, a depth from a tip of the protrusion to a boundary of the recess with the through hole is equal to or greater than a distance between the tip of the protrusion and a central axis of the through hole.

[0095] <4> The capacitor according to any one of <1> to <3>, comprising: a first external electrode electrically connected to the substrate; and a second external electrode electrically connected to the internal electrode.

[0096] <5> The capacitor according to <4>, wherein the first external electrode has a first electrode portion whose second main surface is located between it and the first main surface in the direction in which the plurality of through holes extend, and the second external electrode has a second electrode portion whose second main surface is located between it and the first main surface in the direction in which the plurality of through holes extend.

[0097] <6> The capacitor according to <5>, wherein the protrusion is not formed on a portion of the second main surface that is located between the first electrode portion and the first main surface in the direction in which the plurality of through holes extend, and on a portion that is located between the second electrode portion and the first main surface in the direction in which the plurality of through holes extend.

[0098] <7> The capacitor according to <5> or <6>, wherein a portion of the second main surface located between the first electrode portion and the first main surface in the extension direction of the plurality of through holes and a portion of the second main surface located between the second electrode portion and the first main surface in the extension direction of the plurality of through holes are flat.

[0099] <8> The capacitor according to <1>, wherein, in addition to the plurality of through holes, a plurality of second through holes penetrating from the first main surface to the second main surface are formed in the substrate, the dielectric film covers the inner wall surfaces of each of the plurality of second through holes, and the capacitor has a plurality of second internal electrodes filling each of the plurality of second through holes inside the dielectric film, the polarity of the internal electrodes being a first polarity, and the polarity of the second internal electrodes being a second polarity different from the first polarity.

[0100] <9> The capacitor according to <8>, wherein two of the first regions and one of the second internal electrodes are repeatedly arranged between the first regions and the second internal electrodes that are aligned in a closest-packed direction in a planar view in the direction in which the through holes extend.

[0101] <10> The capacitor according to <8> or <9>, comprising: a first external electrode electrically connected to the internal electrode; and a second external electrode electrically connected to the plurality of second internal electrodes.

[0102] <11> The capacitor according to any one of <1> to <10>, wherein the dielectric film is an oxide film, a nitride film, or an oxynitride film containing the same element as the substrate.

[0103] <12> The capacitor according to any one of <1> to <11>, wherein the substrate contains silicon, hafnium, lanthanum, niobium, tantalum, titanium, or zirconium.

[0104] <13> A mounting board comprising: a circuit board; and the capacitor according to any one of <1> to <12> mounted on the circuit board.

[0105] <14> A method for manufacturing a capacitor, comprising the steps of: forming a plurality of through holes in a conductive base material, the through holes penetrating from the first main surface to the second main surface; isotropically etching the base material from ends of the plurality of through holes on the second main surface side, to form a plurality of recesses in the second main surface, each of which has a bottom connected to one of the plurality of through holes, and forming a plurality of protrusions in the base material, the protrusions being surrounded by three or more of the plurality of recesses; oxidizing, nitriding, or oxynitriding the base material to form a dielectric film covering a surface of the base material, the dielectric film including inner wall surfaces of the plurality of through holes and inner wall surfaces of the plurality of recesses including surfaces of the plurality of protrusions; and forming an internal electrode having a plurality of first regions inside the dielectric film and filling the plurality of through holes, respectively, and second regions connected to the plurality of first regions and covering the plurality of protrusions with the dielectric film sandwiched therebetween.

[0106] <15> The method for manufacturing a capacitor according to <14>, comprising: a step of forming a first external electrode electrically connected to the base material; and a step of forming a second external electrode electrically connected to the internal electrode.

[0107] <16> The method for manufacturing a capacitor according to <14>, further comprising the steps of: forming a plurality of second through holes in the base material, the second through holes penetrating from the first main surface to the second main surface, separate from the plurality of through holes; the dielectric film being formed so as to cover the inner wall surfaces of each of the plurality of second through holes; and forming a plurality of second internal electrodes filling the plurality of second through holes inside the dielectric film, respectively; the polarity of the internal electrodes being a first polarity; and the polarity of the second internal electrodes being a second polarity different from the first polarity.

[0108] <17> The method for manufacturing a capacitor according to <16>, comprising: a step of forming a first external electrode electrically connected to the internal electrode; and a step of forming second external electrodes electrically connected to the plurality of second internal electrodes.

[0109] DESCRIPTION OF SYMBOLS 1, 2, 3, 4, 5, 6, 7, 8, 9: Capacitor 10: Substrate 11, 12: Main surface 13: Protrusion 14: Tip 15: Recess 20: Through hole 30: Dielectric film 40: Internal electrode 41: First region 42: Second region 70, 80, 270, 280, 370, 380, 570, 580, 670, 680, 770, 780, 880, 970, 980: External electrode 100: Mounting substrate 101, 102: Connection land 110: Circuit board

Claims

a first main surface and a second main surface opposite the first main surface; a plurality of through holes formed in the substrate and penetrating from the first main surface to the second main surface, a plurality of recesses having bottoms each connected to the plurality of through holes, the substrate having a plurality of protrusions surrounded by three or more of the plurality of recesses, a dielectric film covering a surface of the substrate including inner wall surfaces of the plurality of through holes and inner wall surfaces of the plurality of recesses including surfaces of the plurality of protrusions, and an internal electrode having a plurality of first regions inside the dielectric film and filling each of the plurality of through holes, and a second region connected to the plurality of first regions and covering the plurality of protrusions with the dielectric film in between.

2. The capacitor according to claim 1, wherein the recess extends from the portion connected to the through hole to the tip of the protrusion.

3. A capacitor as described in claim 1 or 2, wherein the depth from the tip of the protrusion to the boundary of the recess with the through hole between adjacent protrusions and recesses is equal to or greater than the distance between the tip of the protrusion and the central axis of the through hole.

4. The capacitor according to claim 1 or 2, comprising: a first external electrode electrically connected to the substrate; and a second external electrode electrically connected to the internal electrode.

5. A capacitor as described in claim 4, wherein the first external electrode has a first electrode portion whose second main surface is located between it and the first main surface in the direction in which the multiple through holes extend, and the second external electrode has a second electrode portion whose second main surface is located between it and the first main surface in the direction in which the multiple through holes extend.

6. A capacitor as described in claim 5, wherein the protrusion is not formed on a portion of the second main surface located between the first electrode portion and the first main surface in the direction in which the multiple through holes extend, and on a portion of the second main surface located between the second electrode portion and the first main surface in the direction in which the multiple through holes extend.

7. The capacitor described in claim 5, wherein a portion of the second main surface located between the first electrode portion and the first main surface in the direction in which the multiple through holes extend, and a portion of the second main surface located between the second electrode portion and the first main surface in the direction in which the multiple through holes extend, are flat.

8. The capacitor described in claim 1, wherein a plurality of second through holes penetrating from the first main surface to the second main surface are formed in the substrate in addition to the plurality of through holes, the dielectric film covers the inner wall surfaces of each of the plurality of second through holes, and the dielectric film has a plurality of second internal electrodes filling each of the plurality of second through holes inside the dielectric film, the polarity of the internal electrodes being a first polarity, and the polarity of the second internal electrodes being a second polarity different from the first polarity.

9. The capacitor described in claim 8, wherein two of the first regions and one of the second internal electrodes are repeatedly arranged between the plurality of first regions and the plurality of second internal electrodes which are aligned in a closest packed direction in a planar view in the direction in which the plurality of through holes extend.

10. The capacitor according to claim 8 or 9, comprising: a first external electrode electrically connected to said internal electrode; and a second external electrode electrically connected to said plurality of second internal electrodes.

11. The capacitor according to claim 1 or 2, wherein the dielectric film is an oxide film, a nitride film or an oxynitride film containing the same elements as the substrate.

12. The capacitor of claim 1 or 2, wherein the substrate comprises silicon, hafnium, lanthanum, niobium, tantalum, titanium or zirconium.

13. A mounting board comprising: a circuit board; and the capacitor according to claim 1 or 2 mounted on the circuit board.

14. A method for manufacturing a capacitor, comprising the steps of: forming a plurality of through holes in a conductive substrate having a first main surface and a second main surface opposite to the first main surface, the through holes penetrating from the first main surface to the second main surface; isotropically etching the substrate from ends of the plurality of through holes on the second main surface side to form a plurality of recesses in the second main surface, the bottoms of which are connected to the plurality of through holes, and forming a plurality of protrusions in the substrate, the plurality of recesses being surrounded by three or more of the plurality of recesses; forming a dielectric film covering a surface of the substrate, the dielectric film including inner wall surfaces of the plurality of through holes and inner wall surfaces of the plurality of recesses including surfaces of the plurality of protrusions, by oxidizing, nitriding, or oxynitriding the substrate; and forming an internal electrode having a plurality of first regions filling the plurality of through holes respectively inside the dielectric film, and a second region connected to the plurality of first regions and covering the plurality of protrusions with the dielectric film sandwiched therebetween.

15. A method for manufacturing a capacitor as set forth in claim 14, comprising the steps of: forming a first external electrode electrically connected to the base material; and forming a second external electrode electrically connected to the internal electrode.

16. A method for manufacturing a capacitor as described in claim 14, further comprising the steps of forming a plurality of second through holes in the substrate, the second through holes penetrating from the first main surface to the second main surface, the dielectric film being formed so as to cover the inner wall surfaces of each of the second through holes, and forming a plurality of second internal electrodes filling the second through holes inside the dielectric film, respectively, the polarity of the internal electrodes being a first polarity, and the polarity of the second internal electrodes being a second polarity different from the first polarity.

17. The method of manufacturing a capacitor as set forth in claim 16, comprising the steps of: forming a first external electrode electrically connected to said internal electrode; and forming second external electrodes electrically connected to said plurality of second internal electrodes.

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