Edge-emitting semiconductor light-emitting structure and manufacturing method therefor

Abstract

The present application discloses an edge-emitting semiconductor light-emitting structure and a manufacturing method therefor. The edge-emitting semiconductor light-emitting structure comprises: a lower confinement layer, an active layer, and an upper confinement layer which are sequentially stacked on a semiconductor substrate layer. The edge-emitting semiconductor light-emitting structure has a first side wall and a second side wall which are oppositely arranged, wherein the first side wall and the second side wall are arranged in the slow axis direction of the edge-emitting semiconductor light-emitting structure. The side-emitting semiconductor light-emitting structure is provided with a current injection area located between the first side wall and the second side wall, wherein the current injection area is spaced apart from the first side wall and the second side wall; and a feature groove located on at least one side of the current injection area in the slow axis direction, wherein the feature groove is at least located in the upper confinement layer, the feature groove has a feature side wall facing the current injection area, and a plurality of protrusions facing the current injection area are provided on the surface of the feature side wall. The edge-emitting semiconductor light-emitting structure can reduce power jitter.

Description

Edge-emitting semiconductor light-emitting structure and preparation method thereof

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on July 19, 2023, with application number 2023108848376 and invention name “A side-emitting semiconductor light-emitting structure and its preparation method”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of semiconductor technology, and in particular to an edge-emitting semiconductor light-emitting structure and a preparation method thereof. Background Art

[0003] The development direction of high-power semiconductor laser chips is to achieve higher output optical power and higher brightness. Increasing the width of the light-emitting area of ​​the semiconductor laser chip and preparing a wide-waveguide semiconductor laser chip are effective means to increase optical power. For example, the power of a semiconductor laser chip with a waveguide width of 100 to 200 microns can reach over 20W. However, a problem caused by the increase in the width of the light-emitting area is that when the semiconductor laser chip is operating, not only will dozens or even more high-order optical modes be emitted simultaneously on the side of the semiconductor laser chip, but the semiconductor laser chip may even have optical modes bounded by the edge of the semiconductor laser chip. In this case, the semiconductor laser chip will experience severe power jitter. Existing methods for suppressing high-order modes include introducing anti-waveguide mode leakage structures on both sides of the wide waveguide and introducing light propagation loss structures at the edge of the waveguide. These structures have a suppressive effect on high-order optical modes propagating inside the current injection area or near the edge of the current injection area, but have no suppressive effect on optical modes bounded by the edge of the semiconductor laser chip, and cannot solve the problem of power jitter.

[0004] Summary of the Invention

[0005] Therefore, the technical problem to be solved by the present application is to solve the problem of power jitter of an edge-emitting semiconductor light-emitting structure, thereby providing an edge-emitting semiconductor light-emitting structure and a preparation method thereof.

[0006] The present application provides an edge-emitting semiconductor light-emitting structure, comprising: a semiconductor substrate layer; a lower confinement layer, an active layer, and an upper confinement layer stacked in sequence on the semiconductor substrate layer; the edge-emitting semiconductor light-emitting structure having a first sidewall and a second sidewall arranged opposite to each other, the first sidewall and the second sidewall being arranged in the slow axis direction of the edge-emitting semiconductor light-emitting structure; the edge-emitting semiconductor light-emitting structure having a current injection region located between the first sidewall and the second sidewall, the current injection region being spaced apart from the first sidewall and the second sidewall; a characteristic groove located on at least one side of the current injection region in the slow axis direction, the characteristic groove being located at least in the upper confinement layer, the characteristic groove having a characteristic sidewall facing the current injection region, the characteristic sidewall and the current injection region being spaced apart in the slow axis direction; and a surface of the characteristic sidewall being provided with a plurality of protrusions facing the current injection region.

[0007] Optionally, the characteristic sidewall is a diffuse reflection sidewall.

[0008] Optionally, the protrusions on the characteristic sidewall surface are strip-shaped; the surface of the characteristic sidewall is further provided with strip-shaped recesses between adjacent protrusions; the vertices of any adjacent protrusions on the characteristic sidewall surface are staggered in the slow axis direction; and / or the vertices of any adjacent protrusions on the characteristic sidewall surface are unequally spaced in the light-emitting direction. Optionally, the protrusions on the surface of the characteristic sidewall are distributed in the form of dots with uneven spacing.

[0009] Optionally, the characteristic side wall of the characteristic groove has an intersection line with a cross-sectional plane parallel to the upper surface of the semiconductor substrate layer, and the intersection line has a number of spaced randomly distributed points, and adjacent randomly distributed points on the intersection line have different coordinates in the slow axis direction and different coordinates in the light emitting direction of the semiconductor substrate layer.

[0010] Optionally, the intersection line is a curve or a broken line.

[0011] Optionally, the randomly distributed points on the intersection line include the first randomly distributed point to the Mth randomly distributed point, where M is an integer greater than or equal to 2; the position of any i-th randomly distributed point satisfies y i =y0+h*δ k And satisfy x i =L / M*(i+δ k ');δ k is the first random distribution function, h is the random range width of the diffuse scattering slot; i is an integer greater than or equal to 1 and less than or equal to M, y i is the coordinate of the i-th randomly distributed point in the slow axis direction; x iis the coordinate of the i-th randomly distributed point in the light-emitting direction of the semiconductor substrate layer, y0 is the average value of the coordinates of the first to M-th randomly distributed points in the slow axis direction; L is a fixed value less than or equal to the cavity length of the edge-emitting semiconductor light-emitting structure; δ k ' is the second random distribution function.

[0012] Optionally, the value of the first random distribution function is a random number within a range of -0.5 to 0.5; the value of the second random distribution function is a random number within a range of -0.5 to 0.5.

[0013] Optionally, h≥λ / 2n, λ is the operating wavelength of the edge-emitting semiconductor light-emitting structure, and n is the effective refractive index of the current injection region.

[0014] Optionally, the protrusions on the surface of the characteristic sidewall are in the shape of strips; the surface of the characteristic sidewall is also provided with strip-shaped depressions between adjacent protrusions, and the protrusions and depressions on the surface of the characteristic sidewall are periodically arranged along the light emitting direction of the edge-emitting semiconductor light-emitting structure; the length of a period of the arrangement of the protrusions and depressions is d≥λ / 2n, λ is the operating wavelength of the edge-emitting semiconductor light-emitting structure, and n is the effective refractive index of the current injection area.

[0015] Optionally, the length direction of the protrusion is perpendicular to the light emitting direction of the edge-emitting semiconductor light emitting structure, or the length direction of the protrusion is not perpendicular to the light emitting direction of the edge-emitting semiconductor light emitting structure.

[0016] Optionally, for the protrusions and depressions on the characteristic sidewall surface, a ratio of a maximum value of a coordinate change of the protrusions and depressions in the slow axis direction corresponding to one period length to the period length d is greater than or equal to 0.1.

[0017] Optionally, the characteristic groove is only located on one side of the current injection region in the slow axis direction.

[0018] Optionally, the characteristic grooves are located on both sides of the current injection region in the slow axis direction.

[0019] Optionally, the distance between the characteristic sidewall of the characteristic groove and the edge of the current injection region is greater than or equal to 10 microns.

[0020] Optionally, it further includes: a lower waveguide layer located between the active layer and the lower confinement layer; an upper waveguide layer located between the upper confinement layer and the active layer; and the characteristic groove is located at least in the upper waveguide layer and the upper confinement layer.

[0021] Optionally, the characteristic groove is located in the upper waveguide layer and the upper confinement layer and does not extend into the active layer; or, the characteristic groove is located in the upper waveguide layer, the upper confinement layer and the active layer and does not extend into the lower waveguide layer; or, the characteristic groove is located in the upper waveguide layer, the upper confinement layer, the active layer and the lower waveguide layer and does not extend into the lower confinement layer; or, the characteristic groove is located in the upper waveguide layer, the upper confinement layer, the active layer, the lower waveguide layer and the lower confinement layer and does not extend into the semiconductor substrate layer.

[0022] Optionally, the depth of the characteristic groove on one side of the current injection region is consistent with or inconsistent with the depth of the characteristic groove on the other side of the current injection region.

[0023] Optionally, the edge-emitting semiconductor light-emitting structure has a front cavity surface and a rear cavity surface arranged opposite to each other, the front cavity surface is connected to both the first side wall and the second side wall, and the rear cavity surface is connected to both the first side wall and the second side wall; the characteristic groove is located between the front cavity surface and the rear cavity surface.

[0024] Optionally, the characteristic groove is spaced apart from both the front cavity surface and the rear cavity surface.

[0025] Optionally, the diffuse reflection sidewall of the characteristic groove is connected to the front cavity surface and / or the rear cavity surface.

[0026] Optionally, it also includes: a first etching groove and a second etching groove located in the upper confinement layer of partial thickness, the upper confinement layer between the first etching groove and the second etching groove constitutes a ridge region; the ridge region and the lower confinement layer, lower waveguide layer, active layer, upper waveguide layer and upper confinement layer below the ridge region serve as the current injection region; the characteristic groove is located at the bottom of the first etching groove and / or the bottom of the second etching groove.

[0027] The present application also provides a method for preparing an edge-emitting semiconductor light-emitting structure, comprising: providing a semiconductor substrate layer; sequentially forming a stacked lower confinement layer, an active layer, and an upper confinement layer on the semiconductor substrate layer; the edge-emitting semiconductor light-emitting structure having a first sidewall and a second sidewall arranged opposite to each other, the first sidewall and the second sidewall being arranged in the slow axis direction of the edge-emitting semiconductor light-emitting structure; the edge-emitting semiconductor light-emitting structure having a current injection region located between the first sidewall and the second sidewall, and the current injection region being spaced apart from the first sidewall and the second sidewall; forming a characteristic groove on at least one side of the current injection region along the slow axis direction, the characteristic groove being located at least in the upper confinement layer, the characteristic groove having a characteristic sidewall facing the current injection region, the characteristic sidewall and the current injection region being spaced apart in the slow axis direction; and a surface of the characteristic sidewall being provided with a plurality of protrusions facing the current injection region.

[0028] Optionally, it also includes: before forming the characteristic groove, forming a first etching groove and a second etching groove in the upper confinement layer of partial thickness, the upper confinement layer between the first etching groove and the second etching groove constitutes a ridge area; the ridge area and the lower confinement layer, lower waveguide layer, active layer, upper waveguide layer and upper confinement layer below the ridge area serve as the current injection area; the step of forming the characteristic groove is: forming the characteristic groove at the bottom of the first etching groove and / or the bottom of the second etching groove.

[0029] Optionally, the method further includes: before forming the active layer, forming a lower waveguide layer on the side of the lower confinement layer facing away from the semiconductor substrate layer; before forming the upper confinement layer, forming an upper waveguide layer on the side of the active layer facing away from the semiconductor substrate layer; in the step of forming a characteristic groove on at least one side of the current injection region along the slow axis direction, the characteristic groove is located at least in the upper waveguide layer and the upper confinement layer.

[0030] The technical solution of this application provides the following beneficial effects:

[0031] The edge-emitting semiconductor light-emitting structure provided by the technical solution of the present application is provided with a characteristic groove, which is located at least in the upper confinement layer. The characteristic groove has a characteristic sidewall facing the current injection region, and the characteristic sidewall and the current injection region are arranged in the slow axis direction. The characteristic sidewall of the characteristic groove prevents light from propagating to the first sidewall and / or the second sidewall, avoiding the lasing of the light mode bounded by the first sidewall, the second sidewall, the front cavity surface, and the rear cavity surface, further increasing the resonance of light between the front cavity surface and the rear cavity surface, allowing more light to be emitted from the front cavity surface and reducing power jitter.

[0032] Furthermore, the characteristic sidewall is a diffuse reflection sidewall, and light is randomly scattered on the diffuse reflection sidewall, which effectively avoids the lasing of light modes bounded by the first sidewall, the second sidewall, the front cavity surface and the rear cavity surface.

[0033] Furthermore, the protrusions on the characteristic sidewall surface are strip-shaped, with the length direction of the protrusions parallel to the fast axis direction of the edge-emitting semiconductor light-emitting structure. The surface of the characteristic sidewall is also provided with strip-shaped recesses between adjacent protrusions. The protrusions and recesses on the characteristic sidewall surface are periodically arranged along the light emission direction of the edge-emitting semiconductor light-emitting structure. The length of a period of the protrusions and recesses is d ≥ λ / 2n, where λ is the operating wavelength of the edge-emitting semiconductor light-emitting structure and n is the effective refractive index of the current injection region. Light can be diffracted at the characteristic sidewall, effectively avoiding lasing of light modes bounded by the first sidewall, the second sidewall, the front cavity surface, and the rear cavity surface. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the specific implementation methods of the present application or the technical solutions in the prior art, the following is a brief introduction to the drawings required for use in the specific implementation methods or the description of the prior art. Obviously, the drawings described below are some implementation methods of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0035] FIG1 is a schematic diagram of an edge-emitting semiconductor light-emitting structure provided by an embodiment of the present application;

[0036] FIG2 is a schematic cross-sectional view taken along the cutting line W1-W2 in FIG1 ;

[0037] FIG3 is a schematic diagram of an edge-emitting semiconductor light-emitting structure provided by another embodiment of the present application;

[0038] FIG4 is a schematic diagram of an edge-emitting semiconductor light-emitting structure provided by another embodiment of the present application;

[0039] FIG5 is a schematic diagram of an edge-emitting semiconductor light-emitting structure provided by another embodiment of the present application;

[0040] FIG6 is a schematic diagram of a diffuse scattering groove arrangement area in the edge-emitting semiconductor light-emitting structure of FIG4 ;

[0041] FIG7 is a top view of an edge-emitting semiconductor light-emitting structure according to another embodiment of the present application;

[0042] FIG8 is a schematic diagram of a three-dimensional structure of an edge-emitting semiconductor light-emitting structure according to another embodiment of the present application. DETAILED DESCRIPTION

[0043] The present application provides an edge-emitting semiconductor light-emitting structure, comprising: a semiconductor substrate layer; a lower confinement layer, an active layer, and an upper confinement layer stacked in sequence on the semiconductor substrate layer; the edge-emitting semiconductor light-emitting structure having a first sidewall and a second sidewall arranged opposite to each other, the first sidewall and the second sidewall being arranged in the slow axis direction of the edge-emitting semiconductor light-emitting structure; the edge-emitting semiconductor light-emitting structure having a current injection region located between the first sidewall and the second sidewall, the current injection region being spaced apart from the first sidewall and the second sidewall; a characteristic groove located on at least one side of the current injection region in the slow axis direction, the characteristic groove being located at least in the upper confinement layer, the characteristic groove having a characteristic sidewall facing the current injection region, the characteristic sidewall and the current injection region being spaced apart in the slow axis direction; and a surface of the characteristic sidewall being provided with a plurality of protrusions facing the current injection region.

[0044] The following will clearly and completely describe the technical solution of this application in conjunction with the accompanying drawings. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making any creative efforts are within the scope of protection of this application.

[0045] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings and are intended solely to facilitate the description of this application and simplify the description. They do not indicate or imply that the devices or components referred to must have a specific orientation, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0046] In the description of this application, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; mechanical connections or electrical connections; direct connections or indirect connections through an intermediate medium; and internal connections between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on the specific circumstances.

[0047] In addition, the technical features involved in the different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.

[0048] Example 1

[0049] This embodiment provides an edge-emitting semiconductor light-emitting structure, referring to FIG1 and FIG2 , including:

[0050] a semiconductor substrate layer 100;

[0051] A lower confinement layer 110, a lower waveguide layer 120, an active layer 130, an upper waveguide layer 140 and an upper confinement layer 150 sequentially stacked on the semiconductor substrate layer 100;

[0052] The edge-emitting semiconductor light-emitting structure has a first side wall 1001 and a second side wall 1002 that are opposite to each other, and the first side wall 1001 and the second side wall 1002 are arranged in the slow axis direction of the edge-emitting semiconductor light-emitting structure; the edge-emitting semiconductor light-emitting structure has a current injection region A located between the first side wall 1001 and the second side wall 1002, and the current injection region A is spaced apart from the first side wall 1001 and the second side wall 1002;

[0053] A characteristic groove C is located on at least one side of the current injection area A in the slow axis direction, and the characteristic groove C is located at least in the upper limiting layer 150. The characteristic groove C has a characteristic sidewall C1 facing the current injection area A, and the characteristic sidewall C1 is a diffuse reflection sidewall. The surface of the characteristic sidewall C1 is provided with a plurality of protrusions facing the current injection area A, and the characteristic sidewall C1 and the current injection area A are arranged at intervals in the slow axis direction.

[0054] Furthermore, the characteristic groove C is located at least in the upper waveguide layer 140 and the upper confinement layer 150 .

[0055] In this embodiment, the diffusely reflective sidewalls of the characteristic groove C prevent light from propagating to the first sidewall 1001 and / or the second sidewall 1002. Light is randomly scattered on the diffusely reflective sidewalls, effectively preventing the lasing of optical modes bounded by the first sidewall 1001, the second sidewall 1002, the front cavity facet, and the rear cavity facet. This further increases the resonance of light between the front and rear cavity facets, allowing more light to be emitted from the front cavity facet and reducing power jitter.

[0056] The edge-emitting semiconductor light-emitting structure is, for example, an edge-emitting semiconductor laser.

[0057] The characteristic groove C extends in length from the front cavity surface to the back cavity surface, and the width direction of the characteristic groove C is parallel to the slow axis direction.

[0058] In one embodiment, the distance between the characteristic sidewall C1 of the characteristic groove C and the edge of the current injection area A is greater than or equal to 10 microns, for example, 12 microns or 15 microns. If the distance between the characteristic sidewall C1 of the characteristic groove C and the edge of the current injection area A is too small, a portion of the low-order mode light in the current injection area A will be lost.

[0059] In this embodiment, referring to FIG1 , the characteristic grooves C are located on both sides of the current injection region A in the slow axis direction, thereby further enhancing the degree of random scattering of light on the characteristic sidewall C1.

[0060] In another embodiment, referring to FIG3 , the feature groove C is located only on one side of the current injection region A in the slow axis direction. In FIG3 , the feature groove C is located only between the current injection region A and the second sidewall 1002. In other embodiments, the feature groove is located only between the current injection region and the first sidewall.

[0061] 2 , the characteristic groove C is located in the upper waveguide layer 140, the upper confinement layer 150, the active layer 130, and the lower waveguide layer 120, and does not extend into the lower confinement layer 110. Specifically, the characteristic groove C is located in the upper waveguide layer 140, the upper confinement layer 150, the active layer 130, and a portion of the lower waveguide layer 120, and does not extend into the lower confinement layer 110.

[0062] In another embodiment, the characteristic groove is located in the upper waveguide layer, the upper confinement layer, the active layer and the lower waveguide layer, and the bottom surface of the characteristic groove is located at the interface between the lower confinement layer and the lower waveguide layer.

[0063] In other embodiments, the characteristic groove is located in the upper waveguide layer and the upper confinement layer and does not extend into the active layer; or, the characteristic groove is located in the upper waveguide layer, the upper confinement layer, and the active layer and does not extend into the lower waveguide layer; or, the characteristic groove is located in the upper waveguide layer, the upper confinement layer, the active layer, the lower waveguide layer, and the lower confinement layer and does not extend into the semiconductor substrate layer.

[0064] When the characteristic groove C extends from the upper confinement layer 150 at least into the lower waveguide layer 120 , the characteristic groove C can scatter light propagating in both the lower waveguide layer 120 and the upper waveguide layer 140 , further enhancing the degree of random scattering of light on the characteristic sidewall C1 .

[0065] In this embodiment, the depth of the characteristic groove C on one side of the current injection area A is consistent with the depth of the characteristic groove C on the other side of the current injection area A. In other embodiments, the depth of the characteristic groove on one side of the current injection area is inconsistent with the depth of the characteristic groove on the other side of the current injection area.

[0066] The edge-emitting semiconductor light-emitting structure has a front cavity surface and a rear cavity surface arranged opposite to each other, the front cavity surface is connected to both the first side wall and the second side wall, and the rear cavity surface is connected to both the first side wall and the second side wall; the characteristic groove is located between the front cavity surface and the rear cavity surface.

[0067] 1 and 3 , the characteristic sidewall C1 of the characteristic groove C is connected to both the front cavity surface and the rear cavity surface.

[0068] In other embodiments, referring to FIG4 , the characteristic groove C′ is spaced apart from both the front cavity surface and the rear cavity surface. Referring to FIG5 , the characteristic groove C″ is spaced apart from both the front cavity surface and the rear cavity surface.

[0069] In other embodiments, the characteristic sidewall of the characteristic groove is connected to the front cavity surface or the back cavity surface.

[0070] The edge-emitting semiconductor light-emitting structure further includes an insulating dielectric layer (not shown) located in the characteristic groove.

[0071] In one embodiment, the refractive index of the insulating dielectric layer is smaller than the refractive indexes of the lower confinement layer, the lower waveguide layer, the active layer, the upper waveguide layer, and the upper confinement layer. This enhances the confinement effect on light emitted from the current injection region toward the first and second sidewalls, further reducing power jitter.

[0072] In other embodiments, there is no restriction on the refractive index of the insulating medium layer.

[0073] In one embodiment, the insulating dielectric layer is made of silicon oxide, silicon nitride or aluminum oxide.

[0074] In one embodiment, the characteristic groove is not filled with a medium, and the characteristic groove is a hollow structure.

[0075] The characteristic side wall C1 of the characteristic groove C has an intersection line with a cross-sectional plane parallel to the upper surface of the semiconductor substrate layer 100, and the intersection line has a number of spaced randomly distributed points. The adjacent randomly distributed points on the intersection line have different coordinates in the slow axis direction and different coordinates in the light emitting direction of the semiconductor substrate layer.

[0076] The intersection line is a curve or a broken line.

[0077] The random distribution points on the intersection line include the first random distribution point to the Mth random distribution point, where M is an integer greater than or equal to 2. The position of any i-th random distribution point satisfies y i =y0+h*δ k And satisfy x i =L / M*(i+δ k ');δ k is the first random distribution function, h is the random range width of the diffuse scattering slot; i is an integer greater than or equal to 1 and less than or equal to M, y i is the coordinate of the i-th randomly distributed point in the slow axis direction; x i is the coordinate of the i-th randomly distributed point in the light-emitting direction of the semiconductor substrate layer, y0 is the average value of the coordinates of the first to M-th randomly distributed points in the slow axis direction; L is a fixed value less than or equal to the cavity length of the edge-emitting semiconductor light-emitting structure; δ k ' is the second random distribution function. Wherein, h is equal to the difference between the maximum and minimum values ​​of the coordinates of the first random distribution point to the Mth random distribution point in the slow axis direction.

[0078] In one embodiment, the value of the first random distribution function is a random number within a range of -0.5 to 0.5; the value of the second random distribution function is a random number within a range of -0.5 to 0.5.

[0079] In one embodiment, h≥λ / 2n, λ is the operating wavelength of the edge-emitting semiconductor light-emitting structure, and n is the effective refractive index of the current injection region. The advantage is that the degree of diffuse reflection is increased.

[0080] In one embodiment, the protrusions on the characteristic sidewall surface are strip-shaped; the surface of the characteristic sidewall is further provided with strip-shaped recesses between adjacent protrusions; the vertices of any adjacent protrusions on the characteristic sidewall surface are staggered in the slow axis direction; and / or the vertices of any adjacent protrusions on the characteristic sidewall surface are unequally spaced in the light-emitting direction. The length direction of the protrusions is perpendicular to the light-emitting direction of the edge-emitting semiconductor light-emitting structure, or the length direction of the protrusions is not perpendicular to the light-emitting direction of the edge-emitting semiconductor light-emitting structure, and the length of the protrusions is not parallel to the light-emitting direction of the semiconductor light-emitting structure.

[0081] In another embodiment, the plurality of protrusions on the surface of the characteristic sidewall are distributed in the form of dots with uneven intervals.

[0082] In one embodiment, when the characteristic groove C is located on both sides of the current injection region A in the slow axis direction, the characteristic sidewalls C1 on both sides of the current injection region A have a first intersection line and a second intersection line with the same cross-sectional plane, respectively, and the first intersection line and the second intersection line are located on both sides of the current injection region A. In a specific embodiment, the coordinates of any i-th randomly distributed point in the first intersection line in the light-emitting direction of the semiconductor substrate layer and the coordinates of the i-th randomly distributed point in the second intersection line in the light-emitting direction of the semiconductor substrate layer are different. In another specific embodiment, the coordinates of the i-th randomly distributed point in the first intersection line in the light-emitting direction of the semiconductor substrate layer and the coordinates of the i-th randomly distributed point in the second intersection line in the light-emitting direction of the semiconductor substrate layer are the same.

[0083] The edge-emitting semiconductor light-emitting structure further includes: Referring to FIG. 2 , a first etched groove and a second etched groove located in a portion of the thickness of the upper confinement layer 150; the upper confinement layer between the first and second etched grooves constitutes a ridge region; the ridge region and the lower confinement layer, lower waveguide layer, active layer, upper waveguide layer, and upper confinement layer below the ridge region serve as the current injection region A; and the characteristic groove C located at the bottom of the first etched groove and the bottom of the second etched groove, respectively. In other embodiments, the characteristic groove is located at the bottom of either the first etched groove or the bottom of the second etched groove.

[0084] The characteristic groove has a secondary sidewall on a side away from the current injection region, and the secondary sidewall is a secondary diffuse reflection sidewall, or the secondary sidewall is a plane.

[0085] Referring to FIG6 , the edge-emitting semiconductor light-emitting structure has a characteristic plane parallel to the light-emitting direction and the slow axis direction. The characteristic plane intersects with the characteristic groove C'. The characteristic plane has a first vertex B1, a second vertex B2, a third vertex B3, and a fourth vertex B4. The outer contour of the characteristic plane includes a first side, a second side, a third side, and a fourth side. The first side and the second side are arranged opposite each other, and the third side and the fourth side are arranged opposite each other. The first side is connected to the third side and the fourth side, respectively, and the second side is connected to the third side and the fourth side, respectively. The first side is the intersection line of the first sidewall 1001 and the characteristic plane, the second side is the intersection line of the second sidewall 1002 and the characteristic plane, the third side is the intersection line of the front cavity surface and the characteristic plane, and the fourth side is the intersection line of the rear cavity surface and the characteristic plane. The first vertex B1 is the point of the intersection line of the first side wall 1001 and the front cavity surface in the characteristic plane, and is also the intersection point of the first side and the third side; the second vertex B2 is the point of the intersection line of the first side wall 1001 and the back cavity surface in the characteristic plane, and is also the intersection point of the first side and the fourth side; the third vertex B3 is the point of the intersection line of the second side wall 1002 and the front cavity surface in the characteristic plane, and is also the intersection point of the second side and the third side; the fourth vertex B4 is the point of the intersection line of the second side wall 1002 and the back cavity surface in the characteristic plane, and is also the intersection point of the second side and the fourth side.

[0086] The interior of the characteristic plane has a fifth characteristic point B5, a sixth characteristic point B6, a seventh characteristic point B7, an eighth characteristic point B8, a ninth characteristic point B9, a tenth characteristic point B10, an eleventh characteristic point B11 and a twelfth characteristic point B12. The fifth characteristic point B5 is the intersection of the line connecting the midpoint of the first side to the midpoint of the third side and the line connecting the first vertex B1 to the fourth vertex B4; the sixth characteristic point B6 is the intersection of the line connecting the midpoint of the first side to the midpoint of the fourth side and the line connecting the third vertex B3 to the second vertex B2; the seventh characteristic point B7 is the intersection of the line connecting the midpoint of the second side to the midpoint of the third side and the line connecting the third vertex B3 to the second vertex B2; the eighth characteristic point B8 is the intersection of the line connecting the midpoint of the second side to the midpoint of the fourth side and the line connecting the first vertex B1 to the fourth vertex B4; the ninth characteristic point B9 is located on the first side. The first vertex B1, the fifth feature point B5, and the ninth feature point B9 are connected in sequence to form a first fold line. The second vertex B2, the sixth feature point B6, and the tenth feature point B10 are connected in sequence to form a second fold line. The third vertex B3, the seventh feature point B7, and the eleventh feature point B11 are connected in sequence to form a third fold line. The fourth vertex B4, the eighth feature point B8, and the twelfth feature point B12 are connected in sequence to form a fourth fold line.

[0087] When the characteristic groove C′ is located between the second sidewall 1002 and the current injection area A, the characteristic groove C′ spans the third fold line and the fourth fold line in the length direction.

[0088] When the characteristic groove is located between the first sidewall and the current injection region, the characteristic groove spans the first fold line and the second fold line in the length direction.

[0089] The position setting of the characteristic grooves described above effectively destroys the propagation of light along all parallelograms formed by sequentially connecting a point on the first side, a point on the third side, a point on the second side, and a point on the fourth side.

[0090] Example 2

[0091] The difference between this embodiment and embodiment 1 is that the edge-emitting semiconductor light-emitting structure of this embodiment includes: a lower confinement layer, an active layer, and an upper confinement layer stacked in sequence on a semiconductor substrate layer; the edge-emitting semiconductor light-emitting structure has a first sidewall and a second sidewall disposed opposite each other, the first sidewall and the second sidewall being arranged in the direction of the slow axis of the edge-emitting semiconductor light-emitting structure; the edge-emitting semiconductor light-emitting structure has a current injection region located between the first sidewall and the second sidewall, the current injection region being spaced apart from the first sidewall and the second sidewall; a characteristic groove located on at least one side of the current injection region in the slow axis direction, the characteristic groove being located in at least the upper confinement layer, the characteristic groove having a characteristic sidewall facing the current injection region; and a plurality of protrusions disposed on the surface of the characteristic sidewall facing the current injection region. The difference between the edge-emitting semiconductor light-emitting structure of this embodiment and embodiment 1 is that the edge-emitting semiconductor light-emitting structure does not include a lower waveguide layer and an upper waveguide layer.

[0092] The characteristic groove is located in the upper confinement layer and does not extend into the active layer; or, the characteristic groove is located in the upper confinement layer and the active layer and does not extend into the lower confinement layer; or, the characteristic groove is located in the upper confinement layer, the active layer and the lower confinement layer and does not extend into the semiconductor substrate layer.

[0093] For other descriptions of the edge-emitting semiconductor light-emitting structure of this embodiment, please refer to Example 1 and will not be described in detail.

[0094] Example 3

[0095] Referring to Figures 7 and 8, Figure 8 is a schematic diagram of the three-dimensional structure corresponding to Figure 7. In this embodiment, the characteristic groove S has a characteristic sidewall S1 facing the current injection area A, and the protrusions on the surface of the characteristic sidewall S1 are strip-shaped. The surface of the characteristic sidewall S1 is also provided with strip-shaped recesses between adjacent protrusions. The difference between this embodiment and Example 1 is that the protrusions and recesses on the characteristic sidewall surface S1 are periodically arranged along the light emission direction of the edge-emitting semiconductor light-emitting structure; the length of a period of the protrusions and recesses is d ≥ λ / 2n, where λ is the operating wavelength of the edge-emitting semiconductor light-emitting structure and n is the effective refractive index of the current injection area.

[0096] The length direction of the protrusion is perpendicular to the light emission direction of the edge-emitting semiconductor light-emitting structure, or the length direction of the protrusion is not perpendicular to the light emission direction of the edge-emitting semiconductor light-emitting structure, and the length of the protrusion is not parallel to the light emission direction of the semiconductor light-emitting structure. Figure 8 takes the example of the protrusion having a length direction perpendicular to the light emission direction of the edge-emitting semiconductor light-emitting structure.

[0097] The period length is relatively large, and the light emitted from the current injection area A is diffracted on the surface of the characteristic side wall S1, effectively avoiding the lasing of the light mode bounded by the first side wall 1001, the second side wall 1002, the front cavity surface and the back cavity surface.

[0098] In one embodiment, the distance between the characteristic sidewall S1 of the characteristic groove S and the edge of the current injection region A is greater than or equal to 10 micrometers, for example, 12 micrometers or 15 micrometers.

[0099] In one embodiment, for the protrusions and depressions on the surface of the characteristic sidewall S1, the ratio of the maximum value of the coordinate change of the protrusions and depressions in the slow axis direction corresponding to one period length to the period length d is greater than or equal to 0.1. A large ratio increases the ability of the characteristic sidewall S1 to change the direction of the optical path.

[0100] 7 and 8 take as an example the case where the characteristic groove S is located only on one side of the current injection region A in the slow axis direction. In other embodiments, the characteristic grooves are located on both sides of the current injection region A in the slow axis direction.

[0101] The depth position of the characteristic groove refers to the description of Example 1 and will not be described in detail.

[0102] When the characteristic groove extends from the upper confinement layer 150 at least into the lower waveguide layer 120 , the characteristic groove can diffract light propagating in both the lower waveguide layer 120 and the upper waveguide layer 140 , further enhancing the degree of light diffraction on the characteristic sidewall C1 .

[0103] When the characteristic grooves are located on both sides of the current injection region A in the slow axis direction, the depth of the characteristic groove on one side of the current injection region A is consistent with or inconsistent with the depth of the characteristic groove on the other side of the current injection region A.

[0104] The edge-emitting semiconductor light-emitting structure has a front cavity surface and a rear cavity surface arranged opposite to each other, the front cavity surface is connected to both the first side wall and the second side wall, and the rear cavity surface is connected to both the first side wall and the second side wall; the characteristic groove is located between the front cavity surface and the rear cavity surface.

[0105] Figures 7 and 8 illustrate an example in which the characteristic sidewall S1 of the characteristic groove S is connected to both the front cavity surface and the back cavity surface. In other embodiments, the characteristic groove C is spaced apart from both the front cavity surface and the back cavity surface. In other embodiments, the characteristic sidewall of the characteristic groove is connected to either the front cavity surface or the back cavity surface.

[0106] The edge-emitting semiconductor light emitting structure further includes an insulating dielectric layer (not shown) located in the characteristic groove. The material of the insulating dielectric layer is as described in Example 1. In other embodiments, the characteristic groove is not filled with a dielectric and is a hollow structure.

[0107] The edge-emitting semiconductor light-emitting structure further includes: Referring to FIG. 2 , a first etched groove and a second etched groove located in a portion of the thickness of the upper confinement layer 150; the upper confinement layer 150 between the first and second etched grooves constitutes a ridge region; the ridge region and the lower confinement layer 110, lower waveguide layer 120, active layer 130, upper waveguide layer 140, and upper confinement layer 150 below the ridge region serve as the current injection region A; and the characteristic groove S is located at the bottom of the first etched groove or the bottom of the second etched groove, respectively. In other embodiments, the characteristic groove is located at the bottom of both the first and second etched grooves.

[0108] The characteristic groove has a secondary sidewall on a side away from the current injection region. The secondary sidewall is a plane or has the same shape as the characteristic sidewall.

[0109] Example 4

[0110] The difference between this embodiment and embodiment 3 is that the edge-emitting semiconductor light-emitting structure does not include a lower waveguide layer and an upper waveguide layer.

[0111] The characteristic groove is located in the upper confinement layer and does not extend into the active layer; or, the characteristic groove is located in the upper confinement layer and the active layer and does not extend into the lower confinement layer; or, the characteristic groove is located in the upper confinement layer, the active layer and the lower confinement layer and does not extend into the semiconductor substrate layer.

[0112] For other descriptions of the edge-emitting semiconductor light-emitting structure of this embodiment, please refer to Example 3 and will not be described in detail.

[0113] Example 5

[0114] The present application also provides a method for preparing an edge-emitting semiconductor light-emitting structure, comprising: providing a semiconductor substrate layer; sequentially forming a stacked lower confinement layer, an active layer, and an upper confinement layer on the semiconductor substrate layer; the edge-emitting semiconductor light-emitting structure having a first sidewall and a second sidewall arranged opposite to each other, the first sidewall and the second sidewall being arranged in the slow axis direction of the edge-emitting semiconductor light-emitting structure; the edge-emitting semiconductor light-emitting structure having a current injection region located between the first sidewall and the second sidewall, and the current injection region being spaced apart from the first sidewall and the second sidewall; forming a characteristic groove on at least one side of the current injection region along the slow axis direction, the characteristic groove being located at least in the upper confinement layer, the characteristic groove having a characteristic sidewall facing the current injection region, the characteristic sidewall and the current injection region being spaced apart in the slow axis direction; and a surface of the characteristic sidewall being provided with a plurality of protrusions facing the current injection region.

[0115] Furthermore, the characteristic groove is located at least in the upper waveguide layer and the upper confinement layer.

[0116] The method for preparing the edge-emitting semiconductor light-emitting structure further includes: before forming the active layer, forming a lower waveguide layer on the side of the lower confinement layer facing away from the semiconductor substrate layer; before forming the upper confinement layer, forming an upper waveguide layer on the side of the active layer facing away from the semiconductor substrate layer; in the step of forming a characteristic groove on at least one side of the current injection region along the slow axis direction, the characteristic groove is located at least in the upper waveguide layer and the upper confinement layer.

[0117] The method for preparing the edge-emitting semiconductor light-emitting structure also includes: before forming the characteristic groove, forming a first etching groove and a second etching groove in the upper confinement layer of partial thickness, the upper confinement layer between the first etching groove and the second etching groove constitutes a ridge region; the ridge region and the lower confinement layer, lower waveguide layer, active layer, upper waveguide layer and upper confinement layer below the ridge region serve as the current injection region; the step of forming the characteristic groove is: forming the characteristic groove at the bottom of the first etching groove and / or the bottom of the second etching groove.

[0118] In one embodiment, the process used to form the diffuse scattering grooves is a wet etching process.

[0119] The description of the characteristic grooves refers to the aforementioned embodiments.

[0120] Obviously, the above embodiments are merely examples for clarity of explanation and are not intended to limit the implementation methods. Those skilled in the art will readily appreciate that other variations or modifications based on the above descriptions are possible. It is not necessary and impossible to enumerate all implementation methods here. Obvious variations or modifications arising therefrom remain within the scope of protection of the present invention.

Claims

1. An edge-emitting semiconductor light-emitting structure, characterized in that: include: Semiconductor substrate layer; A lower confinement layer, an active layer and an upper confinement layer stacked in sequence on the semiconductor substrate layer; The edge-emitting semiconductor light-emitting structure has a first side wall and a second side wall that are arranged opposite to each other, and the first side wall and the second side wall are arranged in the slow axis direction of the edge-emitting semiconductor light-emitting structure; the edge-emitting semiconductor light-emitting structure has a current injection region located between the first side wall and the second side wall, and the current injection region is spaced apart from the first side wall and the second side wall; A characteristic groove is located on at least one side of the current injection region in the slow axis direction, the characteristic groove is located at least in the upper limiting layer, the characteristic groove has a characteristic side wall facing the current injection region, the characteristic side wall and the current injection region are arranged at intervals in the slow axis direction; the surface of the characteristic side wall is provided with a plurality of protrusions facing the current injection region.

2. The edge-emitting semiconductor light-emitting structure according to claim 1, characterized in that: The characteristic side wall is a diffuse reflection side wall.

3. The edge-emitting semiconductor light-emitting structure according to claim 2, characterized in that: The protrusions on the surface of the characteristic side wall are in the shape of strips; the surface of the characteristic side wall is also provided with strip-shaped depressions between adjacent protrusions, the vertices of any adjacent protrusions on the surface of the characteristic side wall are staggered in the slow axis direction and / or the distances between the vertices of any adjacent protrusions on the surface of the characteristic side wall in the light emitting direction are uneven.

4. The edge-emitting semiconductor light-emitting structure according to claim 2, characterized in that: The plurality of protrusions on the surface of the characteristic side wall are distributed in the form of dots with uneven intervals.

5. The edge-emitting semiconductor light-emitting structure according to claim 2, characterized in that: The characteristic side wall of the characteristic groove has an intersection line with a cross-sectional plane parallel to the upper surface of the semiconductor substrate layer, and the intersection line has a plurality of randomly distributed points at intervals, and adjacent randomly distributed points on the intersection line have different coordinates in the slow axis direction and different coordinates in the light emitting direction of the semiconductor substrate layer.

6. The edge-emitting semiconductor light-emitting structure according to claim 5, characterized in that: The intersection line is a curve or a broken line.

7. The edge-emitting semiconductor light-emitting structure according to claim 5, characterized in that: The plurality of randomly distributed points at intervals on the intersection line include the first randomly distributed point to the Mth randomly distributed point, where M is an integer greater than or equal to 2; the position of any i-th randomly distributed point satisfies y i =y0+h*δ k And satisfy x i =L / M*(i+δ k ');δ k is the first random distribution function, h is the random range width of the feature slot; i is an integer greater than or equal to 1 and less than or equal to M, y i is the coordinate of the ith random distribution point in the slow axis direction; x i is the coordinate of the i-th randomly distributed point in the light-emitting direction of the semiconductor substrate layer, y0 is the average value of the coordinates of the first randomly distributed point to the M-th randomly distributed point in the slow axis direction; L is a fixed value less than or equal to the cavity length of the edge-emitting semiconductor light-emitting structure; δ k ' is the second random distribution function.

8. The edge-emitting semiconductor light-emitting structure according to claim 7, characterized in that: The value of the first random distribution function is a random number within the range of -0.5 to 0.5; the value of the second random distribution function is a random number within the range of -0.5 to 0.

5.

9. The edge-emitting semiconductor light-emitting structure according to claim 7, characterized in that: h≥λ / 2n, λ is the operating wavelength of the edge-emitting semiconductor light-emitting structure, and n is the effective refractive index of the current injection region.

10. The edge-emitting semiconductor light-emitting structure according to claim 1, characterized in that: The protrusions on the surface of the characteristic side wall are in the shape of strips; the surface of the characteristic side wall is also provided with strip-shaped depressions between adjacent protrusions, and the protrusions and depressions on the surface of the characteristic side wall are periodically arranged along the light emitting direction of the edge-emitting semiconductor light-emitting structure; the length of a period of the arrangement of the protrusions and depressions is d≥λ / 2n, λ is the operating wavelength of the edge-emitting semiconductor light-emitting structure, and n is the effective refractive index of the current injection area.

11. The edge-emitting semiconductor light-emitting structure according to claim 3 or 10, characterized in that: The length direction of the protrusion is perpendicular to the light emitting direction of the edge-emitting semiconductor light-emitting structure, or the length direction of the protrusion is not perpendicular to the light emitting direction of the edge-emitting semiconductor light-emitting structure, and the length direction of the protrusion is not parallel to the light emitting direction of the semiconductor light-emitting structure.

12. The edge-emitting semiconductor light-emitting structure according to claim 10, characterized in that: For the protrusions and depressions on the characteristic sidewall surface, the ratio of the maximum value of the coordinate change of the protrusions and depressions in the slow axis direction corresponding to one period length to the period length d is greater than or equal to 0.

1.

13. The edge-emitting semiconductor light-emitting structure according to claim 1, characterized in that: The characteristic groove is only located on one side of the current injection region in the slow axis direction.

14. The edge-emitting semiconductor light-emitting structure according to claim 1, characterized in that: The characteristic grooves are respectively located on both sides of the current injection region in the slow axis direction.

15. The edge-emitting semiconductor light-emitting structure according to claim 1, characterized in that: The distance between the characteristic sidewall of the characteristic groove and the edge of the current injection region is greater than or equal to 10 micrometers.

16. The edge-emitting semiconductor light-emitting structure according to claim 1, characterized in that: It also includes: a lower waveguide layer located between the active layer and the lower confinement layer; an upper waveguide layer located between the upper confinement layer and the active layer; and the characteristic groove is located at least in the upper waveguide layer and the upper confinement layer.

17. The edge-emitting semiconductor light-emitting structure according to claim 16, characterized in that: The characteristic groove is located in the upper waveguide layer and the upper confinement layer and does not extend into the active layer; or, the characteristic groove is located in the upper waveguide layer, the upper confinement layer and the active layer and does not extend into the lower waveguide layer; or, the characteristic groove is located in the upper waveguide layer, the upper confinement layer, the active layer and the lower waveguide layer and does not extend into the lower confinement layer; or, the characteristic groove is located in the upper waveguide layer, the upper confinement layer, the active layer, the lower waveguide layer and the lower confinement layer and does not extend into the semiconductor substrate layer.

18. The edge-emitting semiconductor light-emitting structure according to claim 14, characterized in that: The depth of the characteristic groove on one side of the current injection region is consistent with or inconsistent with the depth of the characteristic groove on the other side of the current injection region.

19. The edge-emitting semiconductor light-emitting structure according to claim 1, characterized in that: The edge-emitting semiconductor light-emitting structure has a front cavity surface and a rear cavity surface arranged opposite to each other, the front cavity surface is connected to both the first side wall and the second side wall, and the rear cavity surface is connected to both the first side wall and the second side wall; the characteristic groove is located between the front cavity surface and the rear cavity surface.

20. The edge-emitting semiconductor light-emitting structure according to claim 19, characterized in that: The characteristic groove is spaced apart from the front cavity surface and the rear cavity surface.

21. The edge-emitting semiconductor light-emitting structure according to claim 19, characterized in that: The characteristic sidewall of the characteristic groove is connected to the front cavity surface and / or the rear cavity surface.

22. The edge-emitting semiconductor light-emitting structure according to claim 1 or 16, characterized in that: Also includes: A first etched groove and a second etched groove are located in the upper confinement layer of a partial thickness, and the upper confinement layer between the first etched groove and the second etched groove constitutes a ridge region; the ridge region and the lower confinement layer, the lower waveguide layer, the active layer, the upper waveguide layer and the upper confinement layer below the ridge region serve as the current injection region; The characteristic groove is located at the bottom of the first etching groove and / or the bottom of the second etching groove.

23. The edge-emitting semiconductor light emitting structure according to claim 1, characterized in that: The edge-emitting semiconductor light-emitting structure has a characteristic plane parallel to the light emitting direction and the slow axis direction, the outer contour of the characteristic plane includes a first side and a second side that are arranged oppositely, and a third side and a fourth side that are arranged oppositely, the first side is connected to the third side and the fourth side respectively, the second side is connected to the third side and the fourth side respectively, the first side is the intersection line of the first side wall and the characteristic plane, the second side is the intersection line of the second side wall and the characteristic plane, the third side is the intersection line of the front cavity surface and the characteristic plane, and the fourth side is the intersection line of the rear cavity surface and the characteristic plane; the first side and the third side intersect is the first vertex, the intersection of the first side and the fourth side is the second vertex, the intersection of the second side and the third side is the third vertex, and the intersection of the second side and the fourth side is the fourth vertex; the intersection of the line from the midpoint of the first side to the midpoint of the third side and the line from the first vertex to the fourth vertex is the fifth feature point; the intersection of the line from the midpoint of the first side to the midpoint of the fourth side and the line from the third vertex to the second vertex is the sixth feature point; the intersection of the line from the midpoint of the second side to the midpoint of the third side and the line from the third vertex to the second vertex is the seventh feature point; the intersection of the line from the midpoint of the second side to the midpoint of the fourth side The intersection of the connecting line and the connecting line from the first vertex to the fourth vertex is the eighth characteristic point; the connecting line from the midpoint of the first side to the midpoint of the third side has a ninth characteristic point, and the distance from the ninth characteristic point to the side wall of the current injection region in the slow axis direction is greater than or equal to the threshold distance; the connecting line from the midpoint of the first side to the midpoint of the fourth side has a tenth characteristic point, and the distance from the tenth characteristic point to the side wall of the current injection region in the slow axis direction is greater than or equal to the threshold distance; the connecting line from the midpoint of the second side to the midpoint of the third side has an eleventh characteristic point, and the distance from the eleventh characteristic point to the side wall of the current injection region in the slow axis direction is greater than or equal to the threshold distance. The distance in the slow axis direction is greater than or equal to the threshold distance; there is a twelfth characteristic point on the line connecting the midpoint of the second side to the midpoint of the fourth side, and the distance from the twelfth characteristic point to the side wall of the current injection region in the slow axis direction is greater than or equal to the threshold distance; the first vertex, the fifth characteristic point and the ninth characteristic point are sequentially connected to form a first fold line, the second vertex, the sixth characteristic point and the tenth characteristic point are sequentially connected to form a second fold line, the third vertex, the seventh characteristic point and the eleventh characteristic point are sequentially connected to form a third fold line, and the fourth vertex, the eighth characteristic point and the twelfth characteristic point are sequentially connected to form a fourth fold line; When the characteristic groove is located between the second side wall and the current injection area, the characteristic groove spans the third fold line and the fourth fold line in the length direction; when the characteristic groove is located between the first side wall and the current injection area, the characteristic groove spans the first fold line and the second fold line in the length direction.

24. The edge-emitting semiconductor light-emitting structure according to claim 23, characterized in that: The threshold distance is 10 micrometers to 50 micrometers.

25. A method for preparing an edge-emitting semiconductor light-emitting structure according to any one of claims 1 to 24, characterized in that: include: providing a semiconductor substrate layer; Sequentially forming a stacked lower confinement layer, an active layer and an upper confinement layer on the semiconductor substrate layer; The edge-emitting semiconductor light-emitting structure has a first side wall and a second side wall that are arranged opposite to each other, and the first side wall and the second side wall are arranged in the slow axis direction of the edge-emitting semiconductor light-emitting structure; the edge-emitting semiconductor light-emitting structure has a current injection region located between the first side wall and the second side wall, and the current injection region is spaced apart from the first side wall and the second side wall; A characteristic groove is formed on at least one side of the current injection region along the slow axis direction, the characteristic groove is located at least in the upper limiting layer, the characteristic groove has a characteristic side wall facing the current injection region, the characteristic side wall and the current injection region are arranged at intervals in the slow axis direction; and a surface of the characteristic side wall is provided with a plurality of protrusions facing the current injection region.

26. The method for preparing an edge-emitting semiconductor light-emitting structure according to claim 25, characterized in that: Also includes: Before forming the characteristic groove, a first etching groove and a second etching groove are formed in the upper confinement layer of a partial thickness, the upper confinement layer between the first etching groove and the second etching groove constitutes a ridge region; the ridge region and the lower confinement layer, the lower waveguide layer, the active layer, the upper waveguide layer and the upper confinement layer below the ridge region serve as the current injection region; The step of forming the characteristic groove is: forming the characteristic groove at the bottom of the first etched groove and / or the bottom of the second etched groove.

27. The method for preparing an edge-emitting semiconductor light-emitting structure according to claim 25, further comprising: Before forming the active layer, forming a lower waveguide layer on the side of the lower confinement layer away from the semiconductor substrate layer; Before forming the upper confinement layer, forming an upper waveguide layer on a side of the active layer facing away from the semiconductor substrate layer; In the step of forming a characteristic groove on at least one side of the current injection region along the slow axis direction, the characteristic groove is located at least in the upper waveguide layer and the upper confinement layer.

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