Method for manufacturing semiconductor device, semiconductor device, and semiconductor member
The use of a cured resin layer covering terminal and penetrating electrodes in semiconductor device manufacturing addresses the challenge of secure electrode connection and heat transfer, enhancing the reliability of semiconductor die packaging by ensuring even heat distribution and pressure application.
Patent Information
- Application Number
- PCT/JP2024/026683
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-07-27
- Filing Date
- 2024-07-25
- Publication Date
- 2025-01-30
AI Technical Summary
Existing semiconductor device manufacturing methods face challenges in ensuring secure connection and heat transfer between penetrating electrodes and wiring electrodes due to limited heat transmission and uneven pressure distribution, leading to potential bending or cracking of semiconductor dies during the packaging process.
A method involving a cured resin layer that covers the terminal electrodes and penetrating electrodes, allowing for even heat distribution and pressure application across the semiconductor die, ensuring secure joint formation and preventing bending or cracking, with optional inorganic fillers for enhanced mechanical properties and thermal conductivity.
This method ensures reliable connection and secure attachment of penetrating electrodes to wiring electrodes, preventing bending or cracking of semiconductor dies and improving the packaging process by ensuring uniform heat transfer and pressure distribution.
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Figure JP2024026683_30012025_PF_FP_ABST
Abstract
Description
Semiconductor device manufacturing method, semiconductor device, and semiconductor member
[0001] The present disclosure relates to a method for manufacturing a semiconductor device, a semiconductor device, and a semiconductor member.
[0002] In recent years, with the rapid advancement in the functionality of electronic devices, such as AI and HPC, semiconductor packages have become larger and denser. These package structures go beyond surface mounting to include inorganic (silicon) or organic interposer (Bridge die / RDL) technology, 2.xD mounting using these, and 3D mounting (HBM / Chiplet) technology utilizing TSV. For example, Resonac Inc., based at its Packaging Solutions Center, is developing next-generation semiconductor packaging process technology from the perspective of its customers (semiconductor manufacturers), combining mounting processes and materials.
[0003] As a technology in the field of semiconductor packaging, Patent Document 1 discloses a method for manufacturing a semiconductor device in which a semiconductor die provided with through electrodes is mounted on a carrier and sealed, a wiring layer is formed on the sealing layer, and another semiconductor die is mounted on the wiring layer. Patent Document 2 discloses another method for manufacturing a semiconductor device.
[0004] US Patent Application Publication No. 2021 / 0098421 US Patent Application Publication No. 2022 / 0093526
[0005] In the manufacturing method described in Patent Document 1, in addition to the through electrodes, multiple terminal electrodes for connection to a wiring layer above the sealing layer may be provided on the top surface of the semiconductor die. In this case, as shown in Figures 9(a) and 9(b), a semiconductor die 120 is attracted by a collet C1 and placed on a support 110. Then, the metal collet C1, which also functions as a heating element, applies pressure to the semiconductor die 120 while heating it, thereby thermally bonding the lower ends 123b of the through electrodes 123 of the semiconductor die 120 to the wiring electrodes of the support 110. However, to avoid contact with the multiple terminal electrodes 122, the collet C1 only contacts the semiconductor die 120 in its outer periphery. This may prevent sufficient heat transfer from the collet C1 to the semiconductor die 120 and the through electrodes 123 (bonding portions) located therein. Furthermore, because the collet C1 applies a load only to the outer periphery of the semiconductor die 120, there is a risk that sufficient bonding pressure between the through electrodes 123 and the wiring electrodes of the support 110 may not be ensured. For the above reasons, the method shown in Figures 9(a) and 9(b) may not be able to reliably thermocompress the lower end 123b of the through electrode 123 of the semiconductor die 120 having multiple terminal electrodes 122 to the wiring electrode.
[0006] An object of the present disclosure is to provide a method for manufacturing a semiconductor device that can reliably bond through electrodes in a semiconductor member (semiconductor die).
[0007] [1] One aspect of the present disclosure relates to a method for manufacturing a semiconductor device, the method for manufacturing the semiconductor device comprising the steps of: preparing a semiconductor member including a semiconductor substrate having a first surface and an opposite second surface, a plurality of terminal electrodes provided on the first surface of the semiconductor substrate, through-hole electrodes penetrating the semiconductor substrate and having first ends protruding from the first surface and second ends protruding from the second surface, and a cured resin layer provided on the first surface so as to cover the plurality of terminal electrodes and the first ends of the through-hole electrodes, preparing a support including at least one wiring electrode, placing the semiconductor member on the support so that the second ends of the through-hole electrodes correspond to the wiring electrode on the support, and pressing a heating element against a surface of the cured resin layer of the semiconductor member while contacting it to heat-bond the second ends of the through-hole electrodes to the wiring electrode on the support.
[0008] In this semiconductor device manufacturing method, a cured resin layer is provided on the first surface of the semiconductor device to cover the first ends of the plurality of terminal electrodes and the through electrodes. Then, a heating element is brought into contact with the surface of the cured resin layer and pressed against it, thereby thermally bonding the second ends of the through electrodes to the wiring electrodes of the support. In this case, the plurality of terminal electrodes and the first ends of the through electrodes are covered with the resin layer, allowing the heating element to heat the semiconductor member without affecting the terminal electrodes, etc., thereby ensuring sufficient heat transfer from the heating element to the semiconductor member and the through electrodes located therein. Furthermore, by providing such a resin layer, a load can be applied to the entire surface of the semiconductor die, thereby ensuring sufficient bonding pressure between the through electrodes and the wiring electrodes of the support. As described above, this semiconductor device manufacturing method enables reliable bonding of through electrodes of a semiconductor die having a plurality of terminal electrodes. Note that the term "cured resin layer" as used herein refers to a resin layer that is sufficiently cured to transmit pressure from the heating element or to prevent adhesion to the heating element when in contact with it, and also includes resin layers that are not completely cured (i.e., not fully cured (C-stage)).
[0009] Furthermore, in this semiconductor device manufacturing method, a cured resin layer is provided on the first surface of the semiconductor device so as to cover the first ends of the multiple terminal electrodes and the through electrodes. The surface of this cured resin layer is then adsorbed and lifted, and the semiconductor member is then placed, etc. In this case, the multiple terminal electrodes, etc. are covered with the resin layer, and the semiconductor member can be lifted by suction with a holding member, etc., without avoiding the terminal electrodes, etc., thereby preventing the semiconductor member (semiconductor die) from bending or cracking. Furthermore, because the multiple terminal electrodes, etc. are covered with the resin layer, when the semiconductor member is attached to the support, a load can be applied to the entire semiconductor member in the planar direction, thereby reliably attaching the semiconductor member to the support. As described above, this semiconductor device manufacturing method enables reliable attachment of the semiconductor member. Furthermore, in this semiconductor device manufacturing method, the portions covering the terminal electrodes, etc. are formed from a cured resin layer, making it easy to manufacture. Note that the "cured resin layer" referred to here is sufficient as long as it is hardened to the extent that at least one of adsorption and load application is possible, and also includes cases where it is not completely hardened (so-called C stage).
[0010] [2] In the method for manufacturing a semiconductor device according to [1] above, the step of preparing the semiconductor member may include the steps of forming a resin layer containing a curable resin composition on the first surface of the semiconductor substrate so as to cover the first ends of the plurality of terminal electrodes and the through electrodes, and curing the resin layer to form a cured resin layer. In this case, the resin layer that protects the first ends of the plurality of terminal electrodes and the through electrodes can be easily formed.
[0011] [3] In the method for manufacturing a semiconductor device according to [1] or [2] above, the cured resin layer is preferably formed by attaching a resin film containing a curable resin composition to the first surface of the semiconductor substrate and then curing the resin film. In this case, the resin layer that protects the first ends of the plurality of terminal electrodes and the through electrodes can be easily formed.
[0012] [4] In the method for manufacturing a semiconductor device according to [1] or [2] above, the cured resin layer may be formed by applying a liquid adhesive containing a curable resin composition to the first surface of the semiconductor substrate and then curing the liquid adhesive. In this case, the resin layer that protects the first ends of the plurality of terminal electrodes and the through electrodes can be easily formed.
[0013] [5] In any of the semiconductor device manufacturing methods [1] to [4] above, the cured resin layer preferably contains an inorganic filler. In this case, the hardness (elastic modulus, etc.) of the resin layer can be improved, further suppressing bending and cracking of the semiconductor member. Furthermore, the inclusion of the inorganic filler can also suppress warping of the semiconductor member including the resin layer. Furthermore, by adjusting the shape (aspect ratio) of the inorganic filler or the content of the inorganic filler, it is possible to adjust the heat transferred from the heating element to the lower end of the through electrode to a desired value.
[0014] [6] In the method for manufacturing a semiconductor device according to [5] above, the content of the inorganic filler in the cured resin layer may be 30 mass% or more based on the total amount of solids contained in the resin layer before curing. In this case, warping of the semiconductor member can be more reliably suppressed.
[0015] [7] In the method for manufacturing a semiconductor device according to [5] or [6] above, the average particle diameter of the inorganic filler in the cured resin layer is preferably 20 μm or less. In this case, even if the terminal electrodes and their pitch of the semiconductor member are miniaturized, the resin and filler can be inserted (filled) between the terminal electrodes, ensuring that the terminal electrodes are covered with the resin layer. In addition, warping of the cured resin layer can be suppressed.
[0016] [8] In any of the semiconductor device manufacturing methods [1] to [7] above, the modulus of elasticity of the cured resin layer at room temperature may be 10 MPa or more. In this case, deflection and cracking of the semiconductor member can be further suppressed. Furthermore, when polishing the cured resin layer to expose the head of the terminal electrode, the polishing operation can be easily performed. Note that the modulus of elasticity here means Young's modulus. Furthermore, room temperature means 25°C. The high modulus of elasticity of the cured resin layer makes it easy to grind the resin layer, copper pattern, etc. in subsequent processes. As described above, the cured resin layer may not be completely cured, and it is sufficient that the resin layer is hard enough to be polished in the polishing operation.
[0017] [9] In any of the semiconductor device manufacturing methods [1] to [8] above, the step of preparing a semiconductor member preferably includes the steps of: preparing a semiconductor wafer including a semiconductor substrate, wherein the semiconductor wafer is provided with a plurality of through-hole electrodes including through-hole electrodes, and a first surface of the semiconductor wafer is provided with a plurality of electrodes including a plurality of terminal electrodes and each first end of the plurality of through-hole electrodes; forming a wafer resin layer including a curable resin composition on the first surface of the semiconductor wafer so as to cover the plurality of electrodes and each first end of the plurality of through-hole electrodes; curing the wafer resin layer; and dicing the semiconductor wafer to obtain semiconductor members. In this case, multiple semiconductor members can be produced at once. Furthermore, according to this manufacturing method, even when diced, the semiconductor members can be peeled off from the dicing tape without bending or cracking.
[0018]
[10] The method for manufacturing a semiconductor device according to any one of [1] to [9] above may further include a step of sealing the semiconductor member with a sealing material after the second end of the through electrode is joined to the wiring electrode of the support, thereby forming a sealing material layer on the support.
[0019]
[11] In the method for manufacturing a semiconductor device according to
[10] above, the average particle size of the inorganic filler contained in the encapsulant layer is preferably larger than the average particle size of the inorganic filler contained in the cured resin layer. By including a large-sized inorganic filler in the encapsulant, warping of the encapsulant layer due to heat can be reliably suppressed. In particular, in large-format processes, reliably adsorbing the encapsulant in high-precision processing in subsequent processes can be achieved.
[0020]
[12] In the method for manufacturing a semiconductor device according to the above
[10] or
[11] , the difference between the linear expansion coefficient of the encapsulant layer and the linear expansion coefficient of the cured resin layer is preferably within 150 ppm / K. In this case, the behavior of the encapsulant layer and the resin layer becomes uniform when heat is applied to the fabricated semiconductor device, and it is possible to reduce the occurrence of problems due to heat, such as misalignment in expansion.
[0021]
[13] The method for manufacturing a semiconductor device according to any one of
[10] to
[12] above may further include a step of polishing the cured resin layer together with the encapsulant layer so that the tips of the terminal electrodes and the first ends of the through electrodes are exposed from the cured resin layer. In this case, it is possible to form a fine wiring layer or the like with high precision on the polished surface of the encapsulant layer or the like.
[0022]
[14] In the method for manufacturing a semiconductor device according to any one of [1] to
[13] above, the thickness of the cured resin layer in the step of disposing the semiconductor member may be 15 μm or more, or 30 μm or more. In this case, warping and cracking of the semiconductor member can be more reliably suppressed.
[0023]
[15] In the method for manufacturing a semiconductor device according to any one of [1] to
[14] above, the thermal conductivity of the cured resin layer is preferably 0.3 W / m K or more. In this case, heat can be reliably transferred to the joint between the lower end of the through electrode and the wiring electrode, thereby reliably thermally joining them.
[0024]
[16] In any of the semiconductor device manufacturing methods [1] to
[15] above, an insulating layer auxiliary member for attaching the semiconductor member to the support may be provided on the second surface of the semiconductor substrate, and the auxiliary member may surround the second end of the through electrode. In this case, the through electrode of the semiconductor member can be more reliably joined to the wiring electrode of the support while ensuring insulation from other electrodes. In addition, the semiconductor member can be easily attached to the support.
[0025]
[17] In the method for manufacturing a semiconductor device according to
[16] above, the auxiliary member may be provided on the second surface of the semiconductor member before the semiconductor member is placed on the support member, which simplifies the attachment of the semiconductor member to the support member.
[0026]
[18] In the method for manufacturing a semiconductor device according to
[16] or
[17] above, the difference between the linear expansion coefficient of the cured resin layer and the linear expansion coefficient of the auxiliary member may be within 150 ppm / K. In this case, the thermal expansion of the cured resin layer and the auxiliary member sandwiching the semiconductor substrate is approximately the same, which prevents the position or parallelism of the semiconductor substrate from being impaired and suppresses warpage of the mounted chip.
[0027]
[19] In the method for manufacturing a semiconductor device according to any one of the above
[16] to
[18] , the auxiliary member may be a non-conductive adhesive film. In this case, the auxiliary member can be easily provided.
[0028]
[20] In the method for manufacturing a semiconductor device according to any one of
[16] to
[19] above, the transmittance of the auxiliary member may be 10% or more. In this case, the alignment mark formed on the semiconductor die can be confirmed by a camera through the auxiliary member, so that the semiconductor die can be mounted on the support with high accuracy.
[0029]
[21] In the method for manufacturing a semiconductor device according to any one of [1] to
[20] above, the thickness of the cured resin layer may be between 50% and 150% of the height of the terminal electrodes. In this case, the thickness of the resin layer and the height of the terminal electrodes are approximately equal, making it possible to more reliably lift and attach the semiconductor member. The height of the terminal electrodes here refers to the average height of the terminal electrodes.
[0030]
[22] In the method for manufacturing a semiconductor device according to any one of [1] to
[21] above, in the step of placing the semiconductor member, it is preferable that the holding member adsorbs and lifts the entire surface of the cured resin layer, and in the step of thermally bonding, the holding member functions as a heating element, and thermally bonds the semiconductor member while contacting and pressing the entire surface of the cured resin layer. In this case, bending or cracking of the semiconductor member can be more reliably prevented, and the through electrodes of the semiconductor member can be reliably bonded to the wiring electrodes of the support. Furthermore, the semiconductor member can be reliably attached to the support.
[0031]
[23] In the method for manufacturing a semiconductor device according to any one of [1] to
[22] above, the ionic impurity concentration of the cured resin layer is preferably 5 ppm or less, which can prevent migration between the terminal electrodes covered with the cured resin layer or between the terminal electrodes and the first ends of the through electrodes.
[0032]
[24] In the method for manufacturing a semiconductor device according to any one of [1] to
[23] above, the adhesive strength between the cured resin layer and the first surface of the semiconductor substrate may be 1 MPa or more. In this case, peeling of the resin layer of the semiconductor member is prevented in the manufactured semiconductor device.
[0033]
[25] In the method for manufacturing a semiconductor device according to any one of [1] to
[24] above, the adhesive strength between the cured resin layer and the first surface of the semiconductor substrate is preferably 3 MPa or more. In this case, peeling of the resin layer of the semiconductor member is more reliably prevented in the manufactured semiconductor device.
[0034]
[26] The method for manufacturing a semiconductor device according to any one of [1] to
[25] above may further include a step of mounting a first semiconductor die and a second semiconductor die on the first surface side of the semiconductor member after attaching the semiconductor member to the support, and the first semiconductor die and the second semiconductor die may be connected by the semiconductor member in the mounting step. In this case, the semiconductor die can function as a bridge die.
[0035]
[27] Another aspect of the present disclosure relates to a semiconductor device. The semiconductor device includes a semiconductor member and a support member to which the semiconductor member is attached, the support member including at least one wiring electrode. The semiconductor member includes a semiconductor substrate having a first surface and an opposite second surface, a plurality of terminal electrodes provided on the first surface of the semiconductor substrate, a through electrode that penetrates the semiconductor substrate and has a first end protruding from the first surface and a second end protruding from the second surface, and a cured resin layer provided on the first surface so as to cover the plurality of terminal electrodes and the first ends of the through electrode. In this semiconductor device, the second end of the through electrode is bonded to a wiring electrode of the support member.
[0036]
[28] The semiconductor device of
[27] may further include an insulating auxiliary member for attaching the semiconductor member to the support, and the auxiliary member may surround the second end of the through electrode. In this case, insulation at the junction between the through electrode of the semiconductor member and the wiring electrode of the support can be more reliably ensured.
[0037]
[29] The semiconductor device according to
[27] or
[28] above may further include an encapsulant layer that encapsulates the semiconductor member.
[0038]
[30] In the semiconductor device of
[29] , the inorganic filler contained in the encapsulant layer may have a larger average particle size than the inorganic filler contained in the cured resin layer. By including large-sized inorganic fillers in the encapsulant layer, warping of the encapsulant layer due to heat can be reliably suppressed.
[0039]
[31] In the semiconductor device of
[29] or
[30] above, the difference between the linear expansion coefficient of the encapsulant layer and the linear expansion coefficient of the cured resin layer may be within 150 ppm / K. In this case, the behavior of the encapsulant layer and the resin layer becomes uniform when heat is applied to the semiconductor device, and it is possible to reduce the occurrence of problems due to heat, such as misalignment in expansion.
[0040]
[32] Any of the semiconductor devices
[27] to
[31] above may further include a first semiconductor die and a second semiconductor die provided on the first surface side of the semiconductor substrate, and at least one of the first ends of the plurality of terminal electrodes and through electrodes of the semiconductor member may be connected to the first semiconductor die and the second semiconductor die.
[0041] According to the present disclosure, it is possible to provide a method for manufacturing a semiconductor device that can reliably bond through electrodes of a semiconductor member (semiconductor die).
[0042] FIG. 1 is a cross-sectional view showing an example of the cross-sectional configuration of a semiconductor device according to one embodiment of the present invention. FIGS. 2A to 2D are cross-sectional views showing a method for manufacturing the semiconductor device shown in FIG. 1. FIGS. 3A and 3B are cross-sectional views showing a method for manufacturing the semiconductor device shown in FIG. 1, illustrating a step performed after the step shown in FIG. 2D. FIGS. 4A and 4B are cross-sectional views showing a method for manufacturing the semiconductor device shown in FIG. 1, illustrating a step performed after the step shown in FIG. 3B. FIGS. 5A to 5C are cross-sectional views showing a method for manufacturing the semiconductor device shown in FIG. 1, illustrating a step performed after the step shown in FIG. 4B. FIGS. 6A and 6B are diagrams illustrating a step of picking up a bridge die with a collet and thermocompression bonding it. FIGS. 7A to 7E are cross-sectional views showing a method for simultaneously fabricating multiple bridge dies using a semiconductor wafer. FIG. 8 is a cross-sectional view showing a bridge die according to a modified example. FIGS. 9A and 9B are diagrams illustrating a step of picking up and compressing a bridge die in a conventional method.
[0043] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. In the following description, the same or equivalent parts will be denoted by the same reference numerals, and duplicate explanations will be omitted. Furthermore, unless otherwise specified, positional relationships such as up, down, left, and right will be based on the positional relationships shown in the drawings. Furthermore, the dimensional ratios of the drawings are not limited to those shown in the drawings.
[0044] In this specification, the term "layer" includes not only a structure having a shape formed over the entire surface when observed in a plan view, but also a structure having a shape formed on a portion thereof. In this specification, the term "process" includes not only an independent process, but also a process that cannot be clearly distinguished from other processes as long as the intended effect of the process is achieved.
[0045] In this specification, numerical ranges indicated using "to" indicate ranges that include the numerical values before and after "to" as the minimum and maximum values, respectively. In numerical ranges described in stages in this specification, the upper or lower limit of a numerical range in one stage may be replaced with the upper or lower limit of a numerical range in another stage. In numerical ranges described in this specification, the upper or lower limit of the numerical range may be replaced with a value shown in the examples.
[0046] FIG. 1 is a diagram illustrating an example of a semiconductor device manufactured by a manufacturing method according to an embodiment of the present invention. As shown in FIG. 1, the semiconductor device 1 includes semiconductor dies 2a and 2b, a semiconductor die 3, a substrate 4, wiring layers 5a and 5b, encapsulant layers 6a and 6b, connection electrodes 7a and 7b, and bumps 8a and 8b. The semiconductor dies 2a and 2b (first and second semiconductor dies) are semiconductor chips such as LSI chips, CMOS sensors, and memories. The semiconductor die 3 is, for example, a bridge die or a silicon capacitor, and connects the semiconductor dies 2a and 2b via the connection electrode 7a. In the semiconductor device 1, the wiring layer 5a including a portion (lower part) of the connection electrode 7b, the encapsulant layer 6a encapsulating the semiconductor die 3, the wiring layer 5b including a portion (upper part) of the connection electrode 7b and the connection electrode 7a, and the encapsulant layer 6b encapsulating the semiconductor dies 2a and 2b are stacked in this order on the substrate 4. The connection electrode 7b is connected to the substrate 4 via multiple bumps 8a. The substrate 4 is further provided with a plurality of other bumps 8b for connection to an external device.
[0047] In this semiconductor device 1, the semiconductor die 3 is disposed face-up within the encapsulant layer 6a. The semiconductor die 3 includes a semiconductor substrate 3a, a plurality of terminal electrodes 3b disposed on the upper surface (first surface) of the semiconductor substrate 3a, through-hole electrodes 3c penetrating the semiconductor substrate 3a and having upper ends (first ends) and lower ends (second ends) exposed from the upper surface (first surface) and lower surface (second surface) of the semiconductor substrate 3a, a resin layer 3d formed on the upper surface of the semiconductor substrate 3a to cover the upper ends of the plurality of terminal electrodes 3b and through-hole electrodes 3c, and an auxiliary member 3e disposed on the lower surface of the semiconductor substrate 3a. The resin layer 3d is a resin film containing a thermosetting adhesive such as a die attach film (DAF), or a liquid thermosetting adhesive, and is a cured resin layer formed by thermally curing either of these. That is, the material constituting the resin layer 3d is in a semi-cured (B-stage) state and then cured to a fully cured (C-stage) state by a subsequent curing process. However, the resin layer 3d may be in a cured state that is not completely cured, as long as it does not cause any problems as the semiconductor device 1. The curable resin composition constituting the resin layer 3d includes a thermosetting resin, and may include, for example, at least one resin selected from the group consisting of an epoxy resin, a bismaleimide resin, a triazine resin, and a phenolic resin. The curable resin composition may further include a curing agent, a curing accelerator, and an inorganic filler.
[0048] The tips of the terminal electrodes 3b and the upper ends of the through electrodes 3c are exposed on the surface of the resin layer 3d. The upper ends of the terminal electrodes 3b and the through electrodes 3c are connected to the semiconductor dies 2a, 2b via connection electrodes 7a. The semiconductor die 3, which is, for example, a bridge die, is an extremely thin semiconductor die, for example, having a thickness of 100 μm or less, and may have a thickness of 50 μm or less. The terminal electrodes 3b of the semiconductor die 3 and their pitch are also becoming increasingly miniaturized. The diameter of the terminal electrodes 3b is, for example, 10 μm to 50 μm, the terminal pitch (separation distance) between the terminal electrodes 3b is, for example, 5 μm to 20 μm, and the height of the terminal electrodes 3b is, for example, 20 μm to 50 μm. However, the size of the terminal electrodes 3b is not limited to these. The through electrodes 3c are, for example, configured to include through-silicon vias (TSVs). The diameter of the through electrodes 3c is, for example, 10 μm to 50 μm. The upper end of the through electrode 3c protrudes from the upper surface of the semiconductor substrate 3a and is exposed from the resin layer 3d like the terminal electrode 3b, while the lower end of the through electrode 3c protrudes from the lower surface of the semiconductor substrate 3a and is joined (connected) to the wiring electrode of the wiring layer 5a.
[0049] The auxiliary member 3e extends in a planar direction to surround the junction between the lower end of the through electrode 3c and the wiring electrode of the wiring layer 5a, electrically insulating the junction from other electrodes, and adheres and fixes the semiconductor die 3 to the wiring layer 5a. The auxiliary member 3e is composed of, for example, a non-conductive resin adhesive film (e.g., non-conductive film, NCF). The curable resin composition constituting the auxiliary member 3e includes an electrically insulating thermosetting resin. Examples of such thermosetting resins include epoxy resins, bismaleimide resins, triazine resins, polyimide resins, polyamide resins, cyanoacrylate resins, phenolic resins, unsaturated polyester resins, melamine resins, urea resins, polyurethane resins, polyisocyanate resins, furan resins, resorcinol resins, xylene resins, benzoguanamine resins, diallyl phthalate resins, silicone resins, polyvinyl butyral resins, siloxane-modified epoxy resins, siloxane-modified polyamideimide resins, and acrylate resins. These resins can be used alone or in combination. The resin composition constituting the auxiliary member 3e may contain a curing agent such as an imidazole-based curing agent, a curing accelerator, a flux compound, an inorganic filler, a conductive filler, and the like. The auxiliary member 3e is not limited to a film-like member and may be a paste-like non-conductive material (e.g., non-conductive paste (NCP)). The thermosetting resin composition constituting the NCP may be the same as that described above. The auxiliary member 3e may be formed from a material having a linear expansion coefficient equivalent to that of the material (cured product) constituting the resin layer 3d. For example, the difference between the linear expansion coefficient of the cured resin layer 3d and the linear expansion coefficient of the cured auxiliary member 3e is preferably within 150 ppm / K. Furthermore, the auxiliary member 3e may have a thickness equivalent to that of the resin layer 3d, or may be thicker or thinner. The auxiliary member 3e may be formed from a light-transmitting material and may have a transmittance of 10% or more and 100% or less. The transmittance can be obtained, for example, by placing a film (auxiliary member) cut into a 50 mm x 50 mm square in a haze meter (for example, NDH-5000 manufactured by Nippon Denshoku Industries Co., Ltd.) and measuring the total light transmittance.
[0050] Next, an example of a manufacturing method of the semiconductor device 1 will be described with reference to FIGS. 2 to 5. FIGS. 2 to 5 are cross-sectional views sequentially illustrating the manufacturing method of the semiconductor device 1 described above. In this manufacturing method of the semiconductor device, as shown in FIG. 2A, first, a temporary fixing layer 11 is formed on a carrier substrate 10. The carrier substrate 10 is, for example, a glass substrate. The temporary fixing layer 11 is, for example, a curable adhesive layer, and is configured to be peeled off together with the carrier substrate 10 by light, heat, or the like in a process described below. After the temporary fixing layer 11 is formed, a wiring layer 12 is formed on the temporary fixing layer 11. The wiring layer 12 includes a wiring electrode 12a provided in the center, multiple connection electrodes 13, and an insulating portion 12b. The wiring layer 12 is, for example, a redistribution layer (RDL). Each wiring electrode 12a and each connection electrode 13 is, for example, composed of a copper pillar. The wiring electrode 12a is formed so that each tip 12d is exposed from a surface 12c of the insulating portion 12b. The connection electrode 13 is formed such that its upper half protrudes from the surface 12c of the insulating portion 12b. The wiring electrode 12a is an electrode connected to a lower end 23b of a through electrode 23 of the semiconductor die 20 (described later) (see FIG. 2B). The connection electrode 13 is an electrode connected to semiconductor dies 26 and 27 (described later) (see FIG. 3B), and is formed on the outer or peripheral side in the planar direction of the wiring layer 12.
[0051] Next, as shown in FIG. 2B and FIG. 6 , a semiconductor die 20 (semiconductor member) is prepared. The semiconductor die 20 includes a semiconductor substrate 21, a plurality of terminal electrodes 22, a plurality of through electrodes 23, a resin layer 24 (cured resin layer), and a support member 25. The semiconductor substrate 21 includes an upper surface 21a (first surface) and an opposite lower surface 21b (second surface). The plurality of terminal electrodes 22 are, for example, copper pillars provided on the upper surface 21a of the semiconductor substrate 21 and connected to wiring (not shown) within the semiconductor substrate 21. The diameter of each terminal electrode 22 is, for example, 10 μm to 50 μm, the terminal pitch (separation distance) between the terminal electrodes 22 is, for example, 5 μm to 20 μm, and the height of the terminal electrodes 22 is, for example, 20 μm to 50 μm. However, the size of the terminal electrodes 22 is not limited to these. The terminal pitch between the terminal electrodes 22 refers to the shortest distance between the outer circumferential surfaces of adjacent terminal electrodes 22. The plurality of through electrodes 23, for example, penetrate the semiconductor substrate 21 and have upper ends 23a (first ends) protruding from the upper surface 21a and lower ends 23b (second ends) protruding from the lower surface 21b. The diameter of the through electrodes 23 (including the upper ends 23a and lower ends 23b) is, for example, 10 μm to 50 μm. The distance between the upper ends 23a of the through electrodes 23 and the adjacent terminal electrodes 22 (similar to the above, the shortest distance between the outer circumferential surfaces) is, for example, 5 μm to 20 μm, and the height of the upper ends 23a protruding from the upper surface 21a is, for example, 20 μm to 50 μm. At this stage, the upper ends 23a of the through electrodes 23 are embedded in the resin layer 24 and may not be exposed to the outside, but may be exposed. The lower end 23b of the through electrode 23 may be exposed to the outside.
[0052] The auxiliary member 25 extends in a planar direction to surround the junction between the lower end 23b of the through electrode 23 and the wiring electrode 12a of the wiring layer 12 so as to electrically insulate the junction from other electrodes, and adheres and fixes the semiconductor die 20 to the wiring layer 12. The auxiliary member 25 is made of, for example, NCF. The thermosetting resin composition constituting the auxiliary member 25 includes, for example, an electrically insulating thermosetting resin. Examples of thermosetting resins include epoxy resin, bismaleimide resin, triazine resin, polyimide resin, polyamide resin, cyanoacrylate resin, phenolic resin, unsaturated polyester resin, melamine resin, urea resin, polyurethane resin, polyisocyanate resin, furan resin, resorcinol resin, xylene resin, benzoguanamine resin, diallyl phthalate resin, silicone resin, polyvinyl butyral resin, siloxane-modified epoxy resin, siloxane-modified polyamideimide resin, and acrylate resin. These resins can be used alone or in a mixture of two or more. The resin composition constituting the auxiliary member 25 may contain a curing agent such as an imidazole-based curing agent, a curing accelerator, a flux compound, an inorganic filler, and the like. The auxiliary member 25 is not limited to a film-like member and may be a paste-like NCP. The auxiliary member 25 may be formed from a material having a linear expansion coefficient equivalent to that of the material (cured product) constituting the resin layer 24. For example, the difference between the linear expansion coefficient of the cured resin layer 24 and the linear expansion coefficient of the cured auxiliary member 25 is preferably within 150 ppm / K. Furthermore, the auxiliary member 25 may have a thickness equivalent to that of the resin layer 24, or may be thicker or thinner. At this stage, the auxiliary member 25 is not cured and will be thermally cured in a process described below. The auxiliary member 25 may be formed from a light-transmitting material and may have a transmittance of 10% or more and 100% or less.
[0053] In the semiconductor die 20, a resin layer 24 is provided on the upper surface 21a of the semiconductor substrate 21 so as to cover the upper ends 23a of the multiple terminal electrodes 22 and the multiple through electrodes 23. The resin layer 24 can be formed, for example, by attaching a resin film made of a thermosetting adhesive (curable resin composition) to the upper surface 21a of the semiconductor substrate 21 and then thermally curing the resin film. The resin layer 24 can be, for example, a DAF. The resin layer 24 may be formed so as to cover the entire upper ends 23a of the terminal electrodes 22 and the through electrodes 23, or may be formed so that the tips of the terminal electrodes 22 and the upper ends 23a of the through electrodes 23 are exposed from the surface 24a of the resin layer 24. The resin layer 24 may be formed by applying a liquid adhesive containing the same thermosetting adhesive (curable resin composition) as the resin film to the upper surface 21a of the semiconductor substrate 21 and then curing the liquid adhesive. The resin layer 24 is sufficient to be hardened to the extent that it can be subjected to at least one of suction and load application (pressure), collet separation after heat treatment, and polishing (described later), but may not be completely hardened (so-called C stage). However, it may be completely hardened. The thickness of the resin layer 24 may be, for example, 50 μm or less, 20 μm or less, 10 μm or less, 9 μm or less, 8 μm or less, or 7 μm or less, or 1 μm or more, 2 μm or more, 3 μm or more, 4 μm or more, 5 μm or more, or 10 μm or more. The thickness of the resin layer 24 may be between 50% and 150% or between 80% and 120% of the height of the plurality of terminal electrodes 22 or the height of the upper ends 23 a of the through electrodes 23 (the protruding height from the upper surface 21 a of the semiconductor substrate 21). Preferably, the thickness of the resin layer 24 is the same as the height of the terminal electrodes 22 or the upper ends 23 a of the through electrodes 23. The thickness of the resin layer 24 here refers to the thickness after curing, the height of the plurality of terminal electrodes 22 refers to the average height of the plurality of terminal electrodes 22, and the height of the upper ends 23a of the plurality of through electrodes 23 refers to the average height of the plurality of upper ends 23a. Furthermore, even after the resin layer 24 is polished in a step described below, the thickness of the resin layer 24 may be between 50% and 150% or between 80% and 120% of the height or upper ends 23a of the plurality of terminal electrodes 22. In this case, the thickness of the resin layer 24 before polishing may be thicker than the thickness of the auxiliary member 25.
[0054] The thermosetting adhesive constituting this film includes, for example, a high-molecular-weight resin component and a thermosetting component. The high-molecular-weight resin component may include, for example, at least one resin selected from the group consisting of acrylic rubber, polyimide, and phenoxy resin. The high-molecular-weight resin component may have a reactive group such as an epoxy group. The weight-average molecular weight (standard polystyrene equivalent value measured by GPC method) of the high-molecular-weight resin component may be 100,000 to 3,000,000. The content of the high-molecular-weight resin component may be 30 to 80 parts by mass per 10 parts by mass of the total mass of the resin layer 24.
[0055] The thermosetting component that can be included in the resin layer 24 is a compound having a reactive group that forms a crosslinked structure by self-polymerization and / or reaction with a curing agent. The thermosetting component may include, for example, at least one selected from the group consisting of epoxy resin, bismaleimide resin, triazine resin, and phenolic resin. The content of the thermosetting component may be 1 to 30 parts by mass per 100 parts by mass of the resin layer 24. The thermosetting adhesive that constitutes the resin layer 24 may contain other components as needed. Examples of other components include a curing agent that reacts with the thermosetting component, a curing accelerator that promotes the reaction between the thermosetting component and the curing agent, a coupling agent (e.g., a silane coupling agent), and a filler (e.g., silica).
[0056] The resin layer 24 may contain an inorganic filler. Specific examples of inorganic fillers include glass, silica, alumina, titanium oxide, carbon black, mica, and boron nitride. Among these, silica, alumina, titanium oxide, and boron nitride are preferred from the viewpoints of handleability and processability (versatility). Silica, alumina, and boron nitride are more preferred from the viewpoints of dispersibility in the resin and easy particle size control. These fillers may be used alone or in combination of two or more. The average particle diameter of the inorganic filler contained in the resin layer 24 may be, for example, 20 μm or less or 10 μm or less, and the maximum particle diameter of the inorganic filler may be, for example, 30 μm or less. Preferably, the average particle diameter of the inorganic filler is 5 μm or less, and the maximum particle diameter of the inorganic filler is 20 μm or less. Having an average particle diameter of 10 μm or less and a maximum particle diameter of 30 μm or less allows the resin layer to fill the gaps between terminals when formed on the terminal surface, and suppresses warping after curing the resin layer. The lower limit of the average particle size and the lower limit of the maximum particle size of the inorganic filler are not particularly limited, but both may be 0.001 μm or more. From the viewpoint of improving thermal conductivity, the aspect ratio of the inorganic filler is preferably 50 to 85. The aspect ratio here is, for example, the average value of major axis / minor axis, which is the ratio of major axis to minor axis, of any 20 inorganic fillers.
[0057] Examples of methods for measuring the average particle size and maximum particle size of the inorganic filler include a method of measuring the particle sizes of approximately 20 inorganic fillers using a scanning electron microscope (SEM). Examples of measurement methods using an SEM include a method of preparing a sample by heat-curing (preferably at 150°C to 180°C for 1 hour to 10 hours) a resin composition containing the inorganic filler, cutting the center of the sample, and observing the cross section with an SEM. In this case, it is preferable that the probability of fillers having a particle size of 3 μm or less in the cross section be 80% or more of all fillers.
[0058] The content of the inorganic filler contained in the resin layer 24 may be 10% by mass to 95% by mass, based on the total solid content of the resin layer 24 before curing. The content of the inorganic filler contained in the resin layer 24 is preferably 20% by mass or more, more preferably 30% by mass or more, particularly preferably 40% by mass or more, and preferably 40% by mass to 95% by mass, based on the total solid content of the resin layer 24 (adhesive) before curing. The elastic modulus (Young's modulus) of such a resin layer 24 may be, for example, 10 MPa or more, or 1.0 GPa or more, at room temperature (25°C). The linear expansion coefficient of the resin layer 24 at or below its glass transition temperature may be, for example, 10 ppm / K to 200 ppm / K. The auxiliary member 25 may have the same configuration as the resin layer 24 and may contain an inorganic filler as described above. In this case, the elastic modulus of the auxiliary member 25 at room temperature may be 10 MPa or more, and the linear expansion coefficient may be, for example, 10 ppm / K to 200 ppm / K. Preferably, the difference between the linear expansion coefficient of the resin layer 24 and the linear expansion coefficient of the auxiliary member 25 is 150 ppm / K or less. Note that the difference between the linear expansion coefficient of the resin layer 24 and the linear expansion coefficient of the auxiliary member 25 may be 150 ppm / K or less even after the auxiliary member 25 has hardened (i.e., after it has become the semiconductor device 1). Note that the thermal conductivity of the resin layer 24 is preferably 0.3 W / m·K or more, and more preferably 0.5 W / m·K or more.
[0059] The material forming the resin layer 24 preferably has a reduced concentration of ionic impurities. Specifically, the ionic impurity concentration of the cured resin layer 24 is, for example, 5 ppm or less, or may be 3 ppm or less, preferably 1 ppm or less, more preferably 0.5 ppm or less, and even more preferably 0.3 ppm or less. This prevents migration between the multiple terminal electrodes 22 covered by the resin layer 24 and between the upper ends 23a of the through electrodes 23 and adjacent terminal electrodes 22, thereby ensuring insulation between the terminal electrodes 22 and between the terminal electrodes 22 and the upper ends 23a. Because the resin layer 24 remains as a component of the semiconductor device 1 to be fabricated (and is not peeled off during manufacturing), it is preferable for it to have such a migration prevention function. Examples of ionic impurities include sodium (Na), potassium (K), and chlorine (Cl). Similarly, the material forming the auxiliary member 25 may have a reduced concentration of ionic impurities, and the concentration of ionic impurities in the auxiliary member 25 may be, for example, 5 ppm or less, or 3 ppm or less.
[0060] Furthermore, since resin layer 24 remains as a component of semiconductor device 1 to be fabricated, it is preferable that, in a cured state, it is reliably fixed to upper surface 21 a of semiconductor substrate 21. Specifically, the adhesive strength between cured resin layer 24 and upper surface 21 a of semiconductor substrate 21 is 1 MPa or more, and preferably 3 MPa or more. The same applies to auxiliary member 25, and the adhesive strength between auxiliary member 25 and lower surface 21 b of semiconductor substrate 21 is 1 MPa or more, and preferably 3 MPa or more.
[0061] Next, after preparation of the semiconductor die 20 configured as described above is completed, as shown in FIGS. 6A and 6B , the entire surface 24 a of the resin layer 24 of the semiconductor die 20 is vacuum-sucked and lifted by a collet C. The collet C is formed, for example, from a thermally conductive metal member and is configured to transfer heat from a heat source (not shown) to the semiconductor die 20 (e.g., the resin layer 24). In other words, the collet C also functions as a heating element. The semiconductor die 20 is then moved to a predetermined position on the wiring layer 12 by the vacuum-sucked collet C and attached and fixed to the predetermined position on the wiring layer 12 by an auxiliary member 25. During this attachment, because the terminal electrodes 22 of the semiconductor die 20 are covered by the resin layer 24, the entire surface 24 a of the resin layer 24 is heated and pressed by the collet C, thereby bonding each lower end 23 b of the plurality of through electrodes 23 to the corresponding wiring electrodes 12 a on the wiring layer 12. This results in the state shown in FIG. 2B . The semiconductor die 20 is placed face up with the terminal electrodes 22 facing upward.
[0062] Next, as shown in FIG. 2C , the semiconductor die 20 is mounted (attached) on the wiring layer 12, and the semiconductor die 20 and the connection electrodes 13 are encapsulated with an encapsulant to form an encapsulant layer 14 on the wiring layer 12. The encapsulant layer 14 is formed containing a thermosetting resin such as an epoxy resin, and is cured by heat or the like after encapsulation. This thermal curing may also harden the auxiliary member 25 of the semiconductor die 20. The encapsulant constituting the encapsulant layer 14 is composed of a thermosetting resin composition, for example, containing an epoxy resin and a curing agent. The encapsulant constituting the encapsulant layer 14 may further contain an inorganic filler, such as a silica filler. The average particle diameter of the inorganic filler contained in the encapsulant may be, for example, 50 μm or less, 25 μm or less, 10 μm or less, or 0.01 μm or less. The encapsulant constituting the encapsulant layer 14 preferably contains an inorganic filler with a large particle size to suppress warpage during or after manufacturing of the semiconductor device 1, and preferably contains an inorganic filler with an average particle size larger than that of the inorganic filler contained in the resin layer 24 of the semiconductor die 20. Note that if the terminal electrodes 22 and the upper ends 23a of the through-electrodes 23 of the semiconductor die 20 are not covered by the resin layer 24, the spaces between the terminal electrodes 22 and between the terminal electrodes 22 and the upper ends 23a are sealed by the encapsulant layer 14. In this case, the encapsulant layer 14 uses an inorganic filler with a particle size smaller than the spaces between the terminal electrodes 22, etc. Using such a method can, for example, reduce the elasticity of the encapsulating resin, making grinding difficult in a subsequent grinding process or causing warpage during or after manufacturing of the semiconductor device 1. However, when the terminal electrodes 22 and the upper ends 23a of the semiconductor die 20 are covered by the resin layer 24 as in this embodiment, it is not necessary to consider the ability to fill spaces between the terminal electrodes 22, etc., when selecting the encapsulant material constituting the encapsulant layer 14. Therefore, in the sealing material layer 14, it is possible to design a flexible resin and filler taking into consideration warpage and the like.
[0063] Next, after the encapsulant layer 14 is formed, it is polished by CMP or the like, as shown in FIG. 2D . As a result, the tips 13a of the connection electrodes 13 are exposed outside the encapsulant layer 14a, and the tips 22a of the terminal electrodes 22 of the semiconductor die 20 and the upper ends 23a of the through electrodes 23 are exposed outside the surface 24a of the resin layer 24. This thins the encapsulant layer 14 to the encapsulant layer 14a shown in FIG. 2D . The elastic modulus (Young's modulus) of such encapsulant layers 14, 14a may be, for example, 3.0 GPa or more. The linear expansion coefficient of the encapsulant layer 14, 14a may be 5 ppm / K to 150 ppm / K, and the difference with the linear expansion coefficient of the resin layer 24 may be 150 ppm / K or less, preferably 100 ppm / K or less. The thickness of the polished resin layer 24 may be 20 μm or more. When the resin layer 24 is polished as described above, the tip portions of the terminal electrodes 22 and the upper ends of the through electrodes 23 may also be polished in the same manner.
[0064] Subsequently, after the encapsulant layer 14a is formed, as shown in FIG. 3A , a wiring layer 15 is formed on the encapsulant layer 14a. The wiring layer 15 may be, for example, a redistribution layer (RDL). A plurality of connection electrodes 16 and a plurality of connection electrodes 17 are formed on the wiring layer 15. Portions of the wiring layer 15 other than the electrodes are insulating portions. The connection electrodes 16 connect an external device to semiconductor dies 26 and 27 (described later) and are connected to, for example, the connection electrodes 13. The connection electrodes 17 connect the semiconductor die 20 to the semiconductor dies 26 and 27 (described later). The connection electrodes 17 are each connected to a terminal electrode 22 of the semiconductor die 20. Furthermore, some of the connection electrodes 17 connect the semiconductor dies 26 and 27 to the wiring electrodes 12a of the wiring layer 12 via through electrodes 23 provided on the semiconductor die 20. In this case, the connection electrodes 17 are each connected to the upper ends 23a of the through electrodes 23 of the semiconductor die 20. Each of the connection electrodes 16 and 17 includes, for example, a copper pillar. The connection electrodes 16 and 17 can be fabricated by a known method.
[0065] 3B, after the wiring layer 15 is formed, the semiconductor dies 26 and 27 are mounted on the wiring layer 15. The semiconductor dies 26 and 27 are, for example, semiconductor chips such as LSI chips, CMOS sensors, and memories. During this mounting, the connection electrodes 16 are connected to the semiconductor dies 26 and 27, and the connection electrodes 17 connect the semiconductor die 20 and the semiconductor dies 26 and 27. Note that some of the connection electrodes 17 connect the semiconductor dies 26 and 27 to the wiring electrodes of the wiring layer 12.
[0066] 4A, the semiconductor dies 26 and 27 are encapsulated on the wiring layer 15 with an encapsulant to form an encapsulant layer 18 on the wiring layer 15. The encapsulant layer 18, like the encapsulant layer 14, is made of a thermosetting resin such as an epoxy resin, and is cured after encapsulation.
[0067] Next, after the semiconductor dies 26 and 27 are encapsulated with the encapsulant to form the encapsulant layer 18, the encapsulant layer 18 may be ground until the surfaces of the semiconductor dies 26 and 27 are exposed from the surface of the encapsulant layer, as shown in Fig. 4B. This thins the encapsulant layer 18 to the encapsulant layer 18a shown in Fig. 4B.
[0068] Next, after the sealing material layer 18a is formed, as shown in (a) of Figure 5, the temporary fixing layer 11 is irradiated with laser light or heated to reduce the adhesiveness of the temporary fixing layer 11 and peel the carrier substrate 10 from the wiring layer 12.
[0069] Next, when the carrier substrate 10 is peeled off, as shown in Fig. 5(b), connection bumps 19 are formed on the lower ends of the connection electrodes 13 exposed from the lower surface of the wiring layer 12. Also, a substrate 35 shown in Fig. 5(c) is prepared. The substrate 35 is provided with a substrate body 36, connection bumps 37 for connecting the wiring electrodes in the substrate body 36 to the outside, adhesive members 38, and other members 39 (for example, various electronic components).
[0070] 5C, the semiconductor device 30 provided with the connection bumps 19 is mounted on a substrate 35. At this time, the semiconductor device 30 is adhered and fixed by an adhesive member 38 on the substrate 35. Thereafter, the adhesive member 38 is cured by heat curing or the like, thereby producing the semiconductor device 1 shown in FIG.
[0071] Next, an example of a method for fabricating the semiconductor die 20 used in manufacturing the semiconductor device 1 described above will be described with reference to FIG.
[0072] First, as shown in FIG. 7A , a semiconductor wafer 41 corresponding to each semiconductor substrate 21 of the multiple semiconductor dies 20 is prepared. The semiconductor wafer 41 has multiple electrodes 42 and multiple through-hole electrodes 43 corresponding to each semiconductor die 20. After the semiconductor wafer 41 is prepared, as shown in FIG. 7B , a wafer resin layer 44 containing a curable resin composition is formed on the upper surface 41a (first surface) of the semiconductor wafer 41 so as to cover the upper ends 43a of the multiple electrodes 42 and the multiple through-hole electrodes 43. The wafer resin layer 44 corresponds to the resin layer 24 (before curing) described above and is formed by attaching a resin film containing a similar thermosetting resin composition to the semiconductor wafer 41. Alternatively, the wafer resin layer 44 may be formed by applying a liquid adhesive containing a similar thermosetting resin composition to the semiconductor wafer 41. Thereafter, as shown in FIG. 7C , the wafer resin layer 44 is cured by heat or the like to form a cured wafer resin layer 44a.
[0073] Next, as shown in (d) of FIG. 7, an NCF 45 corresponding to the above-described auxiliary member 25 is attached to the lower surface 41b (second surface) of the semiconductor wafer 41. This ensures insulation of the lower ends 43b of the plurality of through electrodes 43. Then, as shown in (e) of FIG. 7, the semiconductor wafer 41 including the cured wafer resin layer 44a is diced D to obtain a plurality of semiconductor dies 20. Such semiconductor dies 20 can be used as bridge dies when manufacturing various semiconductor devices. Note that the semiconductor device shown in FIG. 1 is an example using the semiconductor die 20 and is not limited thereto.
[0074] Here, the effects of the semiconductor device manufacturing method according to this embodiment, specifically, the method for mounting the semiconductor die 20, will be described in comparison with the method shown in FIG. 9 . In the method shown in FIG. 9 , unlike the method according to this embodiment, the resin layer 24 is not provided, so the upper ends 123 a (copper pillars) of the multiple terminal electrodes 122 and through-hole electrodes 123 on the semiconductor substrate 121 are exposed. Therefore, as shown in FIG. 9A , suction is performed using a metal collet C1 with a protruding periphery (a recessed center) to avoid the upper ends 123 a of the terminal electrodes 122 and through-hole electrodes 123. Because semiconductor dies are becoming thinner, such suction can result in the semiconductor die 120 being strongly suctioned at the periphery, causing the semiconductor die 120 to bend. In particular, when a semiconductor wafer is diced to obtain multiple semiconductor dies 120, the semiconductor dies 120 are pushed up from the backside with pins P or the like to peel them off the dicing tape. This can accelerate bending of the semiconductor die 120 and, in some cases, even cause the semiconductor die 120 to crack.
[0075] 9B, when the semiconductor die 120 is mounted on the support 110 (wiring layer) after suction and then thermocompression-bonded, heat and load are applied only to the outer periphery (see the two regions R in the figure), making it difficult for heat to be conducted to the joint between the lower end 123b of the through electrode 123 and the wiring electrode of the wiring layer (support 110) and also making it difficult to apply pressure firmly to the joint. Also, it becomes difficult to apply load to the central part of the back surface of the semiconductor die 120, which can result in insufficient compression bonding or the formation of a void in the central part.
[0076] In contrast, in the manufacturing method of a semiconductor device according to this embodiment, as shown in Fig. 6, when mounting the semiconductor die 20, a hardened resin layer 24 is provided on the upper surface 21a of the semiconductor substrate 21 so as to cover the upper ends 23a of the plurality of terminal electrodes 22 and through electrodes 23. The surface 24a of this hardened resin layer 24 is then sucked and lifted by a collet C for subsequent mounting. In this way, the upper ends 23a of the plurality of terminal electrodes 22 and through electrodes 23 are covered with the resin layer 24, and the semiconductor die 20 can be sucked and lifted by the collet C, which is a holding member, without avoiding the upper ends 23a of the terminal electrodes 22 and through electrodes 23, thereby preventing the semiconductor die from warping or cracking.
[0077] Furthermore, in this semiconductor device manufacturing method, a cured resin layer 24 is provided on the upper surface 21a of the semiconductor substrate 21 so as to cover the upper ends 23a of the terminal electrodes 22 and the through electrodes 23. A metal collet C, which serves as a heating element, is then brought into contact with the surface 24a of the cured resin layer 24 to thermally bond (thermocompression bond) the lower ends 23b of the through electrodes 23 to the wiring electrodes 12a of the wiring layer 12, which serves as the support. In this case, the upper ends 23a of the multiple terminal electrodes 22 and the through electrodes 23 are covered with the resin layer 24, and the entire surface of the semiconductor die 20 can be heated by the collet C, which serves as a heating element, without affecting the terminal electrodes 22, etc., thereby allowing sufficient heat transfer from the collet C to the semiconductor die 20 and the through electrodes 23 located therein. Furthermore, providing such a resin layer 24 allows a load to be applied to the entire surface of the semiconductor die 20, thereby ensuring sufficient bonding pressure between the through electrodes 23 and the wiring electrodes 12a of the wiring layer 12. As described above, this method for manufacturing a semiconductor device makes it possible to reliably bond the through electrodes 23 of the semiconductor die 20 having a plurality of terminal electrodes 22. Furthermore, this method for manufacturing a semiconductor device makes it easy to manufacture the device because the portions covering the terminal electrodes 22 and the like are formed from the hardened resin layer 24.
[0078] In the method for manufacturing a semiconductor device according to this embodiment, when preparing the semiconductor die 20, a resin layer containing a curable resin composition is formed on the upper surface 21a of the semiconductor substrate 21 so as to cover the upper ends 23a of the plurality of terminal electrodes 22 and the through electrodes 23, and this resin layer is cured to form a cured resin layer. This makes it possible to easily form the resin layer 24 that protects the upper ends 23a of the plurality of terminal electrodes 22 and the through electrodes 23.
[0079] In the method for manufacturing a semiconductor device according to this embodiment, the cured resin layer 24 is formed by attaching a resin film (e.g., a DAF) containing a curable resin composition to the upper surface 21a of the semiconductor substrate 21 and then curing it. This makes it possible to easily form the resin layer 24 that protects the upper ends 23a of the multiple terminal electrodes 22 and the through electrodes 23. Alternatively, the cured resin layer 24 may be formed by applying a liquid adhesive containing a curable resin composition to the upper surface 21a of the semiconductor substrate 21 and then curing it. In this case, too, the resin layer 24 that protects the upper ends 23a of the multiple terminal electrodes 22 and the through electrodes 23 can be easily formed.
[0080] In the method for manufacturing a semiconductor device according to this embodiment, the cured resin layer 24 preferably contains an inorganic filler. In this case, the hardness (e.g., elastic modulus) of the resin layer 24 can be improved, and bending and cracking of the semiconductor die 20 can be further suppressed. Furthermore, the inclusion of an inorganic filler can also suppress warping of the semiconductor die 20 including the resin layer 24. Furthermore, the inclusion of an inorganic filler makes it easier to perform a polishing process when polishing the resin layer 24.
[0081] In the method for manufacturing a semiconductor device according to this embodiment, the content of the inorganic filler in the cured resin layer 24 may be 10 mass % or more based on the total amount of solids contained in the resin layer before curing, which can more reliably suppress warpage of the semiconductor die 20.
[0082] In the method for manufacturing a semiconductor device according to this embodiment, the average particle size of the inorganic filler in the cured resin layer 24 is preferably 20 μm or less. In this case, even if the terminal electrodes 22 and pitch of the semiconductor die 20 are miniaturized, the resin and filler can be reliably introduced between the terminal electrodes, ensuring that the terminal electrodes are reliably covered with the resin layer.
[0083] In the method for manufacturing a semiconductor device according to this embodiment, the modulus of elasticity of the cured resin layer 24 may be 10 MPa or more. In this case, warping and cracking of the semiconductor die 20 can be further suppressed. Furthermore, when polishing the cured resin layer 24 to expose the heads of the terminal electrodes 22, the polishing operation can be easily performed. Furthermore, since the cured resin layer 24 has a high modulus of elasticity, grinding of the resin layer, copper pattern, etc. can be easily performed.
[0084] In the semiconductor device manufacturing method according to this embodiment, when preparing the semiconductor dies 20, a semiconductor wafer 41 corresponding to a plurality of semiconductor substrates 21 is prepared, and then a wafer resin layer 44 containing a curable resin composition is formed on the upper surface 41a of the semiconductor wafer 41 so as to cover the upper ends 43a of the plurality of electrodes 42 and the plurality of through-hole electrodes 43. This wafer resin layer 44 is then cured. The semiconductor wafer 41 is then diced D to obtain a plurality of semiconductor dies 20. This method allows a plurality of semiconductor dies 20 to be manufactured at once. Furthermore, this manufacturing method allows the semiconductor dies 20 to be peeled from the dicing tape without bending or cracking, even when diced.
[0085] In the semiconductor device manufacturing method according to this embodiment, after the lower ends 23b of the through electrodes 23 are bonded to the wiring electrodes 12a of the wiring layer 12, which serves as a support, the semiconductor die 20 may be encapsulated with an encapsulant, and the encapsulant layer 14, 14a may be formed on the wiring layer 12. The average particle size of the inorganic filler contained in the encapsulant layer 14, 14a is preferably larger than the average particle size of the inorganic filler contained in the resin layer 24. In this way, by including a larger inorganic filler in the encapsulant, warping of the encapsulant layer 14 due to heat can be more reliably suppressed. Particularly in large-format processes, this allows for reliable adsorption during high-precision processing in subsequent processes.
[0086] In the method for manufacturing a semiconductor device according to this embodiment, the difference between the linear expansion coefficient of the encapsulant layers 14, 14a and the linear expansion coefficient of the cured resin layer 24 is preferably within 150 ppm / K. In this case, the behavior of the encapsulant layer 14a and the resin layer 24 becomes uniform when heat is applied to the fabricated semiconductor device 1, and it is possible to reduce the occurrence of problems due to heat, such as misalignment in expansion.
[0087] In the method for manufacturing a semiconductor device according to this embodiment, the hardened resin layer 24 may be polished together with the sealing material layer 14a so that the tips 22a of the terminal electrodes 22 and the upper ends 23a of the through electrodes 23 are exposed from the hardened resin layer 24. This makes it possible to form a fine wiring layer 15 and the like with high precision on the polished surface of the sealing material layer 14 and the like.
[0088] In the method for manufacturing a semiconductor device according to this embodiment, the thickness of the cured resin layer 24 may be 15 μm or more or 30 μm or more when the semiconductor die 20 is lifted by the collet C or when the semiconductor die 20 is thermally bonded. In this case, warping and cracking of the semiconductor die 20 can be more reliably suppressed.
[0089] In the method for manufacturing a semiconductor device according to this embodiment, an insulating auxiliary member 25 for attaching the semiconductor die 20 to a support such as the wiring layer 12 may be provided on the lower surface 21b of the semiconductor substrate 21, and the auxiliary member 25 may surround the lower end 23b of the through electrode 23. In this case, the through electrode 23 of the semiconductor die 20 can be more reliably joined to the wiring electrode 12a of the wiring layer 12, which serves as the support, while ensuring insulation from other electrodes. In addition, the semiconductor member can be easily attached to the support.
[0090] In the method for manufacturing a semiconductor device according to this embodiment, the difference between the linear expansion coefficient of the cured resin layer 24 and the linear expansion coefficient of the auxiliary member 25 may be within 150 ppm / K. In this case, the thermal expansion of the cured resin layer and the auxiliary member that sandwich the semiconductor substrate becomes approximately the same, which prevents the position or parallelism of the semiconductor substrate from being impaired and also suppresses warpage of the mounted chip.
[0091] In the method for manufacturing a semiconductor device according to this embodiment, the thickness of the cured resin layer 24 may be between 50% and 150% or between 80% and 120% of the height of the terminal electrodes 22. In this case, the thickness of the resin layer 24 and the height of the terminal electrodes 22 are approximately equal, which makes it possible to more reliably lift and attach the semiconductor die 3.
[0092] In the semiconductor device manufacturing method according to this embodiment, the collet C is attracted to and lifts the entire surface 24a of the cured resin layer 24, and during thermal bonding, the collet C, which serves as a holding member, functions as a heating element, and the collet C is brought into contact with and pressed against the entire surface 24a of the cured resin layer 24 to perform thermal bonding. This more reliably prevents the semiconductor die 20 from warping or cracking, and also more reliably bonds the through electrodes 23 of the semiconductor die 20 to the wiring electrodes 12a of the wiring layer 12. Furthermore, the semiconductor die 20 can be more reliably attached to the wiring electrodes 12a, which serve as supports.
[0093] In the method for manufacturing a semiconductor device according to this embodiment, the ionic impurity concentration of the cured resin layer 24 is 5 ppm or less (or 3 ppm or less), which makes it possible to prevent migration between the terminal electrodes 22 covered with the cured resin layer 24 and between the terminal electrodes 22 and the upper ends 23 a of the through electrodes 23.
[0094] In the method for manufacturing a semiconductor device according to this embodiment, the adhesive strength between the cured resin layer 24 and the upper surface 21 a of the semiconductor substrate 21 is 1 MPa or more, which prevents the resin layer 24 of the semiconductor die 20 from peeling off in the manufactured semiconductor device 1.
[0095] Although the embodiments of the present disclosure have been described above, the present invention is not limited to the above-described embodiments and may be modified as appropriate without departing from the spirit and scope of the present disclosure. For example, in the above-described embodiments, the semiconductor die 20 used includes the auxiliary member 25 as shown in FIG. 6 , but this is not limiting. For example, as shown in FIG. 8 , a semiconductor die 20A without the auxiliary member 25 may be used. In this case, when mounting the semiconductor die 20A on the wiring layer 12, the lower end 23b of the through electrode 23 may be thermally bonded to the wiring electrode 12a of the wiring layer 12 by the above-described method, and then an underfill may be filled between the wiring electrode 12a and the underside of the semiconductor die 20. Such bonding may be performed using solder, and in this case, the flux may be removed after bonding.
[0096] 1...semiconductor device, 3...semiconductor die (semiconductor member), 3a...semiconductor substrate, 3b...terminal electrode, 3c...through electrode, 3d...resin layer, 5a...wiring layer (support), 12...wiring layer (support), 12a...wiring electrode, 14, 14a...encapsulant layer, 20, 20A...semiconductor die (semiconductor member), 21...semiconductor substrate, 21a...upper surface (first surface), 21b...lower surface (second surface), 22...terminal electrode, 22a...tip, 23...through electrode, 23a...upper end (first end), 23b...lower end (second end), 24...resin layer, 25...auxiliary member, 41...semiconductor wafer, 41a...upper surface (first surface), 41b...lower surface (second surface), 42...electrode, 43...through electrode, 43a...upper end (first end), 43b...lower end (second end), 44, 44a...wafer resin layer, 45...NCF.
Claims
1. A method for manufacturing a semiconductor device, comprising the steps of: preparing a semiconductor member including a semiconductor substrate having a first surface and an opposite second surface; a plurality of terminal electrodes provided on the first surface of the semiconductor substrate; a through electrode that penetrates the semiconductor substrate and has a first end protruding from the first surface and a second end protruding from the second surface; and a hardened resin layer provided on the first surface so as to cover the plurality of terminal electrodes and the first ends of the through electrode; preparing a support including at least one wiring electrode; placing the semiconductor member on the support such that the second end of the through electrode of the semiconductor member corresponds to the wiring electrode of the support; and pressing the surface of the hardened resin layer of the semiconductor member while bringing it into contact with a heating element to heat-bond the second end of the through electrode and the wiring electrode of the support.
2. The method for manufacturing a semiconductor device according to claim 1, wherein the step of preparing the semiconductor member includes the steps of: forming a resin layer containing a curable resin composition on the first surface of the semiconductor substrate so as to cover the first ends of the plurality of terminal electrodes and the through electrodes; and curing the resin layer to obtain the cured resin layer.
3. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein the cured resin layer is formed by attaching a resin film containing a curable resin composition to the first surface of the semiconductor substrate and then curing the resin film.
4. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein the cured resin layer is formed by applying a liquid adhesive containing a curable resin composition to the first surface of the semiconductor substrate and then curing the applied adhesive.
5. The method for manufacturing a semiconductor device according to any one of claims 1 to 4, wherein the cured resin layer contains an inorganic filler.
6. The method for manufacturing a semiconductor device according to claim 5, wherein the content of the inorganic filler is 30 mass % or more based on the total amount of solids contained in the resin layer before curing.
7. The method for manufacturing a semiconductor device according to claim 5 or 6, wherein the inorganic filler has an average particle size of 20 μm or less.
8. The method for manufacturing a semiconductor device according to any one of claims 1 to 7, wherein the hardened resin layer has a modulus of elasticity of 10 MPa or more at room temperature.
9. The method for manufacturing a semiconductor device according to any one of claims 1 to 8, wherein the step of preparing the semiconductor member comprises the steps of: preparing a semiconductor wafer including the semiconductor substrate, wherein the semiconductor wafer is provided with a plurality of through electrodes including the through electrode, and a first surface of the semiconductor wafer is provided with a plurality of electrodes including the plurality of terminal electrodes and each first end of the plurality of through electrodes; forming a wafer resin layer including a curable resin composition on the first surface of the semiconductor wafer so as to cover the plurality of electrodes and each first end of the plurality of through electrodes; hardening the wafer resin layer; and dicing the semiconductor wafer to obtain the semiconductor members.
10. A method for manufacturing a semiconductor device according to any one of claims 1 to 9, further comprising the step of sealing the semiconductor member with a sealing material after the second end of the through electrode is joined to the wiring electrode of the support, and forming a sealing material layer on the support.
11. The method for manufacturing a semiconductor device according to claim 10, wherein the average particle size of the inorganic filler contained in the sealing material layer is larger than the average particle size of the inorganic filler contained in the hardened resin layer.
12. The method for manufacturing a semiconductor device according to claim 10 or 11, wherein a difference between the linear expansion coefficient of the sealing material layer and the linear expansion coefficient of the cured resin layer is within 150 ppm / K.
13. The method for manufacturing a semiconductor device according to any one of claims 10 to 12, further comprising a step of polishing the hardened resin layer together with the sealing material layer so that the tip ends of the respective plurality of terminal electrodes and the first end of the through electrode are exposed from the hardened resin layer.
14. The method for manufacturing a semiconductor device according to any one of claims 1 to 13, wherein the thickness of the cured resin layer is 30 μm or more in the step of placing the semiconductor member.
15. The method for manufacturing a semiconductor device according to any one of claims 1 to 13, wherein the thermal conductivity of the cured resin layer is 0.3 W / m·K or more.
16. A method for manufacturing a semiconductor device as claimed in any one of claims 1 to 14, wherein an insulating auxiliary member is provided on the second surface of the semiconductor substrate for attaching the semiconductor member to the support, and the auxiliary member surrounds the second end of the through electrode.
17. The method for manufacturing a semiconductor device according to claim 16, wherein the auxiliary member is provided on the second surface of the semiconductor member before the semiconductor member is placed on the support.
18. The method for manufacturing a semiconductor device according to claim 16 or 17, wherein a difference between the linear expansion coefficient of the cured resin layer and the linear expansion coefficient of the auxiliary member is within 150 ppm / K.
19. The method for manufacturing a semiconductor device according to any one of claims 16 to 18, wherein the auxiliary member is a non-conductive adhesive film.
20. The method for manufacturing a semiconductor device according to any one of claims 16 to 19, wherein the transmittance of the auxiliary member is 10% or more.
21. The method for manufacturing a semiconductor device according to any one of claims 1 to 20, wherein the thickness of the cured resin layer is between 50% and 150% of the height of the terminal electrodes.
22. A method for manufacturing a semiconductor device as claimed in any one of claims 1 to 21, wherein in the step of positioning the semiconductor member, a holding member is adsorbed to and lifted over the entire surface of the hardened resin layer, and in the step of thermal bonding, the holding member is made to function as the heating element, and the holding member is brought into contact with and pressed against the entire surface of the hardened resin layer while thermal bonding is performed.
23. The method for manufacturing a semiconductor device according to any one of claims 1 to 22, wherein the hardened resin layer has an ionic impurity concentration of 5 ppm or less.
24. The method for manufacturing a semiconductor device according to any one of claims 1 to 23, wherein an adhesive strength between the cured resin layer and the first surface of the semiconductor substrate is 1 MPa or more.
25. The method for manufacturing a semiconductor device according to any one of claims 1 to 24, wherein an adhesive strength between the cured resin layer and the first surface of the semiconductor substrate is 3 MPa or more.
26. A method for manufacturing a semiconductor device as claimed in any one of claims 1 to 25, further comprising the step of mounting a first semiconductor die and a second semiconductor die on the first surface side of the semiconductor member after attaching the semiconductor member to the support, wherein in the mounting step, the first semiconductor die and the second semiconductor die are connected by the semiconductor member.
27. A semiconductor device comprising: a semiconductor member including a semiconductor substrate having a first surface and an opposite second surface; a plurality of terminal electrodes provided on the first surface of the semiconductor substrate; a through electrode that penetrates the semiconductor substrate and has a first end protruding from the first surface and a second end protruding from the second surface; and a hardened resin layer provided on the first surface so as to cover the plurality of terminal electrodes and the first ends of the through electrodes; and a support including at least one wiring electrode and to which the semiconductor member is attached, wherein the second end of the through electrode and the wiring electrode of the support are joined.
28. The semiconductor device according to claim 27, further comprising an insulating auxiliary member for attaching the semiconductor member to the support, the auxiliary member surrounding the periphery of the second end of the through electrode.
29. The semiconductor device according to claim 27 or 28, further comprising an encapsulant layer for encapsulating the semiconductor member.
30. The semiconductor device according to claim 29, wherein the average particle size of the inorganic filler contained in the sealing material layer is larger than the average particle size of the inorganic filler contained in the hardened resin layer.
31. The semiconductor device according to claim 29 or 30, wherein the difference between the linear expansion coefficient of said sealing material layer and the linear expansion coefficient of said cured resin layer is within 150 ppm / K.
32. The semiconductor device described in any one of claims 27 to 31, further comprising a first semiconductor die and a second semiconductor die provided on the first surface side of the semiconductor substrate, and at least one of the first ends of the plurality of terminal electrodes and the through electrodes of the semiconductor member are connected to the first semiconductor die and the second semiconductor die.
33. A semiconductor component comprising: a semiconductor substrate having a first surface and an opposite second surface; a plurality of terminal electrodes provided on the first surface of the semiconductor substrate; a through electrode that penetrates the semiconductor substrate and has a first end protruding from the first surface and a second end protruding from the second surface; and a hardened resin layer provided on the first surface so as to cover the plurality of terminal electrodes and the first ends of the through electrode.
34. The semiconductor member according to claim 33, wherein the cured resin layer contains an inorganic filler.
35. The semiconductor member according to claim 34, wherein a distance between the plurality of terminal electrodes, which is a terminal pitch, is 20 μm or less, and an average particle size of the inorganic filler is 20 μm or less.
36. The semiconductor component according to claim 34 or 35, wherein a distance between the first end of the through electrode and one of the plurality of terminal electrodes adjacent to the first end is 20 μm or less, and an average particle diameter of the inorganic filler is 20 μm or less.
37. The semiconductor article according to any one of claims 33 to 36, wherein the cured resin layer has a thermal conductivity of 0.3 W / m·K or more.
38. The semiconductor article according to any one of claims 33 to 37, wherein the cured resin layer has an ionic impurity concentration of 5 ppm or less.
39. The semiconductor article according to any one of claims 33 to 38, wherein the adhesive strength between the cured resin layer and the first surface of the semiconductor substrate is 1 MPa or more.
40. The semiconductor component according to any one of claims 33 to 39, further comprising an insulating auxiliary member provided on the second surface of the semiconductor substrate, the auxiliary member surrounding the second end of the through electrode.
41. The semiconductor member according to claim 40, wherein the difference between the linear expansion coefficient of the cured resin layer and the linear expansion coefficient of the auxiliary member is within 150 ppm / K.
42. The semiconductor member according to claim 40 or 41, wherein the transmittance of the auxiliary member is 10% or more.
Citation Information
Patent Citations
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