Semiconductor packaging structure
By setting several first through holes on the metal clip of the semiconductor package structure, the problem of poor reliability of the existing semiconductor chip and external pin interconnection method is solved, and higher soldering reliability and overall reliability of the semiconductor package structure are achieved.
Patent Information
- Application Number
- PCT/CN2023/134189
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-08-18
- Filing Date
- 2023-11-26
- Publication Date
- 2025-02-27
AI Technical Summary
The interconnection method between existing semiconductor chips and external pins is poor, resulting in poor reliability of devices under long-term use.
A semiconductor packaging structure is provided, including a plastic seal, a chip, a substrate and a pin. The chip is electrically connected to the substrate through a first pad, and the second pin is connected to the second pad through a metal clip. Several first through holes are provided on the metal clip for the dissipation of solder gas and improve solder reliability.
By providing a first through hole on the metal clip, the probability of hollowing of the solder layer between the chip and the substrate is reduced, the connection reliability between the chip and the second pin is improved, and the overall reliability of the semiconductor package structure is enhanced.
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Figure CN2023134189_27022025_PF_FP_ABST
Abstract
Description
Semiconductor packaging structure CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application claims priority to Chinese patent applications No. 2023110479204 and No. 202322234891.4 filed on August 18, 2023, the entire contents of which are incorporated herein by reference. Technical Field
[0002] The present application relates to the field of semiconductor packaging technology, and in particular to a semiconductor packaging structure. Background Art
[0003] Semiconductor packages are typically used to house and protect semiconductor chips including silicon, silicon carbide (SiC), gallium nitride (GaN), etc. These semiconductor chips can be configured with a variety of different device types, such as microprocessors, discrete devices, amplifiers, controllers, sensors, etc.
[0004] In the related art, semiconductor chips are usually interconnected with external pins through solder, but the reliability of the existing interconnection method between semiconductor chips and external pins is poor, which leads to poor reliability of the device under long-term use. Summary of the Invention
[0005] The present application provides a semiconductor packaging structure that can solve the problem of poor reliability of the existing interconnection method between semiconductor chips and external pins.
[0006] To solve the above technical problems, the present application adopts a technical solution: providing a semiconductor packaging structure, comprising: a plastic package; a chip, comprising a front side and a back side, wherein a first solder pad is provided on the back side of the chip and a second solder pad is provided on the front side of the chip; a substrate, comprising a first surface and a second surface opposite to each other, wherein the chip is provided on the first surface and is electrically connected to the substrate via the first solder pad, wherein the chip and the first surface of the substrate are encapsulated in the plastic package, and at least a portion of the second surface of the substrate is exposed outside the plastic package; a first pin, wherein one end of the first pin is connected to the substrate, and the other end of the first pin extends from a first side of the plastic package and extends in a direction facing the first surface; a second pin, wherein one end of the second pin is connected to the second solder pad via a metal clip, and the other end of the second pin extends from a second side of the plastic package and extends in a direction facing the first surface, wherein the first side and the second side are opposite sides of the plastic package; wherein the metal clip comprises a first connecting plate connected to the second solder pad, wherein the first connecting plate is connected to the second solder pad via solder, and wherein the first connecting plate is provided with a plurality of first through holes.
[0007] In one embodiment, the first through hole is located in the middle of the first connecting plate.
[0008] In one embodiment, a total area of the plurality of first through holes is less than 30% of an area of the surface of the first connecting plate.
[0009] In one embodiment, a surface of the first connecting plate facing the second pad is provided with a plurality of protrusions.
[0010] In one embodiment, the number of the protrusions is four, and the four protrusions are respectively located at four corners of the first connecting plate.
[0011] In one embodiment, a surface of the first connecting plate facing the second pad is provided with a plurality of protrusions, and the plurality of protrusions are arranged around the first through hole.
[0012] In one embodiment, the number of the first through hole is one.
[0013] In one embodiment, the first connecting plate is connected to a seesaw in a direction close to the first side, and in a direction from the second surface to the first surface, the seesaw is configured to be away from the first surface and connected to the first connecting plate through a first connecting segment, and a connection between the first connecting segment and the first connecting plate has a first angle toward the second side, and the first angle is an obtuse angle, and the first connecting plate, the first connecting segment and the seesaw are formed as one piece.
[0014] In one embodiment, the metal clip further comprises a second connecting plate, wherein in a direction from the second surface to the first surface, the second connecting plate is configured to be away from the first surface, the second pin is configured to be away from the first surface, and in a direction from the first side to the second side, the second pin is configured to be away from the substrate, and in a direction in which the first connecting plate is away from the first side, one end of the second connecting plate is connected to the first connecting plate via a second connecting segment, and the other end of the second connecting plate is connected to the second pin via a third connecting segment.
[0015] In one embodiment, in the direction from the second surface to the first surface, the end of the second pin connected to the third connecting segment is closer to the first surface relative to the second connecting plate, wherein the connection between the second connecting segment and the first connecting plate has a second angle toward the first side, and the second angle is an obtuse angle, and the connection between the third connecting segment and the second connecting plate has a third angle toward the first side, and the third angle is an obtuse angle.
[0016] In one embodiment, the plastic package body has a third side and a fourth side connecting the first side and the second side. In the direction from the third side to the fourth side, the width L1 of the first connecting plate is smaller than the width L2 of the second connecting plate. In the direction from the third side to the fourth side, the width of the second connecting section is L3. In the extending direction from the first connecting plate to the second connecting plate, the width L3 of the second connecting section gradually increases.
[0017] In one embodiment, the orthographic projection of the second connecting segment on the first surface is an isosceles trapezoid.
[0018] In one embodiment, the second connecting plate is exposed outside the plastic package.
[0019] In one embodiment, the second connecting plate includes a third surface facing the first surface and a fourth surface opposite to the third surface; the fourth surface of the second connecting plate is exposed outside the plastic package body, and the third surface of the second connecting plate, the first connecting plate, the second connecting segment and the third connecting segment are all encapsulated in the plastic package body.
[0020] In one embodiment, a plurality of second through holes are provided on the second connecting plate.
[0021] In one embodiment, a total area of the plurality of second through holes is less than 40% of an area of the surface of the metal clip.
[0022] In one embodiment, the material of the metal clip is copper; the surface of the second pad is plated with a metal layer, the metal layer is a stack of a Ni layer, a Pb layer and an Au layer, or the metal layer is a stack of a Ni layer and an Au layer, or the metal layer is an Ag layer, or the metal layer is a Cu layer; the solder includes SnSb and / or SnAg.
[0023] In one embodiment, the first pin and the substrate are integrally formed.
[0024] In one embodiment, a third solder pad and a fourth solder pad are further provided on the front side of the chip; the semiconductor packaging structure also includes a third pin and a fourth pin, one end of the third pin is connected to the third solder pad through a metal wire, and the other end of the third pin extends from the second side of the plastic package and extends toward the direction of the first surface, one end of the fourth pin is connected to the fourth solder pad through a metal wire, and the other end of the fourth pin extends from the second side of the plastic package and extends toward the direction of the first surface.
[0025] In one embodiment, the surfaces of the first pin and the second pin are plated with a tin layer, and the thickness of the tin layer is 5 microns to 20 microns.
[0026] Different from the prior art, the beneficial effect of the present application is that the semiconductor packaging structure provided by the present application includes a plastic package, a chip, a substrate, a first pin, and a second pin. Specifically, the chip is arranged on the first surface of the substrate, a first solder pad is arranged on the back of the chip, and a second solder pad is arranged on the front of the chip; the chip is electrically connected to the substrate via the first solder pad, and one end of the second pin is connected to the second solder pad via a metal clip. The metal clip includes a first connecting plate connected to the second solder pad, the first connecting plate is connected to the second solder pad via solder, and a plurality of first through holes are provided on the first connecting plate. By providing the plurality of first through holes on the first connecting plate, a dissipation channel is provided for the gas after the solder melts when the chip is soldered to the first connecting plate, thereby reducing the probability of voids in the solder layer between the chip and the first connecting plate, thereby improving the connection reliability between the chip and the second pin. BRIEF DESCRIPTION OF THE DRAWINGS
[0027] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present application. Those skilled in the art can also derive other drawings based on these drawings without inventive work, among which:
[0028] FIG1 is a schematic structural diagram of an embodiment of a semiconductor package structure provided by the present application at one viewing angle;
[0029] FIG2 is a schematic structural diagram of the semiconductor package structure shown in FIG1 from another perspective;
[0030] FIG3 is a schematic structural diagram of an embodiment of a semiconductor packaging structure with a plastic package removed from a viewing angle;
[0031] FIG4 is a schematic structural diagram of the semiconductor packaging structure shown in FIG3 with the plastic package removed from another perspective;
[0032] FIG5 is a schematic structural diagram of the semiconductor packaging structure shown in FIG3 with the plastic package removed from another perspective;
[0033] FIG6 is a longitudinal cross-sectional view of the semiconductor package structure shown in FIG1 ;
[0034] FIG7 is a longitudinal cross-sectional view of another embodiment of a semiconductor package structure provided by the present application;
[0035] FIG8 is an enlarged structural diagram of the metal clip provided in this application;
[0036] FIG9 is an enlarged view of the structure of area A in FIG6 ;
[0037] FIG10 is a schematic diagram of a process of cutting and forming the first lead, the substrate, and the second lead in the prior art;
[0038] FIG11 is a schematic diagram of a process for forming the first lead, substrate, and second lead cutting ribs according to an embodiment of the present application.
[0039] Description of labels:
[0040] Semiconductor packaging structure-100;
[0041] Plastic package 10;
[0042] Chip 20; second pad 21; third pad 22; fourth pad 23; metal wire 24;
[0043] Solder layer 70;
[0044] Substrate 30; heat dissipation area 31;
[0045] First pin 40; second pin 50; third pin 80; fourth pin 90;
[0046] Metal clip 60; first connecting plate 61; rocker plate 62; first connecting section 63; second connecting plate 64; second connecting section 65; third connecting section 66;
[0047] First through hole A1; second through hole A2; third through hole A3; raised portion B; first notch C1; second notch C2; bump C3; annular groove C4; strip groove C5;
[0048] The first included angle α1; the second included angle α2; the third included angle α3. DETAILED DESCRIPTION
[0049] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.
[0050] The terms "first," "second," and "third" in this application are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features identified. Therefore, features identified as "first," "second," or "third" may explicitly or implicitly include at least one of such features. In the description of this application, "plurality" means at least two, for example, two, three, etc., unless otherwise specifically defined. All directional designations in the embodiments of this application (such as up, down, left, right, front, back, etc.) are intended only to illustrate the relative positional relationships and movement of components in a specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional designations will also change accordingly. Furthermore, the terms "including," "having," and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus comprising a series of steps or elements is not limited to the listed steps or elements but may optionally include steps or elements not listed, or may optionally include other steps or elements inherent to such process, method, product, or apparatus.
[0051] References herein to "embodiments" mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute an independent or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.
[0052] The present application is described in detail below with reference to the accompanying drawings and embodiments.
[0053] Referring to Figures 1 to 9, Figure 1 is a structural schematic diagram of an embodiment of the semiconductor packaging structure provided by the present application at one viewing angle; Figure 2 is a structural schematic diagram of the semiconductor packaging structure shown in Figure 1 at another viewing angle; Figure 3 is a structural schematic diagram of an embodiment of the semiconductor packaging structure with the plastic package removed at one viewing angle; Figure 4 is a structural schematic diagram of the semiconductor packaging structure shown in Figure 3 with the plastic package removed at another viewing angle; Figure 5 is a structural schematic diagram of the semiconductor packaging structure shown in Figure 3 with the plastic package removed at another viewing angle; Figure 6 is a longitudinal cross-sectional view of the semiconductor packaging structure shown in Figure 1; Figure 7 is a longitudinal cross-sectional view of another embodiment of the semiconductor packaging structure provided by the present application; Figure 8 is an enlarged structural view of the metal clip provided by the present application; and Figure 9 is an enlarged structural view of area A in Figure 6.
[0054] Specifically, in conjunction with FIG. 1 to FIG. 4 , the present application provides a semiconductor package structure 100 , which includes a plastic package 10 , a chip 20 , a substrate 30 , a first lead 40 , and a second lead 50 .
[0055] The chip 20 includes a front side and a back side. A first pad (not shown) is provided on the back side of the chip 20 , and a second pad 21 is provided on the front side of the chip 20 .
[0056] The substrate 30 includes a first surface and a second surface that are opposite to each other. The chip 20 is disposed on the first surface and is electrically connected to the substrate 30 via a first solder pad. The first surface of the substrate 30 and the chip 20 are encapsulated within a plastic package 10. At least a portion of the second surface of the substrate 30 is exposed outside the plastic package 10 to form a heat dissipation zone 31. The heat dissipation zone 31 can be used to dissipate heat from the chip 20. The at least partial exposure of the second surface of the substrate 30 outside the plastic package 10 to form the heat dissipation zone 31 can include two situations: one in which a portion of the second surface of the substrate 30 is exposed outside the plastic package 10 to form the heat dissipation zone 31, and the other in which the entire second surface of the substrate 30 is exposed outside the plastic package 10 to form the heat dissipation zone 31. Specifically, the first solder pad of the chip 20 and the substrate 30 can be connected using soldering material to achieve electrical connection between the two.
[0057] One end of the first pin 40 is connected to the substrate 30 and further connected to the first pad of the chip 20 through the substrate 30 . The other end of the first pin 40 extends from the first side of the plastic package 10 and extends toward the first surface.
[0058] Among them, one end of the second pin 50 is connected to the second solder pad 21 through the metal clip 60, and the other end of the second pin 50 extends from the second side of the plastic package body 10 and extends toward the direction of the first surface. The first side and the second side are two opposite sides on the plastic package body 10.
[0059] Specifically, the first pad of the chip 20 is electrically connected to the first pin 40 of the substrate 30 , and the second pad 21 of the chip 20 is electrically connected to the second pin 50 through the metal clip 60 . The first pin 40 and the second pin 50 are used to achieve external access to the chip 20 .
[0060] 6 and 7 , the metal clip 60 may be completely encapsulated in the plastic package 10 ; or at least a portion of the metal clip 60 may be exposed from the plastic package 10 , and the area of the metal clip 60 exposed from the plastic package 10 may serve as a new heat dissipation channel to dissipate heat from the chip 20 .
[0061] Specifically, the plastic package 10 wraps the chip 20, at least a portion of the substrate 30, a portion of the first pin 40, a portion of the second pin 50, and at least a portion of the metal clip 60, and can seal and protect the chip 20 from moisture and dust particles, and provide corresponding insulation and support performance for the above components.
[0062] It can be understood that at least a portion of the second surface of the substrate 30 is exposed outside the plastic package 10 to achieve heat dissipation for the chip 20, and the first pin 40 and the second pin 50 connected to the chip 20 are respectively located on opposite sides of the plastic package 10 and extend toward the direction of the first surface, that is, the extension direction of the first pin 40 and the second pin 50 are arranged on the opposite side of the second surface of the substrate 30. Compared with the existing semiconductor packaging structure in which the heat dissipation area is located on the bottom surface when connected to the circuit (such as a circuit board), the heat dissipation area 31 of the embodiment of the present application is located on the top surface, which is easy to dissipate heat. When using the semiconductor packaging structure 100, the application personnel do not need to consider the scale of the circuit connected to the semiconductor packaging structure 100 and the heat dissipation capacity of the heat dissipation area on the bottom surface of the semiconductor packaging structure 100, thereby improving the performance of the application system.
[0063] 5 , 6 and 9 , in the embodiment of the present application, the metal clip 60 includes a first connecting plate 61 connected to the second pad 21 . The first connecting plate 61 is connected to the second pad 21 via solder, and a plurality of first through holes A1 are provided on the first connecting plate 61 .
[0064] Specifically, by setting a plurality of first through holes A1 on the first connecting plate 61, the plurality of first through holes A1 provide escape channels for the gas after the solder melts when the chip 20 is soldered to the first connecting plate 61, thereby reducing the probability of voids in the solder layer 70 formed between the chip 20 and the first connecting plate 61, thereby improving the reliability of the connection between the chip 20 and the second pin 50 through the metal clip 60.
[0065] In some embodiments, the solder includes SnSb and / or SnAg. Specifically, both SnSb and SnAg are highly thermally conductive solders. Therefore, using SnSb and / or SnAg as the solder not only provides an electrical connection between the chip 20 and the first connecting plate 61, but also allows the chip 20 to transfer heat to the first connecting plate 61 and other components connected to the first connecting plate 61, such as the metal clip 60 and the second pin 50, through the solder layer 70, thereby providing a new thermal conduction path for the chip 20. It should be noted that in other embodiments, the solder may also be other suitable materials besides SnSb and SnAg.
[0066] In some embodiments, the surface of the second pad 21 is plated with a metal layer, wherein the metal layer is a stack of a Ni layer, a Pb layer, and an Au layer, or a stack of a Ni layer and an Au layer, or an Ag layer, or a Cu layer. Specifically, by plating the metal layer on the surface of the second pad 21, the welding effect between the chip 20 and the first connecting plate 61 can be improved.
[0067] In some embodiments, the metal clip 60 is made of copper or aluminum. Copper has lower resistance than aluminum. The chip 20 and the second pin 50 are connected via the copper metal clip 60, which can provide higher current capacity.
[0068] In one embodiment, the first through hole A1 is located in the middle of the first connecting plate 61. Specifically, the first through hole A1 is located in the middle of the first connecting plate 61, that is, the first through hole A1 is located in the middle of the solder between the first connecting plate 61 and the second pad 21. Therefore, when the first connecting plate 61 and the chip 20 are soldered together, on the one hand, it can be more conducive to the escape of gas during welding, and on the other hand, it can minimize the differences between different areas of the solder layer 70 formed by the solder, thereby improving the connection reliability between the chip 20 and the first connecting plate 61.
[0069] In some embodiments, the number of the first through hole A1 can be one or more. When the number of the first through hole A1 is one, the first through hole A1 is disposed in the middle of the first connecting plate 61. When the number of the first through hole A1 is multiple, the multiple first through holes A1 are disposed around the middle of the first connecting plate 61, thereby minimizing the differences between different regions of the solder layer 70 formed by the solder.
[0070] It should be noted that if the area of the first through-holes A1 accounts for too large a proportion of the surface area of the first connecting plate 61, the area for connection between the first connecting plate 61 and the chip 20 will be too small, thereby affecting connection reliability. Therefore, in the embodiment of the present application, the total area of the first through-holes A1 is less than 30% of the surface area of the first connecting plate 61. For example, the total area of the first through-holes A1 is 30%, 25%, 20%, or 15% of the surface area of the first connecting plate 61.
[0071] Of course, the ratio of the area of the first through-holes A1 to the surface area of the first connecting plate 61 should not be too small. If it is too small, the escape path for the gas from the molten solder during welding will be too small, resulting in unsatisfactory exhaust. The specific design can be based on actual conditions. For example, the total area of the first through-holes A1 can be less than 30% of the surface area of the first connecting plate 61 and greater than 10% of the surface area of the first connecting plate 61.
[0072] 9 , in some embodiments, a surface of the second pad 21 facing the first connecting plate 61 is provided with a plurality of protrusions B; and / or a surface of the first connecting plate 61 facing the second pad 21 is provided with a plurality of protrusions B.
[0073] Specifically, by providing a plurality of raised portions B on the surface of the second soldering pad 21 facing the first connecting plate 61, and / or on the surface of the first connecting plate 61 facing the second soldering pad 21, the raised portions B are used to squeeze the solder and directly contact each other when the second soldering pad 21 is welded to the first connecting plate 61, thereby ensuring that the first connecting plate 61 and the second soldering pad 21 are parallel during welding, thereby ensuring the flatness of the metal clip 60 when connected to the second soldering pad 21, and the solder is located in the gap between adjacent raised portions B, which can improve the consistency of the solder thickness.
[0074] Among them, several protrusions B are set on the surface of the second soldering pad 21 facing the first connecting plate 61, and / or the surface of the first connecting plate 61 facing the second soldering pad 21. The several protrusions B can be set around the first through hole A1 to ensure that the first connecting plate 61 and the second soldering pad 21 are parallel during welding.
[0075] In the embodiment of the present application, to simplify the preparation of the raised portions B, a plurality of raised portions B are provided on the surface of the first connecting plate 61 facing the second pad 21. Specifically, the number of raised portions B may be four, and the four raised portions B are respectively located at the four corners of the first connecting plate 61. The plurality of raised portions B are formed by extrusion or etching.
[0076] Please continue to refer to Figure 6. In one embodiment, the first connecting plate 61 is connected to a rocker plate 62 in the direction close to the first side. In the direction from the second surface to the first surface, the rocker plate 62 is configured to be away from the first surface and is connected to the first connecting plate 61 through the first connecting section 63. The connection between the first connecting section 63 and the first connecting plate 61 has a first angle α1 toward the second side. The first angle α1 is an obtuse angle. The first connecting plate 61, the first connecting section 63 and the rocker plate 62 are formed as one piece.
[0077] Specifically, the integrally formed first connecting plate 61, first connecting section 63, and rocker plate 62 provide greater reliability and improved mechanical properties. Furthermore, the first angle α1 at the connection between the first connecting section 63 and the first connecting plate 61 is set to an obtuse angle, which allows the rocker plate 62 at the end of the first connecting section 63 away from the first connecting plate 61 to be away from the first surface. This further enhances the ability of the integrally formed first connecting plate 61, first connecting section 63, and rocker plate 62 to lock the plastic package body 10 to the film.
[0078] Please continue to refer to Figure 6. In one embodiment, the metal clip 60 also includes a second connecting plate 64. In the direction from the second surface to the first surface, the second connecting plate 64 is configured to be away from the first surface, and the second pin 50 is configured to be away from the first surface. In the direction from the first side to the second side, the second pin 50 is configured to be away from the substrate 30. In the direction in which the first connecting plate 61 is away from the first side, one end of the second connecting plate 64 is connected to the first connecting plate 61 through the second connecting segment 65, and the other end of the second connecting plate 64 is connected to the second pin 50 through the third connecting segment 66.
[0079] Specifically, in the direction in which the first connecting plate 61 is away from the first side, the opposite ends of the second connecting plate 64 are respectively connected to the first connecting plate 61 and the second pin 50 through the second connecting segment 65 and the third connecting segment 66, and in the direction from the second surface to the first surface, the second connecting plate 64 is configured away from the first surface, so that the second connecting plate 64, the second connecting segment 65 and the third connecting segment 66 form an arch structure, which increases the distance between the metal clip 60 and the substrate 30, thereby avoiding a short circuit.
[0080] Referring to FIG. 5 , in one embodiment, the second connecting plate 64 is also exposed outside the plastic package 10. The second connecting plate 64 and the heat dissipation area 31 respectively dissipate heat from the front and back surfaces of the chip 20. Specifically, the second connecting plate 64 may be partially or completely exposed outside the plastic package 10.
[0081] In one embodiment, the second connecting plate 64 includes a third surface facing the first surface and a fourth surface facing away from the third surface. The fourth surface of the second connecting plate 64 is exposed outside the plastic package 10, while the third surface of the second connecting plate 64, the first connecting plate 61, the second connecting segment 65, and the third connecting segment 66 are all encapsulated within the plastic package 10. In other words, the fourth surface of the second connecting plate 64 is flush with the surface of the plastic package 10 on the same side as the first surface, making the semiconductor package structure 100 more aesthetically pleasing while adding a heat dissipation channel.
[0082] Of course, in other embodiments, the third and fourth surfaces of the second connecting plate 64, the connection between the second connecting section 65 and the second connecting plate 64, and the connection between the third connecting section 66 and the second connecting plate 64 may all be exposed outside the plastic package 10, while the first connecting plate 61, the portion of the second connecting section 65 other than the connection with the second connecting plate 64, and the portion of the third connecting section 66 other than the connection with the second connecting plate 64 are all encapsulated within the plastic package 10. That is, the second connecting plate 64 protrudes from the plastic package 10. Specifically, as long as the second connecting plate 64 can achieve a heat dissipation effect on the chip 20, this is not limited here.
[0083] Further, referring to FIG. 3 or FIG. 5 , in the embodiment of the present application, a plurality of second through holes A2 are further provided on the second connecting plate 64. Specifically, by providing the second through holes A2 on the second connecting plate 64, during the injection molding process, the molding compound forming the molding body 10 flows through the second through holes A2, so that the second connecting plate 64 serves to secure the molding body 10 after the injection molding process is completed.
[0084] In one embodiment, the plastic package body 10 has a third side and a fourth side connecting the first side and the second side. The second through hole A2 is a strip-shaped hole, and the length of the strip-shaped hole from the first side to the second side is greater than the width of the strip-shaped hole from the third side to the fourth side. Of course, in other embodiments, the shape of the second through hole A2 includes but is not limited to a circle, a diamond, a rectangle, or other irregular shapes.
[0085] It should be noted that if the area of the second through-holes A2 accounts for too large a proportion of the surface area of the metal clip 60, it will affect the electrical properties (e.g., current conductivity) and mechanical properties (e.g., support) of the metal clip 60. Therefore, in the embodiment of the present application, the total area of the plurality of second through-holes A2 is less than 40% of the surface area of the metal clip 60. For example, the total area of the plurality of second through-holes A2 is 40%, 35%, 30%, 25%, etc., of the surface area of the metal clip 60.
[0086] Of course, the ratio of the area of the second through holes A2 to the surface area of the metal clip 60 should not be too small, otherwise the fixing effect on the plastic package body 10 will be poor. The specific design can be based on actual conditions. For example, the total area of the second through holes A2 can be less than 40% of the surface area of the metal clip 60 and greater than 15% of the surface area of the metal clip 60.
[0087] In this embodiment of the present application, the number of the second through hole A2 is one.
[0088] Please refer to Figures 6, 7 and 9. In one embodiment, in the direction from the second surface to the first surface, the end of the second pin 50 connected to the third connecting section 66 is closer to the first surface relative to the second connecting plate 64, wherein the connection between the second connecting section 65 and the first connecting plate 61 has a second angle α2 toward the first side, and the second angle α2 is an obtuse angle. The connection between the third connecting section 66 and the second connecting plate 64 has a third angle α3 toward the first side, and the third angle α3 is an obtuse angle.
[0089] Specifically, through the above design, the metal clip 60 is designed to have an arched structure, thereby reducing the risk of short circuit between the metal clip 60 and the substrate 30, and enabling the end of the second pin 50 connected to the third connecting section 66 to be accommodated in the plastic package 10 to avoid being affected by moisture and dust particles.
[0090] Please refer to Figures 5 and 8. In one embodiment, the width L1 of the first connecting plate 61 is smaller than the width L2 of the second connecting plate 64, that is, L2 is greater than L1. In the direction from the third side to the fourth side, the width of the second connecting section 65 is L3. In the extension direction from the first connecting plate 61 to the second connecting plate 64, the width L3 of the second connecting section 65 gradually increases.
[0091] Specifically, through the above-mentioned setting, the first connecting plate 61 can correspond to the size of the chip 20, which is convenient for welding the first connecting plate 61 with the second solder pad 21 of the chip 20, and is arranged in the extension direction from the first connecting plate 61 to the second connecting plate 64, the width L3 of the second connecting section 65 gradually increases, and the width L2 of the second connecting plate 64 is set to be greater than the width L1 of the first connecting plate 61, which can improve the current conduction capability and connection reliability of the second connecting section 65 and the second connecting plate 64, and improve the heat dissipation effect of the second connecting plate 64 on the chip 20.
[0092] The orthographic projection of the second connecting section 65 on the first surface is a trapezoid, as long as it can bridge the width L1 of the first connecting plate 61 and the width L2 of the second connecting plate 64. In the embodiment of the present application, the orthographic projection of the second connecting section 65 on the first surface is an isosceles trapezoid. In other embodiments, the orthographic projection of the second connecting section 65 on the first surface may also be a right-angled trapezoid or a trapezoid with other angles.
[0093] Please continue to refer to Figure 6. In one embodiment, one end of the first pin 40 is connected to the side wall of the substrate 30. The end of the first pin 40 connected to the side wall of the substrate 30 has a fifth surface and a sixth surface that are opposite to each other. The fifth surface is arranged coplanar with the first surface, and the sixth surface is located between the plane where the first surface is located and the plane where the second surface is located.
[0094] Specifically, the inventors of the present application discovered that, in the related art, as shown in FIG. 10 , which is a schematic diagram of the process for forming the first pin, substrate, and second pin by cutting and forming the ribs in the prior art, the first pin 40, substrate 30, and second pin 50 are integrally formed before the cutting and forming, and are typically designed to be connected to the second surface of the substrate 30 before the cutting and forming. During the thick aluminum wire bonding process, due to the low bonding quality between the copper pin structure (first pin 40 and second pin 50) and the aluminum wire, a plating layer needs to be electroplated on the bonding area to improve the bonding quality. Due to errors in the window size of the electroplating tooling, the electroplating layer typically forms on the side of the substrate 30. However, the adhesion between the electroplating layer and the molding material is poor. After the molding process is completed, defects such as delamination may occur due to the poor bonding quality between the side of the substrate 30 and the molding material. This allows moisture to enter the molding body 10 along the sidewalls of the substrate 30, reducing device reliability.
[0095] To solve the above problems, as shown in Figure 11, Figure 11 is a flow chart of an embodiment of the cutting and forming of the first pin, substrate and second pin in the present application. The present application designs the first pin 40 and the second pin 50 to be located in the same plane as the first surface of the substrate 30. Since the side of the substrate 30 is located on the lower side and is blocked by the pin structure, even if there is a window error in the electroplating tooling during electroplating, the side of the substrate 30 will not obtain the electroplating layer, thereby improving the bonding quality of the plastic packaging material with the first pin 40 and the substrate 30, reducing the probability of defects (delamination) in the plastic packaging body 10, and improving the reliability of the device.
[0096] In addition, in the embodiment of the present application, the first pin 40 and the substrate 30 are integrally formed, which can improve the structural strength of the pin frame formed by the first pin 40 and the substrate 30.
[0097] In one embodiment, the first pin 40 and the second pin 50 are plated with a tin layer, and the thickness of the tin layer is 5 microns to 20 microns. For example, the thickness of the tin layer can be 5 microns, 10 microns, 15 microns or 20 microns.
[0098] Specifically, the tin layer can enable the cut section to spontaneously form a tin-clad structure when the first pin and the second pin are cut and formed, thereby improving the oxidation resistance of the first pin 40 and the second pin 50; and improving the solderability of the first pin 40 and the second pin 50 with other circuit components.
[0099] In one embodiment, if the chip 20 only includes the first pad and the second pad 21 , the chip 20 may be a non-controllable device such as a diode such as an FRD / SRD / SBD.
[0100] Referring to FIG. 5 , in another embodiment, the chip 20 is a controllable device such as a MOSFET / IGBT. A third pad 22 is further provided on the front surface of the chip 20. The semiconductor package structure 100 further includes a third pin 80. One end of the third pin 80 is connected to the third pad 22 via a metal wire 24. The other end of the third pin 80 extends from the second side of the plastic package 10 toward the first surface. The third pad 22 generally serves as a gate pad or a drive pad. Therefore, the third pin 80 connected to the third pad 22 does not need to withstand high current and voltage. Therefore, the electrical connection structure between the third pin 80 and the third pad 22 has relatively low requirements for electrical and thermal performance. Conventional metal wire 24 connection can meet these requirements, thereby saving costs.
[0101] Continuing with FIG. 5 , a fourth pad 23 is further provided on the front surface of the chip 20. The semiconductor package structure 100 also includes a fourth pin 90. One end of the fourth pin 90 is connected to the fourth pad 23 via a metal wire 24. The other end of the fourth pin 90 extends from the second side of the plastic package 10 toward the first surface. The fourth pad 23 can be a Kelvin source floating island. Therefore, the fourth pin 90 connected to the fourth pad 23 does not need to withstand high current and voltage. Therefore, the electrical connection structure between the fourth pin 90 and the fourth pad 23 has relatively low requirements for electrical and thermal performance. Conventional metal wire 24 connection can meet these performance requirements, thereby saving costs.
[0102] Referring to FIG. 3 , in some embodiments, a plurality of third through holes A3 are defined at one end of the first pin 40 connected to the substrate 30 .
[0103] And / or, a plurality of first notches C1 are formed on an edge of one end of the first pin 40 away from the substrate 30 .
[0104] And / or, a side of the substrate 30 corresponding to the third side of the plastic package body 10 is provided with a plurality of bumps C3.
[0105] And / or, a side of the substrate 30 corresponding to the fourth side of the plastic package body 10 is provided with a plurality of bumps C3.
[0106] Specifically, the third through holes A3, the first notches C1 and the bumps C3 allow the molding compound to flow through the third through holes A3, the first notches C1 and the second notches C2 during the injection molding process and fix the molding body 10 after the injection molding process is completed.
[0107] Referring to FIG. 1 , in one embodiment, a plurality of second notches C2 are provided on the third side and / or the fourth side of the plastic package body 10. Specifically, the plurality of second notches C2 extend through the first surface of the substrate 30. The second notches C2 can be used to prevent glue overflow from the substrate 30 during injection molding, and to prevent delamination or cracking between the plastic package body 10 and the substrate 30.
[0108] Referring to FIG. 3 , in one embodiment, an annular groove C4 is defined on the first surface of the substrate 30 . The annular groove C4 surrounds the chip 20 .
[0109] Specifically, the annular groove C4 helps to increase the bonding ability between the substrate 30 and the plastic package body 10 and reduce the penetration of water vapor in the external environment.
[0110] Referring to FIG. 2 , in one embodiment, a strip-shaped groove C5 is defined on the top surface of the plastic package body 10 . The strip-shaped groove C5 is located on a side of the second surface of the substrate 30 close to the second lead 50 .
[0111] Specifically, the strip-shaped groove C5 increases the creepage distance between the heat dissipation area 31 and the second pin 50 extending out of the plastic package body 10 , thereby improving the safety and reliability of the device.
[0112] The above description is only an implementation method of the present application and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the description and drawings of this application, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.
Claims
1. A semiconductor packaging structure, wherein: include: Plastic sealing body; A chip, comprising a front side and a back side, wherein a first pad is disposed on the back side of the chip, and a second pad is disposed on the front side of the chip; A substrate, comprising a first surface and a second surface which are opposite to each other, wherein the chip is arranged on the first surface and is electrically connected to the substrate via the first pad, wherein the chip and the first surface of the substrate are encapsulated in the plastic package, and at least a portion of the second surface of the substrate is exposed outside the plastic package; A first pin, one end of which is connected to the substrate, and the other end of which extends from a first side of the plastic package body and toward the first surface; A second pin, one end of the second pin is connected to the second pad through a metal clip, the other end of the second pin extends from a second side of the plastic package body and extends toward the first surface, the first side and the second side are two opposite sides of the plastic package body; Wherein, the metal clip includes a first connecting plate connected to the second soldering pad, the first connecting plate is connected to the second soldering pad through solder, and a plurality of first through holes are provided on the first connecting plate.
2. The semiconductor package structure according to claim 1, wherein: The first through hole is located in the middle of the first connecting plate.
3. The semiconductor package structure according to claim 1, wherein: The total area of the first through holes is less than 30% of the area of the surface of the first connecting plate.
4. The semiconductor package structure according to claim 1, wherein: A plurality of protrusions are provided on the surface of the first connecting plate facing the second pad.
5. The semiconductor package structure according to claim 4, wherein: The number of the protrusions is 4, and the 4 protrusions are respectively located at the four corners of the first connecting plate.
6. The semiconductor package structure according to claim 2, wherein: A surface of the first connecting plate facing the second pad is provided with a plurality of protrusions, and the plurality of protrusions are arranged around the first through hole.
7. The semiconductor package structure according to claim 6, wherein: The number of the first through hole is one.
8. The semiconductor package structure according to claim 1, wherein: The first connecting plate is connected to a seesaw in a direction close to the first side. In a direction from the second surface to the first surface, the seesaw is configured to be away from the first surface and connected to the first connecting plate through a first connecting section. The connection between the first connecting section and the first connecting plate has a first angle toward the second side, and the first angle is an obtuse angle. The first connecting plate, the first connecting section and the seesaw are integrally formed.
9. The semiconductor package structure according to claim 1, wherein: The metal clip also includes a second connecting plate, in the direction from the second surface to the first surface, the second connecting plate is configured to be away from the first surface, the second pin is configured to be away from the first surface, in the direction from the first side to the second side, the second pin is configured to be away from the substrate, in the direction in which the first connecting plate is away from the first side, one end of the second connecting plate is connected to the first connecting plate through a second connecting segment, and the other end of the second connecting plate is connected to the second pin through a third connecting segment.
10. The semiconductor package structure according to claim 9, wherein: In the direction from the second surface to the first surface, the end of the second pin connected to the third connecting section is closer to the first surface than the second connecting plate, wherein the connection between the second connecting section and the first connecting plate has a second angle toward the first side, and the second angle is an obtuse angle, and the connection between the third connecting section and the second connecting plate has a third angle toward the first side, and the third angle is an obtuse angle.
11. The semiconductor package structure according to claim 10, wherein: The plastic package body has a third side and a fourth side connecting the first side and the second side. In the direction from the third side to the fourth side, the width L1 of the first connecting plate is smaller than the width L2 of the second connecting plate. In the direction from the third side to the fourth side, the width of the second connecting section is L3. In the extension direction from the first connecting plate to the second connecting plate, the width L3 of the second connecting section gradually increases.
12. The semiconductor package structure according to claim 11, wherein: The orthographic projection of the second connecting segment on the first surface is an isosceles trapezoid.
13. The semiconductor package structure according to claim 9, wherein: The second connecting plate is exposed outside the plastic package body.
14. The semiconductor package structure according to claim 13, wherein: The second connecting plate comprises a third surface facing the first surface and a fourth surface facing away from the third surface; The fourth surface of the second connecting plate is exposed outside the plastic package body, and the third surface of the second connecting plate, the first connecting plate, the second connecting section and the third connecting section are all encapsulated in the plastic package body.
15. The semiconductor package structure according to claim 9, wherein: The second connecting plate is provided with a plurality of second through holes.
16. The semiconductor package structure according to claim 15, wherein: A total area of the second through holes is less than 40% of an area of the surface of the metal clip.
17. The semiconductor package structure according to claim 1, wherein: The material of the metal clip is copper; The surface of the second pad is plated with a metal layer, wherein the metal layer is a stack of a Ni layer, a Pb layer and an Au layer, or the metal layer is a stack of a Ni layer and an Au layer, or the metal layer is an Ag layer, or the metal layer is a Cu layer; The solder includes SnSb and / or SnAg.
18. The semiconductor package structure according to claim 1, wherein: The first pin is integrally formed with the substrate.
19. The semiconductor package structure according to claim 1, wherein: The front side of the chip is also provided with a third pad and a fourth pad; The semiconductor packaging structure also includes a third pin and a fourth pin, one end of the third pin is connected to the third pad through a metal wire, the other end of the third pin extends from the second side of the plastic package and extends toward the first surface, one end of the fourth pin is connected to the fourth pad through a metal wire, the other end of the fourth pin extends from the second side of the plastic package and extends toward the first surface.
20. The semiconductor package structure according to claim 1, wherein: The surfaces of the first pin and the second pin are plated with a tin layer, and the thickness of the tin layer is 5 micrometers to 20 micrometers.
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