Electric power conversion apparatus

Abstract

This electric power conversion apparatus comprises an electric power converter including a plurality of converter cells connected in series. Each converter cell includes: a switching circuit including a plurality of first switching elements connected in series; a power storage element (28) connected in parallel to the switching circuit; a control circuit that controls the switching circuit; and a power supply circuit (30) that generates a control voltage based on the voltage of the power storage element (28) by using a second switching element (53) and a transformer (56), and that supplies the control voltage to the control circuit. When the voltage of the power storage element (28) is equal to or greater than a first threshold in a state in which control of the switching circuit is not started by the control circuit, the power supply circuit (30) controls the switch (32) connected in series to a resistor (31) to an ON state so that a discharge current flows through the resistor (31) for discharging the power storage element (28).

Description

Power Conversion Device

[0001] The present disclosure relates to a power conversion device.

[0002] In recent years, modular multilevel converters (MMCs) have become known as high-voltage, large-capacity power conversion devices applied to high-voltage systems such as electric power grids. MMCs are composed of arms in which a plurality of unit converters, called converter cells, are cascaded. Due to advantages such as high scalability and low harmonics, MMCs are widely used in AC / DC converters and static synchronous compensators (STATCOMs) applied to high-voltage direct current (HVDC) transmission.

[0003] The converter cells are provided with a power supply circuit that supplies control power from the main circuit side, such as capacitors. Since the load of the power supply circuit may differ for each converter cell, when each switching element of the converter cell is in an off state (for example, a floating state), an error associated with an imbalance in the load of the power supply circuit may cause an imbalance in the voltage of each capacitor. Japanese Patent Laid-Open Publication No. 2019-106785 (Patent Document 1) considers suppressing the occurrence of an imbalance in the capacitor voltages in multiple converter cells while suppressing unnecessary power consumption.

[0004] JP 2019-106785 A

[0005] In Patent Document 1, in a floating state in which a plurality of switching elements included in a converter cell are turned off, the higher the voltage of the capacitor, the more frequently a switch unit of a power supply circuit included in the converter cell is turned on. However, when the frequency at which the switch unit is turned on is increased according to the voltage of the capacitor, there is a problem in that the mechanism for adjusting the frequency at which the switch unit is turned on is complicated and the cost is also high.

[0006] An object of one aspect of the present disclosure is to provide a power conversion device that can suppress voltage imbalances among storage elements in each converter cell with a simple configuration.

[0007] A power conversion device according to an embodiment includes a power converter including a plurality of converter cells connected in series. Each converter cell includes a switching circuit including a plurality of first switching elements connected in series, a storage element connected in parallel to the switching circuit, a control circuit that controls the switching circuit, and a power supply circuit that generates a control voltage based on the voltage of the storage element using a second switching element and a transformer and supplies the control voltage to the control circuit. When the voltage of the storage element becomes equal to or higher than a first threshold while control of the switching circuit has not been started by the control circuit, the power supply circuit controls a switch connected in series with a resistor to an on state so that a discharge current flows through the resistor for discharging the storage element.

[0008] According to the present disclosure, a simple configuration can be used to suppress voltage imbalances among the storage elements in each converter cell.

[0009] 1 is a diagram illustrating a configuration example of a power conversion device. FIG. 2 is a diagram illustrating a configuration example of a converter cell. FIG. 3 is a block diagram illustrating an example of a hardware configuration of a control device. FIG. 4 is a diagram for explaining voltage imbalance in two converter cells. FIG. 5 is a diagram illustrating a configuration example of a power supply circuit according to a comparative example. FIG. 6 is a diagram illustrating an ideal voltage waveform of a capacitor of a converter cell. FIG. 7 is a diagram illustrating an example of a voltage waveform of each capacitor of two converter cells. FIG. 8 is a diagram illustrating another example of a voltage waveform of each capacitor of two converter cells. FIG. 9 is a diagram illustrating a configuration example of a power supply circuit according to the present embodiment. FIG. 10 is a diagram illustrating a voltage waveform of a capacitor according to the present embodiment. FIG. 11 is a diagram illustrating a configuration example of a switch control unit according to a first modification of the present embodiment. FIG. 12 is a diagram illustrating a voltage waveform of a capacitor according to the first modification of the present embodiment. FIG. 13 is a diagram illustrating a configuration example of a switch control unit according to a second modification of the present embodiment. FIG. 14 is a diagram illustrating a voltage waveform of a capacitor according to a third modification of the present embodiment. FIG. 15 is a diagram illustrating a voltage waveform of a capacitor according to a fourth modification of the present embodiment.

[0010] Hereinafter, the present embodiment will be described with reference to the drawings. In the following description, the same components are denoted by the same reference numerals. The names and functions of these components are also the same. Therefore, detailed description thereof will not be repeated.

[0011] <Overall Configuration> Fig. 1 is a diagram showing an example of the configuration of a power conversion device 100. Referring to Fig. 1, the power conversion device 100 is connected between an AC circuit 2 and a DC circuit 4. The DC circuit 4 is, for example, a DC power system including a DC transmission network or a DC terminal of another power conversion device. The DC circuit 4 may be configured to include a power storage device connected to the DC terminal of a power converter 6. The power storage device includes, for example, an electric double layer capacitor or a storage battery such as a lithium ion battery.

[0012] The power conversion device 100 includes a self-excited power converter 6 and a control device 5 for controlling the power converter 6. Typically, the power converter 6 is configured by a modular multilevel converter including a plurality of converter cells (corresponding to the "cells" in FIG. 1) 1 connected in series with each other. A "converter cell" is also called a "sub module" or "unit converter."

[0013] The power converter 6 is connected to the DC circuit 4 and performs power conversion between the DC circuit 4 and the AC circuit 2. Specifically, the power converter 6 converts the DC power output from the DC circuit 4 into AC power and outputs the AC power to the AC circuit 2 via the transformer 3. The power converter 6 also converts the AC power from the AC circuit 2 into DC power and outputs the DC power to the DC circuit 4.

[0014] 1 , the power converter 6 includes a plurality of arms for each phase of the AC circuit 2. Specifically, the power converter 6 includes a plurality of leg circuits 8u, 8v, and 8w (hereinafter, collectively referred to as "leg circuits 8") connected in parallel with each other between a positive DC terminal (i.e., a high-potential side DC terminal) Np and a negative DC terminal (i.e., a low-potential side DC terminal) Nn.

[0015] A leg circuit 8 is provided for each of the multiple phases constituting the AC. The leg circuit 8 is connected between the AC circuit 2 and the DC circuit 4 and performs power conversion between the two circuits. Fig. 1 shows a case where the AC circuit 2 is a three-phase AC system, and three leg circuits 8u, 8v, and 8w are provided corresponding to the U phase, V phase, and W phase, respectively.

[0016] The AC terminals Nu, Nv, and Nw provided in the leg circuits 8u, 8v, and 8w, respectively, are connected to the AC circuit 2 via a transformer 3. The AC circuit 2 is, for example, a three-phase AC power system including an AC power source. For ease of illustration, FIG. 1 does not show the connection between the AC terminals Nv and Nw and the transformer 3. The DC terminals provided in common to each leg circuit 8 (i.e., a positive DC terminal Np and a negative DC terminal Nn) are connected to the DC circuit 4.

[0017] Instead of using the transformer 3 in Fig. 1 , the leg circuits 8u, 8v, 8w may be configured to be connected to the AC circuit 2 via an interconnection reactor. Furthermore, instead of the AC terminals Nu, Nv, Nw, primary windings may be provided in the leg circuits 8u, 8v, 8w, respectively, and the leg circuits 8u, 8v, 8w may be AC-connected to the transformer 3 or the interconnection reactor via secondary windings magnetically coupled to the primary windings. In this case, the primary windings may be reactors 7a, 7b described below. That is, the leg circuit 8 is electrically (i.e., DC- or AC-connected) to the AC circuit 2 via connection parts provided in each of the leg circuits 8u, 8v, 8w, such as the AC terminals Nu, Nv, Nw or the above-described primary windings.

[0018] The leg circuit 8u includes a positive arm 13u extending from the positive DC terminal Np to the AC terminal Nu, and a negative arm 14u extending from the negative DC terminal Nn to the AC terminal Nu. The junction of the positive arm 13u and the negative arm 14u is connected to the transformer 3 as the AC terminal Nu. The positive DC terminal Np and the negative DC terminal Nn are connected to the DC circuit 4. The leg circuit 8v includes a positive arm 13v and a negative arm 14v, and the leg circuit 8w includes a positive arm 13w and a negative arm 14w. Since the leg circuits 8v and 8w have the same configuration as the leg circuit 8u, the leg circuit 8u will be described below as a representative example.

[0019] In leg circuit 8u, positive arm 13u includes a plurality of converter cells 1 cascaded together and reactor 7a. The plurality of converter cells 1 and reactor 7a are connected in series. Negative arm 14u includes a plurality of converter cells 1 cascaded together and reactor 7b. The plurality of converter cells 1 and reactor 7b are connected in series.

[0020] The reactor 7a may be inserted at any position in the positive arm 13u, and the reactor 7b may be inserted at any position in the negative arm 14u. There may be a plurality of reactors 7a and a plurality of reactors 7b. The inductance values ​​of the reactors may be different from each other. Furthermore, only the reactor 7a in the positive arm 13u or only the reactor 7b in the negative arm 14u may be provided.

[0021] The power conversion device 100 further includes an AC voltage detector 10, an AC current detector 15, DC voltage detectors 11a and 11b, and arm current detectors 9a and 9b provided in each leg circuit 8. These detectors measure electrical quantities (i.e., current and voltage) used to control the power converter 6. Signals detected by these detectors are input to the control device 5.

[0022] The AC voltage detector 10 detects three-phase AC voltages Vsysu, Vsysv, and Vsysw (hereinafter also collectively referred to as "AC voltages Vsys"). The AC current detector 15 detects three-phase AC currents Isysu, Isysv, and Isysw (hereinafter also collectively referred to as "AC currents Isys") of the AC circuit 2. The DC voltage detector 11a detects a DC voltage Vdcp at the positive DC terminal Np connected to the DC circuit 4. The DC voltage detector 11b detects a DC voltage Vdcn at the negative DC terminal Nn connected to the DC circuit 4.

[0023] The arm current detectors 9a and 9b provided in the u-phase leg circuit 8u detect a positive arm current Iup flowing in the positive arm 13u and a negative arm current Iun flowing in the negative arm 14u, respectively. The arm current detectors 9a and 9b provided in the v-phase leg circuit 8v detect a positive arm current Ivp and a negative arm current Ivn, respectively. The arm current detectors 9a and 9b provided in the w-phase leg circuit 8w detect a positive arm current Iwp and a negative arm current Iwn, respectively.

[0024] <Configuration of Converter Cell> Fig. 2 is a diagram showing a configuration example of the converter cell 1. The converter cell 1 shown in Fig. 2(a) has a circuit configuration called a half-bridge configuration.

[0025] 2(a), the converter cell 1 includes a switching circuit 25, a capacitor 28 as a power storage element, a voltage detector 29, a power supply circuit 30, and a control circuit 40. The switching circuit 25, the capacitor 28, and the power supply circuit 30 are connected in parallel.

[0026] The switching circuit 25 includes two switching elements 22A and 22B connected in series and diodes 23A and 23B. The diodes 23A and 23B are connected in anti-parallel (i.e., parallel and reverse biased) with the switching elements 22A and 22B, respectively. The capacitor 28 is connected in parallel with the switching circuit 25 and holds a DC voltage. A voltage Vc across the capacitor 28 is detected by a voltage detector 29. The detected voltage Vc is input to the power supply circuit 30. The voltage Vc may also be input to a control circuit 40. The control circuit 40 transmits the voltage Vc to the control device 5.

[0027] The connection node between the switching elements 22A and 22B is connected to the high-potential side input / output terminal G1, and the connection node between the switching element 22B and the capacitor 28 is connected to the low-potential side input / output terminal G2.

[0028] The capacitor 28 is charged by the current flowing through the input / output terminals G1 and G2, and the voltage therein increases. When the voltage across the capacitor 28 increases, the power supply circuit 30 is activated. The power supply circuit 30 generates a control voltage Vs based on the voltage across the capacitor 28 and supplies (outputs) the control voltage Vs to the control circuit 40. The specific configuration of the power supply circuit 30 will be described later.

[0029] The control circuit 40 controls the switching circuit 25. When the control voltage Vs is supplied from the power supply circuit 30, the control circuit 40 is ready to control the switching elements 22A and 22B. Typically, the control circuit 40 starts controlling the switching elements 22A and 22B when it receives a control permission notification from outside the converter cell 1 (e.g., the control device 5) to permit the start of control of the switching circuit 25. This enables the switching elements 22A and 22B to perform on / off switching operations. The control circuit 40 is configured, for example, with an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), or a combination thereof.

[0030] When switching element 22A is turned on and switching element 22B is turned off under the control of control circuit 40, voltage Vc of capacitor 28 is output between input / output terminals G1 and G2. When switching element 22A is turned off and switching element 22B is turned on, zero voltage is output between input / output terminals G1 and G2. For example, control circuit 40 adjusts the lengths of the on-time and off-time of each switching element 22A, 22B to control the voltage between input / output terminals G1 and G2 and the voltage of capacitor 28 to be the corresponding target values. For example, these target values ​​are set based on the AC voltage of AC circuit 2, the DC voltage of DC circuit 4, the number of converter cells 1 constituting the arms, etc.

[0031] The converter cell 1 shown in Fig. 2(b) has a circuit configuration called a full-bridge configuration. Referring to Fig. 2(b), this converter cell 1 includes switching circuits 25 and 26, a capacitor 28, a voltage detector 29, and a power supply circuit 30. The switching circuit 25, the switching circuit 26, the capacitor 28, and the power supply circuit 30 are connected in parallel.

[0032] The switching circuit 26 includes two switching elements 22C and 22D connected in series and diodes 23C and 23D. The diodes 23C and 23D are connected in antiparallel to the switching elements 22C and 22D, respectively. The connection node between the switching elements 22A and 22B is connected to the high-potential side input / output terminal G1, and the connection node between the switching elements 22C and 22D is connected to the low-potential side input / output terminal G2.

[0033] By turning on switching element 22D, turning off switching element 22C, and alternately turning on switching elements 22A and 22B, a positive voltage or zero voltage is output between input / output terminals G1 and G2. By turning off switching element 22D, turning on switching element 22C, and alternately turning on switching elements 22A and 22B, a zero voltage or negative voltage is output between input / output terminals G1 and G2.

[0034] 2(a) and 2(b), a self-extinguishing switching element capable of controlling both on and off operations is used for each of the switching elements 22A to 22D. The switching elements 22A to 22D are self-extinguishing semiconductor switching elements such as an insulated gate bipolar transistor (IGBT) or a metal oxide semiconductor field-effect transistor (MOSFET). Also, in FIGS. 2(a) and 2(b), a film capacitor or the like is typically used for the capacitor 28.

[0035] In the following, an example will be described in which the converter cell 1 has a half-bridge cell configuration as shown in Fig. 2(a). However, the converter cell 1 may also have a full-bridge configuration as shown in Fig. 2(b).

[0036] <Hardware Configuration of Control Device> Fig. 3 is a block diagram showing an example of the hardware configuration of the control device 5. The control device 5 in Fig. 3 is configured based on a computer. Referring to Fig. 3, the control device 5 includes one or more input converters 70, one or more sample-and-hold (S / H) circuits 71, a multiplexer (MUX) 72, and an A / D converter 73. Furthermore, the control device 5 includes one or more central processing units (CPUs) 74, random access memories (RAMs) 75, and read-only memories (ROMs) 76. Furthermore, the control device 5 includes one or more input / output interfaces 77, an auxiliary storage device 78, and a bus 79 that interconnects the above components.

[0037] The input converter 70 includes an auxiliary transformer for each input channel, which converts the signal detected by each detector in Figure 1 into a signal with a voltage level suitable for subsequent signal processing.

[0038] A sample-and-hold circuit 71 is provided for each input converter 70. The sample-and-hold circuit 71 samples and holds a signal representing an electrical quantity received from the corresponding input converter 70 at a specified sampling frequency.

[0039] The multiplexer 72 sequentially selects the signals held in the plurality of sample-and-hold circuits 71. The A / D converter 73 converts the signal selected by the multiplexer 72 into a digital value. Note that by providing a plurality of A / D converters 73, A / D conversion may be performed in parallel on detection signals of a plurality of input channels.

[0040] The CPU 74 controls the entire control device 5 and executes arithmetic processing according to a program. The RAM 75 as a volatile memory and the ROM 76 as a nonvolatile memory are used as the main memory of the CPU 74. The ROM 76 stores programs, setting values ​​for signal processing, and the like. The auxiliary storage device 78 is a nonvolatile memory with a larger capacity than the ROM 76, and stores programs, data on detected values ​​of electricity, and the like. The input / output interface 77 is an interface circuit for communication between the CPU 74 and external devices.

[0041] At least a part of the control device 5 may be configured using circuits such as FPGA and ASIC, or at least a part of the control device 5 may be configured using analog circuits.

[0042] <Regarding Voltage Imbalance> (Summary) When the power converter 6 is stopped, the capacitors 28 of each converter cell 1 are fully discharged, and each of the switching elements 22A, 22B (hereinafter also collectively referred to as "switching elements 22") is in the off state (e.g., gate-blocked state). To start operation of the power converter 6, it is first necessary to initially charge the capacitors 28 of each converter cell 1. For example, during initial charging, all of the capacitors 28 are simultaneously charged by closing a circuit breaker (not shown) connected to the primary side of the transformer 3 (i.e., the AC circuit 2 side).

[0043] When the voltage of capacitor 28 increases due to initial charging, power supply circuit 30 is activated. Thereafter, control circuit 40 starts on / off control of each switching element 22 in accordance with a control permission notification from control device 5. During the period from when power supply circuit 30 is activated to when control circuit 40 starts control of each switching element 22 (hereinafter also referred to as the "standby period"), each switching element 22 is not operating, and therefore the voltage of capacitor 28 is charged by the initial charging current flowing via input / output terminals G1, G2 of converter cell 1.

[0044] The initial charging current is determined by the voltage of the AC circuit 2 or the DC circuit 4 (for example, the circuit used for initial charging) and the impedance of each converter cell 1 and the reactors 7a, 7b, and the same initial charging current flows through multiple converter cells 1 connected in series at a given time. The charging power supplied to a converter cell 1 by the initial charging current is the product of the voltage of the capacitor 28 of that converter cell 1 and the initial charging current. When the voltage of the AC circuit 2 or the DC circuit 4 becomes equal to the sum of the voltages of the multiple converter cells 1, the initial charging current stops flowing. However, if the power supply circuit 30 and the control circuit 40 of the converter cell 1 consume power themselves, the initial charging current equivalent to that power continues to flow.

[0045] At a certain time, the voltage of the AC circuit 2 or the DC circuit 4 is divided by a plurality of converter cells 1 connected in series. Ideally, if the characteristics of each of the plurality of converter cells 1 are perfectly matched, the divided voltages of the converter cells 1 will be equal. In reality, the characteristics of each of the plurality of converter cells 1 do not perfectly match due to component variations, so the divided voltages will not be equal. Specifically, the power consumed by one converter cell 1 (hereinafter also referred to as "self-power consumption") will be greater than a standard value, while the self-power consumption of another converter cell 1 will be less than the standard value. In this case, the divided voltages of the converter cells 1 will not be equal.

[0046] Also, consider the average value of the voltage of the capacitor 28 of the multiple converter cells 1 connected in series (hereinafter also referred to as the "average voltage") and the average value of the charging power supplied to the multiple converter cells 1 connected in series (hereinafter also referred to as the "average power") If the voltage of the capacitor 28 of a certain converter cell 1 is larger than the average voltage value, the charging power supplied to that converter cell 1 is larger than the average power value. On the other hand, if the voltage of the capacitor 28 of another converter cell 1 is smaller than the average voltage value, the charging power supplied to the other converter cell 1 is smaller than the average power value.

[0047] As described above, in a plurality of converter cells 1 charged by a common initial charging current, the difference between the charging power of one converter cell 1 and the charging power of another converter cell 1 increases over time due to differences in the characteristics of each converter cell 1. As a result, the difference between the voltage of the capacitor 28 of one converter cell 1 and the voltage of the capacitor 28 of another converter cell 1 increases over time. This is also called a voltage imbalance between the plurality of converter cells 1.

[0048] 4 is a diagram for explaining voltage imbalance in two converter cells 1. Here, it is assumed that, among k converter cells 1 constituting an arm, the Xth converter cell 1x and the Yth converter cell 1y have different power losses. k is a natural number of 2 or more, and X and Y are different from each other.

[0049] 4, a graph 501 shows the change over time in the voltage Vc of the capacitor 28 of the converter cell 1x (hereinafter also referred to as "capacitor 28x" for convenience). A graph 502 shows the change over time in the voltage Vc of the capacitor 28 of the converter cell 1y (hereinafter also referred to as "capacitor 28y" for convenience). It is assumed that the self-consumption power of the converter cell 1x is smaller than the average power value, and that the self-consumption power of the converter cell 1y is larger than the average power value.

[0050] Immediately after the initial charging current starts to flow, the voltage of the power converter 6 is small relative to the voltage of the power system (e.g., the AC circuit 2 or the DC circuit 4), and therefore a large initial charging current flows through the power converter 6. As a result, the voltage Vc of each of the capacitors 28x and 28y increases rapidly.

[0051] As charging continues, the difference between the voltage of the power grid and the voltage of the power converter 6 decreases, and the magnitude of the initial charging current decreases. In this case, the converter cell 1x's self-power consumption is smaller than the power supplied, so the voltage Vc of the capacitor 28x increases. On the other hand, the converter cell 1y's self-power consumption is greater than the power supplied, so the voltage Vc of the capacitor 28x decreases. As a result, the voltage imbalance increases over time.

[0052] To prevent the voltage imbalance, if the voltage Vc of the capacitor 28 increases excessively, it is necessary to reduce the power flowing into the capacitor 28 so as to lower the voltage Vc.

[0053] (Configuration of Power Supply Circuit According to Comparative Example) Here, the configuration of a power supply circuit according to a comparative example will be described to facilitate understanding of the specific configuration of the power supply circuit 30 according to the present embodiment, which will be described later.

[0054] 5 is a diagram showing an example of the configuration of a power supply circuit according to a comparative example. Referring to Fig. 5, power supply circuit 50 includes capacitor 51, diode 52, switching element 53, anti-parallel diode 54, transformer 56, and automatic voltage regulator (AVR) 57.

[0055] The capacitor 51 is connected in parallel with the capacitor 28 of the converter cell and receives power supply from it. Therefore, the voltage of the capacitor 51 is the same as the voltage of the capacitor 28. The transformer 56 includes a primary winding connected in parallel with the capacitor 51 via the switching element 53, a secondary winding for supplying a control voltage, and a tertiary winding for voltage detection.

[0056] The automatic voltage stabilizer 57 controls the on / off of the switching element 53. By alternately turning the switching element 53 on and off repeatedly, the voltage of the capacitor 51 is applied intermittently to the primary winding of the transformer 56.

[0057] The diode 52 serves to prevent a surge voltage from occurring when the switching element 53 changes from on to off. A voltage is output to the secondary winding and the tertiary winding through a transformer operation in response to the voltage applied to the primary winding. The voltage output to the secondary winding is converted into a control voltage required by the control circuit 40 (for example, converted into a DC voltage by a rectifier diode and a smoothing capacitor) and supplied to the control circuit 40. In this way, the power supply circuit 50 is configured to generate a control voltage based on the voltage Vc using the switching element 53 and the transformer and supply the control voltage to the control circuit 40.

[0058] The voltage output to the tertiary winding is used as information for adjusting the on-period and off-period of the switching element 53 by the automatic voltage stabilizer 57. For example, if the voltage output to the tertiary winding becomes higher than a specified voltage, the automatic voltage stabilizer 57 reduces the voltage of the tertiary winding by shortening the on-period and lengthening the off-period of the switching element 53. By adjusting the voltage of the tertiary winding in this way, the voltage of the secondary winding is also adjusted.

[0059] As described above, power is supplied from capacitor 28 to control circuit 40 by the on / off operation of switching element 53 and the transformation operation of transformer 56. During this operation, switching loss and conduction loss occur in switching element 53, and core loss and conduction loss occur in transformer 56. If such power loss occurring in power supply circuit 50 were proportional to the voltage of capacitor 28, the voltage imbalance during the standby period described above could be eliminated.

[0060] The flyback power supply circuit 50 shown in Figure 5 is a switching power supply that, unlike a dropper power supply (also known as a linear power supply or a series power supply), reduces power loss. The power supply circuit 50 also has advantages over a dropper power supply in that it can ensure insulation between the primary and secondary sides by using a transformer 56, and that the transformer 56 can be made smaller by using high-frequency operation of the switching element 53. However, because the power loss generated by the power supply circuit 50 is not proportional to the voltage of the capacitor 28, it cannot eliminate voltage imbalance.

[0061] (Changes in voltage Vc of each converter cell over time) Here, we will explain the changes in voltage Vc over time when the converter cell 1 uses a power supply circuit 50 according to the comparative example, where the voltage Vc of the capacitor 28 increases due to the initial charging current and the voltage Vc of the capacitor 28 reaches the target voltage through control of each switching element 22.

[0062] Fig. 6 is a diagram showing an ideal voltage waveform of the capacitor 28 of a converter cell 1. A voltage waveform 601 shown in Fig. 6 is the voltage waveform of the capacitor 28 of a certain converter cell 1. When the characteristics of each converter cell 1 constituting an arm are the same, this is the voltage waveform of the capacitor 28 of each converter cell 1. The horizontal axis of Fig. 6 is time, and the vertical axis is the voltage Vc of the capacitor 28.

[0063] In the voltage waveform 601, the ripple voltage corresponding to the frequency of the AC circuit 2 is ignored, and the average value per unit period is shown. This also applies to the voltage waveforms in the figures described later.

[0064] 6, at time t0, the circuit breaker is closed and initial charging of the capacitor 28 begins. As the initial charging progresses, the power supply circuit 50 starts up, and at time t1, the voltage Vc reaches the initial charging voltage V1. At time t1, each converter cell 1 constituting an arm shares the voltage of the AC circuit 2 or the DC circuit 4. The period from time t0 to time t1 corresponds to the initial charging period during which multiple converter cells 1 are initially charged.

[0065] After that, ideally, the power supplied to the converter cell 1 by the initial charging current is balanced with the self-power consumption of the converter cell 1. In this case, the voltage Vc maintains the initial charging voltage V1 during the period from time t1 to time t2. At time t2, control of each switching element 22 is started in accordance with a control permission notification from the control device 5.

[0066] After time t2, each switching element 22 is driven and the voltage Vc of the capacitor 28 of each converter cell 1 is adjusted to a target voltage (e.g., rated voltage) V2. As a result, the voltage Vc reaches the target voltage V2 at time t3. After time t3, each switching element 22 is driven so that the voltage Vc maintains the target voltage V2.

[0067] In this way, when the supplied power and self-power consumption are balanced in each converter cell 1, the voltage Vc is maintained constant even during periods when each switching element 22 is not driven (for example, the period from time t1 to time t2), so no voltage imbalance occurs.

[0068] 7 is a diagram showing an example of the voltage waveforms of the capacitor 28 of each of the two converter cells. Referring to Fig. 7, a voltage waveform 611 is the voltage waveform of the capacitor 28 of the Xth converter cell 1x, and a voltage waveform 612 is the voltage waveform of the capacitor 28 of the Yth converter cell 1y. The definitions of the times t0, t1, t2, and t3 are the same as those in Fig. 6.

[0069] Although it is assumed that the initial charging voltage V1 at time t1 differs due to the difference in power loss between converter cell 1x and converter cell 1y, it is assumed here that the period from time t0 to time t1 is short and the initial charging voltage V1 is the same for each. This also applies to the voltage waveforms described below.

[0070] At time t1, the converter cells 1 constituting the arms share the voltage of the AC circuit 2 or the DC circuit 4. After time t1, the share ratio of the voltage Vc of the capacitor 28 of each converter cell 1x, 1y changes depending on the difference in power loss between the converter cells 1x, 1y. Specifically, the voltage Vc of the converter cell 1x increases, and the voltage Vc of the converter cell 1y decreases. Then, at time t2, driving of each switching element 22 of the converter cells 1x, 1y begins, and the voltage Vc of the converter cells 1x, 1y is adjusted to the target voltage V2 at time t3.

[0071] Fig. 8 is a diagram showing another example of the voltage waveforms of the capacitor 28 of each of the two converter cells 1. Referring to Fig. 8, a voltage waveform 621 is the voltage waveform of the capacitor 28 of the Xth converter cell 1x, and a voltage waveform 622 is the voltage waveform of the capacitor 28 of the Yth converter cell 1y. The definitions of the times t0, t1, and t2 are the same as in Fig. 6. Here, a case will be described in which the voltage Vc of the converter cell 1y reaches the minimum voltage Vmin of the power supply circuit 50 due to a voltage imbalance.

[0072] A certain amount of power is required to start the power supply circuit 50. Therefore, if the power supply circuit 50 is started with a small input voltage from the capacitor 28, the input current to the power supply circuit 50 needs to be large. However, if the power supply circuit 50 is designed to be able to receive a large current, the power supply circuit 50 will end up being large. Therefore, the minimum voltage Vmin at which the power supply circuit 50 can be started is set so that the input current does not become too large. However, the minimum voltage Vmin is set to be lower than the voltage at which initial charging is possible (i.e., the initial charging voltage V1).

[0073] 8, at time ta, when the voltage Vc reaches the minimum voltage Vmin due to initial charging, the power supply circuit 50 starts up. At time t1, the voltage Vc reaches the initial charging voltage V1. After time t1, the voltage Vc of the converter cell 1x increases, and the voltage Vc of the converter cell 1y decreases. Then, at time t12, when the voltage Vc of the capacitor 28 of the converter cell 1y decreases to the minimum voltage Vmin, the power supply circuit 50 of the converter cell 1y enters a stopped state.

[0074] As a result, no power loss occurs in converter cell 1y, and the decrease in voltage Vc stops. Meanwhile, the power supply circuits 50 of the other converter cells 1 except for converter cell 1y are operating, causing power loss. Therefore, the voltage Vc of converter cell 1y starts to increase and the power supply circuit 50 restarts, but this restart causes power loss in the power supply circuit 50, so the voltage Vc drops again and the power supply circuit 50 stops. As a result, the voltage Vc of converter cell 1y is maintained at the minimum voltage Vmin. Accordingly, the voltage Vc of converter cell 1x is also maintained.

[0075] Therefore, from time t12 onwards, the power supply circuit 50 of the converter cell 1y is essentially in a stopped state. In this state, no power is supplied from the power supply circuit 50 to the control circuit 40, and therefore the control circuit 40 cannot start controlling each switching element 22 in accordance with the control permission notification from the control device 5 at time t2. As a result, the power converter 6 cannot start transmitting power. For this reason, it is necessary to prevent the voltage Vc of each converter cell 1 from dropping to the minimum voltage Vmin during the waiting period from when the power supply circuit 50 is started up until when the control circuit 40 starts controlling each switching element 22 (for example, the period from time ta to time t2).

[0076] <Configuration of power supply circuit according to this embodiment> Figures 9A and 9B are diagrams showing configuration examples of power supply circuits according to this embodiment. Figure 9A shows a configuration example of power supply circuit 30A. Figure 9B shows a configuration example of power supply circuit 30B. The power supply circuits 30A and 30B correspond to the power supply circuit 30 shown in Figure 2, but are denoted by the symbols "A" and "B" for convenience of distinction.

[0077] 9A, the power supply circuit 30A includes a resistor 31, a switch 32, a control unit 35, a capacitor 51, a diode 52, a switching element 53, an anti-parallel diode 54, and a transformer 56. The control unit 35 includes a switch control unit 33 and an AVR 57. That is, the power supply circuit 30A has a configuration in which the resistor 31, the switch 32, and the switch control unit 33 are added to the power supply circuit 50 according to the comparative example described in FIG. 5. Detailed description of the same components as those of the power supply circuit 50 will not be repeated.

[0078] A series circuit formed by resistor 31 and switch 32 is connected in parallel to capacitors 28 and 51. Resistor 31 is provided to discharge the energy of capacitor 28 (and capacitor 51). Switch 32 connected in series to resistor 31 is provided to control the current flowing through resistor 31. When switch 32 is in the on state, current flows through resistor 31, and when switch 32 is in the off state, no current flows through resistor 31. Switch 32 is formed by, for example, a semiconductor switching element.

[0079] The control unit 35 controls the operation of the power supply circuit 30A. Specifically, the switch control unit 33 included in the control unit 35 receives an input of the voltage Vc of the capacitor 28 detected by the voltage detector 29. Because the voltage of the capacitor 51 is the same as the voltage Vc of the capacitor 28, the switch control unit 33 may receive an input of the voltage of the capacitor 51.

[0080] When the voltage Vc becomes equal to or greater than the threshold Vth1 after the power supply circuit 30A is started and before the control circuit 40 starts controlling the switching circuit 25, the switch control unit 33 controls the switch 32 to the on state so that a discharge current flows through the resistor 31. Furthermore, when the voltage Vc becomes equal to or greater than the threshold Vth1 and then falls below the threshold Vth1, the switch control unit 33 controls the switch 32 to the off state so that no current flows through the resistor 31. The power supply circuit 30A is started when the voltage Vc becomes equal to or greater than the minimum voltage Vmin required to start the power supply circuit 30A.

[0081] Specifically, the switch control unit 33 compares the voltage Vc with the threshold value Vth1, and if it determines that the voltage Vc is equal to or greater than the threshold value Vth1, it outputs a control signal Sa (e.g., a high-level signal) for controlling the switch 32 to an on state. On the other hand, if it determines that the voltage Vc is less than the threshold value Vth1, it outputs a control signal Sa (e.g., a low-level signal) for controlling the switch 32 to an off state. Therefore, if the voltage Vc is equal to or greater than the threshold value Vth1, discharging by the resistor 31 is performed, and if the voltage Vc is less than the threshold value Vth1, discharging by the resistor 31 is not performed.

[0082] Referring to FIG. 9B , the difference between the power supply circuit 30B and the power supply circuit 30A is the location of the series combination of the resistor 31 and the switch 32. Specifically, in the power supply circuit 30B, the series combination is connected in parallel with the secondary winding of the transformer 56. In this way, even when the series combination is connected to the secondary winding of the transformer 56, the capacitor 28 can be discharged. The voltage applied to the secondary winding of the transformer 56 can be lower than the voltage of the capacitor 28. This reduces the withstand voltage and insulation performance required of the resistor 31 and the switch 32, contributing to a more compact power supply circuit. The same applies when the transformer 56 has a tertiary winding.

[0083] 10 is a diagram showing voltage waveforms of the capacitors according to this embodiment. Referring to Fig. 10, a voltage waveform 631 is the voltage waveform of the capacitor 28 of the Xth converter cell 1x, and a voltage waveform 632 is the voltage waveform of the capacitor 28 of the Yth converter cell 1y. The definitions of the times t0, ta, t1, and t2 are the same as those in Fig. 8.

[0084] As described above, the converter cell 1x has a tendency for its voltage Vc to increase due to its low self-power consumption, while the converter cell 1y has a tendency for its voltage Vc to decrease due to its high self-power consumption. Furthermore, the control signal Sa in the converter cell 1x will be referred to as the "control signal Sax" for convenience, and the control signal Sa in the converter cell 1y will be referred to as the "control signal Say" for convenience. These terms also apply to the following explanation.

[0085] At time ta, when the voltage Vc reaches the minimum voltage Vmin due to initial charging, the power supply circuit 30 starts up. At time t1, the voltage Vc reaches the initial charging voltage V1. At time t1, each converter cell 1 constituting an arm shares the voltage of the AC circuit 2 or the DC circuit 4. After time t1, the voltage Vc of the converter cell 1x increases, and the voltage Vc of the converter cell 1y decreases.

[0086] At time t1a, when the voltage Vc of the capacitor 28 of the converter cell 1x reaches the threshold value Vth1, the control signal Sax goes to "high level" and the switch 32 is controlled to be in the on state. The charge of the capacitor 28 is discharged by the resistor 31, thereby suppressing the increase in the voltage Vc of the converter cell 1x. Meanwhile, as the increase in the voltage Vc of the converter cell 1x is suppressed, the decrease in the voltage Vc of the converter cell 1y is suppressed. The threshold value Vth1 is set to a value greater than the initial charging voltage V1.

[0087] 10 shows a state in which the power consumption in the resistor 31 of the converter cell 1x is balanced with the power that increased the voltage Vc. As a result, the voltage Vc of the converter cells 1x and 1y is maintained during the period from time t1a to time t2. However, it is not necessary to set the power consumption in the resistor 31 so as not to change the voltage Vc.

[0088] Specifically, if the power consumption of the resistor 31 of the converter cell 1x is insufficient after time t1, the voltage Vc in the converter cell 1x increases, and the voltage Vc in the converter cell 1y decreases accordingly. However, it is sufficient that the voltage Vc in the converter cell 1y does not decrease to the minimum voltage Vmin by the time each switching element 22 operates at time t2.

[0089] Furthermore, if the power consumption of the resistor 31 of the converter cell 1x is excessive after time t1, the voltage Vc in the converter cell 1x decreases, but when the voltage Vc falls below the threshold Vth1, the switch 32 turns off, and the decrease in the voltage Vc stops. After that, even if the voltage Vc increases again, the above-mentioned operation is repeated once it reaches the threshold Vth1. Therefore, the voltage Vc in the converter cell 1x maintains a value near the threshold Vth1. Below, the reason why the voltage Vc in the converter cell 1x maintains a value near the threshold Vth1 will be explained in more detail.

[0090] First, assume that the total power consumption of the self-consumption power of converter cell 1x and the power consumption of resistor 31 at threshold Vth1 is the same as the self-consumption power of converter cell 1y. When the voltage Vc of converter cell 1x reaches voltage Vth1, switch 32 turns on and power is consumed by resistor 31. In this case, the total power consumption of converter cell 1x and the self-consumption power of converter cell 1y are balanced. Therefore, the voltage Vc of converter cell 1x is maintained at a value near threshold Vth1.

[0091] Next, assume that the total power consumption of converter cell 1x is greater than the self-power consumption of converter cell 1y. In this case, when switch 32 of converter cell 1x is turned on and power is consumed by resistor 31, the total power consumption of converter cell 1x becomes greater than the self-power consumption of converter cell 1y. On the other hand, when switch 32 of converter cell 1x is turned off and power is not consumed by resistor 31, the power consumed by converter cell 1x (i.e., the self-power consumption of converter cell 1x) is less than the self-power consumption of converter cell 1y. Since switch 32 switches on and off at threshold Vth1 as a boundary, the presence or absence of power consumption by resistor 31 also switches accordingly. Therefore, even in this case, voltage Vc of converter cell 1x is maintained at a value close to threshold Vth1.

[0092] It is not necessary to repeatedly turn on and off the switch 32 at high speed. The switch control unit 33 only needs to control the on and off states of the switch 32 so that the voltage Vc of the capacitor 28 does not drop to the minimum voltage Vmin. This is because turning the switch 32 on and off unnecessarily quickly can cause malfunctions and shorten the lifespan of the switch 32.

[0093] As described above, the switch control unit 33 may have a hysteresis characteristic like a Schmitt trigger. For example, when the switch control unit 33 determines that the voltage Vc is equal to or greater than the threshold Vth1, the switch control unit 33 controls the switch 32 to the ON state. On the other hand, when the switch control unit 33 determines that the voltage Vc is less than a threshold Vth1a that is smaller than the threshold Vth1 after the voltage Vc becomes equal to or greater than the threshold Vth1 (i.e., after the switch 32 is turned ON), the switch control unit 33 controls the switch 32 to the OFF state. In this way, the switch control unit 33 may compare the voltage Vc with the threshold Vth1 when switching the switch 32 from OFF to ON, and may compare the voltage Vc with the threshold Vth1a when switching the switch 32 from ON to OFF.

[0094] When the control circuit 40 receives a control permission notification transmitted from the control device 5 at time t2 after the start-up of the power supply circuit 30, it starts controlling the switching circuit 25 (e.g., controlling the drive of each switching element 22). The control of the switching circuit 25 includes controlling the voltage Vc of the capacitor 28 to follow the target voltage V2. As a result, in the converter cell 1x, the voltage Vc reaches the target voltage V2 at time t3. Meanwhile, in the converter cell 1y, the voltage Vc reaches the threshold Vth1 at time t2a, so the control signal Say goes to a "high level" and the switch 32 is controlled to the on state. Then, the voltage Vc reaches the target voltage V2 at time t3a.

[0095] Thus, with the configuration of the power supply circuits 30A, 30B, during the standby period from the start-up time (i.e., time ta) to time t2, when the voltage Vc in a certain converter cell 1 (e.g., converter cell 1x) becomes equal to or greater than the threshold value Vth1, the switch 32 is controlled from off to on, thereby suppressing an increase in the voltage Vc. Accordingly, a decrease in the voltage Vc in another converter cell 1 (e.g., converter cell 1y) is suppressed, preventing the voltage Vc from dropping to the minimum voltage Vmin. This suppresses voltage imbalance and prevents the power supply circuits 30A, 30B from entering a stopped state. Furthermore, the switch control unit 33, which has the function of controlling the switch 32, can be realized with a simple configuration such as a comparison circuit.

[0096] <Modifications of Switch Control Unit> (Modification 1) Fig. 11 is a diagram showing an example of the configuration of switch control unit 33A according to modification 1 of the present embodiment. Referring to Fig. 11, switch control unit 33A includes a comparison circuit 159, a comparison circuit 160, and an AND circuit 161. Switch control unit 33A corresponds to switch control unit 33 in Fig. 9, but is marked with the symbol "A" for distinction. This is also true in Fig. 13.

[0097] The comparator circuit 159 outputs a signal S1 of value "1" (e.g., high level) when the voltage Vc is equal to or greater than the threshold Vth1, and outputs a signal S1 of value "0" (e.g., low level) when the voltage Vc is less than the threshold Vth1. The comparator circuit 160 outputs a signal S2 of value "1" when the voltage Vc is less than the threshold Vth2, and outputs a signal S2 of value "0" when the voltage Vc is equal to or greater than the threshold Vth2. However, the threshold Vth2 is set to a value greater than the threshold Vth1 and smaller than the target voltage V2.

[0098] The AND circuit 161 performs an AND operation on the value of the signal S1 and the value of the signal S2. Specifically, the AND circuit 161 outputs a control signal Sa with a value of "1" when the value of the signal S1 is "1" (i.e., the voltage Vc is equal to or greater than the threshold value Vth1) and the value of the signal S2 is "1" (i.e., the voltage Vc is less than the threshold value Vth2). This controls the switch 32 to an ON state. The AND circuit 161 outputs a control signal Sa with a value of "0" when at least one of the values ​​of the signal S1 and the signal S2 is "0". This controls the switch 32 to an OFF state.

[0099] The switch control unit 33A is not limited to the configuration example shown in Fig. 11. Specifically, the switch control unit 33A may be configured to control the switch 32 to an OFF state when the voltage Vc is less than the threshold Vth1, to control the switch 32 to an ON state when the voltage Vc is equal to or greater than the threshold Vth1 and less than the threshold Vth2, and to control the switch 32 to an OFF state when the voltage Vc is equal to or greater than the threshold Vth2.

[0100] 12 is a diagram showing the voltage waveforms of the capacitors according to the first modified example of this embodiment. Referring to Fig. 12, a voltage waveform 641 is the voltage waveform of the capacitor 28 of the Xth converter cell 1x, and a voltage waveform 642 is the voltage waveform of the capacitor 28 of the Yth converter cell 1y. The definitions of the times t0, ta, t1, t1a, t2, t2a, t3, and t3a are the same as those in Fig. 10.

[0101] The flow up to time t2 is the same as in Fig. 10, and therefore will not be described in detail. After time t2, each switching element 22 is driven, and therefore voltage Vc converges toward target voltage V2.

[0102] In the converter cell 1x, when the voltage Vc reaches the threshold value Vth2 at time t2b, the control signal Sax goes to "low level" and the switch 32 is controlled to the off state. As a result, the resistor 31 stops discharging the capacitor 28 (i.e., no power is consumed in the resistor 31), and the rate at which the voltage Vc rises increases. Thereafter, at time t3, the voltage Vc reaches the target voltage V2.

[0103] On the other hand, in converter cell 1y, when voltage Vc reaches threshold value Vth1 at time t2a, control signal Sa goes to "high level" and switch 32 is controlled to the on state. As a result, discharge of capacitor 28 begins via resistor 31 (i.e., power consumption occurs in resistor 31), and the rate of rise of voltage Vc slows down. When voltage Vc reaches threshold value Vth2 at time t2c, control signal Sa goes to "low level" and switch 32 is controlled to the off state. As a result, discharge of capacitor 28 is stopped by resistor 31, and the rate of rise of voltage Vc increases. Thereafter, voltage Vc reaches target voltage V2 at time t3a.

[0104] After time t2, each switching element 22 is driven, so voltage Vc can be controlled, and there is no need to discharge capacitor 28 in resistor 31. As a result, power consumption in resistor 31 after time t2 becomes unnecessary power loss. In this way, according to Modification 1, it is possible to suppress voltage imbalance during the standby period from time ta to time t2, while suppressing unnecessary power loss after time t2.

[0105] 13 is a diagram showing an example of the configuration of switch control unit 33B according to Modification 2 of the present embodiment. Referring to Fig. 13, switch control unit 33B includes a comparison circuit 159, a NOT circuit 163, and an AND circuit 165.

[0106] 11, detailed description thereof will not be repeated. NOT circuit 163 outputs signal S3 obtained by inverting the logical level of signal Sv. Specifically, a value of "1" of signal Sv indicates a state in which control (driving) of each switching element 22 is permitted, and a value of "0" of signal Sv indicates a state in which control of each switching element 22 is not permitted.

[0107] Therefore, when control of each switching element 22 is permitted, the value of signal S3 is "0", and when control is not permitted, the value of signal S3 is "1". This allows the switch control unit 33B to determine that control of each switching element 22 is permitted. Typically, the switch control unit 33B determines that the value of signal Sv is "1" when a control permission notification is received from the control device 5, and determines that the value of signal Sv is "0" when a control permission notification is not received.

[0108] The AND circuit 165 performs an AND operation on the value of the signal S1 and the value of the signal S3. Specifically, the AND circuit 165 outputs a control signal Sa with a value of "1" when the value of the signal S1 is "1" (i.e., the voltage Vc is equal to or greater than the threshold value Vth1) and the value of the signal S3 is "1" (i.e., control of each switching element 22 is not permitted). This controls the switch 32 to an ON state. The AND circuit 165 outputs a control signal Sa with a value of "0" when at least one of the values ​​of the signal S1 and the signal S3 is "0". This controls the switch 32 to an OFF state.

[0109] The switch control unit 33B is not limited to the configuration example shown in Fig. 13. Specifically, the switch control unit 33B controls the switch 32 to the OFF state when control of each switching element 22 is not permitted and the voltage Vc is less than the threshold Vth1, and controls the switch 32 to the ON state when control of each switching element 22 is not permitted and the voltage Vc is equal to or greater than the threshold Vth1. Furthermore, when control of each switching element 22 is permitted, the switch control unit 33B controls the switch 32 to the OFF state regardless of the value of the voltage Vc.

[0110] 14 is a diagram showing the voltage waveforms of the capacitors according to the second modification of this embodiment. Referring to Fig. 14, a voltage waveform 651 is the voltage waveform of the capacitor 28 of the Xth converter cell 1x, and a voltage waveform 652 is the voltage waveform of the capacitor 28 of the Yth converter cell 1y. The definitions of the times t0, ta, t1, t1a, t2, and t3 are the same as those in Fig. 10.

[0111] From time t0 to time t2, control of each switching element 22 is not permitted. Therefore, at time t1a, when the voltage Vc of the capacitor 28 of the converter cell 1x reaches the threshold Vth1, the control signal Sax becomes "high level" and the switch 32 is controlled to the on state. Therefore, the voltage imbalance is suppressed as described in Figure 10. In other words, the voltage changes of the capacitors 28 of the converter cells 1x and 1y up to time t2 are the same as those in Figure 10.

[0112] At time t2, the control circuit 40 starts driving each switching element 22 in accordance with the control permission notification from the control device 5. In addition, the power supply circuit 30 (specifically, the switch control unit 33B) receives the control permission notification transmitted from the control device 5. As a result, the switch control unit 33B determines that control of each switching element 22 is permitted. Therefore, the signal Sv shown in FIG. 13 becomes "high level." Therefore, in the converter cell 1x, the control signal Sax becomes "low level" and the switch 32 is controlled to the off state. In the converter cell 1y, the switch 32 is maintained in the off state.

[0113] As described above, after time t2 when control of each switching element 22 starts, the power supply circuit 30 in each converter cell 1x, 1y controls the switch 32 to the off state, thereby suppressing unnecessary power loss in the resistor 31 after time t2.

[0114] <Modification 3> In the above-described embodiment, the threshold value Th1 is set to be larger than the initial charging voltage V1, but this is not the only possible configuration. In Modification 3, a configuration will be described in which the threshold value Th1 is set to be smaller than the initial charging voltage V1.

[0115] Fig. 15 is a diagram showing a voltage waveform of a capacitor according to the third modification of the present embodiment. In Fig. 15, the power supply circuit 30 has the function of the switch control unit 33A shown in Fig. 11, but may also have the function of the switch control unit 33 shown in Fig. 9 or the switch control unit 33B shown in Fig. 13. Furthermore, the threshold value Th1 is set to be greater than the minimum voltage Vmin and smaller than the initial charging voltage V1.

[0116] 15, a voltage waveform 661 is the voltage waveform of the capacitor 28 of the Xth converter cell 1x, and a voltage waveform 662 is the voltage waveform of the capacitor 28 of the Yth converter cell 1y. The definitions of the times t0, ta, t1, t2, and t3 are the same as those in FIG.

[0117] At time ta, when the voltage Vc reaches the minimum voltage Vmin due to initial charging, the power supply circuit 30 is activated. At time tb, the voltage Vc of the capacitor 28 of the converter cells 1x and 1y reaches the threshold Vth1. This causes the control signals Sax and Say to go to "high level," and the switches 32 in the converter cells 1x and 1y are controlled to be in the on state. As a result, the charge in the capacitor 28 is discharged by the resistor 31, and the rate of rise of the voltage Vc slows down.

[0118] At time t1, the voltage Vc at the converter cells 1x and 1y reaches the initial charging voltage V1. Thereafter, in the period from time t1 to time t2, the voltage Vc at the converter cells 1x and 1y maintains the initial charging voltage V1. Therefore, the voltage imbalance is suppressed.

[0119] Here, the reason why the voltage Vc in the converter cells 1x and 1y is maintained at the initial charging voltage V1 will be explained. The difference between the self-consumption power of the converter cell 1x and the self-consumption power of the converter cell 1y is Pd, the voltage higher than the initial charging voltage V1 by ΔV is "V1+ΔV", the voltage lower than the initial charging voltage V1 by ΔV is "V1-ΔV", the power consumption of the resistor 31 at the voltage (V1+ΔV) is Ph, and the power consumption of the resistor 31 at the voltage (V1-ΔV) is Pl.

[0120] When the difference Pd is sufficiently smaller than the difference between the power consumption Ph and the power consumption Pl (i.e., Ph-Pl) (i.e., Pd<<(Ph-Pl)), the voltage difference between the voltage Vc of converter cell 1x and the voltage Vc of converter cell 1y is smaller than "ΔV × 2". In Figure 15, ΔV is assumed to be sufficiently small, so the voltage Vc of converter cells 1x and 1y is maintained at the initial charging voltage V1. Note that if ΔV is not sufficiently small, the voltage Vc of converter cell 1x is maintained at "V1 + ΔV", and the voltage Vc of converter cell 1y is maintained at "V1-ΔV". Even in this case, voltage imbalance is suppressed.

[0121] At time t2, driving of each switching element 22 of each converter cell 1 begins. At time t2d, when the voltage Vc in the converter cells 1x and 1y reaches the threshold value Vth2, the switch 32 is controlled to the off state. Thereafter, at time t3, the voltage Vc in the converter cells 1x and 1y reaches the target voltage V2. As a result, the voltage waveform 661 and the voltage waveform 662 become almost identical.

[0122] <Modification 4> Fig. 16 is a diagram showing a voltage waveform of a capacitor according to Modification 4 of the present embodiment. In Fig. 16, the power supply circuit 30 has the function of the switch control unit 33 shown in Fig. 9, but may also have the function of the switch control unit 33A shown in Fig. 11 or the switch control unit 33B shown in Fig. 13. In addition, the threshold value Th1 is set to be the same as the initial charging voltage V1.

[0123] The initial charging voltage V1 is set based on the voltage at the time of initial charging of either the AC circuit 2 or the DC circuit 4, whichever is used for initial charging, and the number (e.g., k) of multiple converter cells 1 included in the arm of the power converter 6.

[0124] Here, the voltage of the DC circuit 4 is used for initial charging, and the DC voltage of the DC circuit 4 during initial charging is "Vdc". In this case, in the power converter 6, two arms each consisting of k converter cells 1 are connected in series, and the two arms are connected in parallel to the DC circuit 4. Therefore, the DC voltage Vdc is divided by "k x 2" converter cells 1. If the voltage is divided evenly, the voltage at one converter cell 1 is "Vdc / (k x 2)". Therefore, the initial charging voltage V1 is "Vdc / (k x 2)". As a result, the threshold value Th1 is set to "Vdc / (k x 2)".

[0125] 16, a voltage waveform 671 is the voltage waveform of the capacitor 28 of the Xth converter cell 1x, and a voltage waveform 672 is the voltage waveform of the capacitor 28 of the Yth converter cell 1y. The definitions of the times t0, ta, t1, t2, and t3 are the same as those in FIG.

[0126] At time ta, when the voltage Vc reaches the minimum voltage Vmin due to initial charging, the power supply circuit 30 is activated. At time t1, the voltage Vc of the capacitor 28 of the converter cells 1x and 1y reaches the threshold Vth1 (i.e., the initial charging voltage V1). This causes the control signals Sax and Say to go "high level," and the switches 32 in the converter cells 1x and 1y are controlled to be in the on state. During the period from time t1 to time t2, the voltages Vc in the converter cells 1x and 1y are maintained at the initial charging voltage V1. Therefore, voltage imbalance is suppressed. The reason why the voltages Vc in the converter cells 1x and 1y are maintained at the initial charging voltage V1 is the same as that explained in FIG. 15.

[0127] At time t2, driving of each switching element 22 of each converter cell 1 begins. At time t3, the voltage Vc in the converter cells 1x and 1y reaches the target voltage V2. As a result, the voltage waveform 671 and the voltage waveform 672 become almost identical. Note that the voltage waveforms 671 and 672 become the ideal voltage waveforms described above in FIG. 6 .

[0128] Other Embodiments (1) In the above-described embodiment, the resistor 31 is provided inside the power supply circuit 30, but the present invention is not limited to this configuration. For example, the resistor 31 may be provided outside the power supply circuit 30. In this case, heat generated by the power consumption of the resistor 31 can be dissipated outside the power supply circuit 30, thereby preventing the power supply circuit 30 from becoming larger and having high thermal conductivity.

[0129] (2) The configurations exemplified as the above-described embodiments are examples of the configurations of the present disclosure, and may be combined with other known technologies, or may be modified, such as by omitting some parts, within the scope of the gist of the present disclosure. Furthermore, the above-described embodiments may be implemented by appropriately adopting the processes and configurations described in other embodiments.

[0130] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present disclosure is defined by the claims, not by the above description, and is intended to include all modifications within the meaning and scope of the claims.

[0131] 1 Converter cell, 2 AC circuit, 3 Transformer, 4 DC circuit, 5 Control device, 6 Power converter, 7a, 7b Reactor, 8u, 8v, 8w Leg circuit, 9a, 9b Arm current detector, 10 AC voltage detector, 11a, 11b DC voltage detector, 13u to 13w Positive side arm, 14u to 14w Negative side arm, 15 AC current detector, 22A to 22D, 53 Switching element, 23A to 23D, 52 Diode, 25, 26 Switching circuit, 28, 51 Capacitor, 29 Voltage detector, 30, 30A, 30B, 50 Power supply circuit, 31 Resistor, 32 Switch, 33, 33A, 33B Switch control unit, 35 Control unit, 40 Control circuit, 54 Anti-parallel diode, 56 Transformer, 57 Automatic voltage stabilizer, 70 Input converter, 71 Sample and hold circuit, 72 multiplexer, 73 A / D converter, 74 CPU, 75 RAM, 76 ROM, 77 input / output interface, 78 auxiliary storage device, 79 bus, 100 power conversion device, 159, 160 comparison circuit, 161, 165 AND circuit, 163 NOT circuit.

Claims

1. A power conversion device comprising a power converter including a plurality of converter cells connected in series, each of the converter cells including: a switching circuit including a plurality of first switching elements connected in series; a storage element connected in parallel to the switching circuit; a control circuit for controlling the switching circuit; and a power supply circuit that generates a control voltage based on the voltage of the storage element using a second switching element and a transformer and supplies the control voltage to the control circuit, wherein when the voltage of the storage element becomes equal to or higher than a first threshold value while control of the switching circuit has not been started by the control circuit, the power supply circuit controls a switch connected in series to a resistor to an on state so that a discharge current flows through the resistor for discharging the storage element.

2. The power conversion device of claim 1, wherein when the voltage of the storage element becomes equal to or greater than the first threshold and then becomes less than the first threshold or less than a second threshold that is smaller than the first threshold, the power supply circuit controls the switch to an off state so that no discharge current flows through the resistor.

3. The power conversion device according to claim 1 or 2, wherein the first threshold value is greater than a minimum voltage required to start up the power supply circuit.

4. The power conversion device according to claim 3, wherein an initial charging voltage of the storage element is set to a value greater than the minimum voltage, and the first threshold value is set to a value equal to or greater than the initial charging voltage.

5. The power conversion device according to claim 4, wherein the power converter performs power conversion between an AC circuit and a DC circuit, and the initial charging voltage is set based on the DC voltage of the DC circuit or the AC voltage of the AC circuit at the time of initial charging and the number of converter cells included in an arm of the power converter.

6. The power conversion device according to any one of claims 1 to 5, wherein the control circuit commences control of the switching circuit at a first time point after a time point at which the power supply circuit is started, and the control of the switching circuit includes control for causing the voltage of the storage element to follow a target voltage, and when, after the first time point, the voltage of the storage element becomes equal to or greater than a third threshold value that is greater than the first threshold value and less than the target voltage, the power supply circuit controls the switch to an off state so that no discharge current flows through the resistor.

7. The power conversion device according to claim 6, wherein the first point in time is a point in time when the control circuit receives a notification to permit initiation of control of the switching circuit.

8. A power conversion device as claimed in any one of claims 1 to 5, wherein, when control of the switching circuit is started by the control circuit, the power supply circuit controls the switch to an off state so that no discharge current flows through the resistor.

9. The power conversion device according to any one of claims 1 to 8, wherein the switch is provided inside the power supply circuit, and the resistor is provided outside the power supply circuit.

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