Control device for three-level inverter, and program

Abstract

A control device (50) is applied to a system comprising a first electricity storage unit (21) and a second electricity storage unit (22), a rotary electric machine (10) having three-phase armature windings (11U, 11V, 11W), and a three-level inverter (30) having switches (SUH-SWL, QU 1-QW 2), and performs switching control of each switch. The control device is provided with: a setting unit that, on the basis of a command voltage for controlling the control amount of the rotary electric machine to a command value, sets a drive pattern comprising a combination of the drive states of the respective switches and an appearance period of each drive state; and a control unit that performs switching control on the basis of the set drive pattern and the appearance period of each drive state. The setting unit sets the drive pattern so as to include at least two of three different zero voltage drive states. In the switching control, the control unit adjusts the appearance period of each zero voltage drive state included in the drive pattern.

Description

Three-level inverter control device and program CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application is based on Japanese Application No. 2023-138400, filed on August 28, 2023, the contents of which are incorporated herein by reference.

[0002] The present disclosure relates to a control device and a program for a three-level inverter.

[0003] 2. Description of the Related Art A three-level inverter is known that includes two capacitors connected in series and switches electrically connected to the armature windings of a rotating electrical machine and each capacitor (see Patent Document 1).

[0004] Japanese Patent Application Publication No. 8-98540

[0005] In order to prevent a decrease in the reliability of the switches provided for each phase, it is desirable to prevent the occurrence of a situation in which the load is concentrated on a specific switch among the switches.

[0006] A main object of the present disclosure is to provide a control device and program for a three-level inverter that can prevent a situation in which a load is concentrated on a specific switch.

[0007] The present disclosure is applied to a system including: a first power storage unit and a second power storage unit connected in series; a rotating electric machine having armature windings for three phases; and a three-level inverter having a switch for electrically connecting the armature winding for each phase to any of the positive side of the first power storage unit, the neutral point between the negative side of the first power storage unit and the positive side of the second power storage unit, and the negative side of the second power storage unit, wherein a control device for the three-level inverter performing switching control of the switches includes: a setting unit that sets a drive pattern consisting of a combination of drive states of the switches and an appearance period of each of the drive states, based on a command voltage for controlling a control variable of the rotating electric machine to a command value; and a control unit that performs the switching control based on the set drive pattern and the appearance period of each of the drive states, wherein the three different drive states in which the armature winding for each phase is electrically connected to the positive side of the first power storage unit, the neutral point, or the negative side of the second power storage unit are defined as zero-voltage drive states, The setting unit sets the drive pattern to include at least two of the zero voltage drive states, and the control unit adjusts, in the switching control, an appearance period of each of the zero voltage drive states included in the drive pattern.

[0008] Based on a command voltage for controlling the control variable of the rotating electric machine to a command value, a drive pattern consisting of a combination of drive states of each switch and the duration of each drive state are set. Then, switching control of each switch is performed based on the set drive pattern and the duration of each drive state. In this case, load may be concentrated on a specific switch among the switches. In this regard, a three-level inverter can output three different zero voltage drive states. Each zero voltage drive state has a different current path, and a different switch generates conduction loss.

[0009] Therefore, in the present disclosure, in the switching control of each switch, the duration of each zero-voltage drive state included in the drive pattern is adjusted. In this case, it is possible to control the loss occurring in each switch within an adjustable range by adjusting the duration of each zero-voltage drive state. This allows switching control to be performed so as to avoid losses being concentrated in a specific switch among the switches. Therefore, it is possible to suppress the occurrence of a situation in which a load is concentrated in a specific switch.

[0010] The above and other objects, features, and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which Fig. 1 is an overall configuration diagram of a control system according to a first embodiment, Fig. 2 is a functional block diagram of torque control processing executed by a control device, Fig. 3 is a diagram showing a vector space, Fig. 4 is a diagram showing a first sector, Fig. 5 is a time chart for explaining processing executed by an adjustment unit, Fig. 6 is a time chart for explaining processing executed by the adjustment unit, Fig. 7 is a flowchart showing a control processing procedure executed by a control device, Fig. 8 is a time chart showing switching control of a comparative example, Fig. 9 is a time chart showing an example of switching control, and Fig. 10 is a time chart showing switching of each switch of a U-phase. 11 is a diagram for explaining the switching mode of each switch of the U phase, FIG. 12 is a diagram for explaining the switching mode of each switch of the U phase, FIG. 13 is a diagram for explaining the switching mode of each switch of the U phase, FIG. 14 is a time chart for explaining the processing performed by the adjustment unit according to the second embodiment, FIG. 15 is a flowchart showing the processing procedure of control performed by the control device, FIG. 16 is a diagram showing the power loss generated in each switch of the U phase, and FIG. 17 is a flowchart showing the processing procedure of control performed by the control device according to another embodiment.

[0011] Several embodiments will be described with reference to the drawings. In several embodiments, functionally and / or structurally corresponding and / or associated parts may be designated by the same reference numerals or reference numerals that differ in the hundredth or more digit. For corresponding and / or associated parts, reference may be made to the descriptions of other embodiments.

[0012] A first embodiment of a control device according to the present disclosure will now be described with reference to the drawings. In this embodiment, the control device is mounted on an electrically powered vehicle such as an electric vehicle or a hybrid vehicle.

[0013] As shown in FIG. 1 , the on-vehicle system includes a rotating electric machine 10, a storage battery 20, and an inverter 30. The rotating electric machine 10 is an on-vehicle main engine capable of transmitting power to drive wheels (not shown). The rotating electric machine 10 of this embodiment is a three-phase synchronous machine and includes armature windings: a U-phase winding 11U, a V-phase winding 11V, and a W-phase winding 11W. The phase windings 11U, 11V, and 11W are star-connected. The phase windings 11U, 11V, and 11W are arranged with a 120° electrical angle offset. The rotating electric machine 10 is, for example, a permanent magnet synchronous machine.

[0014] The storage battery 20 is electrically connected to the rotating electric machine 10 via the inverter 30. The storage battery 20 is, for example, a battery pack including a series connection of battery cells. The storage battery 20 is a rechargeable secondary battery, for example, a lithium-ion battery or a nickel-metal hydride battery.

[0015] The inverter 30 is a power conversion circuit that converts DC power supplied from the storage battery 20 into three-phase AC power through switching control and supplies the converted AC power to the rotating electric machine 10. The system includes a first capacitor 21 serving as a first power storage unit and a second capacitor 22 serving as a second power storage unit on the input side of the inverter 30. The first capacitor 21 and the second capacitor 22 are connected in series. The storage battery 20 is connected in parallel to the series-connected body of the first and second capacitors 21 and 22. In this embodiment, the capacitance of the first capacitor 21 and the capacitance of the second capacitor 22 are set to the same value. The first capacitor 21 and the second capacitor 22 may be provided external to the inverter 30 or may be built into the inverter 30.

[0016] The inverter 30 is a T-type three-level inverter and includes three phases of series-connected upper-arm switches SUH, SVH, and SWH and lower-arm switches SUL, SVL, and SWL. Each of the switches SUH to SWL is a voltage-controlled semiconductor switching element, specifically an IGBT. The high-potential terminal of each switch SUH to SWL is the collector, and the low-potential terminal is the emitter. Freewheeling diodes DUH, DVH, DWH, DUL, DVL, and DWL are connected in antiparallel to each of the switches SUH, SVH, SWH, SUL, SVL, and SWL.

[0017] The emitter of the U-phase upper arm switch SUH is connected to the collector of the U-phase lower arm switch SUL. The junction between the U-phase upper arm switch SUH and the U-phase lower arm switch SUL is connected to a first end of the U-phase winding 11U. The emitter of the V-phase upper arm switch SVH is connected to the collector of the V-phase lower arm switch SVL. The junction between the V-phase upper arm switch SVH and the V-phase lower arm switch SVL is connected to a first end of the V-phase winding 11V. The emitter of the W-phase upper arm switch SWH is connected to the collector of the W-phase lower arm switch SWL. The junction between the W-phase upper arm switch SWH and the W-phase lower arm switch SWL is connected to a first end of the W-phase winding 11W. The second ends of the phase windings 11U, 11V, and 11W are connected to each other at the motor neutral point.

[0018] The collectors of each of the upper arm switches SUH to SWH are connected by a positive bus 31, which is a conductive member such as a bus bar. The positive bus 31 is connected to the positive terminal of the storage battery 20 and a first end of the first capacitor 21. A second end of the first capacitor 21 is connected to a first end of the second capacitor 22 via a capacitor neutral point O. The emitters of each of the lower arm switches SUL to SWL are connected by a negative bus 32, which is a conductive member such as a bus bar. The negative bus 32 is connected to the negative terminal of the storage battery 20 and a second end of the second capacitor 22.

[0019] The inverter 30 includes middle switches QU1, QU2, QV1, QV2, QW1, and QW2 for three phases, which conduct and cut off current in both directions. In this embodiment, the middle switches QU1, QU2, QV1, QV2, QW1, and QW2 are voltage-controlled semiconductor switching elements, specifically IGBTs.

[0020] Specifically, taking the U-phase as an example, the emitters of the U-phase first middle switch QU1 and the U-phase second middle switch QU2 are connected to each other. The collector of the U-phase second middle switch QU2 is connected to the connection point between the U-phase upper arm switch SUH and the U-phase lower arm switch SUL. The collector of the U-phase first middle switch QU1 is connected to the capacitor neutral point O.

[0021] In each phase, first diodes DU1, DV1, DW1 serving as freewheel diodes are connected in antiparallel to the first middle switches QU1, QV1, QW1, and second diodes DU2, DV2, DW2 serving as freewheel diodes are connected in antiparallel to the second middle switches QU2, QV2, QW2, and QW2, respectively.

[0022] The motor control system includes a first voltage sensor 41, a second voltage sensor 42, a phase current sensor 43, a rotation angle sensor 44, and a temperature sensor 45. The first voltage sensor 41 detects the terminal voltage of the first capacitor 21. The second voltage sensor 42 detects the terminal voltage of the second capacitor 22. The phase current sensor 43 detects the U-, V-, and W-phase currents flowing through the respective phase windings 11U, 11V, and 11W. Note that the phase current sensor 43 only needs to detect the currents of at least two of the three phases. The rotation angle sensor 44 is, for example, a resolver, and detects the electrical angle of the rotating electric machine 10. The temperature sensor 45 detects the temperature of the inverter 30. For example, the temperature sensor 45 detects at least one of the temperature of the coolant that cools the inverter 30 and the temperature of each switch SUH-SWL and QU1-QW2. The detected values ​​of each sensor 41-45 are input to a control device 50 provided in the system.

[0023] The control device 50 is an electronic control unit (ECU) primarily composed of a microcomputer 51. The microcomputer 51 includes a central processing unit (CPU). The functions provided by the microcomputer 51 can be provided by software stored in a physical memory device and a computer executing the software, software alone, hardware alone, or a combination thereof. For example, if the microcomputer 51 is provided by a hardware electronic circuit, the function can be provided by a digital circuit including multiple logic circuits or an analog circuit. For example, the microcomputer 51 executes a program stored in a non-transitory tangible storage medium (NSS) that serves as its own storage unit. The program includes, for example, programs for the processes shown in Figures 7, 15, and 17 (described below). A method corresponding to the program is executed by executing a set of instructions constituting the program. The storage unit is, for example, a non-volatile memory. The program stored in the storage unit can be updated via a communication network such as the Internet, for example, via OTA (Over the Air).

[0024] The control device 50 controls the control variable of the rotating electric machine 10 to a command value, and performs switching control of the switches SUH to SWL and QU1 to QW2 of the inverter 30. The switching control of the control device 50 will be described with reference to Fig. 2. In the example shown in Fig. 2, current feedback control is performed in the switching control. The control variable is the torque of the rotating electric machine 10, and the command value is a command torque Trq* input from a higher-level control device.

[0025] In the control device 50, the command current setting unit 60 sets the d-axis and q-axis command currents Id* and Iq* based on the command torque Trq*. For example, the command current setting unit 60 may set the d-axis and q-axis command currents Id* and Iq* based on map information or formula information that associates the command torque Trq* with the d-axis and q-axis command currents Id* and Iq*.

[0026] The two-phase conversion unit 61 converts the U-, V-, and W-phase currents in the three-phase fixed coordinate system into a d-axis current Idr and a q-axis current Iqr in a two-phase rotating coordinate system (dq coordinate system) based on the detection values ​​of the phase current sensor 43 and the electrical angle θe detected by the rotation angle sensor 44.

[0027] The d-axis deviation calculation unit 62a calculates the d-axis current deviation ΔId by subtracting the d-axis current Idr from the d-axis command current Id*, and the q-axis deviation calculation unit 62b calculates the q-axis current deviation ΔIq by subtracting the q-axis current Iqr from the q-axis command current Iq*.

[0028] The d-axis command voltage calculation unit 63a calculates a d-axis command voltage Vd as a manipulated variable for feedback-controlling the d-axis current Idr to the d-axis command current Id* based on the d-axis current deviation ΔId. The q-axis command voltage calculation unit 63b calculates a q-axis command voltage Vq as a manipulated variable for feedback-controlling the q-axis current Iqr to the q-axis command current Iq* based on the q-axis current deviation ΔIq. The feedback control used by the d-axis command voltage calculation unit 63a and the q-axis command voltage calculation unit 63b may be, for example, proportional-plus-integral control.

[0029] The fixed coordinate converter 64 receives the d- and q-axis command voltages Vd and Vq output from the d- and q-axis command voltage calculators 63a and 63b, and the electrical angle θe detected by the rotation angle sensor 44. Based on the d- and q-axis command voltages Vd and Vq and the electrical angle θe, the fixed coordinate converter 64 converts the d- and q-axis command voltages Vd and Vq in the two-phase rotating coordinate system into α- and β-axis command voltages Vα and Vβ in the two-phase fixed coordinate system.

[0030] The modulator 65 calculates a command voltage vector Vαβ determined by the α-axis and β-axis command voltages Vα and Vβ. The command voltage vector Vαβ is a voltage vector for controlling the control amount of the rotary electric machine 10 to a command value.

[0031] The modulation unit 65 identifies the sector in which the tip of the command voltage vector Vαβ extending from the origin in the vector space exists. The sectors divide the vector space, in which the command voltage vector Vαβ can exist, into six sections based on the deflection angle of the command voltage vector Vαβ. The deflection angle of the command voltage vector Vαβ is the angle between the command voltage vector Vαβ and the U-phase axis, specifically the electrical angle θe. The sign of the electrical angle θe is positive in the leftward (counterclockwise) direction. Figure 3 shows the first to sixth sectors that divide the vector space into six sections. In the vector space, the axes of the U, V, and W phases are arranged with an electrical angle offset of 120° each. Each sector is a region sandwiched between the axes of two phases that are 60 degrees apart in electrical angle. In Figure 3, the range representing the first sector is hatched.

[0032] The first to sixth sectors are further divided into four regions. Specifically, the end point of the sector on the first axis L1, which has the smaller deflection angle of the two phase axes that divide each sector, is defined as the first end point, and the end point of the sector on the second axis L2, which has the larger deflection angle, is defined as the second end point. The midpoint between the origin and the first end point of the vector space is defined as the first intermediate point, the midpoint between the origin and the second end point is defined as the second intermediate point, and the midpoint between the first end point and the second end point is defined as the intermediate end point. In this case, the first region R1 is defined as a region enclosed by a triangle with the origin, the first intermediate point, and the second intermediate point as vertices. The second region R2 is defined as a region enclosed by a triangle with the first intermediate point, the second intermediate point, and the intermediate end point as vertices. The third region R3 is defined as a region enclosed by a triangle with the second end point, the second intermediate point, and the intermediate end point as vertices. The fourth region R4 is a region surrounded by a triangle whose vertices are the first end point, the first intermediate point, and the intermediate end point. Note that Fig. 4 shows the first to fourth regions R1 to R4 using the first sector as an example.

[0033] Returning to the previous explanation of FIG. 2, for example, when 0°≦θe<60°, the modulator 65 determines that the tip of the command voltage vector Vαβ is present in the first sector.

[0034] The modulator 65 identifies a sub-region, which is a region in which the tip of the command voltage vector Vαβ exists, among the first to fourth regions R1 to R4 constituting the identified sector, based on the magnitude of the command voltage vector Vαβ and the intra-sector angle α. The intra-sector angle α is the angle between the first axis L1 extending from the origin to the first end point in the target sector and the command voltage vector Vαβ.

[0035] The modulator 65 selects the drive states of the switches SUH to SWL and QU1 to QW2 based on the identified sector and the sub-area within that sector. The drive states selected for the switches SUH to SWL and QU1 to QW2 correspond to the three vertices that make up the sub-area.

[0036] As shown in FIG. 4, in the first sector, the first endpoint is “HLL”, the second endpoint is “HHL”, the first intermediate points are “MLL” and “HMM”, the second intermediate points are “HHM” and “MML”, and the intermediate endpoint is “HML”.

[0037] The symbols such as "HML" mentioned above represent the output voltage level of each phase using three voltage levels H, M, and L, which correspond to the drive states of each switch SUH to SWL, QU1 to QW2.

[0038] A level H phase voltage is output by electrically connecting the winding of a target phase to the first end of the first capacitor 21. In this case, the upper arm switch of the target phase is turned on and the lower arm switch is turned off. Also, the first middle switch of the target phase is turned on and the second middle switch is turned off. When a level H phase voltage is output, the second middle switch of the target phase is turned off to prevent both ends of the first capacitor 21 from being short-circuited via the upper arm switch, the second middle switch, and the first diode.

[0039] A phase voltage of level M is output by electrically connecting the winding of the target phase to the capacitor neutral point O. In this case, in the target phase, the first middle switch and the second middle switch are turned on, and the upper and lower arm switches are turned off.

[0040] A level L phase voltage is output by electrically connecting the winding of the target phase to the second end of the second capacitor 22. In this case, the lower arm switch of the target phase is turned on and the upper arm switch is turned off. Also, the second middle switch of the target phase is turned on and the first middle switch is turned off. When a level L phase voltage is output, the first middle switch of the target phase is turned off to prevent both ends of the second capacitor 22 from being short-circuited via the lower arm switch, the first middle switch, and the second diode.

[0041] In addition, if the voltage of the storage battery 20 is Vdc and the second end side of the second capacitor 22 is set to the reference potential (0 V), the phase voltage of level H is "Vdc", the phase voltage of level M is "Vdc / 2", and the phase voltage of level L is "0".

[0042] For example, "HML" is the driving state of the switches SUH to SWL and QU1 to QW2 in which the U-phase voltage is at level H, the V-phase voltage is at level M, and the W-phase voltage is at level L. In the driving state HML, the U-phase upper arm switch SUH, the U-phase first middle switch QU1, the V-phase first middle switch QV1, the V-phase second middle switch QV2, the W-phase lower arm switch SWL, and the W-phase second middle switch QW2 are turned on, and the V- and W-phase upper arm switches SVH and SWH, the U-phase second middle switch QU2, the W-phase first middle switch QW1, and the U- and V-phase lower arm switches SUL and SVL are turned off.

[0043] "HHH" represents the zero-voltage drive state of the switches SUH-SWL and QU1-QW2, in which the output voltage levels of all three phases are H. In the zero-voltage drive state HHH, the upper-arm switches SUH, SVH, and SWH and the first middle switches QU1, QV1, and QW1 are turned on, while the lower-arm switches SUL, SVL, and SWL and the second middle switches QU2, QV2, and QW2 are turned off. In this state, the phase windings 11U, 11V, and 11W are electrically connected via the upper-arm switches SUH, SVH, and SWH.

[0044] "MMM" indicates a zero-voltage drive state of the switches SUH-SWL and QU1-QW2, in which the output voltage levels of all three phases are set to M. In the zero-voltage drive state MMM, the first middle switches QU1, QV1, and QW1 and the second middle switches QU2, QV2, and QW2 are turned on, and the upper arm switches SUH, SVH, and SWH and the lower arm switches SUL, SVL, and SWL are turned off. In this state, the phase windings 11U, 11V, and 11W are electrically connected via the first middle switches QU1, QV1, and QW1 and the second middle switches QU2, QV2, and QW2.

[0045] "LLL" indicates a zero-voltage drive state of the switches SUH-SWL and QU1-QW2, in which the output voltage levels of all three phases are set to L. In the zero-voltage drive state LLL, the lower-arm switches SUL, SVL, and SWL and the second middle switches QU2, QV2, and QW2 are turned on, while the upper-arm switches SUH, SVH, and SWH and the first middle switches QU1, QV1, and QW1 are turned off. In this case, the phase windings 11U, 11V, and 11W are electrically connected via the lower-arm switches SUL, SVL, and SWL.

[0046] In this embodiment, among the drive states of the switches SUH to SWL and QU1 to QW2, drive states other than the zero voltage drive states HHH, MMM, and LLL are referred to as effective voltage drive states.

[0047] "MLL" and "HMM" are located at the same position in vector space, and in these two effective voltage drive states, the line voltages applied to the windings 11U to 11W are equivalent. Furthermore, "MML" and "HHM", "LML" and "MHM", "LMM" and "MHH", "LLM" and "MMH", and "MLM" and "HMH" are also similar to "MLL" and "HMM". In this embodiment, "MLL", "MML", "LML", "LMM", "LLM", and "MLM" are referred to as Mid-Lo drive states, and "HMM", "HHM", "MHM", "MHH", "MMH", and "HMH" are referred to as Hi-Mid drive states.

[0048] In the switching control, the direction of change in the voltage at the capacitor neutral point O is opposite between the period when the Mid-Lo drive state occurs and the period when the Hi-Mid drive state occurs. The modulation unit 65 acquires the detected voltage V1r of the first voltage sensor 41 and the detected voltage V2r of the second voltage sensor 42. In the switching control, the modulation unit 65 can select either the Mid-Lo drive state or the Hi-Mid drive state based on the acquired detected voltages V1r and V2r so that the voltage at the capacitor neutral point O falls within a predetermined range.

[0049] The modulation unit 65 sets a drive pattern consisting of a combination of drive states of the switches SUH to SWL and QU1 to QW2 based on the identified sector and the sub-regions within that sector. For example, if the modulation unit 65 determines that the command voltage vector Vαβ exists in the first region R1 of the first sector, the modulation unit 65 may set a drive pattern that drives the switches SUH to SWL and QU1 to QW2 in the order of MMM → MML → MLL → LLL → MLL → MML → MMM, or may set a drive pattern that drives the switches SUH to SWL and QU1 to QW2 in the order of MMM → HMM → HHM → HHH → HHM → HMM → MMM.

[0050] When performing switching control using the set drive pattern, the modulation section 65 sets the period during which the drive state of each of the switches SUH to SWL and QU1 to QW2 appears.

[0051] Specifically, as shown in FIG. 4 , a case will be described in which the command voltage vector Vαβ is present in the first region R1 of the first sector. The modulator 65 decomposes the command voltage vector Vαβ into a first voltage vector Vt1 along the first axis L1 and a second voltage vector Vt2 along the second axis L2. The first voltage vector Vt1 is a vector obtained by multiplying the voltage vector corresponding to the first intermediate point by ta (0<ta<1). The second voltage vector Vt2 is a vector obtained by multiplying the voltage vector corresponding to the second intermediate point by tb (0<tb<1). The modulator 65 sets the appearance period of the driving state corresponding to the first intermediate point to "ta×TS" and the appearance period of the driving state corresponding to the second intermediate point to "tb×TS" in one control cycle. Here, TS is the length of one control cycle.

[0052] The modulator 65 sets the remaining period Tz (=TS-ta×TS-tb×TS), which is calculated by subtracting "ta×TS" and "tb×TS" from the length TS of one control period, as the period during which the zero voltage drive state appears. The remaining period Tz is the total period during which each of the zero voltage drive states HHH, MMM, and LLL appears in one control period. Note that a period twice the length TS of one control period corresponds to one switching period Tsw of each of the switches SUH to SWL and QU1 to QW2.

[0053] For example, when a drive pattern including the drive states MML, MLL, MMM, and LLL is set, the modulation unit 65 sets the appearance period of the drive state MLL to "ta x TS" and the appearance period of the drive state MML to "tb x TS." The modulation unit 65 then sets the appearance period of the zero-voltage drive state LLL to "TL" and the appearance period of the zero-voltage drive state MMM to "TM." In this case, the total appearance period of the zero-voltage drive states MMM and LLL, "TM + TL," is the remaining period Tz.

[0054] Furthermore, for example, when a drive pattern including the drive states HMM, HHM, HHH, and MMM is set, the modulation unit 65 sets the appearance period of the drive state HMM to "ta x TS" and the appearance period of the drive state HHM to "tb x TS." The modulation unit 65 then sets the appearance period of the zero-voltage drive state HHH to "TH" and the appearance period of the zero-voltage drive state MMM to "TM." In this case, the total appearance period of the zero-voltage drive states HHH and MMM, "TH + TM," is the remaining period Tz.

[0055] Switching control is performed based on the drive pattern set by the modulation unit 65 and the duration of appearance of each drive state, so that the torque of the rotary electric machine 10 is controlled to the command torque Trq*.

[0056] However, there is a concern that during switching control, the load may be concentrated on a specific switch among the switches SUH to SWL and QU1 to QW2.

[0057] Specifically, during switching control when the tip of the command voltage vector Vαβ is in the first region of each sector, the period TM during which the zero-voltage drive state MMM appears may be longer than the periods TH and TL during which the other zero-voltage drive states HHH and LLL appear. For example, under conditions where the running load is small, such as when the vehicle speed is low and the torque of the rotating electric machine 10 is low, the period TM during which the zero-voltage drive state MMM appears is likely to be longer than the periods TH and TL during which the other zero-voltage drive states HHH and LLL appear. In this case, there is a concern that the load will be concentrated on each of the middle switches QU1 to QW2 due to increased conduction loss in each of the switches SUH to SWL and QU1 to QW2.

[0058] Here, the three-level inverter can output three different zero voltage drive states: HHH, MMM, and LLL. Each of the zero voltage drive states HHH, MMM, and LLL has a different current path and generates a different switch conduction loss.

[0059] Therefore, the control device 50 includes an adjustment unit 66. In controlling the switching of the switches SUH to SWL and QU1 to QW2, the adjustment unit 66 adjusts the appearance period of each of the zero voltage drive states HHH, MMM, and LLL included in the drive pattern. In this embodiment, the adjustment unit 66 adjusts the appearance period of each of the zero voltage drive states HHH, MMM, and LLL included in the drive pattern so that the appearance period of the zero voltage drive state MMM included in the drive pattern is shorter than the appearance period TM set by the modulation unit 65. Note that the zero voltage drive state MMM corresponds to a "specific drive state."

[0060] The process performed by the adjustment unit 66 will be described below with reference to Figures 5 and 6. Figures 5 and 6 show an example of the transition of each phase voltage over two control periods. In Figures 5 and 6, (a) shows the transition of the U-phase voltage level, (b) shows the transition of the V-phase voltage level, and (c) shows the transition of the W-phase voltage level.

[0061] In FIG. 5, the switches SUH to SWL and QU1 to QW2 are driven in the order of MMM→MML→MLL→LLL→MLL→MML→MMM.

[0062] The adjustment unit 66 shortens the appearance period of the zero-voltage drive state MMM by subtracting a predetermined adjustment period k from the appearance period TM of the zero-voltage drive state MMM set by the modulation unit 65. The adjustment unit 66 extends the appearance period of the zero-voltage drive state LLL by adding a predetermined adjustment period k to the appearance period TL of the zero-voltage drive state LLL set by the modulation unit 65. That is, the adjustment unit 66 adjusts the appearance period of the zero-voltage drive state MMM to "TM-k" and the appearance period of the zero-voltage drive state LLL to "TL+k" in one control cycle. This shortens the appearance period of the zero-voltage drive state MMM without changing the total appearance period of the zero-voltage drive states MMM and LLL in one control cycle (i.e., the remaining period Tz).

[0063] In FIG. 6, the switches SUH to SWL and QU1 to QW2 are driven in the order of MMM→HMM→HHM→HHH→HHM→HMM→MMM.

[0064] The adjustment unit 66 shortens the appearance period of the zero-voltage drive state MMM by subtracting a predetermined adjustment period k from the appearance period TM of the zero-voltage drive state MMM set by the modulation unit 65. The adjustment unit 66 extends the appearance period of the zero-voltage drive state HHH by adding a predetermined adjustment period k to the appearance period TH of the zero-voltage drive state HHH set by the modulation unit 65. In other words, the adjustment unit 66 adjusts the appearance period of the zero-voltage drive state MMM to "TM-k" and adjusts the appearance period of the zero-voltage drive state HHH to "TH+k". This shortens the appearance period of the zero-voltage drive state MMM without changing the total appearance period of the zero-voltage drive states HHH and MMM in one control cycle.

[0065] 7 shows a control procedure executed by the control device 50. This control is repeatedly executed at a predetermined cycle.

[0066] In step S10, the control unit 10 acquires the command torque Trq* input from the higher-level control device, the phase currents flowing through the phase windings 11U to 11W, the voltages of the first and second capacitors 21 and 22, and the electrical angle θe of the rotary electric machine 10. The detected values ​​of the phase current sensor 43 can be used as the phase currents. The detected voltage V1r of the first voltage sensor 41 can be used as the voltage of the first capacitor 21, and the detected voltage V2r of the second voltage sensor 42 can be used as the voltage of the second capacitor 22. The detected value of the rotation angle sensor 44 can be used as the electrical angle θe of the rotary electric machine 10.

[0067] In step S11, a command voltage vector Vαβ is calculated based on the acquired command torque Trq*, phase current, and electrical angle θe. In step S12, a sector and a sub-region within the sector in which the command voltage vector Vαβ exists are identified. In steps S11 and S12, the control device 50 functions as the command current setting unit 60, the two-phase conversion unit 61, the deviation calculation units 62a and 62b, the command voltage calculation units 63a and 63b, the fixed coordinate conversion unit 64, and the modulation unit 65, all of which are described in FIG. 2 .

[0068] In step S13, a drive pattern is set, which is a combination of the drive states of the switches SUH-SWL and QU1-QW2, based on the identified sector, the sub-regions within that sector, and the acquired detected voltages V1r and V2r. Here, a drive pattern for two control cycles is set to include two different zero-voltage drive states. In this case, the drive pattern is set to include the zero-voltage drive state MMM and at least one of the remaining zero-voltage drive states HHH and LLL. The duration of each drive state included in the set drive pattern is then set. The duration of each effective voltage drive state in one control cycle is set based on the length of the voltage vector obtained by decomposing the command voltage vector Vαβ. The remaining period Tz, calculated by subtracting the duration of each effective voltage drive state from the length TS of one control cycle, is set as the total duration of the durations TH, TM, and TL of the zero-voltage drive states HHH, MMM, and LLL. The processing in step S13 corresponds to the "setting unit."

[0069] In step S14, the period during which the zero-voltage drive state included in the drive pattern appears is adjusted. In this embodiment, the period during which the zero-voltage drive state MMM appears in one control cycle is adjusted so that it is shorter than the period set in step S13.

[0070] For example, when the command voltage vector Vαβ is in the first region R1 of each sector, a drive pattern is set that includes a Mid-Lo drive state and each of the zero-voltage drive states MMM and LLL. Then, in one control cycle, the appearance period of the zero-voltage drive state MMM is set to TM, and the appearance period of the zero-voltage drive state LLL is set to TL. In this case, the appearance periods of the zero-voltage drive states MMM and LLL are adjusted so that the appearance period of the zero-voltage drive state MMM is "TM-k" and the appearance period of the zero-voltage drive state LLL is "TL+k."

[0071] Furthermore, for example, when the command voltage vector Vαβ is present in the first region R1 of each sector, a drive pattern is set that includes a Hi-Mid drive state and each of the zero-voltage drive states HHH and MMM. Then, in one control cycle, the appearance period of the zero-voltage drive state MMM is set to TM, and the appearance period of the zero-voltage drive state HHH is set to TH. In this case, the appearance periods of the zero-voltage drive states HHH and MMM are adjusted so that the appearance period TM of the zero-voltage drive state MMM is set to "TM-k" and the appearance period TH of the zero-voltage drive state HHH is set to "TH+k." Note that a predetermined value can be used as the adjustment period k.

[0072] If it is determined that the command voltage vector Vαβ exists in the second to fourth regions R2 to R4 of each sector, the process of step S14 does not need to be performed.

[0073] In step S16, switching control is performed based on the drive patterns of the switches SUH to SWL and QU1 to QW2 set in steps S10 to S14 and the durations of the drive states. The processes in steps S14 and S15 correspond to the "control unit."

[0074] Next, the effects will be described with reference to Fig. 8 and Fig. 9. Fig. 8 shows a comparative example in which the process of step S14 is not performed in the switching control of the switches SUH to SWL and QU1 to QW2, while Fig. 9 shows an example of the switching control of the switches SUH to SWL and QU1 to QW2 according to this embodiment. Figs. 8 and 9 show the transition of each phase voltage.

[0075] 8, the conduction loss of each of the middle switches QU1 to QW2 may increase due to the long duration TM of the zero-voltage drive state MMM. In this case, there is a concern that the load may be concentrated on each of the middle switches QU1 to QW2.

[0076] Therefore, in this embodiment, the duration of the zero-voltage drive states HHH, MMM, and LLL included in the drive patterns is adjusted during switching control of the switches SUH-SWL and QU1-QW2. In this case, the conduction loss occurring in the switches SUH-SWL and QU1-QW2 can be controlled within an adjustable range by adjusting the duration of the zero-voltage drive states HHH, MMM, and LLL. This prevents the load from concentrating on the middle switches QU1-QW2.

[0077] In the control example of Figure 9, the appearance period of each zero-voltage drive state HHH, MMM is adjusted so that the appearance period of the zero-voltage drive state MMM is shortened by the adjustment period k compared to the appearance period TM in the comparative example. In this case, the conduction loss of each middle switch QU1 to QW2 is reduced compared to the comparative example. This makes it possible to avoid concentrated losses in each middle switch QU1 to QW2 and accurately suppress the occurrence of situations in which loads are concentrated on each middle switch QU1 to QW2.

[0078] The appearance period of the zero-voltage driving state HHH is extended by the amount of the shortened appearance period of the zero-voltage driving state MMM, thereby making it possible to shorten the appearance period of the zero-voltage driving state MMM without changing the total appearance period of the zero-voltage driving states HHH and MMM.

[0079] Second Embodiment A second embodiment will now be described with reference to the drawings, focusing on differences from the first embodiment. In this embodiment, the adjustment unit 66 adjusts the duration of the zero voltage drive states HHH, MMM, and LLL in consideration of differences in switching losses that occur during switching control of the switches SUH to SWL and QU1 to QW2.

[0080] In each phase, when current flows from the first end of the winding connected to the inverter 30 switch to the second end of the winding connected to the motor neutral point, the upper switches SUH, SVH, SWH and the first middle switches QU1, QV1, QW1 are switched in hard switching mode. The lower switches SUL, SVL, SWL and the second middle switches QU2, QV2, QW2 are switched in soft switching mode. In this case, the switching loss of the upper switches SUH, SVH, SWH and the first middle switches QU1, QV1, QW1 is greater than the switching loss of the lower switches SUL, SVL, SWL and the second middle switches QU2, QV2, QW2.

[0081] On the other hand, when current flows from the second end to the first end of each phase winding, the upper switches SUH, SVH, SWH and the first middle switches QU1, QV1, QW1 switch in a soft switching mode. The lower switches SUL, SVL, SWL and the second middle switches QU2, QV2, QW2 switch in a hard switching mode. In this case, the switching loss of the lower switches SUL, SVL, SWL and the second middle switches QU2, QV2, QW2 is greater than the switching loss of the upper switches SUH, SVH, SWH and the first middle switches QU1, QV1, QW1.

[0082] 10 to 13, the switching mode of each switch SUH, QU1 is hard switching and the switching mode of each switch SUL, QU2 is soft switching will be described using an example situation in which current flows from the first end to the second end of U-phase winding 11U. In Figures 10 to 13, the solid line indicates the current path before the dead time, the dashed line indicates the current path during the dead time, and the dashed line indicates the current path after the dead time.

[0083] FIG. 10 shows the current path when the U-phase voltage changes from level H to level M. In this case, current flows through the U-phase upper arm switch SUH before the dead time when the U-phase upper arm switch SUH and the U-phase second middle switch QU2 are turned off. As a result, when the U-phase upper arm switch SUH is turned off and the collector-emitter voltage of the U-phase upper arm switch SUH begins to rise, turn-off loss occurs. During the dead time, the U-phase second diode DU2 is conductive. As a result, the U-phase second middle switch QU2 is turned on with the collector-emitter voltage of the U-phase second middle switch QU2 reduced to near zero. This suppresses turn-on loss in the U-phase second middle switch QU2.

[0084] FIG. 11 shows the current path when the U-phase voltage changes from level M to level H. In this case, current flows through the U-phase second middle switch QU2 before the dead time when the U-phase upper arm switch SUH and the U-phase second middle switch QU2 are turned off. During the dead time, the U-phase second diode DU2 is conductive. As a result, the U-phase second middle switch QU2 is turned off with the collector-emitter voltage of the U-phase second middle switch QU2 reduced to near zero. This suppresses turn-off loss in the U-phase second middle switch QU2. During the dead time, the collector-emitter voltage in the off state is applied to the U-phase upper arm switch SUH. As a result, when the U-phase upper arm switch SUH is turned on and current begins to flow through the U-phase upper arm switch SUH, turn-on loss occurs.

[0085] That is, in the situation shown in FIGS. 10 and 11, the switching mode of the U-phase upper arm switch SUH is hard switching, and the switching mode of the U-phase second middle switch QU2 is soft switching.

[0086] FIG. 12 shows the current path when the U-phase voltage changes from level M to level L. In this case, current flows through the U-phase first middle switch QU1 before the dead time when the U-phase first middle switch QU1 and the U-phase lower arm switch SUL are turned off. As a result, when the U-phase first middle switch QU1 is turned off and the collector-emitter voltage of the U-phase first middle switch QU1 begins to rise, turn-off loss occurs. During the dead time, the U-phase lower arm diode DUL is conductive. As a result, the U-phase lower arm switch SUL is turned on with the collector-emitter voltage of the U-phase lower arm switch SUL reduced to near zero. This suppresses turn-on loss in the U-phase lower arm switch SUL.

[0087] FIG. 13 shows the current path when the U-phase voltage changes from level L to level M. In this case, current flows through the U-phase lower-arm switch SUL before the dead time when the U-phase first middle switch QU1 and the U-phase lower-arm switch SUL are turned off. During the dead time, the U-phase lower-arm diode DUL is conductive. As a result, the U-phase lower-arm switch SUL is turned off with the collector-emitter voltage of the U-phase lower-arm switch SUL reduced to near zero. This suppresses turn-off loss in the U-phase lower-arm switch SUL. During the dead time, the collector-emitter voltage in the off state is applied to the U-phase first middle switch QU1. As a result, when the U-phase first middle switch QU1 is turned on and current begins to flow through the U-phase first middle switch QU1, turn-on loss occurs.

[0088] That is, in the situation shown in FIGS. 12 and 13, the switching mode of the U-phase first middle switch QU1 is hard switching, and the switching mode of the U-phase lower arm switch SUL is soft switching.

[0089] As described above, in each phase, depending on the direction of current flowing through the winding, either the upper arm switches and first middle switches or the lower arm switches and second middle switches will be in the hard switching mode, and the other will be in the soft switching mode. In this case, it is considered that the switches in the soft switching mode out of the upper arm switches SUH, SVH, SWH and the lower arm switches SUL, SVL, SWL of each phase have a margin for extending the period during which the zero voltage drive state occurs, compared to the switches in the hard switching mode.

[0090] Therefore, in this embodiment, the adjustment unit 66 adjusts the appearance period of each zero voltage drive state HHH, MMM, and LLL by differentiating the first adjustment period k1 for the zero voltage drive state HHH as the "first drive state" from the second adjustment period k2 for the zero voltage drive state LLL as the "second drive state."

[0091] The process performed by the adjustment unit will be described in detail with reference to Fig. 14. Fig. 14 shows drive patterns for four control cycles. The periods during which each of the zero-voltage drive states HHH, MMM, and LLL occurs are indicated by being surrounded by dashed lines. Below the periods during which each of the zero-voltage drive states HHH, MMM, and LLL occurs, a comparison is made between the adjusted appearance periods in this embodiment and the adjusted appearance periods in the first embodiment.

[0092] In the first control period TS1 and the second control period TS2, a drive pattern including a Mid-Lo drive state and each of the zero-voltage drive states MMM and LLL is set. In this case, the adjustment unit 66 shortens the appearance period TM of the zero-voltage drive state MMM set by the modulation unit 65 by the second adjustment period k2, and extends the appearance period TL of the zero-voltage drive state LLL set by the modulation unit 65 by the second adjustment period k2.

[0093] In the third control period TS3 and the fourth control period TS4, a drive pattern including the Hi-Mid drive state and each of the zero-voltage drive states HHH and MMM is set. In this case, the adjustment unit 66 shortens the appearance period TM of the zero-voltage drive state MMM set by the modulation unit 65 by the first adjustment period k1, and extends the appearance period TH of the zero-voltage drive state HHH set by the modulation unit 65 by the first adjustment period k1.

[0094] In other words, the adjustment unit 66 shortens the appearance period of the zero voltage drive state MMM by "2×k1+2×k2" over four control cycles, and extends the total appearance period of the other zero voltage drive states HHH and LLL by "2×k1+2×k2".

[0095] The adjuster 66 determines the direction of the current in each phase. Here, the direction in which the current flows from the first end to the second end of the winding in each phase is defined as positive, and the direction in which the current flows from the second end to the first end of the winding is defined as negative. If the adjuster 66 determines that the direction of the phase current in the phase in which the phase current magnitude is largest is positive, the adjuster 66 sets the second adjustment period k2 to a period longer than the first adjustment period k1. On the other hand, if the adjuster 66 determines that the direction of the phase current in the phase in which the phase current magnitude is largest is negative, the adjuster 66 sets the first adjustment period k1 to a period longer than the second adjustment period k2. As a result, the periods in which the zero voltage drive states HHH, MMM, and LLL appear are adjusted so that the first adjustment period k1 and the second adjustment period k2 are different from each other.

[0096] In this embodiment, in view of the fact that switches whose switching mode is soft switching have the leeway to extend the appearance period of the zero-voltage drive state, the adjustment unit 66 can lengthen the shortened period of the appearance period of the zero-voltage drive state MMM compared to the first embodiment. In other words, the adjustment unit 66 can adjust the appearance periods of the zero-voltage drive states HHH, MMM, and LLL so that the total shortened period of the appearance period of the zero-voltage drive state MMM over four control cycles (corresponding to 2×k1+2×k2) is longer than in the first embodiment (corresponding to 4×k).

[0097] 15 shows the procedure of the control executed by the control device 50. This control is executed repeatedly at a predetermined cycle. For convenience, the same processes as those shown in FIG. 7 are denoted by the same reference numerals in FIG. 15.

[0098] In step S13, a drive pattern is set based on the identified sector and the sub-regions within that sector. Here, drive patterns for four control cycles are set so as to include each of the zero voltage drive states HHH, MMM, and LLL. Then, the process proceeds to step S20.

[0099] In step S20, the phase with the largest phase current is identified based on the acquired phase currents. In step S21, it is determined based on the acquired phase currents whether the direction of the current flowing through the identified phase is positive. If the determination in step S21 is affirmative, the process proceeds to step S22. On the other hand, if the determination in step S21 is negative, the process proceeds to step S23.

[0100] In step S22, the second adjustment period k2 is set to a period longer than the first adjustment period k1. The first and second adjustment periods k1 and k2 can be predetermined so that the second adjustment period k2 is longer than the first adjustment period k1.

[0101] In step S23, the first adjustment period k1 is set to a period longer than the second adjustment period k2. The first and second adjustment periods k1 and k2 may be predetermined so that the first adjustment period k1 is longer than the second adjustment period k2.

[0102] 16 is a graph comparing the power loss generated when switching control is performed between this embodiment (right bar graph) and the first embodiment (left bar graph). Fig. 16 compares the power loss generated in each of the U-phase switches SUH, SUL, QU1, and QU2 when a current flows from the first end to the second end of the U-phase winding 11U.

[0103] The reduction in the duration of the zero voltage drive state MMM reduces the conduction loss of each of the middle switches QU1 and QU2. Therefore, in the first embodiment, the power loss of the U-phase first middle switch QU1 is reduced to the same level as that of the U-phase upper arm switch SUH.

[0104] When a current flows from the first terminal to the second terminal of the U-phase winding 11U, the switching mode of the U-phase lower arm switch SUL is soft switching. In this case, the power loss generated in the U-phase lower arm switch SUL has a margin with respect to the reference value A. Note that the reference value A is a value used as a reference when considering the magnitude of the power loss generated when switching control is performed, and is, for example, a value smaller than the allowable power loss.

[0105] In the first embodiment, the conduction loss of each middle switch QU1, QU2 is reduced, and the occurrence of a situation in which the load is concentrated on each middle switch QU1, QU2 is suppressed, but the loss generated in the U-phase first middle switch QU1 is higher than reference value A. In addition, the loss generated in the U-phase upper arm switch SUH is higher than reference value A.

[0106] 16, in consideration of the fact that the loss generated in the U-phase lower arm switch SUL has a margin relative to the reference value A, the adjustment periods k1 and k2 are set so that the total shortened period of the zero voltage drive state MMM is longer than in the first embodiment. In this case, the conduction loss of the U-phase first middle switch QU1 is reduced compared to the first embodiment. As a result, the loss generated in the U-phase first middle switch QU1 is kept within the reference value A.

[0107] In this embodiment, the adjustment periods k1 and k2 are set so that k1<k2. In FIG. 16 , the first adjustment period k1 is shorter than the adjustment period k in the first embodiment. This reduces the conduction loss of the U-phase upper arm switch SUH compared to the first embodiment. As a result, the loss generated in the U-phase upper arm switch SUH is kept within reference value A. Furthermore, the second adjustment period k2 is longer than the adjustment period k in the first embodiment, and although the conduction loss of the U-phase lower arm switch SUL is increased compared to the first embodiment, it is kept within reference value A.

[0108] According to the present embodiment described above, in addition to shortening the duration of the zero voltage drive state MMM, the extension periods of the durations of the remaining zero voltage drive states HHH and LLL are adjusted, thereby achieving switching control suitable for dispersing the conduction loss occurring in each of the switches SUH to SWL and QU1 to QW2.

[0109] In the switching control, one of the extension periods in the zero voltage drive states HHH and LLL is set shorter than the other extension period based on the current flowing through each phase winding 11U, 11V, and 11W. This makes it possible to appropriately determine the extension periods for each of the zero voltage drive states HHH and LLL, taking into account differences in switching losses that occur during the switching control of each of the switches SUH to SWL and QU1 to QW2. This makes it possible to achieve switching control that is suitable for distributing the conduction losses that occur in each of the switches SUH to SWL and QU1 to QW2.

[0110] Other Embodiments The above-described embodiments may be modified as follows.

[0111] In the first embodiment, instead of shortening the appearance period of the zero-voltage driving state MMM, the adjustment unit 66 may adjust the appearance periods of the zero-voltage driving states HHH, MMM, and LLL so as to shorten the appearance periods of the other zero-voltage driving states HHH and LLL. In other words, one of the zero-voltage driving states HHH and LLL may be designated as the "specific driving state." In this case, for example, in step S14 of FIG. 7 , the appearance periods of the zero-voltage driving states MMM and LLL may be adjusted so that the appearance period of the zero-voltage driving state MMM is "TM+k" and the appearance period of the zero-voltage driving state LLL is "TL-k." Furthermore, for example, the appearance periods of the zero-voltage driving states HHH and MMM may be adjusted so that the appearance period TM of the zero-voltage driving state MMM is "TM+k" and the appearance period TH of the zero-voltage driving state HHH is "TH-k."

[0112] In the first embodiment, the adjustment unit 66 may select which of the periods during which the zero voltage drive states HHH, MMM, and LLL are to be shortened based on the temperatures of the switches SUH to SWL and QU1 to QW2. Specifically, in step S14 of FIG. 7 , the zero voltage drive state in which the highest temperature switch among the upper arm switches SUH to SWH, the middle switches QU1 to QW2, and the lower arm switches SUL to SWL is turned on may be selected as the specific drive state. The periods during which the zero voltage drive states HHH, MMM, and LLL are to be shortened by the adjustment period k may then be adjusted. The specific drive state may be selected using a temperature calculated based on the detection value of the temperature sensor 45.

[0113] According to this embodiment, the period during which the zero voltage drive state occurs, in which the hottest switch among the upper arm switches SUH to SWH, the middle switches QU1 to QW2, and the lower arm switches SUL to SWL is turned on, is shortened. This effectively reduces the conduction loss that occurs in the switches with concentrated loads. Therefore, switching control can be performed in a way that is suitable for avoiding the occurrence of a situation in which the load is concentrated on a specific switch among the switches SUH to SWL and QU1 to QW2.

[0114] In the first and second embodiments, the modulation unit 65 may adjust the duration of appearance of each of the zero-voltage drive states HHH, MMM, and LLL when setting the duration of appearance of the drive states of each of the switches SUH to SWL and QU1 to QW2. For example, the modulation unit 65 can set the duration of appearance of each drive state included in the drive pattern using correspondence information (specifically, map information or formula information) that associates the command voltage vector Vαβ with the duration of appearance of the drive states of each of the switches SUH to SWL and QU1 to QW2. In this case, the correspondence information can use information in which the duration of appearance of each of the zero-voltage drive states HHH, MMM, and LLL is adjusted in consideration of the conduction loss generated in each of the switches SUH to SWL and QU1 to QW2.

[0115] In this embodiment, the control device 50 does not need to include the adjustment unit 66. Furthermore, the process of step S14 in FIG.

[0116] In the first embodiment, the adjuster 66 is not limited to adjusting the appearance periods of the zero voltage drive states HHH, MMM, and LLL using the predetermined adjustment periods k, but may variably set the adjustment periods k. For example, the adjuster 66 may set the adjustment period k longer when the magnitude of the phase current in the phase having the largest magnitude among the phases is large than when the magnitude of the phase current is small. The adjuster 66 may use the detection values ​​of the phase current sensors 43 as the phase currents.

[0117] Furthermore, for example, the adjustment unit 66 may set the adjustment period k longer when the temperature of each of the switches SUH to SWL and QU1 to QW2 is high than when the temperature of each of the switches SUH to SWL and QU1 to QW2 is low. The adjustment unit 66 can use the detection value of the temperature sensor 45 as the temperature of each of the switches SUH to SWL and QU1 to QW2. Note that in the second embodiment, it is also possible to variably set each of the adjustment periods k1 and k2 based on at least one of the phase currents and the temperatures of each of the switches SUH to SWL and QU1 to QW2.

[0118] According to this embodiment, the duration of appearance of each of the zero voltage drive states HHH, MMM, and LLL can be appropriately adjusted according to the load on each of the switches SUH to SWL and QU1 to QW2.

[0119] 7, the adjustment period k can be set to the same length as the appearance period TM set by the process of step S13. In this case, the appearance period of the zero voltage drive state MMM in one control cycle is set to "0".

[0120] In step S14, when the duration of the zero voltage drive state MMM in one control cycle is adjusted to "0", the drive pattern may be adjusted so that an effective voltage drive state does not occur in which the phase voltage of at least one of the phases is at level M. For example, when a command voltage vector exists in the first sector, the drive pattern and the duration of the duration of each drive state may be adjusted so that switching control is performed using each of the drive states HHL, HLL, HHH, and LLL.

[0121] 15, the total length of the adjustment periods k1 and k2 can be set to four times the appearance period TM set by the processing of step S13. In this case, the appearance period of the zero voltage drive state MMM in four control cycles is set to "0".

[0122] In steps S22 and S23, when the period during which the zero voltage drive state MMM occurs in four control cycles is adjusted to "0", the drive pattern may be adjusted so that an effective voltage drive state in which the phase voltage of at least one of the phases is at level M does not occur.

[0123] In the switching control of the switches SUH to SWL and QU1 to QW2, when a predetermined execution condition is met, the duration of appearance of each of the zero voltage drive states HHH, MMM, and LLL may be adjusted.

[0124] Specifically, the control device 50 may perform the control shown in Fig. 17 instead of the control shown in Fig. 7. In this control, after the process of step S10, the process proceeds to step S30.

[0125] In step S30, it is determined whether a predetermined execution condition is satisfied. The execution condition is a condition that determines whether the inverter 30 is in an overheated state. For example, the execution condition is a condition that a determination parameter value exceeds a threshold value. The determination parameter value is, for example, a value calculated based on the command torque Trq*, the rotor rotation speed calculated based on the electrical angle θe, the detected value of the temperature sensor 45, etc.

[0126] If the determination in step S30 is affirmative, the process proceeds to step S11. On the other hand, if the determination in step S30 is negative, the process proceeds to step S31. In step S31, normal control is performed. In normal control, switching control is performed without adjusting the appearance periods of the zero voltage drive states HHH, MMM, and LLL by the adjustment unit 66.

[0127] In the second embodiment, the total shortened period of the appearance period of the zero voltage drive state MMM over four control cycles (corresponding to 2×k1+2×k2) does not need to be longer than that in the first embodiment (corresponding to 4×k). Even in this case, it is possible to adjust the extension period of the appearance period of each of the zero voltage drive states HHH and LLL.

[0128] The middle switches QU1 to QW2 of each phase may be configured with their collectors connected to each other. Taking the U-phase as an example, the collectors of the U-phase first middle switch QU1 and the U-phase second middle switch QU2 may be connected to each other. The emitter of the U-phase second middle switch QU2 may be connected to the connection point between the U-phase upper arm switch SUH and the U-phase lower arm switch SUL. The emitter of the U-phase first middle switch QU1 may be connected to the capacitor neutral point O. In this case, the U-phase first and second diodes DU1 and DU2 are arranged to conduct in the opposite direction to that in the first embodiment.

[0129] In this configuration, the U-phase upper arm switch SUH and the U-phase second middle switch QU2 are turned on, and the U-phase lower arm switch SUL and the U-phase first middle switch QU1 are turned off, so that the U-phase voltage is set to level H. Also, the U-phase lower arm switch SUL and the U-phase first middle switch QU1 are turned on, and the U-phase upper arm switch SUH and the U-phase second middle switch QU2 are turned off, so that the U-phase voltage is set to level L.

[0130] In this case, when current flows from the first end to the second end of the winding in each phase, the upper arm switches SUH, SVH, SWH and the second middle switches QU2, QV2, QW2 switch in a hard switching mode, while the lower arm switches SUL, SVL, SWL and the first middle switches QU1, QV1, QW1 switch in a soft switching mode.

[0131] In addition, when current flows from the second end to the first end of each phase winding, the upper arm switches SUH, SVH, SWH and the second middle switches QU2, QV2, QW2 switch in a soft switching mode, and the lower arm switches SUL, SVL, SWL and the first middle switches QU1, QV1, QW1 switch in a hard switching mode.

[0132] A reverse blocking IGBT (RB-IGBT) may be used as the middle switch of each phase.

[0133] The semiconductor switches constituting the inverter are not limited to IGBTs, but may be, for example, N-channel MOSFETs. In this case, the high-potential terminal of the switch is the drain, and the low-potential terminal is the source. Each switch also has a corresponding body diode.

[0134] The inverter is not limited to the inverter shown in FIG. 1, but may be another inverter such as a neutral point clamp type.

[0135] The power storage unit connected to the inverter is not limited to a capacitor, and may be a chargeable and dischargeable storage battery.

[0136] The rotating electrical machine is not limited to one in which the windings of each phase are star-connected, and may be one in which the windings are delta-connected.

[0137] The inverter, rotating electric machine, and control device may be installed in a mobile body other than a vehicle, such as an aircraft or a ship. If the mobile body is an aircraft, the rotating electric machine serves as a power source for the aircraft's flight, and if the mobile body is a ship, the rotating electric machine serves as a power source for the ship's navigation. Furthermore, the inverter, rotating electric machine, and control device may be installed in a mobile body other than a vehicle.

[0138] The control unit and the method described herein may be implemented by a special-purpose computer configured by configuring a processor and memory programmed to perform one or more functions embodied in a computer program. Alternatively, the control unit and the method described herein may be implemented by a special-purpose computer configured by configuring a processor with one or more dedicated hardware logic circuits. Alternatively, the control unit and the method described herein may be implemented by one or more special-purpose computers configured by combining a processor and memory programmed to perform one or more functions with a processor configured with one or more hardware logic circuits. Furthermore, the computer program may be stored as instructions executed by a computer on a computer-readable non-transitory tangible storage medium.

[0139] Although the present disclosure has been described with reference to the embodiments, it is understood that the present disclosure is not limited to the embodiments or structures. The present disclosure also encompasses various modifications and equivalent modifications. In addition, various combinations and forms, including only one element, more than one element, or less than one element, are also within the scope and spirit of the present disclosure.

Claims

1. A control device (50) for a three-level inverter that performs switching control of each of the switches, the control device (50) being adapted to a system including: a first power storage unit (21) and a second power storage unit (22) connected in series; a rotating electric machine (10) having three-phase armature windings (11U, 11V, 11W); and a three-level inverter (30) having switches (SUH to SWL, QU1 to QW2) that electrically connect the armature winding, in each phase, to any of the positive side of the first power storage unit, the neutral point between the negative side of the first power storage unit and the positive side of the second power storage unit, and the negative side of the second power storage unit, the control device (50) comprising: a setting unit that sets a drive pattern consisting of a combination of drive states of the switches and an appearance period of each of the drive states, based on a command voltage for controlling a control amount of the rotating electric machine to a command value; and a control unit that performs the switching control based on the set drive pattern and the appearance period of each of the drive states, a control device for a three-level inverter, wherein three different drive states in which the armature winding of each phase is electrically connected to the positive electrode side of the first storage unit, the neutral point, or the negative electrode side of the second storage unit are defined as zero voltage drive states, the setting unit sets the drive pattern to include at least two of the zero voltage drive states, and the control unit adjusts an appearance period of each of the zero voltage drive states included in the drive pattern in the switching control.

2. The control device for a three-level inverter as described in claim 1, wherein the control unit adjusts the appearance period of a specific drive state, which is one of the zero voltage drive states included in the drive pattern, in the switching control so as to shorten the appearance period of each of the zero voltage drive states compared to when set by the setting unit.

3. The control device for a three-level inverter according to claim 2, wherein the three-level inverter has, as the switches, upper arm switches (SUH, SVH, SWH) in each phase electrically connecting the armature winding to the positive electrode side of the first storage unit, middle switches (QU1, QU2, QV1, QV2, QW1, QW2) in each phase electrically connecting the armature winding to the neutral point, and lower arm switches (SUL, SVL, SWL) in each phase electrically connecting the armature winding to the negative electrode side of the second storage unit, and the specific drive state is the zero voltage drive state in which the armature winding of each phase is electrically connected via the middle switches of each phase.

4. The control device for a three-level inverter as described in claim 3, wherein the setting unit sets the drive pattern to include three different zero voltage drive states, and the control unit, in the switching control, shortens the appearance period of the specific drive state more than when set by the setting unit, extends the total period of the appearance period of a first drive state which is the zero voltage drive state in which the armature windings of each phase are electrically connected via the upper arm switch of each phase, and the appearance period of a second drive state which is the zero voltage drive state in which the armature windings of each phase are electrically connected via the lower arm switch of each phase, by an amount equivalent to the shortening of the appearance period of the specific drive state, and adjusts the appearance period of each zero voltage drive state so that the extension period of the appearance period of the first drive state and the extension period of the appearance period of the second drive state are different.

5. A control device for a three-level inverter as described in claim 4, wherein the control unit, in the switching control, determines, based on the current flowing through each of the armature windings, which of the extension periods in the appearance period of the first drive state and the extension period in the appearance period of the second drive state to be made shorter than the other.

6. The control device for a three-level inverter according to claim 2, wherein the three-level inverter has, as the switches, upper arm switches (SUH, SVH, SWH) in each phase electrically connecting the armature winding to the positive electrode side of the first power storage unit, middle switches (QU1, QU2, QV1, QV2, QW1, QW2) in each phase electrically connecting the armature winding to the neutral point, and lower arm switches (SUL, SVL, SWL) in each phase electrically connecting the armature winding to the negative electrode side of the second power storage unit, and wherein the control unit, in the switching control, selects, as the specific drive state, the zero voltage drive state in which the switch having the highest temperature among the upper arm switch, the middle switch and the lower arm switch is turned on, and adjusts the appearance period of the selected specific drive state so as to be shorter than the period set by the setting unit.

7. A system including: a rotating electric machine (10) having a first storage unit (21) and a second storage unit (22) connected in series; a three-phase armature winding (11U, 11V, 11W); a three-level inverter (30) having switches (SUH to SWL, QU1 to QW2) for electrically connecting the armature winding in each phase to any one of the positive electrode side of the first storage unit, the neutral point between the negative electrode side of the first storage unit and the positive electrode side of the second storage unit, and the negative electrode side of the second storage unit; and a computer (51), wherein a program for causing the computer to execute switching control of each of the switches causes the computer to execute processing including: a setting step for setting a drive pattern consisting of a combination of drive states of each of the switches and an appearance period of each of the drive states based on a command voltage for controlling a control amount of the rotating electric machine to a command value; and a control step for performing the switching control based on the set drive pattern and the appearance period of each of the drive states, A program which defines three different drive states in which the armature winding of each phase is electrically connected to the positive electrode side of the first storage unit, the neutral point, or the negative electrode side of the second storage unit as zero voltage drive states, and in the setting step, sets the drive pattern to include at least two of the zero voltage drive states, and in the control step, adjusts the appearance period of each of the zero voltage drive states included in the drive pattern in the switching control.

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