Superconducting circuit and signal processing unit comprising the same

Abstract

A superconducting (SC) circuit is provided, which may be used as a fast low-dissipation RF switch at cryogenic temperatures. The SC circuit comprises a combination of an SC element and a transistor switch. The transistor switch is coupled to one port of the SC element and configured to switch between two states depending on an applied control signal. Another port of the SC element is maintained at a desired potential by using an electronic component (e.g., a current or voltage source). When the SC element is in an SC state and the transistor switch is in the first state, a first electrical bias is provided across the SC element, which causes the SC element to pass a radio signal. When the SC element is in the SC state and the transistor switch is in the second state, the SC element has either a second electrical bias which causes the SC element to go from the SC state to a normal state, or a third electrical bias which causes the SC element to change its kinetic inductance to a target value but remain in the SC state and pass or block the radio signal.

Description

[0001] SUPERCONDUCTING CIRCUIT AND SIGNAL PROCESSING UNIT COMPRISING THE SAME

[0002] TECHNICAL FIELD

[0003] The present disclosure relates generally to the field of signal processing circuits. More particularly, the present disclosure relates to a superconducting (SC) circuit that may be used as a fast low-dissipation Radio Frequency (RF) switch at cryogenic temperatures, as well as to a signal processing unit comprising the SC circuit.

[0004] BACKGROUND

[0005] Due to their ultra-low power consumption and high speed, superconducting (SC) circuits offer great promise as building blocks for future quantum computing systems and related cryogenic electronics. In this context, it is of particular interest to develop switching devices that can be electrically tuned between an SC state and a normal (resistive) state at a radio frequency (RF), thereby enabling and blocking RF signal propagation.

[0006] Currently, there are no fast low-dissipation RF switches which could operate at cryogenic temperatures. The existing Complementary Metal-Oxide- Semiconductor (CMOS) switches dissipate too much power for their reasonable operation. There are also mechanical RF-switches, which however are very slow, and their operation causes long measurement delays as an operation power level is sufficient to heat up a cryostat for a short period of time.

[0007] SUMMARY

[0008] This summary is provided to introduce a selection of concepts in a simplified form that are further described below in the detailed description. This summary is not intended to identify key features of the present disclosure, nor is it intended to be used to limit the scope of the present disclosure.

[0009] The objective of the present disclosure is to provide a technical solution that enables efficient (in terms of power dissipation and speed) RF switching at cryogenic temperatures.

[0010] The objective above is achieved by the features of the independent claims in the appended claims. Further embodiments and examples are apparent from the dependent claims, the detailed description, and the accompanying drawings.

[0011] According to a first aspect, an SC circuit is provided. The SC circuit comprises an SC element, a transistor switch, and an electronic component. The SC element comprises a first port and a second port, as well as has a tunable kinetic inductance. The transistor switch is coupled to the first port of the SC element and configured to switch between a first state and a second state depending on an applied control signal. The electronic component is coupled to the second port of the SC element. When the SC element is in an SC state and the transistor switch is in the first state, the transistor switch and the electronic component are configured to provide, for the SC element, a first electrical bias which causes the SC element to pass a radio signal fed to one of the first port and second port of the SC element. When the SC element is in the SC state and the transistor switch is in the second state, the transistor switch and the electronic component are configured to provide, for the SC element: (i) a second electrical bias which causes the SC element to go from the SC state to a normal state, thereby preventing the radio signal from passing through the SC element; or (ii) a third electrical bias which causes the SC element to change the kinetic inductance to a target value but remain in the SC state and pass or prevent the radio signal from passing through the SC element depending on the target value of the kinetic inductance. By combining the SC element and the transistor switch in this way, it is possible to form a fast low-dissipation RF switch that may operate at cryogenic temperatures for multiple purposes. For example, such an RF switch may be used as a key element in future quantum computing systems, providing means to overcome the cabling overhead related bottlenecks of quantum processor control. It may also be used for control and readout of sensor arrays, as well as be used as a replacement for high-dissipation cryogenic elements. Furthermore, the SC circuit thus configured may be combined with different CMOS logic circuits such that the switching between the first and second states of the transistor switch may be performed through the logic circuits themselves, which may reduce the overall system complexity. On top of that, the implementation of scenario (ii) has an advantage that the SC element is not heated up and no quasiparticles are formed; in this case, the SC circuit has better response time, but its isolation worsens.

[0012] In one exemplary embodiment of the first aspect, the SC circuit further comprises a planar transmission line comprising a dielectric substrate and a SC signal strip extending on or through the dielectric substrate. In this embodiment, the SC element is embedded in the SC signal strip. The use of the planar transmission line may be advantageous in terms of scaling quantum computers into which the SC circuit according to the first aspect may be integrated. Furthermore, the quantum computers typically require many analog RF signals that are currently fed by a very large number of expensive coaxial cables going from room-temperature to cryogenic-temperature regions; the planar transmission line may replace at least some of such coaxial cables, thereby further reducing the power dissipation of the SC circuit according to the first aspect.

[0013] In one exemplary embodiment of the first aspect, the signal strip is at least partly coated with a normal metal layer or an SC metal layer having a critical temperature lower than a critical temperature of the SC element. In this embodiment, the normal or SC metal layer may function as a quasiparticle trap and / or thermalization arrangement. In other words, such a coating layer may be used to provide relaxation of (non-equilibrium) quasiparticles arising from an electric current running through the SC circuit and / or enhance electron-phonon (e-p) coupling or interaction, thereby decreasing an electron temperature of the SC circuit according to the first aspect.

[0014] In one exemplary embodiment of the first aspect, the signal strip has two ends each coupled to a different contact pad. In this embodiment, each of the contact pads is at least partly coated (in addition to or instead of the signal strip) with a normal metal layer or an SC metal layer having a critical temperature lower than the critical temperature of the SC element. The contact pads may be used to couple the SC circuit to similar SC circuits or other signal processing circuits (e.g., logic circuits). As for the normal or SC metal layers covering the contact pads, each of them may be again used as a quasiparticle trap and / or thermalization arrangement. In other words, they may be also used to provide the relaxation of (non-equilibrium) quasiparticles arising from the electric current running through the SC circuit and / or enhance electron-phonon (e-p) coupling or interaction, thereby decreasing the electron temperature of the SC circuit according to the first aspect.

[0015] In one exemplary embodiment of the first aspect, the planar transmission line is one of a coplanar waveguide, a microstrip, and a stripline. These types of the planar transmission line may provide low RF losses in the SC circuit according to the first aspect.

[0016] In one exemplary embodiment of the first aspect, the SC circuit further comprises at least one impedance matching element embedded in the planar transmission line. The at least one impedance matching element is configured to provide impedance matching between the planar transmission line and the SC element. By using the impedance matching element(s), it is possible to reduce the RF losses in the SC circuit according to the first aspect even more.

[0017] In one exemplary embodiment of the first aspect, the transistor switch comprises at least one of a field-effect transistor (FET), a metal-oxide- semiconductor FET, a ferroelectric FET, a bipolar transistor, and a superconducting transistor. By combining these types of the transistor switch with the SC element, one may perform said RF switching more efficiently. In one exemplary embodiment of the first aspect, the SC element comprises at least one SC nanowire or at least one Josephson Junction (JJ). By combining these types of the SC element with the transistor switch, one may perform said RF switching more efficiently.

[0018] In one exemplary embodiment of the first aspect, each of the at least one SC nanowire is shaped as a meander. The meander-shaped SC nanowire(s) may provide more efficient implementation of said scenario (ii), i.e., when the kinetic inductance of the SC element changes due to the third electrical bias but the SC element itself remains in the SC state. In this case, the SC circuit according to the first aspect may be used as a tunable isolator, band / low / high- pass filter, or tunable tank circuit more efficiently.

[0019] In one exemplary embodiment of the first aspect, the at least one SC nanowire comprises an array of serial or parallel SC nanowires embedded in the SC signal strip. By using the serial or parallel arrangement of SC nanowires and properly choosing their number, one may achieve a desired critical current value of the entire SC element.

[0020] In one exemplary embodiment of the first aspect, each SC nanowire of the array of parallel SC nanowires has a different cross-section. This embodiment with different cross-sections of the SC nanowires (meaning that each SC nanowire has a different critical current) enables partial SC-to-normal state transitions which may be used to enhance current sensitivity. For example, small-diameter SC nanowires included in the SC element may lead to a situation where exceeding their critical current will bring the entire SC element to the normal state due to Joule heating or quasiparticle poisoning. Similarly, the SC nanowires may be designed such that hot spots are localized, thereby enabling a multistep response (e.g., tunable filter application).

[0021] In one exemplary embodiment of the first aspect, the at least one JJ comprises an array of serial or parallel JJs embedded in the SC signal strip. By using the serial or parallel arrangement of JJs and properly choosing their number, one may achieve a desired critical current value of the entire SC element. In one exemplary embodiment of the first aspect, the electronic component comprises at least one of: a voltage source, a current source, a diode, another transistor switch, a resistor, a capacitor, and an inductive isolator. By using these types of the electronic component, it is possible to maintain the second port of the SC element at a proper potential more efficiently, thereby allowing the first or second electrical bias to be obtained simply by adjusting the control signal fed to the transistor switch.

[0022] In one exemplary embodiment of the first aspect, the SC element has a first electrical impedance in a first direction from the first port to the second port and a second electrical impedance in a second direction from the second port to the first port. In this embodiment, the first electrical impedance and the second electrical impedance may be selected such that, in case of the first electrical bias or the third electrical bias, the SC element is configured to pass the radio signal in the first direction and prevent the radio signal from going back in the second direction, or the SC element is configured to pass the radio signal in the second direction and prevent the radio signal from going back in the first direction. With the SC element thus configured, the SC circuit according to the first aspect may be additionally used as an RF isolator.

[0023] According to a second aspect, a signal processing unit is provided. The signal processing unit comprises at least one SC circuit according to the first aspect and a control subunit configured to generate and feed the control signal to the transistor switch of each of the at least one SC circuit, thereby causing the transistor switch to operate either in the first state or the second state. The signal processing unit thus configured may be used for different signal processing at cryogenic temperatures (e.g., it may function as an RF splitter, combiner, or multiplexer; the latter is possible, for example, when the array of SC nanowires with different cross-sections are included in the SC element).

[0024] In one exemplary embodiment of the second aspect, when each of the at least one SC circuit comprises the planar transmission line, the signal processing unit further comprises a signal generator coupled to the planar transmission line in each of the at least one SC circuit. The signal generator is configured to generate the radio signal to be fed to the SC element. This embodiment may allow the RF signal to be generated at a cryogenic temperature, which may be beneficial in some use scenarios (e.g., when it is required to minimize propagation losses).

[0025] Other features and advantages of the present disclosure will be apparent upon reading the following detailed description and reviewing the accompanying drawings.

[0026] BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The present disclosure is explained below with reference to the accompanying drawings in which:

[0028] FIGs. 1A and IB show schematic views of a superconducting (SC) circuit according to a first exemplary embodiment, namely: FIG. 1A shows a top view of the SC circuit, and FIG. IB shows a cross-sectional view of the SC circuit;

[0029] FIG. 2 shows an electrical diagram of the SC circuit according to the first exemplary embodiment with a straight SC nanowire;

[0030] FIG. 3 shows an electrical diagram of the SC circuit according to the first exemplary embodiment with a meander SC nanowire;

[0031] FIG. 4 shows an electrical diagram of the SC circuit according to the first exemplary embodiment with an SC nanowire of complicated shape;

[0032] FIG. 5 shows a schematic top view of an SC circuit according to a second exemplary embodiment;

[0033] FIG. 6 shows a schematic top view of an SC circuit according to a third exemplary embodiment; and

[0034] FIG. 7 shows a schematic block diagram of a signal processing unit according one exemplary embodiment.

[0035] DETAILED DESCRIPTION Various embodiments of the present disclosure are further described in more detail with reference to the accompanying drawings. However, the present disclosure may be embodied in many other forms and should not be construed as limited to any certain structure or function discussed in the following description. In contrast, these embodiments are provided to make the description of the present disclosure detailed and complete.

[0036] According to the detailed description, it will be apparent to the ones skilled in the art that the scope of the present disclosure encompasses any embodiment thereof, which is disclosed herein, irrespective of whether this embodiment is implemented independently or in concert with any other embodiment of the present disclosure. For example, the apparatuses disclosed herein may be implemented in practice using any numbers of the embodiments provided herein. Furthermore, it should be understood that any embodiment of the present disclosure may be implemented using one or more of the elements presented in the appended claims.

[0037] The word "exemplary" is used herein in the meaning of "used as an illustration". Unless otherwise stated, any embodiment described herein as "exemplary" should not be construed as preferable or having an advantage over other embodiments.

[0038] Any positioning terminology, such as "left", "right", "top", "bottom", "above" "below", "upper", "lower", etc., may be used herein for convenience to describe one element's or feature's relationship to one or more other elements or features in accordance with the figures. It should be apparent that the positioning terminology is intended to encompass different orientations of the apparatus disclosed herein, in addition to the orientation(s) depicted in the figures. As an example, if one imaginatively rotates the apparatus in the figures 90 degrees clockwise, elements or features described as "left" and "right" relative to other elements or features would then be oriented, respectively, "above" and "below" the other elements or features. Therefore, the positioning terminology used herein should not be construed as any limitation of the present disclosure. Although the numerative terminology, such as "first", "second", etc., may be used herein to describe various embodiments, elements or features, these embodiments, elements or features should not be limited by this numerative terminology. This numerative terminology is used herein only to distinguish one embodiment, element or feature from another embodiment, element or feature. For example, a first state discussed below could be re-called a second state, and vice versa, without departing from the teachings of the present disclosure.

[0039] The exemplary embodiments disclosed herein provide a technical solution that allows mitigating or even eliminating the drawbacks of the prior art which are mentioned in the description part "Background". In particular, the technical solution disclosed herein relates to a superconducting (SC) circuit in which a combination of an SC element and a transistor switch is used. The SC element comprises two ports and has a tunable kinetic inductance. The transistor switch is coupled to the first port of the SC element and configured to switch between two states depending on a control signal fed thereto. The second port of the SC element is maintained at a desired (fixed or floating) potential by using an electronic component (e.g., a current or voltage source). When the SC element is in an SC state and the transistor switch is in the first state, a first electrical bias is provided across the SC element, which causes the SC element to pass a radio signal. When the SC element is in the SC state and the transistor switch is in the second state, the SC element has either a second electrical bias which causes the SC element to go from the SC state to a normal state, thereby preventing the radio signal from passing therethrough, or a third electrical bias which causes the SC element to change the kinetic inductance to a target or user-defined value but remain in the SC state and pass or prevent the radio signal from passing through the SC element depending on the target value of the kinetic inductance. The SC circuit thus configured may be used as a fast low-dissipation RF switch configured to operate at cryogenic temperatures for multiple purposes. FIGs. 1A and IB show schematic views of an SC circuit 100 according to a first exemplary embodiment. More specifically, FIG. 1A shows a top view of the SC circuit 100, and FIG. IB shows a cross-sectional view of the SC circuit 100. The SC circuit 100 comprises a coplanar waveguide (CPW) which consists of a signal strip 102 and a ground plane 104 provided on either side of the signal strip 102 with a gap therebetween. As shown in FIG. IB, the signal strip 102 and the ground plane 104 are formed on a dielectric substrate which may be a multilayered structure comprising an underlaying layer 106 and a dielectric layer 108 provided on the underlying layer 106. Each of the signal strip 102 and the ground plane 104 may be made of the same or different conductive material, such as a metal, superconductor, etc. Some examples of suitable superconductors may include, but not limited to, Al, Ti, TiN, TiNb, TiNbN, Mo, MoN, MoSi, Nb, NbN, NbSi, SiB, SiGa, V, VN, etc., or any combination of these and other materials exhibiting SC properties at cryogenic temperatures. It should be noted that the cryogenic temperatures used herein may refer to those ranging from 120 K to absolute zero. As for the layers 106 and 108, they may be made of any isolating dielectrics, such as SiO2, Si N, SiONx, AI2O3, HfO2, HfSiON, HfSiO, ZrO2, etc., or any combination of these and other isolating dielectrics. Those skilled in the art would recognize that the configuration parameters of the CPW shown in FIGs. 1A and IB, such as the gap between the signal strip 102 and the ground plane 104, the dimensions of the signal strip 102, the thickness of the dielectric substrate, etc., should be selected such as to provide a desired characteristic impedance (e.g., 50 or 75 Ohm). Furthermore, to provide better impedance matching, one or more impedance matching elements may be added to the SC circuit 100, such as one or more capacitors, one or more inductors, or any combination thereof.

[0040] The SC circuit 100 further comprises an SC element 110 embedded in the signal strip 102 such that the signal strip 102 is divided by the SC element 110 into two parts (i.e., upper and lower parts with reference to FIG. 1A). In this embodiment, the SC element 110 is implemented as a single SC nanowire which may be made of the same or different SC material as the signal strip 102 and the ground plane 104. The SC nanowire may have a resistance of the order of kOhm (e.g., 10 kOhm), as well as a tunable kinetic inductance which is dependent on a bias current flowing through the SC nanowire. In other embodiments, the SC element 110 may be implemented as an array of equally or differently sized (e.g., with different cross-sections) SC nanowires embedded in the SC signal strip 102, with the SC nanowires being arranged in series or in parallel. At the same time, the present disclosure is not limited to this type of the SC element 110 - some embodiments are possible, in which the SC element 110 is implemented as one or more Josephson junctions (JJs) also embedded in the signal strip 102 (in case of multiple JJs, they may similarly be arranged in series or in parallel).

[0041] The SC circuit 110 is characterized by the combination of the SC element 110 and a transistor switch 112 which may be coupled to any of input and output ports of the SC element 110. In the embodiments disclosed herein, the term "port" may refer to an end part of the SC element 110 which is coupled to the signal strip 102. As follows from FIG. IB, the transistor switch 112 is implemented as a floating-gate field-effect transistor (FET) comprising a source region 114, a drain region 116, and a floating gate 118 embedded in the dielectric layer 108. Optionally, the gate 118 may also be made of an SC material (e.g., the same as the one used for the signal strip 102 and the ground plane 104). To provide RF switching (which will be discussed below in more detail), there is also a conductive pin 120 extending through the dielectric layer 108 and connecting the signal strip 102 with the source region 114 of the FET. Depending on a control signal fed to the gate 118, the FET may be either in a first state or a second state. In the embodiments disclosed herein, the first and second states may refer to open and closed states of the transistor switch 112, respectively, or vice versa. In turn, the open state of the transistor switch 112 means that there is no current flowing through the FET, while the closed state of the transistor switch 112 means that the FET becomes conductive. It should be noted that the present disclosure is not limited to this type of the transistor switch 112 - in some other embodiments, the transistor switch 112 may be implemented as any other FET, such as a metal-oxide-semiconductor FET (MOSFET), a ferroelectric FET, junction-gate FET (JFET) etc., or as a bipolar transistor, or a superconducting transistor, or any combination of these transistors. Furthermore, one or more passive elements may also be used as part of the transistor switch 112, such as one or more serially connected resistors and / or inductors.

[0042] As also shown in FIG. 1A, the SC circuit 100 may optionally comprise contact pads 122 and 124 which are coupled to the (opposite) ends of the signal strip 102. These contact pads may be used to couple the SC circuit 100 to similar SC circuits or other signal processing circuits (e.g., logic circuits). The triangular shape of the contact pads 122 and 124 are shown for illustrative purposes only and should not be construed as any limitation of the present disclosure; in some other embodiments, the contact pads 122 and 124 may have any polygonal shape (e.g., square, rectangular, rhomboid, etc.) or any curved shape (e.g., circular, oval, etc.). In one embodiment, one of the contact pads 122 and 124 may be replaced with a signal generator configured to generate a radio signal at the cryogenic temperatures.

[0043] The SC circuit 100 may be obtained by using standard semiconductor fabrication processes. These processes can include, but not limited to, deposition techniques (e.g., Atomic Layer Deposition (ALD), Molecular- Beam Epitaxy (MBE), Chemical Beam Epitaxy (CBE), Metal Organic Chemical Vapor Deposition (MOCVD), Physical Vapor Deposition (PVD), Low Pressure CVD (LPCVD), Plasma-Enhanced CVD (PECVD), Ultra-High Vacuum CVD (UHV-CVD), etc.), lithography techniques (e.g., photolithography, Ultraviolet (UV) lithography, Deep Ultraviolet (DUV) lithography, Extreme Ultraviolet (EUV) lithography, Electron-Beam Lithography (EBL), etc.), sputtering techniques (e.g., radio sputtering, magnetron sputtering, etc.), etching techniques (e.g., wet etching, reactive ion etching, etc.), doping techniques (e.g., diffusion doping, ion implantation, etc.), or any combination thereof.

[0044] The operational principle of the SC circuit 100 is as follows. The SC circuit 100 is first cooled to a cryogenic temperature at which the SC element 110 is in an SC state. During operation, the transistor switch 112 may function as a DC switch, while the SC element 110 may function as an RF switch. If the transistor switch 112 is coupled to one port of the SC element 110, another port of the SC element 110 should be maintained at a desired (fixed or floating) potential, for example, by using an electronic component (not shown in FIGs. 1A and IB), such as a voltage source, a current source, a diode, another transistor switch (e.g., like the transistor switch 112), a resistor, a capacitor, an inductive isolator, or any combination thereof. By doing so, it is possible to provide a desired electrical bias across the SC element 110 by simply adjusting the control signal fed to the gate 118 of the FET (i.e., by opening or closing the transistor switch 112). The control signal may comprise positive and negative pulses in an alternating sequence, thereby providing repetitive switching between the two states of the transistor switch 112. When the SC element 110 is in the SC state and the transistor switch 112 is in the first (i.e., open) state, there is a first electrical bias across the SC element 110, which causes the SC element 110 to pass a radio signal fed to one of the ports of the SC element 110. At the same time, when the SC element 110 is in the SC state and the transistor switch 112 is in the second (i.e., closed) state, one of the following two scenarios may occur depending on the strength of the control signal: (i) there is a second electrical bias across the SC element 110, which causes the SC element 110 to go from the SC state to a normal state, thereby preventing the radio signal from passing through the SC element 110; or (ii) there is a third electrical bias across the SC element, which causes the SC element 110 to change its kinetic inductance to a target value but remain in the SC state and pass or block the radio signal depending on the target value of the kinetic inductance.

[0045] In scenario (ii), if the SC circuit 100 is used, for example, as a resonant switch, it will pass or block certain frequencies and pass other frequencies through itself, with a resonance frequency being defined by the third electrical bias. Additionally, the SC element may be configured such that it has a first electrical impedance in a first direction from the first port to the second port and a (different) second electrical impedance in a second direction from the second port to the first port. In this sense, the SC element may be implemented, for example, in the same or similar manner as an LC-circuit, in which the impedance in the direction from a series inductance to a parallel capacitor is different from that in the opposite direction (i.e., from the parallel capacitor to the series inductance). In this case, the values of the first electrical impedance and the second electrical impedance may be selected such that, in case of the first electrical bias or the third electrical bias, the SC element is configured to pass the radio signal in the first direction and prevent the radio signal from going back in the second direction, or vice versa (i.e., the SC element is configured to pass the radio signal in the second direction and prevent the radio signal from going back in the first direction).

[0046] As noted above, the third electrical bias may be such that a bias current in the nanowire representing the SC element 110 does not exceed its critical current but changes its kinetic inductance, thereby also providing the RF switch functionality. It is well-known that the kinetic inductance depends on the ratio between a critical temperature and a nanowire temperature, as well as the current flowing through the nanowire, as follows (e.g., see the following document: Shinho Cho. Temperature and Current Dependence of Inductance in a Superconducting Meander Line. J. Korean Phys. Soc. 31(2), 337 (1997)):

[0047] L(T, 0 = L0[l - (T / m-1■ [1 + (4 / 9i2) ■ i2], where L is the kinetic inductance, Lo= ml / Ae2n, A is the cross-sectional area of the SC nanowire, I is the length of the SC nanowire, m is the effective mass of charge carriers in the SC nanowire, e is the electron charge, n is the density of SC electrons, T is the temperature of the SC nanowire, Tcis the critical temperature under which the SC nanowire acts as a superconductor, oc is the exponent determining the variation of the density of SC electrons with temperature, icis the critical current, and i is the current flowing through the SC nanowire. Thus, one can see that a change in i may lead to a change in L.

[0048] FIG. 2 shows an electrical diagram of the SC circuit 100 with a straight SC nanowire 200. As noted earlier, the SC nanowire 200 may serve as the SC element 110. The SC nanowire 200 has two ports 202 and 204, by which it is coupled, on either side, to the signal strip 102. FIG. 2 also shows the electronic component in the form of a DC voltage source 206. This means that the port 202 of the SC nanowire 200 is maintained at a fixed potential, and the above-indicated first to third electrical biases may be provided across the SC nanowire 200 by properly adjusting the control signal fed to the transistor switch 112 (i.e., to the gate 118 of the FET) coupled to the port 204.

[0049] FIG. 3 shows an electrical diagram of the SC circuit 100 with a meander SC nanowire 300. Again, the SC nanowire 300 may serve as the SC element 110. The SC nanowire 300 has two ports 302 and 304, by which it is coupled, on either side, to the signal strip 102. In FIG. 3, the electronic component is represented by a current source 306 which is used to maintain the port 302 at a desired potential. Similarly, the above-indicated first to third electrical biases may be provided across the SC nanowire 300 by properly adjusting the control signal fed to the transistor switch 112 (i.e., to the gate 118 of the FET) coupled to the port 304.

[0050] It should be noted that the present disclosure is not limited to the nanowire shapes shown in FIGs. 2 and 3 - in some other embodiments, one or more nanowires which may be used as the SC element 110 may have any curved (e.g., helical, S-shaped, etc.) or angled shape (e.g., trapezoidal, saw-shaped, etc.).

[0051] FIG. 4 shows an electrical diagram of the SC circuit 100 with an SC nanowire 400 of complicated shape. Again, the SC nanowire 400 may serve as the SC element 110. The SC nanowire 400 is assumed to have a set 402 of sections with capacitive elements therebetween, so that impedance matching is maintained. Each section in the set 402 of sections is schematically shown as a resistor in FIG. 4. The set 402 of sections may comprise the same or different sections, meaning that the SC nanowire 400 may have the same or different shape in each section. For example, each section in the set 402 of sections may be implemented as a meander like the one shown in FIG. 3. Furthermore, the present disclosure is not limited to the three sections shown in Fig. 4 - in other embodiments, the SC nanowire 400 may have two or more than three sections. The SC nanowire 400 has two ports 404 and 406, by which it is coupled, on either side, to the signal strip 102. In FIG. 4, the electronic component is represented by a FET 408 (i.e., another transistor switch) which is used to maintain the port 404 at a desired potential. In this case, two control signals should be used to properly provide the above-indicated first to third electrical biases across the SC nanowire 400.

[0052] It should be noted that the above-described CPW is merely one example of planar transmission lines that may be used in the SC circuit 100. In other embodiments, it may be replaced with a microstrip or a stripline, which are also well-known in the art. In case of the microstrip, an SC element like the SC element 110 may be embedded in an SC signal strip provided on a dielectric substrate, with no ground plane provided on either side of the signal strip. In case of the stripline, an SC element like the SC element 110 may be embedded in a signal strip extending through a dielectric substrate.

[0053] Some other embodiments are possible, in which no planar transmission line is used in the SC circuit 100. In these embodiments, signal strips (like the signal strip 102) may be replaced with cores of coaxial cables, SC elements (like the SC element 110) may be mounted on a dielectric substrate (e.g., a printed circuit board (PCB)) and coupled to the coaxial cables by using cable connectors, and transistor switches (like the transistor switch 112) may be embedded in the dielectric substrate.

[0054] In some other embodiments, the SC circuit 100 may be additionally provided with quasiparticle traps or thermalization arrangements configured to relax quasiparticles and / or enhance electron-phonon (e-p) coupling, thereby decreasing the electron temperature of the SC circuit 100. Such thermalization arrangements or quasiparticle traps may be implemented as metallic regions that typically have a high volume. For example, the contact pads 122 and 124 and / or the signal strip 102 may be at least partly coated with a thick (e.g., of the order of microns) normal or SC metal layer that has high e-p coupling, such as gold, platinum, silver, copper, etc. This is mainly relevant only if the signal strip 102 and the ground plane 104 are made of superconductors (if they are metals, there will be reasonably high thermalization or quasiparticle relaxation). In case of using the SC metal layer, its critical temperature should be lower than that of the SC element 110.

[0055] FIG. 5 shows a schematic top view of an SC circuit 500 according to a second exemplary embodiment. Like the SC circuit 100, the SC circuit 500 comprises a CPW which however comprises four signal strips 502-1, 502-2, 502- 3, 502-4 and a ground plane 504 provided on either side of each of the signal strips 502-1, 502-2, 502-3, 502-4. The signal strips 502-1, 502-2, 502-3, 502-4 and the ground plane 504 are assumed to be provided on a dielectric substrate (not shown in FIG. 5) like the one shown in FIG. IB. In other embodiments, the CPW may be replaced with any other planar transmission line (e.g., a microstrip or stripline), or no planar transmission line may be used in the SC circuit 500.

[0056] The SC circuit 500 further comprises three SC elements 506-1, 506- 2, 506-3, by which the signal strips 502-1, 502-2, 502-3, 502-4 are interconnected. More specifically, the SC element 506-1 interconnects the signal strips 502-1 and 502-2, the SC element 506-2 interconnects the signal strips 502-2 and 502-3, and the SC element 506-3 interconnects the signal strips 502-2 and 502-4. Each of the signal strips 502-1, 502-2, 502-3, 502-4 may be made of the same material as the signal strip 102, and the ground plane 504 may be made of the same material as the ground plane 104. Each of the SC elements 506-1, 506-2, 506-3 may be made of the same material as the SC element 110, as well as may be implemented as an SC nanowire like the SC element 110. In some other embodiments, each of the SC elements 506-1, 506-2, 506-3 may be implemented as one or more SC nanowires or JJs. The SC circuit 500 further comprises four transistor switches 508-1, 508-2, 508-3, 508-4, each of which is assumed to be embedded in the dielectric substrate of the CPW in a similar manner as the transistor switch 112. Moreover, each of the transistor switches 508-1, 508-2, 508-3, 508-4 may also be implemented as a FET, a bipolar transistor, a superconducting transistor, or any combination thereof. For convenience in operation, there may be a set 510 of contact pads each coupled to one of the transistor switches 508-1, 508-2, 508-3, 508-4 (e.g., if the transistor switches 508-1, 508-2, 508-3, 508-4 are implemented as FETs, each of the contact pads may be coupled to the gate of the corresponding FET), and control signals may be fed to the transistor switches 508-1, 508-2, 508- 3, 508-4 through the contact pads.

[0057] The SC circuit 500 may optionally comprise other contact pads 512- 1, 512-2, 512-3, 512-4 which are coupled to the signal strips 502-1, 502-2, 502-3, 502-4, respectively. These contact pads may be used to couple the SC circuit 500 to similar SC circuits or other signal processing circuits (e.g., logic circuits). Again, the triangular shape of the contact pads 512-1, 512-2, 512-3, 512-4 are shown for illustrative purposes only and should not be construed as any limitation of the present disclosure; in some other embodiments, the contact pads 512-1, 512-2, 512-3, 512-4 may have any polygonal shape (e.g., square, rectangular, rhomboid, etc.) or any curved shape (e.g., circular, oval, etc.). In some other embodiments, one of the contact pads 512-1, 512-2, 512-3, 512-4 may be replaced with a built- in signal generator configured to generate a radio signal at the cryogenic temperatures.

[0058] The operational principle of the SC circuit 500 is similar to that of the SC circuit 100. For example, if a radio signal is fed to the element 506-1 through the contact pad 512-1, and assuming that the transistor switches 508-1, 508-2 are in the first (i.e., open) state and the transistor switches 508-3, 508-4 are in the second (i.e., closed) state, resulting in scenario (i) (i.e., the electrical bias across each of the transistor switches 508-3, 508-4 causes them to be resistive again), the radio signal will propagate through the SC element 506-1 towards the contact pad 512-2. Thus, by properly opening and closing the transistor switches 508-1, 508-2, 508-3, 508-4, one may direct the radio signal in one of the four directions or fully block its propagation (if the above-indicated second electrical bias is provided across each of the transistor switches 508-1, 508-2, 508-3, 508- 4). In other word, with proper component / geometry selection, the SC circuit 500 may function as a splitter.

[0059] FIG. 6 shows a schematic top view of an SC circuit 600 according to a third exemplary embodiment. The SC circuit 600 comprises two parts 602 and 604, where the part 604 is obtained by cutting off from the SC circuit 500 everything to the left of the line A-A* in FIG. 5, while the part 602 is obtained by mirroring everything left to the right of the line A-A* in FIG. 5 relative to the line A-A* itself (except for the transistor switch 508-2). The operational principle of the SC circuit 600 is similar to those of the SC circuits 100 and 500.

[0060] FIG. 7 shows a schematic block diagram of a signal processing unit 700 according to one exemplary embodiment. The signal processing unit 700 comprises the SC circuit 500 and a control subunit 702 configured to generate and feed control signals to the transistor switches 508-1, 508-2, 508-3, 508-4 through the set 510 of contact pads, thereby causing each of the transistor switches 508- 1, 508-2, 508-3, 508-4 to operate either in the first state or the second state. The control subunit 702 may be implemented as a CPU, general-purpose processor, memristor, neuromorphic computing chip, Artificial Intelligence (Al) chip (also referred to as Al hardware), single-purpose processor, microcontroller, microprocessor, application specific integrated circuit (ASIC), field programmable gate array (FPGA), digital signal processor (DSP), complex programmable logic device, etc. It should be also noted that the control subunit 702 may be implemented as any combination of one or more of the aforesaid. As an example, the control subunit 702 may be a combination of four microcontrollers each configured to feed a control signal to one of the transistor switches 508-1, 508-2, 508-3, 508-4 through corresponding one contact pad of the set 510 of contact pads. In other embodiments, the signal processing unit 700 may comprise more than one SC circuit 500 or may comprise the SC circuit 100 and / or the SC circuit 600 in addition to or instead of the SC circuit 500.

[0061] Although the exemplary embodiments of the present disclosure are described herein, it should be noted that various changes and modifications could be made in these embodiments, without departing from the scope of legal protection which is defined by the appended claims. In the appended claims, the word "comprising" does not exclude other elements or operations, and the indefinite article "a" or "an" does not exclude a plurality. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.

Claims

CLAIMS1. A superconducting (SC) circuit comprising: an SC element comprising a first port and a second port, the SC element having a tunable kinetic inductance; a transistor switch coupled to the first port of the SC element, the transistor switch being configured to switch between a first state and a second state depending on an applied control signal; and an electronic component coupled to the second port of the SC element; wherein, when the SC element is in an SC state and the transistor switch is in the first state, the transistor switch and the electronic component are configured to provide, for the SC element, a first electrical bias which causes the SC element to pass a radio signal fed to one of the first port and second port of the SC element; and wherein, when the SC element is in the SC state and the transistor switch is in the second state, the transistor switch and the electronic component are configured to provide, for the SC element: a second electrical bias which causes the SC element to go from the SC state to a normal state, thereby preventing the radio signal from passing through the SC element; or a third electrical bias which causes the SC element to change the kinetic inductance to a target value but remain in the SC state and pass or prevent the radio signal from passing through the SC element depending on the target value of the kinetic inductance.

2. The SC circuit of claim 1, further comprising a planar transmission line comprising a dielectric substrate and a signal strip extending on or through the dielectric substrate, and wherein the SC element is embedded in the signal strip.

3. The SC circuit of claim 2, wherein the signal strip is at least partly coated with a normal metal layer or an SC metal layer having a critical temperature lower than a critical temperature of the SC element.

4. The SC circuit of claim 2 or 3, wherein the signal strip has two ends each coupled to a different contact pad, each of the contact pads being at least partly coated with a normal metal layer or an SC metal layer having a critical temperature lower than a critical temperature of the SC element.

5. The SC circuit of any one of claims 2 to 4, wherein the planar transmission line is one of a coplanar waveguide, a microstrip, and a stripline.

6. The SC circuit of any one of claims 2 to 5, further comprising at least one impedance matching element embedded in the planar transmission line, the at least one impedance matching element being configured to provide impedance matching between the planar transmission line and the SC element.

7. The SC circuit of any one of claims 1 to 6, wherein the transistor switch comprises at least one of a field-effect transistor (FET), a metal-oxide- semiconductor FET, a ferroelectric FET, a bipolar transistor, and a superconducting transistor.

8. The SC circuit of any one of claims 1 to 7, wherein the SC element comprises at least one SC nanowire or at least one Josephson Junction (JJ).

9. The SC circuit of claim 8, wherein each of the at least one SC nanowire is shaped as a meander.

10. The SC circuit of claim 8 or 9, wherein the at least one SC nanowire comprises an array of serial or parallel SC nanowires embedded in the SC signal strip.

11. The SC circuit of claim 10, wherein each SC nanowire of the array of parallel SC nanowires has a different cross-section.

12. The SC circuit of claim 8, wherein the at least one JJ comprises an array of serial or parallel JJs embedded in the SC signal strip.

13. The SC circuit of any one of claims 1 to 12, wherein the electronic component comprises at least one of: a voltage source, a current source, a diode, another transistor switch, a resistor, a capacitor, and an inductive isolator.

14. The SC circuit of any one of claims 1 to 13, wherein the SC element has a first electrical impedance in a first direction from the first port to the second port and a second electrical impedance in a second direction from the second port to the first port, and wherein the first electrical impedance and the second electrical impedance are selected such that, in case of the first electrical bias or the third electrical bias, the SC element is configured to pass the radio signal in the first direction and prevent the radio signal from going back in the second direction, or the SC element is configured to pass the radio signal in the second direction and prevent the radio signal from going back in the first direction.

15. A signal processing unit comprising:at least one superconducting (SC) circuit according to any one of claims 1 to 14; and a control subunit configured to generate and feed the control signal to the transistor switch of each of the at least one SC circuit, thereby causing the transistor switch to operate either in the first state or the second state.

16. The unit of claim 15, wherein, when each of the at least one SC circuit comprises the planar transmission line, the unit further comprises a signal generator coupled to the planar transmission line in each of the at least one SC circuit, the signal generator being configured to generate the radio signal.

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