Method for producing an optoelectronic component, panel and optoelectronic component
The method addresses the challenge of contaminating bond pads during DBR application in optoelectronic component production by forming the DBR layer on the encapsulation and wavelength conversion layers, resulting in improved component quality and wire bond connections.
Patent Information
- Application Number
- PCT/EP2024/070720
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-09-19
- Filing Date
- 2024-07-22
- Publication Date
- 2025-03-27
AI Technical Summary
Existing methods for producing optoelectronic components often risk contaminating bond pads during the application of Distributed Bragg Reflectors (DBR), which can impede the quality of wire bond connections.
A method for producing optoelectronic components that involves forming a DBR layer on the top side of the encapsulation layer and on the top sides of the wavelength conversion layers, ensuring that the bond pads remain uncontaminated and reducing the risk of impeding wire bond connections.
This method allows for a simple and effective application of the DBR layer, enhancing the quality of the optoelectronic components by maintaining the integrity of the wire bond connections and providing improved color-over-angle properties.
Smart Images

Figure EP2024070720_27032025_PF_FP_ABST
Abstract
Description
[0001] METHOD FOR PRODUCING AN OPTOELECTRONIC COMPONENT , PANEL AND OPTOELECTRONIC COMPONENT
[0002] DESCRIPTION
[0003] The present invention relates to a method for producing an optoelectronic component , to a panel and to an optoelectronic component .
[0004] This patent application claims the priority of German patent application 10 2023 125 378 . 6 , the disclosure content of which is hereby incorporated by reference .
[0005] It is known in the state of the art to provide optoelectronic components with wavelength conversion layers .
[0006] Distributed Bragg Reflectors ( DBR) are known in the state of the art .
[0007] It is an obj ect of the present invention to provide a method for producing an optoelectronic component . It is a further obj ect of the present invention to provide a panel . It is a further obj ect of the present invention to provide an optoelectronic component . These obj ectives are achieved by a method for producing an optoelectronic component , by a panel and by an optoelectronic component according to the independent claims . Various variants are disclosed in the dependent claims .
[0008] A method for producing an optoelectronic component comprises providing a panel having a substrate and an encapsulation layer arranged on a top side of the substrate . The panel comprises a plurality of component sections . Each component section comprises a section of the substrate , an optoelectronic semiconductor chip arranged on a top side of the section of the substrate , a wavelength conversion layer arranged on a top side of the optoelectronic semiconductor chip and a section of the encapsulation layer embedding the optoelectronic semiconductor chip and the wavelength conversion layer . Top sides of the wavelength conversion layers are at least partly not covered by the encapsulation layer . The method further comprises forming a DBR layer on a top side of the encapsulation layer and on the top sides of the wavelength conversion layers and separating the component sections to obtain a plurality of optoelectronic components .
[0009] This method allows for a simple application of the DBR layer . Since the DBR layer is arranged on the top side of the encapsulation layer and on the top sides of the wavelength conversion layers , there is no risk of contaminating bond pads during the forming of the DBR layer . Advantageously, this reduces a risk of impeding the quality of a wire bond connection .
[0010] In a variant of the method, the top sides of the wavelength conversion layers and the top side of the encapsulation layer are flush . Advantageously, this results in an optoelectronic component having a smooth and flat upper surface .
[0011] In a variant of the method, the substrate is a ceramic substrate . Advantageously, this allows for an ef fective removal of heat generated in the optoelectronic semiconductor chips of the optoelectronic components .
[0012] In a variant of the method, in each component section, the optoelectronic semiconductor chip is arranged on a metallisation layer arranged on the top side of the section of the substrate . The metallisation layer can provide an electrical connection to the optoelectronic semiconductor chip .
[0013] In a variant of the method, the wavelength conversion layer comprises wavelength conversion particles embedded in a matrix material . The wavelength conversion particles can be provided to convert at least a part of light emitted by the optoelectronic semiconductor chip into light having a di f ferent wavelength . In a variant of the method, the matrix material comprises polysiloxane . Advantageously, this allows to apply the wavelength conversion layer by doctor blading, for example .
[0014] In another variant of the method, the matrix material comprises a ceramic material . Advantageously, this allows for an effective removal of heat generated in the wavelength conversion layer .
[0015] In a variant of the method, in each component section, electric contact pads are arranged on a lower side of the section of the substrate . These contact pads may allow to electrically connect the optoelectronic components that are produced by this method .
[0016] In a variant of the method, the encapsulation layer comprises a silicone or an epoxy . Advantageously, this allows for the creation of a durable encapsulation layer .
[0017] In a variant of the method, the DBR layer is formed without using a resist . Advantageously, this allows for a s imple forming of the DBR layer without involving a risk o f contaminating parts of the optoelectronic component with remains of the resist .
[0018] In a variant of the method, the DBR layer is formed without etching . Advantageously, this allows for a simple forming of the DBR layer without involving a risk of damaging parts of the optoelectronic component in an etching step .
[0019] In a variant of the method, the component sections are separated by saw dicing . Advantageously, this provides a reliable method for separating the component sections to obtain the optoelectronic components .
[0020] A panel has a substrate and an encapsulation layer arranged on a top side of the substrate . The panel comprises a plurality of component sections . Each component section comprises a section of the substrate , an optoelectronic semiconductor chip arranged on a top side of the section of the substrate , a wavelength conversion layer arranged on a top side of the optoelectronic semiconductor chip and a section of the encapsulation layer embedding the optoelectronic semiconductor chip and the wavelength conversion layer . Top sides of the wavelength conversion layers are at least partly not covered by the encapsulation layer . A DBR layer is arranged on a top side of the encapsulation layer and on the top sides of the wavelength conversion layers .
[0021] The component sections of this panel may be separated to obtain a plurality of optoelectronic components . The DBR layer arranged on the top side of the encapsulation layer and on the top side of the wavelength conversion layer of each optoelectronic component may improve a colour-over-angle property of the optoelectronic component .
[0022] An optoelectronic component comprises a substrate , an optoelectronic semiconductor chip arranged on a top side of the substrate , a wavelength conversion layer arranged on a top side of the optoelectronic semiconductor chip and an encapsulation layer arranged on the top side of the substrate and embedding the optoelectronic semiconductor chip and the wavelength conversion layer . A top side of the wavelength conversion layer is at least partly not covered by the encapsulation layer . A DBR layer is arranged on the top side of the wavelength conversion layer and on a top side of the encapsulation layer .
[0023] The above-described properties , features , and advantages of the invention as well as the way in which they are achieved, will become more clearly and comprehensively understandable in connection with the following description of exemplary embodiments , which will be explained in more detail in connection with the drawings , in which, in schematic representation : Fig . 1 shows a sectional view of a first variant of a panel ; and
[0024] Fig . 2 shows a second variant of the panel .
[0025] Fig . 1 shows a schematic sectional view of a part o f a panel 100 . The panel 100 is an intermediate product in the production of optoelectronic components 10 . The panel 100 comprises a plurality of component sections 110 that are arranged in a regular two-dimensional pattern . Fig . 1 shows only two component sections 110 but the number of component sections 110 may be higher . In a later process step, the component sections 110 will be separated to singulate the optoelectronic components 10 .
[0026] The panel 100 comprises a flat substrate 200 having a top side 201 and a lower side 202 that is opposed to the top side 201 . The substrates 200 may be a ceramic substrate , for example . Each component section 110 of the panel 100 comprises a section 210 of the substrate 200 . Each section 210 comprises a top side 211 formed by a part of the top side 201 of the substrate 200 and a lower side 212 formed by a part of the lower side 202 of the substrate 200 .
[0027] A metallisation layer 220 is arranged on the top side 201 of the substrate 200 . The metallisation layer 220 may be structured such that one or more independent metallisation sections are arranged on the top side 211 of each section 210 of the substrate 200 . The depiction of Fig . 1 shows one metallisation section of the metallisation layer 220 arranged on the top side 211 of each section 210 of the substrate 200 but there may be more than one such metallisation section per section 210 of the substrate 200 .
[0028] Electric contact pads 230 are arranged on the lower side 202 of the substrate 200 . In the example depicted in Fig . 1 , the lower side 212 of each section 210 of the substrate 200 comprises two electric contact pads 230 . However, there may be fewer or more than two electric contact pads 230 per component section 110 of the panel 100 .
[0029] The substrate 200 provides electrically conductive connections between the sections of the metallisation layer 220 and the electric contact pads 230 of each section 210 o f the substrate 200 .
[0030] Each component section 110 of the panel 100 comprises an optoelectronic semiconductor chip 400 arranged on the top side 211 of the respective section 210 of the substrate 200 . Each optoelectronic semiconductor chip 400 comprises a top side 401 and a lower side 402 that is opposed to the top side 401 . The optoelectronic semiconductor chips 400 are arranged such that their lower sides 402 are oriented towards the top side 201 of the substrate 200 . The top sides 401 of the optoelectronic semiconductor chips 400 face away from the substrate 200 .
[0031] Each optoelectronic semiconductor chip 400 comprises at least two electrical contacts which can be used to provide electric voltage and electric current to the optoelectronic semiconductor chips 400 . In the example depicted in Fig . 1 , one electric contact is arranged on the lower side 402 and one electric contact is arranged on the top side 401 of each optoelectronic semiconductor chip 400 .
[0032] The optoelectronic semiconductor chips 400 are arranged on the metallisation layer 220 such that the electric contact arranged on the lower side 402 of the respective optoelectronic semiconductor chip 400 is electrically connected to a first metallisation section of the metallisation layer 220 of the respective component section 110 . The electric contact pad arranged on the top side 401 of each optoelectronic semiconductor chip 400 is electrically connected to a second metallisation section of the metallisation layer 220 o f the respective component section 110 via a bond wire . Thi s is not visible in the sectional view of Fig . 1 . In alternative variants , both electric contacts of the optoelectronic semiconductor chips 400 are arranged on their lower sides 402 . In these variants , the optoelectronic semiconductor chips 400 may each be arranged on two metallisation sections of the metallisation layer 220 of the respective component section 110 , such that the two electric contacts are electrically connected to the two metallisation sections .
[0033] In other variants , both electric contact pads of the optoelectronic semiconductor chips 400 may be arranged on their top sides 401 . In these variants , both electric contacts may be connected to metallisation sections of the metal lisation layer 220 via bond wires . In these variants , the optoelectronic semiconductor chips 400 may be arranged on sections of the metallisation layer 220 or directly on the top side 211 of the respective section 210 of the substrate 200 .
[0034] The optoelectronic semiconductor chips 400 are designed to emit light at their top sides 401 . The optoelectronic semiconductor chips 400 may be light-emitting diode chips ( LEDs ) , for example .
[0035] Each component section 110 comprises a wavelength conversion layer 500 arranged on the top side 401 of the respective optoelectronic semiconductor chip 400 . In case that the optoelectronic semiconductor chip 400 comprises an electric contact at its top side 401 , the wavelength conversion layer 500 may be arranged such that the electric contact is not covered by the wavelength conversion layer 500 . Each wavelength conversion layer 500 comprises a top side 501 and a lower side 502 that is opposed to the top side 501 . The wavelength conversion layers 500 are arranged on the top sides 401 of the optoelectronic semiconductor chips 400 such that the lower sides 502 of the wavelength conversion layers 500 are oriented towards the top sides 401 of the optoelectronic semiconductor chips 400 . The wavelength conversion layers 500 are designed to convert at least parts of light generated by the optoelectronic semiconductor chips 400 into light of a di f ferent wavelength . To this end, the wavelength conversion layers 500 comprise wavelength conversion particles 520 embedded in a matrix material 510 . In the variant depicted in Fig . 1 , the matrix material 510 may be a polysiloxane , for example .
[0036] An encapsulation layer 300 is arranged on the top s ide 201 of the substrate 200 . The encapsulation layer 300 may comprise a silicone or an epoxy, for example . Each component section 110 of the panel 100 comprises a section 310 of the encapsulation layer 300 . The section 310 of the encapsulation layer 300 embeds the optoelectronic semiconductor chip 400 and the wavelength conversion layer 500 of the respective component section 110 .
[0037] The top sides 501 of the wavelength conversion layers 500 are at least partly not covered by the encapsulation layer 300 . The top sides 501 of the wavelength conversion layers 500 and a top side 301 of the encapsulation layer 300 may be approximately flush, for example . A lower side 302 of the encapsulation layer 300 is in contact with the top side 201 of the substrate 200 .
[0038] A DBR layer 600 is formed on the top side 301 of the encapsulation layer 300 and the top sides 501 of the wavelength conversion layers 500 . The DBR layer 600 forms a Distributed Bragg Reflector ( DBR) and may comprise a plurality of layers of di f ferent materials , as it is known to a person of skill in the art . The DBR layer 600 may be designed to re flect at least parts of light that has been emitted by the optoelectronic semiconductor chips 400 or parts of light that has been converted by the wavelength conversion layers 500 .
[0039] The DBR layer 600 can be formed on the top side 301 of the encapsulation layer 300 and on the top sides 501 of the wavelength conversion layers 500 using a known deposition pro- cess . It may not be necessary to use a resist or to use etching processes to fabricate the DBR layer 600 .
[0040] Each component section 110 of the panel 100 comprises a section 610 of the DBR layer 600 .
[0041] In a process step that follows the depiction of Fig . 1 , the component sections 110 of the panel 100 are separated to sin- gulate the plurality of optoelectronic components 10 . The component sections 110 may be separated by saw dicing, for example .
[0042] Each singulated optoelectronic component 10 comprises one of the component sections 110 including the respective section 610 of the substrate 200 , the respective optoelectronic semiconductor chip 400 arranged on the top side 211 of the section 210 of the substrate 200 , the respective wavelength conversion layer 500 arranged on the top side 401 of the respective optoelectronic semiconductor chip 400 , and the respective section 310 of the encapsulation layer 300 arranged on the top side 211 of the section 210 of the substrate 200 and embedding the respective optoelectronic semiconductor chip 400 and the wavelength conversion layer 500 . The top side 501 of the respective wavelength conversion layer 500 i s at least partly not covered by the section 310 of the encapsulation layer 300 . A respective section 610 of the DBR layer 600 is arranged on the top side 501 of the wavelength conversion layer 500 and on the top side 301 of the respective section 310 of the encapsulation layer 300 .
[0043] Fig . 2 shows a schematic sectional view of another variant of the panel 100 . This variant of the panel 100 is similar to the variant of the panel 100 shown in Fig . 1 , except for the dif ferences described in the following . Otherwise , the description of the panel 100 given above with respect to Fig . 1 and the description of the method for producing the optoelec- tronic components 10 given above with respect to Fig . l also apply to the variant shown in Fig . 2 .
[0044] In the example depicted in Fig . 2 , the matrix material 510 of the wavelength conversion layers 500 may comprise a ceramic material . In this variant , the wavelength conversion layers 500 are attached to the top sides 401 of the optoelectronic semiconductor chips 400 using an adhesive layer 530 . The invention has been illustrated and described in more detail with the aid of exemplary variants . The invention is not , however, restricted to the examples disclosed . Rather, other variants may be derived therefrom by the person skilled in the art .
[0045] REFERENCE SYMBOLS optoelectronic component panel component section substrate top side lower side section top side lower side metallisation layer electric contact pad encapsulation layer top side lower side section optoelectronic semiconductor chip top side lower side wavelength conversion layer top side lower side matrix material wavelength conversion particles adhesive layer
[0046] DBR layer section
Claims
CLAIMS1. A method for producing an optoelectronic component (10) comprising- providing a panel (100) having a substrate (200) and an encapsulation layer (300) arranged on a top side (201) of the substrate (200) , wherein the panel (100) comprises a plurality of component sections (110) , wherein each component section (110) comprises a section (210) of the substrate (200) , an optoelectronic semiconductor chip (400) arranged on a top side (211) of the section (210) of the substrate (200) , a wavelength conversion layer (500) arranged on a top side (401) of the optoelectronic semiconductor chip (400) and a section (310) of the encapsulation layer (300) embedding the optoelectronic semiconductor chip (400) and the wavelength conversion layer (500) , wherein top sides (501) of the wavelength conversion layers (500) are at least partly not covered by the encapsulation layer (300) ;- forming a DBR layer (600) on a top side (301) of the encapsulation layer (300) and on the top sides (501) of the wavelength conversion layers (500) ;- separating the component sections (110) to obtain a plurality of optoelectronic components (10) .
2. The method according to claim 1, wherein the top sides (501) of the wavelength conversion layers (500) and the top side (301) of the encapsulation layer (300) are flush.
3. The method according to one of the previous claims, wherein the substrate (200) is a ceramic substrate.
4. The method according to one of the previous claims, wherein in each component section (110) , the optoelectronic semiconductor chip (400) is arranged on a metalli-sation layer (220) arranged on the top side (211) of the section (210) of the substrate (200) .
5. The method according to one of the previous claims, wherein the wavelength conversion layer (500) comprises wavelength conversion particles (520) embedded in a matrix material (510) .
6. The method according to claim 5, wherein the matrix material (510) comprises polysiloxane.
7. The method according to claim 5, wherein the matrix material (510) comprises a ceramic material .
8. The method according to one of the previous claims, wherein in each component section (110) , electric contact pads (230) are arranged on a lower side (212) of the section (210) of the substrate (200) .
9. The method according to one of the previous claims, wherein the encapsulation layer (300) comprises a silicone or an epoxy.
10. The method according to one of the previous claims, wherein the DBR layer (600) is formed without using a resist.
11. The method according to one of the previous claims, wherein the DBR layer (600) is formed without etching.
12. The method according to one of the previous claims, wherein the component sections (110) are separated by saw dicing .13.A panel (100) having a substrate (200) and an encapsulation layer (300) arranged on a top side (201) of the substrate (200) ,wherein the panel (100) comprises a plurality of component sections (110) , wherein each component section (110) comprises a section (210) of the substrate (200) , an optoelectronic semiconductor chip (400) arranged on a top side (211) of the section (210) of the substrate (200) , a wavelength conversion layer (500) arranged on a top side (401) of the optoelectronic semiconductor chip (400) and a section (310) of the encapsulation layer (300) embedding the optoelectronic semiconductor chip (400) and the wavelength conversion layer (500) , wherein top sides (501) of the wavelength conversion layers (500) are at least partly not covered by the encapsulation layer (300) , wherein a DBR layer (600) is arranged on a top side (301) of the encapsulation layer (300) and on the top sides (501) of the wavelength conversion layers (500) .
14. An optoelectronic component (10) comprising a substrate (200) , an optoelectronic semiconductor chip (400) arranged on a top side (211) of the substrate (200) , a wavelength conversion layer (500) arranged on a top side (401) of the optoelectronic semiconductor chip (400) and an encapsulation layer (300) arranged on the top side (211) of the substrate (200) and embedding the optoelectronic semiconductor chip (400) and the wavelength conversion layer (500) , wherein a top side (501) of the wavelength conversion layer (500) is at least partly not covered by the encapsulation layer (300) , wherein a DBR layer (600) is arranged on the top side (501) of the wavelength conversion layer (500) and on a top side (301) of the encapsulation layer (300) .
Citation Information
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