Semiconductor drive device

Abstract

This semiconductor drive device comprises: gate drive circuits which output drive signals to gate terminals of respective semiconductor elements constituting upper and lower arms of an inverter circuit; and source potential change circuits which change the source potentials of the respective semiconductor elements. When switching the semiconductor element of one arm among the upper and lower arms from an off state to an on state, the source potential change circuit changes the source potential of the semiconductor element of the other arm. A first potential which is the source potential of the semiconductor element of the other arm when switching the semiconductor element of the one arm from the off state to the on state is set higher than a second potential which is the source potential of the semiconductor element of the other arm before switching the semiconductor element of the one arm to the on state.

Description

Semiconductor drive device

[0001] The present invention relates to a semiconductor driving device.

[0002] Inverter circuits configured with semiconductor elements in upper and lower arms require faster switching speeds and lower loss during switching of the semiconductor elements. Generally, when a semiconductor element in one of the upper and lower arms is switched from an off state to an on state, a recovery surge voltage occurs in the semiconductor element in the opposing arm. If a high gate resistor is placed on the gate side of the semiconductor element to suppress this recovery surge voltage, it will cause a decrease in the switching speed of the semiconductor element. Furthermore, the recovery surge voltage will lead to switching loss in the semiconductor element. For this reason, there is a demand for faster switching speeds while suppressing surge voltages within an allowable voltage range.

[0003] Patent Document 1 discloses a technology in which a semiconductor device has an inverter circuit having upper and lower arm switch elements, a drive circuit, and a control circuit, the drive circuit having a circuit for driving the gate electrode of the switch element to a source potential and a circuit for driving the gate electrode of the switch element to a negative potential, a capacitor is connected in series between the output node of the circuit for driving to a negative potential and the switch element, and the control circuit controls the voltage of the gate electrode of the switch element so that it is the same as the source potential immediately before the switch element changes from an off state to an on state.

[0004] Japanese Patent Application Publication No. 2012-249399

[0005] The technique described in Patent Document 1 cannot suppress the recovery surge voltage of the semiconductor element of one of the upper and lower arms when the semiconductor element of the opposing arm is switched from the off state to the on state.

[0006] A semiconductor drive device according to the present invention comprises a gate drive circuit that outputs drive signals to the gate terminals of each semiconductor element that constitutes the upper and lower arms of an inverter circuit, and a source potential change circuit that changes the source potential of each of the semiconductor elements, wherein when the semiconductor element of one of the upper and lower arms is switched from an off state to an on state, the source potential change circuit changes the source potential of the semiconductor element of the other arm, and a first potential that is the source potential of the semiconductor element of the other arm when the semiconductor element of the one arm is switched from an off state to an on state is set higher than a second potential that is the source potential of the semiconductor element of the other arm before the semiconductor element of the one arm is switched to the on state.

[0007] According to the present invention, when the semiconductor element of one of the upper and lower arms is switched from the OFF state to the ON state, the recovery surge voltage of the semiconductor element of the opposing arm can be suppressed.

[0008] 1 is a circuit diagram showing a semiconductor driving device according to a first embodiment. FIG. 2 is a circuit diagram showing a gate driving circuit according to the first embodiment. FIG. 3 is a circuit diagram showing a source potential changing circuit according to the first embodiment. FIG. 4 is a time chart showing when a semiconductor element of the semiconductor driving device is turned on. FIG. 5 is a time chart showing when a semiconductor element of the semiconductor driving device is turned off. FIG. 6 is a graph showing switching loss when a semiconductor element is turned on. FIG. 7 is a circuit diagram showing a semiconductor driving device according to a second embodiment. FIG. 8 is a circuit diagram showing a first potential variable circuit according to the second embodiment. FIG. 9 is a graph showing an example of changing a first potential according to the current of a semiconductor element. FIG. 10 is a graph showing an example of changing a first potential according to the temperature of a semiconductor element. FIG. 11 is a graph showing an example of changing a first potential according to the voltage of a semiconductor element. FIG. 12 is a circuit diagram showing a semiconductor driving device according to a third embodiment. FIG. 13 is a circuit diagram showing a potential difference suppression circuit according to the third embodiment. 10A to 10C are time charts showing the turning-on of a semiconductor element of a semiconductor driving device according to a third embodiment.

[0009] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. The following description and drawings are examples for explaining the present invention, and some omissions and simplifications have been made as appropriate for clarity of explanation. The present invention can be implemented in various other forms. Unless otherwise specified, each component may be singular or plural.

[0010] In order to facilitate understanding of the invention, the position, size, shape, range, etc. of each component shown in the drawings may not represent the actual position, size, shape, range, etc. Therefore, the present invention is not necessarily limited to the position, size, shape, range, etc. disclosed in the drawings.

[0011] 1 is a circuit diagram showing a semiconductor drive device 100 according to a first embodiment of the present invention, illustrating an example in which the semiconductor drive device 100 is applied to part of an inverter circuit. The semiconductor drive device 100 includes gate drive circuits 11 and 21 and source potential change circuits 12 and 22. The inverter circuit includes semiconductor elements T1 and T2 that form upper and lower arms for one phase.

[0012] The upper arm semiconductor element T2 and the lower arm semiconductor element T1 are power semiconductor elements such as IGBTs, Si-MOSFETs, and GaN-HEMTs. Note that Fig. 1 shows an example in which MOSFETs are used for the semiconductor elements T1 and T2. When the semiconductor elements T1 and T2 are MOSFETs, freewheeling diodes (freewheeling diodes) are connected in antiparallel.

[0013] The inverter circuit drives, for example, an electric motor mounted on an electric vehicle. The electric motor has a three-phase coil, and the inverter circuit has upper and lower arms for three phases to apply a predetermined current pattern to the three-phase coil. Figure 1 shows the upper and lower arms for one phase.

[0014] The semiconductor elements T1 and T2 are provided with a high-voltage side terminal for the main circuit (a collector terminal for an IGBT, or drain terminals D11 and D21 for a MOSFET), a low-voltage side terminal for the main circuit (an emitter terminal for an IGBT, or source terminals S11 and S21 for a MOSFET), and a control terminal (gate terminals G11 and G21).

[0015] The main circuit high-voltage side terminal on the upper arm side is connected to the positive terminal of a DC voltage source 2 such as a battery via a positive wiring. The main circuit low-voltage side terminal on the lower arm side is connected to the negative terminal of DC voltage source 2 via a negative wiring. The main circuit low-voltage side terminal (source terminal S21) of semiconductor element T2 and the main circuit high-voltage side terminal (drain terminal D11) of semiconductor element T1 are connected, and this connection point serves as an output terminal, which is connected to a load 3. The load 3 is, for example, one phase of a winding of an electric motor.

[0016] 1 shows an example in which both ends of the upper and lower arms are connected to positive and negative wiring from a DC voltage source 2. However, a DC or AC voltage source and a power supply circuit that converts the voltage from this voltage source into a predetermined DC voltage may be provided, and both ends of the upper and lower arms may be connected to positive and negative wiring that are outputs from this power supply circuit. Furthermore, smoothing capacitors may be connected between the positive and negative wiring from the DC voltage source 2 and between the positive and negative wiring from the power supply circuit.

[0017] The gate terminal G11 and source terminal S11 of the semiconductor element T1 are connected to a gate drive circuit 11 that outputs a drive signal to the semiconductor element T1. The gate terminal G21 and source terminal S21 of the semiconductor element T2 are connected to a gate drive circuit 21 that outputs a drive signal to the semiconductor element T2.

[0018] The gate drive circuits 11, 21 are connected to a control circuit 4. The control circuit 4 is configured with, for example, a microcomputer. The control circuit 4 outputs control signals C11, C21 to the gate drive circuits 11, 21 based on drive commands input from a higher-level control device (not shown), and individually controls the on / off of the semiconductor elements T1, T2. As a result, the DC power of the DC voltage source 2 is converted into AC power, which is output to a load 3 such as a motor. The gate drive circuits 11, 21 will be described in detail later, but voltage detection signals Va, Vb (see FIG. 2) are input to the control circuit 4 from the gate drive circuits 11, 21.

[0019] The source terminal S11 of the semiconductor element T1 is connected to a source potential changing circuit 12, and the source terminal S21 of the semiconductor element T2 is connected to a source potential changing circuit 22. The source potential changing circuits 12 and 22 will be described in detail later, but they change the source potential in response to control signals C11 and C12 from the control circuit 4. Specifically, when the semiconductor element of one of the upper and lower arms is switched from the off state to the on state, the source potential of the semiconductor element of the other arm is changed to a higher potential.

[0020] 2 is a circuit configuration diagram of the gate drive circuit 11 according to the first embodiment. The gate drive circuit 21 has a similar circuit configuration. The gate drive circuits in the upper and lower arms for three phases of the inverter circuit also have a similar circuit configuration.

[0021] The gate drive circuit 11 includes switching elements M1 and M2. An example will be described in which the switching element M1 is an N-type MOSFET and the switching element M2 is a P-type MOSFET.

[0022] A positive power supply V1 of the gate drive circuit 11 is connected to the source terminal S1 of the switching element M1. The positive power supply V1 is, for example, a voltage supplied from the positive wiring of the DC voltage source 2. The drain terminal D1 of the switching element M1 is connected to the gate terminal G11 of the semiconductor element T1 via a series circuit of an on-gate resistor R1 and a backflow prevention diode Di1. The output voltage of the source potential change circuit 12 is connected to the source terminal S2 of the switching element M2 and the source terminal S11 of the semiconductor element T1. The drain terminal D2 of the switching element M2 is connected to the gate terminal G11 of the semiconductor element T1 via a series circuit of an off-gate resistor R2 and a backflow prevention diode Di2. Note that the backflow prevention diodes Di1 and Di2 may be omitted. In this case, the on-gate resistor R1 and the off-gate resistor R2 are connected to the gate terminal G21.

[0023] A control signal C11 from the control circuit 4 is connected to the gate terminal G1 of the switching element M1 and the gate terminal G2 of the switching element M2. Furthermore, a comparator N1 compares the voltage at the drain terminal D1 of the switching element M1 with an on-voltage Von, and outputs a voltage detection signal Va to the control circuit 4 when the drain voltage exceeds the on-voltage Von. A comparator N2 compares the voltage at the drain terminal D2 of the switching element M2 with an off-voltage Voff, and outputs a voltage detection signal Vb to the control circuit 4 when the drain voltage drops below the off-voltage Voff. The on-voltage Von and off-voltage Voff are preset to arbitrary values ​​according to the characteristics of the switching elements M1 and M2. While the control signal C11 and the control signal C12 are output from the control circuit 4 in the illustrated example, the control signal C12 may be output from another control circuit (not shown).

[0024] 3A and 3B are circuit configuration diagrams of the source potential change circuit 12 according to the first embodiment. Fig. 3A is an example of the source potential change circuit 12, and Fig. 3B is a modified example of the source potential change circuit 12. The source potential change circuit 22 also has a similar circuit configuration. Furthermore, each of the source potential change circuits in the upper and lower arms for three phases of the inverter circuit also has a similar circuit configuration.

[0025] 3A will be described by way of example, where switching element M3 is an N-type MOSFET and switching element M4 is a P-type MOSFET. As shown in FIG. 3A, a power supply with a first potential VSS1 is connected to a source terminal S3 of switching element M3. A drain terminal D3 of switching element M3 is connected to a drain terminal D4 of switching element M4. A source terminal S4 of switching element M4 is connected to a power supply with a second potential VSS2. The connection point between the drain terminal D3 of switching element M3 and the drain terminal D4 of switching element M4 is connected to the output side of source potential change circuit 12, i.e., to the source terminal S2 of switching element M2 and the source terminal S11 of semiconductor element T1. A control signal C12 from control circuit 4 is connected to a gate terminal G3 of switching element M3 and a gate terminal G4 of switching element M4.

[0026] When a High signal is input as the control signal C12, the switching element M3 turns on and a first potential VSS1 is output to the output side. When a Low signal is input as the control signal C12, the switching element M4 turns on and a second potential VSS2 is output to the output side. The first potential VSS1 is a higher voltage than the second potential VSS2.

[0027] In the modified example shown in Figure 3(B), switching elements M3 and M4 are P-type MOSFETs. A control signal C12 is input to the gate terminal G3 of switching element M3 via a non-inverting circuit I3. A control signal C12 is input to the gate terminal G4 of switching element M4 via an inverting circuit I4. The rest of the configuration is the same as the example shown in Figure 3(A).

[0028] When a High signal is input as the control signal C12, the switching element M3 is turned on via the non-inverting circuit I3, and the first potential VSS1 is output to the output side. When a Low signal is input as the control signal C12, the switching element M4 is turned on via the inverting circuit I4, and the second potential VSS2 is output to the output side.

[0029] In this way, when the semiconductor element of one of the upper and lower arms is switched from the OFF state to the ON state, the source potential change circuit 12 changes the source potential of the semiconductor element of the other arm. Specifically, a first potential, which is the source potential of the semiconductor element of the one arm when the semiconductor element of the other arm is switched from the OFF state to the ON state, is set higher than a second potential, which is the source potential of the semiconductor element of the other arm before the semiconductor element of the one arm is switched on.

[0030] 4A to 4J are time charts showing an example of the operation of the semiconductor driving device 100. These time charts show waveforms when the semiconductor element T2 is turned on, with the solid lines indicating a case where this embodiment is applied and the dashed lines indicating a comparative example where this embodiment is not applied.

[0031] 4(A) shows a control signal C12 for changing the source voltage of the semiconductor element T1, FIG. 4(B) shows a control signal C11 for turning on the semiconductor element T2, FIG. 4(C) shows the gate-source voltage Vgs of the semiconductor element T1, FIG. 4(D) shows the gate-source voltage Vgs of the semiconductor element T2, FIG. 4(E) shows the drain-source voltage Vds of the semiconductor element T1, FIG. 4(F) shows the drain-source voltage Vds of the semiconductor element T2, FIG. 4(G) shows the drain-source current Ids of the semiconductor element T1, FIG. 4(H) shows the drain-source current Ids of the semiconductor element T2, FIG. 4(I) shows the switching loss Sw1 of the semiconductor element T1, and FIG. 4(J) shows the switching loss Sw2 of the semiconductor element T2.

[0032] The following description will be given with reference to Figures 1 to 4. At time t0, as shown in Figure 4(B), the control circuit 4 inputs a control signal C11 to the gate drive circuit 21 to switch the semiconductor element T2 from off to on. Based on this, the switching element M1 of the gate drive circuit 21, which has a configuration similar to that of the gate drive circuit 11 shown in Figure 2, turns on. Then, the gate-source capacitance of the semiconductor element T2 is charged via the positive-side power supply V1, switching element M1, diode Di1, and on-gate resistor R1, and the gate-source voltage of the semiconductor element T2 begins to increase, as shown in Figure 4(D).

[0033] 4A, a High signal is input to the source potential changing circuit 12 as the control signal C12 for changing the source voltage of the semiconductor element T1. As a result, in the source potential changing circuit 12 shown in FIG. 3A, the switching element M3 is turned on and the switching element M4 is turned off, thereby outputting the first potential VSS1. That is, the potential of the source terminal S11 of the semiconductor element T1 is changed to the first potential VSS1 which is higher than the second potential VSS2.

[0034] At time t1, when the gate-source voltage Vgs of the semiconductor element T2 exceeds the threshold voltage Vth, the drain-source current Ids of the semiconductor element T2 shown in Fig. 1 begins to increase as shown in Fig. 4(H), and the drain-source current Ids of the semiconductor element T1 begins to decrease as shown in Fig. 4(G). Also, the drain-source voltage Vds of the semiconductor element T2 shown in Fig. 1 begins to decrease as shown in Fig. 4(F).

[0035] At time t2, as shown in FIG. 4(E), the drain-source voltage Vds of the semiconductor element T1 begins to increase, followed by the generation of a recovery surge voltage. As the drain-source voltage Vds changes, the gate-source voltage Vgs of the semiconductor element T1 begins to increase, as shown in FIG. 4(C). At this time, as shown in FIG. 4(G), the drain-source current Ids of the semiconductor element T1 flows in the reverse direction depending on the value of the gate-source voltage Vgs. This current suppresses the drain-source voltage Vds of the semiconductor element T1, as shown in FIG. 4(E). In a comparative example not incorporating this embodiment, as shown in FIG. 4(C), the gate-source voltage Vgs is low at time t2, resulting in a decrease in the drain-source current Ids of the semiconductor element T1 and a large recovery surge voltage of the drain-source voltage Vds. In contrast to this, in this embodiment, as shown in FIG. 4C, the gate-source voltage Vgs is high at time t2, so the drain-source current Ids of the semiconductor element T1 is large, and the recovery surge voltage of the drain-source voltage Vds can be reduced.

[0036] At time t3, the turn-on operation of semiconductor element T2 ends, and the gate-source voltage Vgs of semiconductor element T2 begins to rise again, as shown in Fig. 4(D). At time t4, as shown in Fig. 4(D), it is detected that the gate-source voltage Vgs of semiconductor element T2 has risen and reached a desired value. Specifically, at time t4, the comparator N1 shown in Fig. 2 outputs a voltage detection signal Va to the control circuit 4 when the voltage at the drain terminal D1 of switching element M1, i.e., the gate-source voltage Vgs of semiconductor element T2, exceeds the on-voltage Von.

[0037] In response to the voltage detection signal Va, the control circuit 4 outputs a Low signal to the source potential change circuit 12 as the control signal C12 for changing the source voltage, as shown in FIG. 4A. As a result, the source potential change circuit 12 turns off the switching element M3 shown in FIG. 2 and turns on the switching element M4, thereby outputting the second potential VSS2. That is, the potential of the source terminal S11 of the semiconductor element T1 is changed to the second potential VSS2, which is lower than the first potential VSS1. Note that while the example in which the potential of the source terminal S11 of the semiconductor element T1 is changed to the second potential VSS2 has been described, the potential is not limited to the second potential VSS2, and may be changed to any potential lower than the first potential VSS1. In this way, the source potential change circuit 12 lowers the source potential of the semiconductor element of one arm after the turn-on operation of the semiconductor element of one arm is completed.

[0038] The switching loss Sw1 of the semiconductor element T1 is the integrated total of the drain-source voltage Vds and the drain-source current Ids of the semiconductor element T1, and occurs between time t2 and time t3 as shown in Fig. 4(I). On the other hand, the switching loss Sw2 of the semiconductor element T2 is the integrated total of the drain-source voltage Vds and the drain-source current Ids of the semiconductor element T2, and occurs between time t1 and time t3 as shown in Fig. 4(J).

[0039] In this way, the source potential change circuits 12, 22 change the source potential of the semiconductor element of one of the upper and lower arms when switching the semiconductor element of the other arm from the off state to the on state, and the first potential VSS1, which is the source potential of the semiconductor element of the other arm when switching the semiconductor element of one arm from the off state to the on state, is set higher than the second potential VSS2, which is the source potential of the semiconductor element of the other arm before switching the semiconductor element of the one arm to the on state.

[0040] In this embodiment, the recovery surge voltage can be reduced, thereby reducing switching loss. Specifically, the switching loss Sw2, which is the time integral value of the current Ids in the semiconductor element T2, is smaller than in the comparative example. Here, the switching loss Sw1 in the semiconductor element T1 increases, but this occurs in the latter half of the turn-on operation and is smaller than the switching loss Sw2 in the semiconductor element T2. In other words, this embodiment can reduce switching loss at turn-on more than in the comparative example.

[0041] In the comparative example, the recovery surge voltage was large, so in order to suppress the drain-source voltage of the semiconductor element T2 to an allowable voltage or less, it was necessary to increase the on-gate resistance R1 shown in FIG. 1. In this embodiment, the recovery surge voltage can be suppressed, so it is possible to reduce the on-gate resistance R1. This makes it possible to increase the switching speed of the semiconductor elements T1 and T2.

[0042] 5A to 5F are time charts showing an example of the operation of the semiconductor driving device 100. These time charts show waveforms when the semiconductor element T2 is turned off, with the solid lines indicating a case where this embodiment is applied and the dashed lines indicating a comparative example where this embodiment is not applied.

[0043] Figure 5(A) shows a control signal C12 for changing the source voltage of semiconductor element T1, Figure 5(B) shows a control signal C11 for turning off semiconductor element T2, Figure 5(C) shows the gate-source voltage Vgs of semiconductor element T1, Figure 5(D) shows the gate-source voltage Vgs of semiconductor element T2, Figure 5(E) shows the drain-source voltage Vds of semiconductor element T2, and Figure 5(F) shows the drain-source current Ids of semiconductor element T2.

[0044] 1 to 5. At time t0, as shown in FIG. 5B, the control circuit 4 inputs a control signal C11 to the gate drive circuit 21 to change the semiconductor element T2 from on to off. Based on this, the switching element M2 of the gate drive circuit 21, which has the same configuration as the gate drive circuit 11 shown in FIG. 2, turns on. Then, the gate-source capacitance of the semiconductor element T2 is discharged via the switching element M2, the diode Di2, and the off-gate resistor R2, and the gate-source voltage Vgs of the semiconductor element T2 begins to decrease, as shown in FIG. 5D.

[0045] 5A, a High signal is input as a control signal C12 for changing the source voltage of the semiconductor element T1 to the source potential change circuit 12. As a result, in the source potential change circuit 12 shown in FIG. 3A, the switching element M3 is turned on and the switching element M4 is turned off, thereby outputting the first potential VSS1.

[0046] At time t1, as shown in FIG. 5E, the drain-source voltage Vds of the semiconductor element T2 begins to decrease. Accordingly, as shown in FIG. 5C, the gate-source voltage Vgs of the semiconductor element T1 also begins to decrease. In the comparative example, a negative voltage is applied from a state in which the source potential of the semiconductor element T1 is low, which may result in an excessive negative voltage being applied to the gate-source of the semiconductor element T1, and in such a case, the gate-source voltage tolerance Vfh of the semiconductor element T1 may be exceeded. In contrast, in this embodiment, a negative voltage is applied from a state in which the source potential of the semiconductor element T1 is high, which prevents an excessive negative voltage from being applied to the gate-source voltage Vgs of the semiconductor element T1, and enables the semiconductor element T1 to operate without exceeding the gate-source voltage tolerance Vfh.

[0047] At time t2, when the drain-source voltage Vds of the semiconductor element T2 approaches the turn-off voltage as shown in Fig. 5(E), the gate-source voltage Vgs stops decreasing and then starts increasing as shown in Fig. 5(C). Also, the drain-source current Ids of the semiconductor element T2 starts increasing as shown in Fig. 5(F).

[0048] At time t3, the turn-on operation of the semiconductor element T2 is completed, and the gate-source voltage Vgs of the semiconductor element T2 further decreases as shown in Fig. 5(D), and the drain-source current Ids of the semiconductor element T2 increases as shown in Fig. 5(F).

[0049] At time t4, as shown in Fig. 5(D), it is detected that the gate-source voltage Vgs of the semiconductor element T2 has decreased to a desired value. Specifically, at time t4, the comparator N2 shown in Fig. 2 outputs a voltage detection signal Vb to the control circuit 4 when the voltage at the drain terminal D2 of the switching element M2, i.e., the gate-source voltage Vgs of the semiconductor element T2, drops below the off-voltage Voff.

[0050] In response to the voltage detection signal Vb, the control circuit 4 outputs a Low signal to the source potential change circuit 12 as the control signal C12 for changing the source voltage, as shown in FIG. 5A. This turns off the switching element M3 shown in FIG. 2 and turns on the switching element M4, thereby outputting the second potential VSS2. That is, the potential of the source terminal S11 of the semiconductor element T1 is changed to the second potential VSS2, which is lower than the first potential VSS1. In this way, the source potential change circuit 12 lowers the source potential of the semiconductor element of one arm after the turn-off operation of the semiconductor element of one arm is completed.

[0051] As described above, the first potential VSS1, which is the source potential of the semiconductor element of one arm when the semiconductor element of the other arm is switched from the on state to the off state, is set higher than the second potential VSS2, which is the source potential of the semiconductor element of the other arm before the semiconductor element of one arm is switched to the off state.

[0052] 6 is a graph showing switching loss when a semiconductor element is turned on, where the vertical axis represents switching loss (MJ: megajoules), bar graph A represents the comparative example, and bar graph B represents this embodiment.

[0053] As described with reference to FIG. 4, in the comparative example, the recovery surge voltage of the drain-source voltage Vds of the semiconductor element T2 increases, and as shown in bar graph A in FIG. 6, the switching loss Sw2 at turn-on increases.

[0054] On the other hand, in this embodiment, the recovery surge voltage of the drain-source voltage Vds of the semiconductor element T2 can be reduced, and the switching loss Sw2 at turn-on can be reduced, as shown in bar graph B in Fig. 6. However, since the drain-source current Ids of the semiconductor element T1 increases, the switching loss Swl increases, as shown in Fig. 4(I). However, as shown in Fig. 6, the sum of the switching loss Swl of the semiconductor element T1 and the switching loss Sw2 of the semiconductor element T2 can be significantly reduced compared to the comparative example.

[0055] According to the first embodiment, when a semiconductor element in one of the upper and lower arms is switched from an OFF state to an ON state, the recovery surge voltage of the semiconductor element in the opposing arm can be suppressed. Because the recovery surge voltage can be suppressed, the resistance value of the gate resistor can be reduced and the switching speed of the semiconductor element can be increased, so the recovery surge voltage can be kept within an allowable range.

[0056] [Second embodiment] FIG. 7 is a circuit diagram showing a semiconductor drive device 100 according to a second embodiment of the present invention. As in FIG. 1, this shows an example in which the semiconductor drive device 100 is applied to upper and lower arms for one phase that are part of an inverter circuit.

[0057] The second embodiment shown in Fig. 7 includes first potential variable circuits 13 and 23, current detection units 14 and 24, temperature detection units 15 and 25, and voltage detection units 16 and 26, as compared with the first embodiment shown in Fig. 1. The other configurations are the same as those in Fig. 1, and the same parts are denoted by the same reference numerals and will be described briefly.

[0058] The current detection units 14 and 24 measure the drain-source current Ids of the semiconductor elements T1 and T2 to detect the current of the semiconductor elements T1 and T2. The temperature detection units 15 and 25 are disposed near the semiconductor elements T1 and T2 to detect the temperatures of the semiconductor elements T1 and T2. The voltage detection units 16 and 26 measure the drain-source voltage Vds of the semiconductor elements T1 and T2 to detect the voltage of the semiconductor elements T1 and T2.

[0059] The current, temperature, and voltage detected by the current detection units 14, 24, temperature detection units 15, 25, and voltage detection units 16, 26 are input to the control circuit 4. The control circuit 4 outputs control signals C13, C23 to the first potential variable circuits 13, 23 in accordance with the detected current, temperature, and voltage. In response to the control signals C13, C23, the first potential variable circuits 13, 23 change the first potential VSS1 to an arbitrary value and output it to the source potential change circuits 12, 22. The source potential change circuits 12, 22 then change the source potential of each semiconductor element T1, T2 using the first potential VSS1 changed by the first potential variable circuits 13, 23.

[0060] 8(A) and 8(B) are circuit configuration diagrams of a first potential variable circuit 13 according to a second embodiment. Fig. 8(A) is an example of the first potential variable circuit 13, and Fig. 8(B) is a modified example of the first potential variable circuit 13. The first potential variable circuit 23 also has a similar circuit configuration. Furthermore, each of the first potential variable circuits in the upper and lower arms for three phases of the inverter circuit also has a similar circuit configuration.

[0061] As shown in Fig. 8A, a switching element M5 and a switching element M6 are connected in series between a positive power supply V1 and a negative power supply V2, and a first potential VSS1 is output from the connection point between the switching elements M5 and M6 via an inductor L13. A capacitor C10 is connected between the output line of the first potential VSS1 and the power supply line of the negative power supply V2. The voltage of the power supply line of the negative power supply V2 is output as a second potential VSS2. The positive power supply V1 is, for example, a voltage supplied from a positive wiring. The negative power supply V2 is, for example, a voltage supplied from a negative wiring.

[0062] The control circuit 4 alternately turns on and off the switching elements M5 and M6 with a control signal C13, and varies the first potential VSS1 according to the ratio of the time that the switching element M5 is on (duty ratio). Specifically, the control signal C13 changes the first potential VSS1 according to the detected current, temperature, and voltage.

[0063] 8B , in a modified example of the first potential variable circuit 13, a variable resistor R3 and a resistor R4 are connected in series between the output lines of the first potential VSS1 and the second potential VSS2, and a capacitor C10 is further connected between the output lines of the first potential VSS1 and the second potential VSS2. A positive power supply V1 is connected to the input side of the voltage adjustment circuit Rv, and the output line of the first potential VSS1 is connected to the output side, and the voltage across the variable resistor R3 is input as the reference voltage of the voltage adjustment circuit Rv.

[0064] The resistance value of the variable resistor R3 is made variable by a control signal C13 from the control circuit 4. The voltage adjustment circuit Rv adjusts the first potential VSS1 based on the voltage applied to the variable resistor R3. Specifically, the first potential VSS1 is changed by the control signal C13 according to the detected current, temperature, and voltage.

[0065] 9A and 9B are graphs showing an example in which the first potential VSS1 is changed in accordance with the current Ids of the semiconductor element. The control circuit 4 changes the control signal C13 sent to the first potential variable circuit 13 based on the drain-source current Ids of the semiconductor element T1 detected by the current detection unit 14. In response to this control signal C13, the first potential variable circuit 13 changes the first potential VSS1 in accordance with the detected current Ids.

[0066] As shown in FIG. 9A, the first potential VSS1 is changed so that the first potential VSS1 decreases as the detected current Ids increases. Note that a maximum value VSS1_max and a minimum value VSS1_min may be set for the changed first potential VSS1, and the first potential VSS1 may be changed within this range. Furthermore, the value of the first potential VSS1 is not limited to being changed linearly as shown in FIG. 9A, but may also be changed, for example, by discrete values ​​as shown in FIG. 9B.

[0067] By changing the first potential VSS1 in this way, when the current Ids is small, the turn-on time of the semiconductor element T1 is short and the gate-source voltage Vgs is unlikely to rise, so by increasing the first potential VSS1, it is possible to enhance the effect of suppressing the recovery surge voltage. On the other hand, when the current Ids is large, the turn-on time is long and the gate-source voltage Vgs of the semiconductor element T1 is likely to rise, so by lowering the first potential VSS1, it is possible to enhance the effect of suppressing the recovery surge voltage.

[0068] 10 is a graph showing an example of changing the first potential VSS1 in accordance with the temperature Tj of the semiconductor element T1 according to the second embodiment. The control circuit 4 changes the control signal C13 sent to the first potential variable circuit 13 based on the temperature Tj of the semiconductor element T1 detected by the temperature detection unit 15. In response to this control signal C13, the first potential variable circuit 13 changes the first potential VSS1 in accordance with the detected temperature Tj.

[0069] 10 , the first potential variable circuit 13 changes the first potential VSS1 to a low value when the temperature Tj of the semiconductor element T1 detected by the temperature detection unit 15 is high. Note that a maximum value VSS1_max and a minimum value VSS1_min may be set for the changed first potential VSS1, and the first potential VSS1 may be changed within this range. Furthermore, the value of the first potential VSS1 is not limited to a linear change as shown in FIG. 10 , and may be changed using discrete values, etc.

[0070] Generally, the higher the temperature Tj of the semiconductor element T1, the lower the threshold voltage of the semiconductor element T1. However, the first potential variable circuit 13 can prevent the drain-source current Ids from becoming excessive by lowering the first potential VSS1 as the temperature Tj increases.

[0071] 11A and 11B are graphs showing an example in which the first potential VSS1 is changed in accordance with the voltage Vds of the semiconductor element according to the second embodiment. The control circuit 4 changes the control signal C13 sent to the first potential variable circuit 13 based on the drain-source voltage Vds of the semiconductor element T1 detected by the voltage detection unit 16. In response to this control signal C13, the first potential variable circuit 13 changes the first potential VSS1 in accordance with the detected voltage Vds.

[0072] The first potential variable circuit 13 has a noise suppression mode and a loss suppression mode as modes for changing the first potential VSS1. In the noise suppression mode, the first potential VSS1 is changed to a higher value regardless of the voltage Vds detected by the voltage detection unit 16. In the loss reduction mode, the first potential VSS1 is changed to a lower value as the voltage Vds detected by the voltage detection unit 16 becomes lower.

[0073] 11A, in the noise suppression mode, the first potential VSS1 is changed to its maximum value VSS1_max, and in the loss reduction mode, as shown in FIG. 11B, the higher the voltage Vds of the semiconductor element T1, the higher the value of the first potential VSS1 is changed to. Note that a maximum value VSS1_max and a minimum value VSS1_min may be set for the changed first potential VSS1, and the first potential VSS1 may be changed within these ranges. The loss suppression mode and the noise suppression mode are selected in advance, for example, according to requirements such as the destination of the semiconductor driving device 100.

[0074] In the noise suppression mode, by increasing the first potential VSS1 to the maximum value VSS1_max, the gate-source voltage Vgs increases when the semiconductor element T1 is turned on, and the recovery surge voltage is suppressed in any voltage region.

[0075] On the other hand, in the loss reduction mode, by changing the first potential VSS1 according to the drain-source voltage Vds, when the drain-source voltage Vds is low, the recovery loss can be suppressed within a range in which the recovery surge voltage does not exceed the allowable voltage. Also, when the drain-source voltage Vds is high, the recovery surge voltage can be suppressed by increasing the first potential VSS1 so as to suppress the recovery surge voltage.

[0076] According to the second embodiment, when the semiconductor element of one of the upper and lower arms is switched from the off state to the on state, the first potential is changed according to the current, temperature, and voltage of the semiconductor element, thereby more effectively suppressing the recovery surge voltage of the semiconductor element of the opposing arm.

[0077] [Third Embodiment] FIG. 12 is a circuit diagram showing a semiconductor drive device 100 according to a third embodiment of the present invention, and shows an example in which the device is applied to upper and lower arms for one phase, which are part of an inverter circuit, similar to FIG. 1 .

[0078] The third embodiment shown in Fig. 12 differs from the first embodiment shown in Fig. 1 in that the upper and lower arms of the inverter circuit are configured in two parallel connections and include potential difference suppression circuits 17 and 27. The other configuration is the same as in Fig. 1, and the same parts are assigned the same reference numerals and will be described briefly.

[0079] As shown in Fig. 12, the upper and lower arms for one phase are provided with upper arm semiconductor elements T2a, T2b and lower arm semiconductor elements T1a, T1b in two parallel connections. A potential difference suppression circuit 27 is provided to suppress the first potential difference between the upper arm semiconductor elements T2a, T2b configured in two parallel connections. Similarly, a potential difference suppression circuit 17 is provided to suppress the first potential difference between the lower arm semiconductor elements T1a, T1b. While an example in which two upper and lower arms are configured in parallel will be described, the same applies to a configuration in which three or more upper and lower arms are configured in parallel.

[0080] The first potential VSS1 changed by the source potential change circuits 12, 22 is input to the potential difference suppression circuits 17, 27. The potential difference suppression circuit 17 is connected to the source terminals S1a, S1b of the semiconductor elements T1a, T1b, and the potential difference suppression circuit 27 is connected to the source terminals S2a, S2b of the semiconductor elements T2a, T2b.

[0081] Generally, the electrical wiring from the source potential change circuit 12 to the semiconductor elements T1a and T1b may differ, and the potentials of the source terminals S1a and S1b may differ between the semiconductor elements T1a and T1b. Similarly, the electrical wiring from the source potential change circuit 22 to the semiconductor elements T2a and T2b may differ, and the potentials of the source terminals S1a and S1b may differ between the semiconductor elements T2a and T2b. If the source terminal potentials differ, an imbalance occurs in the drain-source current Ids, resulting in a difference in recovery surge voltage between the semiconductor elements T1a and T1b, or between the semiconductor elements T2a and T2b. To resolve this, in this embodiment, potential difference suppression circuits 17 and 27 are provided to suppress the potential difference in the first potential VSS1 between the semiconductor elements of the upper and lower arms configured in two parallel configurations.

[0082] FIG. 13 is a circuit diagram of a potential difference suppression circuit 27 according to the third embodiment. The potential difference suppression circuit 17 has a similar circuit configuration. As shown in FIG. 13, the potential difference suppression circuit 27 includes diodes D2a, D2a' and D2b, D2b' connected in parallel in the forward and reverse directions, respectively, in branch paths from the source potential change circuit 22. The voltage of the first potential VSS1 from the source potential change circuit 22 is connected to the source terminal S2a of the semiconductor element T2a via the diodes D2a, D2a' connected in parallel in the forward and reverse directions. Similarly, the voltage of the first potential VSS1 from the source potential change circuit 22 is connected to the source terminal S2b of the semiconductor element T2b via the diodes D2b, D2b' connected in parallel in the forward and reverse directions.

[0083] Here, when the potential of the source terminal S2b of the semiconductor element T2b is higher than the potential of the source terminal S2a of the semiconductor element T2a, a diode is selected in which the forward voltage of the forward diode D2a connected to the source side of the semiconductor element T2a is higher than the forward voltage of the forward diode D2b connected to the source side of the semiconductor element T2b. As a result, the voltage drop across the forward diode D2a suppresses the potential difference between the semiconductor elements T2a and T2b. Note that the potential difference suppression circuit 27 may be realized by other circuit configurations as long as it is configured to suppress the voltage difference between the gates and sources of the semiconductor elements, i.e., the potential difference of the first potential VSS1.

[0084] 14A to 14C are time charts for explaining the operation of the semiconductor driving device 100 according to the third embodiment. These time charts show waveforms when the semiconductor elements T1a and T1b are turned on, with the dashed line representing the semiconductor element T1a and the solid line representing the semiconductor element T1b.

[0085] If the potential difference is not suppressed, a difference may occur in the gate-source voltage Vgs of the semiconductor element T1a and the semiconductor element T1b, as shown in FIG. 14A. This results in an imbalance in the drain-source current Ids of the semiconductor element T1a and the semiconductor element T1b, as shown in FIG. 14B. Then, as shown in FIG. 14C, a difference occurs in the recovery surge voltages of the semiconductor element T1a and the semiconductor element T1b, increasing the difference in switching loss Sw. In contrast, if the potential difference suppression circuit 27 is applied, the difference in voltage Vgs shown in FIG. 14A is suppressed, thereby eliminating the imbalance in current Ids shown in FIG. 14B. This allows the difference in switching loss Sw shown in FIG. 14C to be suppressed.

[0086] According to the third embodiment, when multiple semiconductor elements constituting one of the upper and lower arms are switched from the off state to the on state, the recovery surge voltage of the multiple semiconductor elements in the opposing arm can be suppressed by suppressing the potential difference of the first potential between the multiple semiconductor elements and changing the first potential.

[0087] The above-described embodiment provides the following advantageous effects. (1) The semiconductor drive device 100 includes gate drive circuits 11 and 21 that output drive signals to gate terminals G11 and G21 of the semiconductor elements T1 and T2 that constitute the upper and lower arms of the inverter circuit, and source potential change circuits 12 and 22 that change the source potential of the semiconductor elements T1 and T2. When the semiconductor elements T1 and T2 of one of the upper and lower arms are switched from an OFF state to an ON state, the source potential change circuits 12 and 22 change the source potential of the semiconductor elements of the other arm. A first potential VSS1, which is the source potential of the semiconductor elements T1 and T2 of the other arm when the semiconductor elements T1 and T2 of the one arm are switched from an OFF state to an ON state, is set higher than a second potential VSS2, which is the source potential of the semiconductor elements T1 and T2 of the other arm before the semiconductor elements T1 and T2 of the one arm are switched on. This makes it possible to suppress a recovery surge voltage of the semiconductor elements of the opposing arm when the semiconductor elements of one of the upper and lower arms are switched from an OFF state to an ON state.

[0088] The present invention is not limited to the above-described embodiments, and other forms that are conceivable within the scope of the technical concept of the present invention are also included within the scope of the present invention as long as they do not impair the characteristics of the present invention. Furthermore, the above-described embodiments and their modifications may be appropriately combined.

[0089] 11, 21...gate drive circuit, 12, 22...source potential change circuit, 13, 23...first potential variable circuit, 14, 24...current detection unit, 15, 25...temperature detection unit, 16, 26...voltage detection unit, 17, 27...potential difference suppression circuit, 100...semiconductor drive device, T1, T2...semiconductor element, D1, D11, D21...drain terminal, G11, G21...gate terminal, S11, S21...source terminal, C11, C12, C21, C22...control signal, M1, M2, M3, M4...switching element, Di1, Di2, D2a, D2a', D2b, D2b'...diode, R1...on gate resistor, R2...off gate resistor, VSS1...first potential, VSS2...second potential.

Claims

1. A semiconductor drive device comprising: a gate drive circuit which outputs drive signals to the gate terminals of each semiconductor element constituting the upper and lower arms of an inverter circuit; and a source potential change circuit which changes the source potential of each of the semiconductor elements, wherein when the semiconductor element of one of the upper and lower arms is switched from an off state to an on state, the source potential change circuit changes the source potential of the semiconductor element of the other arm, and wherein a first potential which is the source potential of the semiconductor element of the other arm when the semiconductor element of the one arm is switched from an off state to an on state is set higher than a second potential which is the source potential of the semiconductor element of the other arm before the semiconductor element of the one arm is switched to the on state.

2. A semiconductor driving device according to claim 1, wherein the source potential change circuit lowers the source potential of the semiconductor element of the one arm after the turn-on operation of the semiconductor element of the one arm is completed.

3. A semiconductor drive device according to claim 1 or 2, wherein a first potential, which is the source potential of the semiconductor element of the one arm when the semiconductor element of the other arm is switched from an on state to an off state, is set higher than a second potential, which is the source potential of the semiconductor element of the other arm before the semiconductor element of the one arm is switched to the off state.

4. A semiconductor drive device according to claim 3, wherein the source potential change circuit lowers the source potential of the semiconductor element of the one arm after the turn-off operation of the semiconductor element of the one arm is completed.

5. A semiconductor driving device as described in claim 1, further comprising a first potential variable circuit which changes the first potential to an arbitrary value, and wherein the source potential changing circuit changes the source potential of each of the semiconductor elements using the first potential changed by the first potential variable circuit.

6. A semiconductor driving device according to claim 5, further comprising a current detection unit for detecting a current in the semiconductor element, and the first potential variable circuit changes the first potential in response to the current detected by the current detection unit.

7. A semiconductor driving device according to claim 5, further comprising a temperature detection section for detecting a temperature of the semiconductor element, and the first potential variable circuit changes the first potential in response to the temperature detected by the temperature detection section.

8. A semiconductor driving device according to claim 7, wherein the first potential variable circuit changes the first potential to a low value when the temperature detected by the temperature detection section is high.

9. A semiconductor driving device according to claim 5, further comprising a voltage detection unit for detecting a voltage of the semiconductor element, and the first potential variable circuit changes the first potential in response to the voltage detected by the voltage detection unit.

10. A semiconductor drive device as described in claim 9, wherein the first potential variable circuit has a noise suppression mode and a loss suppression mode as modes for changing the first potential, and in the noise suppression mode, the first potential is changed to a higher value regardless of the voltage detected by the voltage detection unit, and in the loss reduction mode, the lower the voltage detected by the voltage detection unit, the lower the first potential is changed to a lower value.

11. A semiconductor drive device as described in claim 1, wherein the source potential change circuit inputs a drive signal to the gate terminal of each semiconductor element constituting the upper and lower arms of the inverter circuit in two or more parallel configurations, and when each semiconductor element of one of the upper and lower arms configured in two or more parallel configurations is switched from an off state to an on state, the source potential change circuit changes the source potential of each semiconductor element of the other arm to the first potential, and the semiconductor drive device is provided with a potential difference suppression circuit that suppresses a potential difference in the first potential between each semiconductor element of the upper and lower arms configured in two or more parallel configurations.

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