Thin film forming method and manufacturing method for electroluminescent display device using same

The method addresses the challenges of productivity and economics in micro-LED displays and the short lifespan of OLED blue sub-pixels by forming thin films with inorganic and organic light emitting layers in specific sub-pixel regions, resulting in improved device lifespan and cost-effectiveness.

WO2025071136A1PCT designated stage expired Publication Date: 2025-04-03JUSUNG ENG
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Patent Information

Application Number
PCT/KR2024/014319
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-09-27
Filing Date
2024-09-23
Publication Date
2025-04-03

AI Technical Summary

Technical Problem

Conventional micro-LED displays face challenges in productivity and economics due to the pick and place method used in the transmission process, and OLED displays with blue sub-pixels have short lifespans and are prone to deterioration when increasing the driving current.

Method used

A method for forming a thin film on a substrate with sub-pixel regions, where a first light emitting layer made of inorganic material is formed in one sub-pixel region, and a second light emitting layer made of organic material is formed in another sub-pixel region, reducing production costs and improving lifespan.

Benefits of technology

The method allows for the production of field light emitting devices with improved lifespan and reduced production costs, while also enhancing productivity and economic viability compared to traditional methods.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention provides a thin film forming method and a manufacturing method for an electroluminescent display device using same, a method for forming a thin film on a substrate having a first sub-pixel area and a second sub-pixel area, the method including a step of forming a first light emitting layer in the first sub-pixel area, wherein the step of forming of a first light emitting layer in the first sub-pixel area includes forming of a semiconductor layer containing gallium (Ga) in the first sub-pixel area.
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Description

Thin film formation method and method for manufacturing an electroluminescent display device using the same

[0001] The present invention relates to a method for forming a thin film and a method for manufacturing an electroluminescent display device using the same.

[0002] Liquid crystal displays (LCDs) and organic light-emitting diode (OLED) displays are widely used as display devices. Recently, the technology for producing high-resolution display devices using micro-sized LEDs (Micro Light Emitting Diode Devices) has been gaining attention.

[0003] Among organic light-emitting diodes (OLEDs), sub-pixels that emit blue light have a shorter lifespan than other sub-pixels, such as red or green sub-pixels. In addition, when the driving current is increased to increase brightness, the device easily deteriorates. On the other hand, when implementing a display device using an inorganic light-emitting diode (Micro LED), there is the problem of higher production costs compared to organic light-emitting diodes (OLEDs).

[0004] Conventional Micro-LED displays, which feature self-luminous structures where micro-LEDs in the micrometer range are mounted on pixel positions on a driving substrate, offer advantages such as high brightness, high power efficiency, long lifespan, and the implementation of various form factors. However, the transfer process for positioning micro-LEDs in the micrometer range onto pixel positions on a driving substrate is typically performed using a pick-and-place method, which struggles to ensure productivity and cost-effectiveness. In particular, the need for alternative methods is emerging for the production of large-area Micro-LED displays.

[0005] The present invention is designed to solve the above-mentioned conventional problems, and aims to provide a method for forming a thin film of blue pixels having a relatively long lifespan and a lower production cost than when forming all pixels with micro LEDs by depositing blue pixels having a short lifespan among OLED pixels with micro LEDs, and a method for manufacturing an electroluminescent display device using the same.

[0006] In order to achieve the above object, the present invention provides a method for forming a thin film on a substrate having a first sub-pixel region and a second sub-pixel region, the method including a step of forming a first light-emitting layer in the first sub-pixel region, and the step of forming the first light-emitting layer in the first sub-pixel region includes a step of forming a semiconductor layer containing gallium (Ga) in the first sub-pixel region.

[0007] A step of forming a second light-emitting layer in the second sub-pixel area may be additionally included.

[0008] The step of forming a first light-emitting layer in the first sub-pixel area may further include, prior to the step of forming the semiconductor layer containing gallium, a step of forming a pattern to cover the second sub-pixel area while exposing the first sub-pixel area.

[0009] The step of forming a first light-emitting layer in the first sub-pixel region further includes a step of forming a seed layer including a metal in the first sub-pixel region between the step of forming the pattern and the step of forming the semiconductor layer containing gallium, and the step of forming the semiconductor layer containing gallium can be formed on the seed layer.

[0010] The step of forming a semiconductor layer containing gallium (Ga) on the seed layer may include the steps of forming a first semiconductor layer containing gallium (Ga) on the seed layer; forming a second semiconductor layer containing gallium (Ga) on the first semiconductor layer; and forming a third semiconductor layer containing gallium (Ga) on the second semiconductor layer.

[0011] The first semiconductor layer may include P-type gallium nitride (P-type GaN), the second semiconductor layer may include intrinsic gallium nitride (Intrinsic-GaN) or indium gallium nitride (InGaN), and the third semiconductor layer may include N-type gallium nitride (N-type GaN).

[0012] The step of forming a semiconductor layer containing gallium (Ga) on the seed layer may include a process of depositing using atomic layer deposition (ALD) or metal-organic chemical vapor deposition (MOCVD).

[0013] The step of forming a semiconductor layer containing gallium (Ga) on the seed layer may include a process of depositing the semiconductor layer to a thickness of 1 μm or less.

[0014] The method may further include a step of forming a second light-emitting layer in the second sub-pixel area, and may further include a step of removing the pattern between the step of forming the first light-emitting layer and the step of forming the second light-emitting layer.

[0015] The step of forming a semiconductor layer containing gallium (Ga) in the first sub-pixel area may be performed at a temperature of 400°C or less.

[0016] The lattice constant of the seed layer may be the same as the lattice constant of the semiconductor layer containing gallium (Ga).

[0017] The seed layer may include at least one of titanium (Ti), aluminum nitride (AlN), and zinc oxide (ZnO).

[0018] The present invention also includes a method for forming a thin film on a substrate having a first sub-pixel region and a second sub-pixel region, the method including the step of forming a first light-emitting layer in the first sub-pixel region, wherein the step of forming the first light-emitting layer includes the step of preparing a substrate having a seed layer formed thereon; and the step of forming a semiconductor layer containing gallium on the seed layer.

[0019] The present invention also provides a method for manufacturing an electroluminescent display device, comprising: forming a first sub-pixel region and a second sub-pixel region on a substrate; forming a first electrode in each of the first sub-pixel region and the second sub-pixel region; and forming a thin film on each of the first electrodes in each of the first sub-pixel region and the second sub-pixel region, wherein the forming of the thin film is performed using the thin film forming method described above.

[0020] The step of forming the thin film further includes the step of forming a second light-emitting layer in the second sub-pixel area, wherein the second light-emitting layer provided in the second sub-pixel area includes an organic material, the first light-emitting layer provided in the first sub-pixel area emits blue light, and the second light-emitting layer provided in the second sub-pixel area can emit a different color from the first light-emitting layer.

[0021] According to the present invention as described above, the following effects are achieved.

[0022] According to one embodiment of the present invention, the sub-pixel provided in the first sub-pixel area is formed by including an inorganic material, so that the lifespan is longer than when an organic material is used, and even when the driving current is increased to increase the luminous efficiency, the characteristics of the pixel can be prevented from deteriorating.

[0023] According to one embodiment of the present invention, the sub-pixels provided in the first sub-pixel area include an inorganic material, and the sub-pixels provided in the second sub-pixel area and the third sub-pixel area include an organic material, so that the production cost can be reduced compared to when the entire pixel is formed using an inorganic material.

[0024] According to one embodiment of the present invention, a sub-pixel provided in a first sub-pixel area including an inorganic material emits blue light, and a sub-pixel provided in a second sub-pixel area and a third sub-pixel area including an organic material emit green light and red light, respectively, thereby improving the problem of a shortened lifespan of a sub-pixel emitting blue light.

[0025] The effects of the present invention are not limited to the effects mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art from the description below.

[0026] FIG. 1 is a schematic cross-sectional view of an electroluminescent display device formed using a method for manufacturing an electroluminescent display device according to one embodiment of the present invention.

[0027] FIG. 2 is a schematic diagram of a light-emitting layer provided in a first sub-pixel formed by a thin film forming method according to one embodiment of the present invention.

[0028] FIGS. 3A to 3H are cross-sectional views showing a method for manufacturing an electroluminescent display device according to one embodiment of the present invention.

[0029] The advantages and features of the present invention, and the methods for achieving them, will become clearer with reference to the embodiments described in detail below together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but may be implemented in various different forms. These embodiments are provided solely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined solely by the scope of the claims.

[0030] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining embodiments of the present invention are illustrative and are not limited to the matters illustrated in the drawings. Like reference numerals refer to like components throughout the specification. In addition, in describing the present invention, if a detailed description of a related known technology is judged to unnecessarily obscure the gist of the present invention, the detailed description thereof will be omitted. When the terms “includes,” “has,” and “consists of” are used in this specification, other parts may be added unless “only” is used. When a component is expressed in the singular, it includes a case where the plural is included unless there is a specifically explicit description.

[0031] When interpreting a component, it is interpreted as including the error range even if there is no separate explicit description.

[0032] When describing a positional relationship, for example, when the positional relationship between two parts is described as 'on top of', 'upper part of', 'lower part of', 'next to', etc., one or more other parts may be located between the two parts, unless 'right away' or 'directly' is used.

[0033] When describing a temporal relationship, for example, when the temporal continuity is described as 'after', 'following', 'next to', 'before', etc., it can also include cases where it is not continuous, as long as 'right away' or 'directly' is not used.

[0034] While terms like "first" and "second" are used to describe various components, these components are not limited by these terms. These terms are merely used to distinguish one component from another. Therefore, a "first" component referred to below may also be a "second" component within the technical scope of the present invention.

[0035] The features of each of the various embodiments of the present invention can be partially or wholly combined or combined with each other, and various technical connections and operations are possible, and each embodiment can be implemented independently of each other or implemented together in a related relationship.

[0036] Hereinafter, a preferred embodiment of the present invention will be described in detail with reference to the drawings.

[0037] FIG. 1 is a schematic cross-sectional view of an electroluminescent display device formed using a method for manufacturing an electroluminescent display device according to one embodiment of the present invention.

[0038] As can be seen in FIG. 1, an electroluminescent display device formed by a method for manufacturing an electroluminescent display device according to an embodiment of the present invention comprises a substrate (100), a buffer layer (110), a thin film transistor (TR), a gate insulating film (130), an interlayer insulating film (150), a planarization layer (170), a first electrode (200a to 200c), a bank (210), a first light-emitting layer (ELa), a second light-emitting layer (ELb), a third light-emitting layer (ELc), and a second electrode (220).

[0039] An electroluminescent display device according to one embodiment of the present invention comprises a first sub-pixel region (SP1), a second sub-pixel region (SP2), and a third sub-pixel region (SP3), and each of the sub-pixel regions (SP1 to SP3) may be provided with sub-pixels that emit different colors.

[0040] According to one embodiment of the present invention, the sub-pixel provided in the first sub-pixel area (SP1) may emit blue light, the sub-pixel provided in the second sub-pixel area (SP2) may emit green light, and the sub-pixel provided in the third sub-pixel area (SP3) may emit red light. Meanwhile, the present invention is not limited thereto, and a fourth sub-pixel area including a sub-pixel that emits white light may be provided.

[0041] A circuit area (CA) for driving each sub-pixel may be provided between each of the above sub-pixel areas (SP1 to SP3).

[0042] The substrate (100) may be made of glass or plastic. In particular, the substrate (100) may be made of a transparent plastic having flexible properties, for example, polyimide. When polyimide is used as the substrate (100), considering that a high-temperature deposition process is performed on the substrate (100), a heat-resistant polyimide that can withstand high temperatures may be used.

[0043] The buffer layer (110) is formed on the substrate (100). The buffer layer (110) can protect the active layer (120) by blocking air and moisture. The buffer layer (110) may be formed of an inorganic insulating material such as silicon oxide, silicon nitride, or metal oxide, but is not necessarily limited thereto and may be formed of an organic insulating material. The buffer layer (110) may be formed of a single layer or may be formed of multiple layers.

[0044] The above thin film transistor (TR) is formed on the buffer layer (110). The thin film transistor (TR) can drive the sub-pixels provided in each of the sub-pixel regions (SP1 to SP3). The thin film transistor (TR) can be, for example, a driving thin film transistor (Driving TFT).

[0045] The above thin film transistor (TR) may be provided in the circuit area (CA). The above thin film transistor (TR) includes an active layer (120), a gate electrode (140), a source electrode (161), and a drain electrode (162).

[0046] The above active layer (120) is formed on the above buffer layer (110). The above active layer (120) may be formed of a silicon (Si) series semiconductor material or an oxide semiconductor material.

[0047] The above active layer (120) may include a channel portion (121), a first connection portion (122a) provided on one side of the channel portion (121), for example, on the left side, and a second connection portion (122b) provided on the other side of the channel portion (121), for example, on the right side. The first connection portion (122a) and the second connection portion (122b) have superior conductive properties than the channel portion (121) and can be used as wiring or electrodes.

[0048] The gate insulating film (130) may be provided on the active layer (120). Specifically, the gate insulating film (130) may be provided on the entire surface of the substrate (100) and may be provided on the active layer (120) and the buffer layer (110). As a result, the active layer (120) may be provided in a form in which the buffer layer (110) and the gate insulating film (130) are wrapped. Meanwhile, the present invention is not limited thereto, and a pattern may be formed using the gate electrode (140) as a mask so that one end and the other end of the gate insulating film (130) correspond to one end and the other end of the gate electrode (140).

[0049] The gate insulating film (130) may include, but is not limited to, a silicon nitride film (SiNx) or a silicon oxide film (SiOx). The gate insulating film (130) may be formed of a single layer or multiple layers including an inorganic insulating material and / or an organic insulating material.

[0050] The gate electrode (140) may be provided on the gate insulating film (130). The gate electrode (140) may be provided on the active layer (120). Specifically, the gate electrode (140) may overlap with the channel portion (121) of the active layer (120).

[0051] The gate electrode (140) may include at least one of an aluminum series metal such as aluminum (Al) or an aluminum alloy, a silver series metal such as silver (Ag) or a silver alloy, a copper series metal such as copper (Cu) or a copper alloy, a molybdenum series metal such as molybdenum (Mo) or a molybdenum alloy, chromium (Cr), tantalum (Ta), neodymium (Nd), and titanium (Ti). The gate electrode (140) may have a structure including a single metal layer or a multilayer film structure including at least two metal layers each having different physical properties.

[0052] The interlayer insulating film (150) insulates between the gate electrode (140) and the source electrode (161), and further insulates between the gate electrode (140) and the drain electrode (162). The interlayer insulating film (150) may be formed of a single layer or multiple layers including an inorganic insulating material and / or an organic insulating material.

[0053] The source electrode (161) and the drain electrode (162) may be provided on the interlayer insulating film (150). The source electrode (161) and the drain electrode (162) may be formed of the same material as the gate electrode (140), but are not limited thereto and may be formed of a material according to knowledge in the art.

[0054] The source electrode (161) may be electrically connected to one side of the active layer (120), for example, the first connection portion (122a), and the drain electrode (162) may be electrically connected to the other side of the active layer (120), for example, the second connection portion (122b). Specifically, the source electrode (161) may be connected to the first connection portion (122a) of the active layer (120) through a contact hole (not shown) provided in the gate insulating film (130) and the interlayer insulating film (150), and the drain electrode (162) may be connected to the second connection portion (122b) of the active layer (120) through a contact hole (not shown) provided in the gate insulating film (130) and the interlayer insulating film (150).

[0055] The above planarization layer (170) is provided on the source electrode (161) and the drain electrode (162). The planarization layer (170) is provided with a contact hole (not shown), so that the source electrode (161) is exposed through the contact hole (not shown). However, depending on the case, the drain electrode (162) may be exposed through the contact hole (not shown).

[0056] The first electrode (200a to 200c) is formed on the planarization layer (170) and is connected to the source electrode (161) or the drain electrode (162) through the contact hole (not shown). The first electrode (200a to 200c) can function as an anode.

[0057] The above bank (210) is provided to cover the edge of the first electrode (200a to 200c) and define a light-emitting area. Therefore, the upper surface area of ​​the first electrode (200a to 200c) that is exposed and not covered by the bank (210) becomes the light-emitting area.

[0058] According to one embodiment of the present invention, the sub-pixels provided in the first sub-pixel area (SP1) may have a different structure from the sub-pixels provided in the second sub-pixel area (SP2) and the third sub-pixel area (SP3).

[0059] According to one embodiment of the present invention, the sub-pixel provided in the first sub-pixel area (SP1) includes a first light-emitting layer (ELa), the sub-pixel provided in the second sub-pixel area (SP2) includes a second light-emitting layer (ELb), and the sub-pixel provided in the third sub-pixel area (SP3) includes a third light-emitting layer (ELc).

[0060] In this case, the first light-emitting layer (ELa) is formed by including an inorganic material, and the second light-emitting layer (ELb) and the third light-emitting layer (ELc) are formed by including an organic material. By forming in this manner, the sub-pixel provided in the first sub-pixel area (SP1) includes a micro light-emitting diode (Micro LED), and the sub-pixels provided in the second sub-pixel area (SP2) and the third sub-pixel area (SP3) include an organic light-emitting diode (OLED).

[0061] The above first light-emitting layer (ELa) is composed of a seed layer (310), a first semiconductor layer (320), a second semiconductor layer (330), and a third semiconductor layer (340). Meanwhile, the structure of the first light-emitting layer (ELa) will be described in more detail in FIG. 2.

[0062] Although the second light-emitting layer (ELb) and the third light-emitting layer (ELc) are not specifically illustrated, they may include a hole injection layer (HIL), a hole transition layer (HTL), an emissive layer, an electron transition layer (ETL), and an electron injection layer (EIL). In some cases, an electron blocking layer (EBL) may be provided between the emissive layer and the hole transport layer (HTL), and a hole blocking layer (HBL) may be provided between the emissive layer and the electron transport layer (ETL).

[0063] The second electrode (220) is provided on the light-emitting layer (ELa, ELb, ELc). The second electrode (220) can function as a cathode.

[0064] The second electrode (220) may be provided continuously in the first sub-pixel area (SP1) to the third sub-pixel area (SP3) and may be provided in the form of a common electrode. However, it is not limited thereto.

[0065] Although not shown, a sealing layer may be additionally formed on the second electrode (220) to prevent the penetration of moisture or oxygen.

[0066] Fig. 2 is a schematic diagram of a first light-emitting layer provided in a first sub-pixel area formed by a thin film forming method according to one embodiment of the present invention. In this case, the first sub-pixel area is identical to the first sub-pixel area of ​​the electroluminescent display device illustrated in Fig. 1, so a repeated description thereof will be omitted.

[0067] As can be seen in Fig. 2, the sub-pixel provided in the first sub-pixel area (SP1) may include a first electrode (200a), a seed layer (310), a first semiconductor layer (320), a second semiconductor layer (330), a third semiconductor layer (340), and a second electrode (220). Meanwhile, the first electrode (200a) and the second electrode (220) are the same as those described in Fig. 1, so a repeated description thereof will be omitted.

[0068] The above first electrode (200a) may be formed of ITO (Indium Tin Oxide).

[0069] The seed layer (310) may be provided on the first electrode (200a). The seed layer (310) is provided on the first electrode (200a) so that the first semiconductor layer (320) can be well deposited in the first sub-pixel area (SP1).

[0070] The above seed layer (310) can be formed through sputtering or atomic layer deposition (ALD).

[0071] The seed layer (310) may be formed by including at least one of titanium (Ti), aluminum nitride (AlN), and zinc oxide (ZnO). Furthermore, the seed layer (310) may preferably be formed in a hexagonal close-packed (HCP) structure. By being formed in this manner, the lattice constants of the seed layer (310) and the first semiconductor layer (320) become the same or similar, so that the first semiconductor layer (320) can be easily deposited on the seed layer (310).

[0072] The first semiconductor layer (320) may be formed on the seed layer (310). The first semiconductor layer (320) is formed of a material containing gallium (Ga). Specifically, the first semiconductor layer (320) is formed of a material containing p-type gallium (Ga). For example, the first semiconductor layer (320) may be formed of gallium nitride (GaN:Mg) doped with magnesium (Mg).

[0073] According to one embodiment of the present invention, the first semiconductor layer (320) may be deposited on the first seed layer (310) using atomic layer deposition (ALD) or metal organic chemical vapor deposition (MOCVD). In addition, when the atomic layer deposition (ALD) or metal organic chemical vapor deposition (MOCVD) is used, plasma may be formed inside a chamber for forming the first semiconductor layer (320) to the third semiconductor layer (340), thereby forming the first semiconductor layer (320).

[0074] The second semiconductor layer (330) may be formed on the first semiconductor layer (320). The second semiconductor layer (330) is formed of a material containing gallium (Ga). Specifically, the second semiconductor layer (330) may be formed of a material containing intrinsic gallium (Ga) or a material containing indium (In) and gallium (Ga). For example, the second semiconductor layer (330) may be formed of intrinsic gallium nitride (GaN) or indium gallium nitride (InGaN). In this case, the second semiconductor layer (330) may be formed as a single layer of the intrinsic gallium nitride (InGaN), a single layer of the indium gallium nitride (InGaN), or multiple layers in which the intrinsic gallium nitride (InGaN) and the indium gallium nitride (InGaN) are cross-stacked.

[0075] According to one embodiment of the present invention, the second semiconductor layer (330) may be deposited on the first semiconductor layer (320) using atomic layer deposition (ALD) or metal organic chemical vapor deposition (MOCVD). In addition, when the atomic layer deposition (ALD) or metal organic chemical vapor deposition (MOCVD) is used, the second semiconductor layer (330) may be formed by forming plasma inside a chamber for forming the first semiconductor layer (320) to the third semiconductor layer (340).

[0076] The third semiconductor layer (340) may be formed on the second semiconductor layer (330). The third semiconductor layer (340) is formed by including a material containing gallium (Ga). Specifically, the third semiconductor layer (340) is formed by including N-type gallium (Ga). For example, the third semiconductor layer (340) may be formed by including gallium nitride (GaN:Si) doped with silicon (Si).

[0077] According to one embodiment of the present invention, the third semiconductor layer (340) may be deposited on the second semiconductor layer (330) using atomic layer deposition (ALD) or metal organic chemical vapor deposition (MOCVD). In addition, when the atomic layer deposition (ALD) or metal organic chemical vapor deposition (MOCVD) is used, plasma may be formed inside a chamber for forming the first semiconductor layer (320) to the third semiconductor layer (340), thereby forming the third semiconductor layer (340).

[0078] The second electrode (220) may be formed on the third semiconductor layer (340). The second electrode (220) may be formed of magnesium (Mg), silver (Ag), or an alloy of magnesium (Mg) and silver (Ag). However, the present invention is not limited thereto, and may be formed of various materials according to knowledge in the art.

[0079] According to one embodiment of the present invention, when the seed layer (310), the first semiconductor layer (320), the second semiconductor layer (330), and the third semiconductor layer (340) provided in the first light-emitting layer (ELa) provided in the first sub-pixel area (SP1) are formed using an atomic layer deposition (ALD), the first light-emitting layer (ELa) provided in the first sub-pixel area (SP1) can be formed to a thin thickness of 1 μm or less. Since the first light-emitting layer (ELa) is formed using the atomic layer deposition (ALD), a micro LED having a thinner thickness than a conventional one can be implemented.

[0080] FIGS. 3A to 3H are cross-sectional views showing a method for manufacturing an electroluminescent display device according to one embodiment of the present invention.

[0081] First, as can be seen in FIG. 3a, after forming a substrate (100), a buffer layer (110), a thin film transistor (TR), a gate insulating film (130), an interlayer insulating film (150), and a planarization layer (170), a first electrode (200a, 200b, 200c) can be formed on the planarization layer (170). Specifically, each of the first electrodes (200a, 200b, 200c) can be formed on the planarization layer (170) to correspond to the first sub-pixel region (see SP1 of FIG. 1), the second sub-pixel region (see SP2 of FIG. 1), and the third sub-pixel region (see SP3 of FIG. 1).

[0082] Next, as can be seen in Fig. 3b, in order to form a sub-pixel provided in the first sub-pixel area (see SP1 of Fig. 1), a pattern (400) can be formed to cover the remaining area except for the first sub-pixel area (see SP1 of Fig. 1). Meanwhile, the pattern (400) may be a resist pattern, a photoresist pattern, or a mask, but is not limited thereto.

[0083] The above pattern (400) may be formed with an open area (410) corresponding to the first sub-pixel area (see SP1 of FIG. 1) for forming a sub-pixel including an inorganic material. In this case, the open area (410) may expose a portion of the upper surface of the first electrode (200a) provided in the first sub-pixel area (see SP1 of FIG. 1).

[0084] Next, as can be seen in FIG. 3c, a seed material layer (310a) can be formed to cover the first electrode (200a) provided in the first sub-pixel area (see SP1 of FIG. 1), the side surface of the pattern (400), and the upper surface of the pattern (400). The seed material layer (310a) can be a layer formed on the entire surface of the substrate (see 100 of FIG. 1) before the seed layer (see 310 of FIG. 1) is formed.

[0085] The seed material layer (310a) may be a material including any one of titanium (Ti), aluminum nitride (AlN), and zinc oxide (ZnO). The seed material layer (310a) may be formed on the photoresist pattern (400) through sputtering or atomic layer deposition (ALD).

[0086] Next, as can be seen in FIG. 3d, a first semiconductor material layer (320a), a second semiconductor material layer (330a), and a third semiconductor material layer (340a) can be sequentially formed on the seed material layer (310a). In this case, the first semiconductor material layer (320a), the second semiconductor material layer (320b), and the third semiconductor material layer (330c) correspond to layers formed on the entire surface of the substrate (see 100 in FIG. 1) before the first semiconductor layer (320), the second semiconductor layer (330), and the third semiconductor layer (340) are formed, respectively.

[0087] According to one embodiment of the present invention, each of the first semiconductor material layer (320a), the second semiconductor material layer (330a), and the third semiconductor material layer (340a) can be deposited using atomic layer deposition (ALD) or metal organic chemical vapor deposition (MOCVD).

[0088] The first semiconductor material layer (320a) is formed, for example, by including P-type gallium (Ga). Specifically, the first semiconductor material layer (320a) may be formed by including P-type gallium nitride (P-Type GaN:Mg) doped with magnesium (Mg).

[0089] Furthermore, the second semiconductor material layer (330a) is formed on the first semiconductor material layer (320a). The second semiconductor material layer (330a) is formed of, for example, a material containing intrinsic gallium (Ga) or indium (In) and gallium (Ga). Specifically, the second semiconductor material layer (330a) may be formed of intrinsic gallium nitride (InGaN) or indium gallium nitride (InGaN). Meanwhile, the second semiconductor material layer (330a) may be formed of a single layer of the intrinsic gallium nitride (InGaN), a single layer of the indium gallium nitride (InGaN), or multiple layers in which the intrinsic gallium nitride (InGaN) and the indium gallium nitride (InGaN) are cross-stacked.

[0090] The third semiconductor material layer (340a) is formed on the second semiconductor material layer (330a). The third semiconductor material layer (340a) includes, for example, N-type gallium (Ga). Specifically, the third semiconductor material layer (340a) may include N-type gallium nitride doped with silicon (Si) (N-Type GaN:Si).

[0091] Next, as can be seen in FIG. 3e, a part of the seed material layer (310a), a part of the first semiconductor material layer (320a), a part of the second semiconductor material layer (330a), and a part of the third semiconductor material layer (330a) may be patterned to form the seed layer (310), the first semiconductor layer (320), the second semiconductor layer (330), and the third semiconductor layer (340) in the first sub-pixel area (see SP1 of FIG. 1).

[0092] Accordingly, a first light-emitting layer (ELa) is formed on the first electrode (210a) of the first sub-pixel area (see SP1 in FIG. 1).

[0093] Meanwhile, although not specifically shown in the drawing, after forming the seed layer (310), the first semiconductor layer (320), the second semiconductor layer (330), and the third semiconductor layer (340), the pattern (400) provided on the entire surface of the substrate (see 100 in FIG. 1) excluding the first sub-pixel region (see SP1 in FIG. 1) can be removed. In this case, the pattern (400) can be removed, for example, through stripping, but is not limited thereto.

[0094] The seed layer (310), the first semiconductor layer (320), the second semiconductor layer (330), and the third semiconductor layer (330) may be formed on the first electrode (200a) of the first sub-pixel region (see SP1 of FIG. 1). In this case, a portion of the upper surface of the first electrode (200a) is not exposed by the seed layer (310) to the third semiconductor layer (330), but the remaining portion of the upper surface of the first electrode (200a) and the side surface may be exposed to the outside.

[0095] According to one embodiment of the present invention, since the seed layer (310), the first semiconductor layer (320), the second semiconductor layer (330), and the third semiconductor layer (340) are formed after the pattern (400) is formed in the remaining area excluding the first sub-pixel area (see SP1 of FIG. 1), no inorganic material may be formed on the first electrode (200b, 200c) of the second sub-pixel area (SP2 of FIG. 1) or the third sub-pixel area (see SP3 of FIG. 1) excluding the first sub-pixel area (see SP1 of FIG. 1).

[0096] Next, as can be seen in FIG. 3f, a bank (210) may be formed on the first electrode (200a, 200b, 200c). In this case, the bank (210) may be pattern-formed so that a portion of the first electrode (200a, 200b, 200c) of each of the first sub-pixel region (see SP1 of FIG. 1), the second sub-pixel region (see SP2 of FIG. 1), and the third sub-pixel region (see SP3 of FIG. 1) is exposed. Specifically, in the case of the first sub-pixel region (see SP1 of FIG. 1), the bank (210) may be formed so that the upper surface of the third semiconductor layer (340) is exposed, and the remaining part of the upper surface of the first electrode (200a), the side surface of the first electrode (200a), and the side surfaces of the seed layer (310), the first semiconductor layer (320), the second semiconductor layer (330), and the third semiconductor layer (340) are covered. Meanwhile, in the case of the second sub-pixel region (see SP2 of FIG. 1) and the third sub-pixel region (see SP3 of FIG. 1), the bank (210) may be formed so that the part of the upper surface and the side surface of the first electrode (200b, 200c) are covered.

[0097] Next, as can be seen in FIG. 3g, a second light-emitting layer (ELb) and a third light-emitting layer (ELc) can be formed in each of the second sub-pixel area (see SP2 in FIG. 1) and the third sub-pixel area (see SP3 in FIG. 1).

[0098] The second light-emitting layer (ELb) and the third light-emitting layer (ELc) can be deposited as light-emitting layers that emit different colors using a FMM mask (Fine Metal Mask).

[0099] First, the second light-emitting layer (ELb) may be formed in the second sub-pixel area (see SP2 in FIG. 1) using one FMM mask for forming the second light-emitting layer (ELb), and then the third light-emitting layer (ELc) may be formed in the third sub-pixel area (see SP3 in FIG. 1) using another FMM mask for forming the third light-emitting layer (ELc). Meanwhile, the present invention is not limited thereto, and the second light-emitting layer (ELb) and the third light-emitting layer (ELc) may also be formed through an inkjet process.

[0100] Finally, as can be seen in FIG. 3h, a second electrode (220) can be formed on the entire surface of the substrate (100). Specifically, the second electrode (220) can be formed on the entire surface of the substrate (100) so as to cover the first light-emitting layer (ELa) provided in the first sub-pixel area (SP1), the second light-emitting layer (ELb) provided in the second sub-pixel area (SP2), the third light-emitting layer (ELc) provided in the third sub-pixel area (SP3), and the upper and side surfaces of the bank (210).

[0101] The second electrode (220) may be formed of magnesium (Mg), silver (Ag), or an alloy of magnesium (Mg) and silver (Ag). However, it is not limited thereto.

[0102] When the second electrode (220) is formed on the entire surface of the substrate (100), an electroluminescent display device according to an embodiment of the present invention can be implemented. Meanwhile, although not shown, after forming the second electrode (220), an encapsulation layer may be formed to block moisture or oxygen flowing in from the outside.

[0103] Although the embodiments of the present invention have been described in more detail with reference to the attached drawings, the present invention is not necessarily limited to these embodiments, and various modifications may be implemented without departing from the technical spirit of the present invention. Therefore, the embodiments disclosed in the present invention are not intended to limit the technical spirit of the present invention, but to explain it, and the scope of the technical spirit of the present invention is not limited by these embodiments. Therefore, it should be understood that the embodiments described above are illustrative in all respects and not restrictive. The protection scope of the present invention should be interpreted by the claims, and all technical ideas within a scope equivalent thereto should be interpreted as being included in the scope of the rights of the present invention.

Claims

1. A method for forming a thin film on a substrate having a first sub-pixel area and a second sub-pixel area, comprising a step of forming a first light-emitting layer in the first sub-pixel area; The step of forming a first light-emitting layer in the first sub-pixel area is: A thin film forming method comprising the step of forming a semiconductor layer containing gallium (Ga) in the first sub-pixel area.

2. In paragraph 1, A thin film forming method further comprising the step of forming a second light-emitting layer in the second sub-pixel area.

3. In paragraph 1, The step of forming a first light-emitting layer in the first sub-pixel area is: A thin film forming method further comprising, prior to the step of forming the semiconductor layer containing gallium, a step of forming a pattern to cover the second sub-pixel area while exposing the first sub-pixel area.

4. In paragraph 3, The step of forming a first light-emitting layer in the first sub-pixel area is: Between the step of forming the pattern and the step of forming the semiconductor layer containing gallium, a step of forming a seed layer containing metal in the first sub-pixel area is additionally included. A method for forming a thin film, characterized in that the step of forming the semiconductor layer containing the gallium is formed on the seed layer.

5. In paragraph 4, The step of forming a semiconductor layer containing gallium (Ga) on the seed layer is as follows: A step of forming a first semiconductor layer containing gallium (Ga) on the seed layer; A step of forming a second semiconductor layer containing gallium (Ga) on the first semiconductor layer; and A thin film forming method comprising a step of forming a third semiconductor layer containing gallium (Ga) on the second semiconductor layer.

6. In paragraph 5, The first semiconductor layer includes P-type gallium nitride (P-type GaN), The second semiconductor layer comprises intrinsic gallium nitride (Intrinsic-GaN) or indium gallium nitride (InGaN), A method for forming a thin film in which the third semiconductor layer includes N-type gallium nitride (N-type GaN).

7. In paragraph 4, A method for forming a thin film by depositing a semiconductor layer containing gallium (Ga) on the seed layer using atomic layer deposition (ALD) or metal-organic chemical vapor deposition (MOCVD).

8. In paragraph 4, A method for forming a thin film, wherein the step of forming a semiconductor layer containing gallium (Ga) on the seed layer is to deposit the semiconductor layer to a thickness of 1 μm or less.

9. In paragraph 3, further comprising a step of forming a second light-emitting layer in the second sub-pixel area, A thin film forming method further comprising a step of removing the pattern between the step of forming the first light-emitting layer and the step of forming the second light-emitting layer.

10. In paragraph 1, A thin film forming method in which the step of forming a semiconductor layer containing gallium (Ga) in the first sub-pixel area is performed at a temperature of 400°C or less.

11. In paragraph 4, A method for forming a thin film in which the lattice constant of the seed layer is the same as the lattice constant of the semiconductor layer containing gallium (Ga).

12. In paragraph 4, A method for forming a thin film, wherein the seed layer comprises at least one of titanium (Ti), aluminum nitride (AlN), and zinc oxide (ZnO).

13. A method for forming a thin film on a substrate having a first sub-pixel area and a second sub-pixel area, comprising a step of forming a first light-emitting layer in the first sub-pixel area; The step of forming the first light-emitting layer is: A step of preparing a substrate on which a seed layer is formed; and A thin film forming method comprising a step of forming a semiconductor layer containing gallium on the seed layer.

14. A step of forming a first sub-pixel region and a second sub-pixel region on a substrate; A step of forming a first electrode in each of the first sub-pixel area and the second sub-pixel area; and A step of forming a thin film on the first electrode of each of the first sub-pixel area and the second sub-pixel area, A method for manufacturing an electroluminescent display device, wherein the step of forming the above thin film is performed by a thin film forming method according to any one of claims 1 to 13 described above.

15. In paragraph 14, The step of forming the thin film further includes the step of forming a second light-emitting layer in the second sub-pixel area, The second light-emitting layer provided in the second sub-pixel area includes an organic material, A method for manufacturing an electroluminescent display device, wherein the first light-emitting layer provided in the first sub-pixel area emits blue light, and the second light-emitting layer provided in the second sub-pixel area emits a different color from the first light-emitting layer.

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