Copper / ceramic bonded body and insulated circuit board

Abstract

A copper / ceramic bonded body (10) formed by bonding copper member (12, 13) and a ceramic member (11), wherein the copper member has a Cu content of at least 99.96 mass%, and the ratio C / D is 0.93-1.05, where C is the proportion of KAM values of 0.25° or less in a measurement field of view arranged around a grain boundary triple point, and D is the proportion of KAM values of 0.25° or less within grains on the basis of the observation of a cross section of the copper member along a thickness direction after 3000 cycles of a thermal cycle test including holding at -65°C for 5 minutes and then holding at 150°C for 5 minutes in a liquid bath per cycle.

Description

Copper / ceramic bonded body and insulated circuit board

[0001] This invention relates to a copper / ceramic bonded body formed by bonding a copper member and a ceramic member, and an insulated circuit board formed by bonding a copper plate to the surface of a ceramic substrate. This application claims priority to Japanese Patent Application No. 2023-174525 filed in Japan on October 6, 2023, and Japanese Patent Application No. 2024-165171 filed in Japan on September 24, 2024, the contents of which are incorporated herein by reference.

[0002] In power modules, LED modules, and thermoelectric modules, power semiconductor elements, LED elements, and thermoelectric elements are bonded to an insulated circuit board having an insulating layer on one side of which a circuit layer made of a conductive material is formed. For example, power semiconductor elements for controlling high power used in wind power generation, electric vehicles, hybrid vehicles, etc. generate a large amount of heat during operation, so that insulated circuit boards have been widely used as substrates for mounting these elements, which include a ceramic substrate, a circuit layer formed by bonding a highly conductive metal plate to one side of the ceramic substrate, and a heat-dissipating metal layer formed by bonding a metal plate to the other side of the ceramic substrate.

[0003] For example, Patent Document 1 proposes an insulated circuit board in which a circuit layer and a metal layer are formed by bonding copper plates to one side and the other side of a ceramic substrate. In Patent Document 1, copper plates are placed on one side and the other side of the ceramic substrate with an Ag-Cu-Ti brazing filler metal interposed therebetween, and the copper plates are bonded by heat treatment (a so-called active metal brazing method). This active metal brazing method uses a brazing filler metal containing Ti, which is an active metal, improving the wettability between the molten brazing filler metal and the ceramic substrate, resulting in a good bond between the ceramic substrate and the copper plate. Here, a semiconductor element is bonded to the circuit layer, and a heat sink or the like is bonded to the metal layer.

[0004] Japanese Patent No. 3211856 (B)

[0005] Recently, the heat generation temperature of semiconductor elements mounted on insulated circuit boards has tended to increase, and they are sometimes used in high-current applications. For this reason, it has been considered to use pure copper, which has particularly excellent electrical and thermal conductivity, as the copper material for the circuit layers and metal layers. However, when pure copper is subjected to heat treatment, the crystal grains easily become coarse and the crystal grain size varies greatly.

[0006] Insulated circuit boards are sometimes subjected to severe thermal cycles, which can cause grain coarsening and uneven crystal growth in the circuit layer and metal layer, resulting in uneven strain within the circuit layer and metal layer (particularly at the grain boundaries). Such uneven strain within the circuit layer and metal layer can cause uneven yield stress within the circuit layer and metal layer, resulting in hardening and deformation of the circuit layer and metal layer, potentially reducing the reliability of the bond between the circuit layer and metal layer and the ceramic member. Furthermore, when other members (such as semiconductor elements and heat sinks) are bonded to the circuit layer and metal layer, the reliability of the bond between the circuit layer and metal layer and the other members can potentially be reduced.

[0007] The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to provide a copper / ceramic bonded body that exhibits excellent bonding between a ceramic member and a copper member and excellent thermal cycle reliability even when subjected to severe thermal cycles, and an insulated circuit board made of this copper / ceramic bonded body.

[0008] In order to solve the above-mentioned problems, a copper / ceramic joined body according to a first aspect of the present invention is a copper / ceramic joined body obtained by joining a copper member and a ceramic member, wherein the copper member has a Cu content of 99.96 mass% or more, and the copper member is subjected to 3,000 cycles of a thermal cycle test in a liquid bath (Galden solution), in which one cycle is held at −65° C. and then at 150° C. for 5 minutes. After the test, a cross section of the copper member along a thickness direction is observed, and a ratio C / D of a proportion C of KAM values ​​of 0.25° or less in a measurement field of view centered on a grain boundary triple junction to a proportion D of KAM values ​​of 0.25° or less within the grains is found to be 0.93 or more and 1.05 or less.

[0009] In the copper / ceramic bonded body according to aspect 1 of the present invention, the copper member has a Cu content of 99.96 mass% or more, which results in particularly excellent electrical and thermal conductivity. After 3,000 cycles of a thermal cycle test in a liquid bath (Galden liquid), in which one cycle is held at −65°C for 5 minutes and then at 150°C for 5 minutes, the ratio C / D of the proportion C of KAM values ​​of 0.25° or less in a measurement field of view centered on the grain boundary triple junction to the proportion D of KAM values ​​of 0.25° or less within the grains is in the range of 0.93 to 1.05. Therefore, even when subjected to severe thermal cycles, strain does not segregate at the grain boundaries, and hardening and deformation of the copper member can be suppressed.

[0010] A copper / ceramic joined body of Aspect 2 of the present invention is the copper / ceramic joined body of Aspect 1, characterized in that the nanoindentation hardness of the copper member at a position 100 μm away from the joint interface with the ceramic member is in the range of 0.40 GPa to 1.03 GPa. According to the copper / ceramic joined body of Aspect 2 of the present invention, the nanoindentation hardness at a position 100 μm away from the joint interface with the ceramic member is in the range of 0.40 GPa to 1.03 GPa, so that the joint interface between the copper member and the ceramic member does not harden more than necessary, and the joint reliability between the copper member and the ceramic member can be further improved.

[0011] A copper / ceramic joined body of Aspect 3 of the present invention is the copper / ceramic joined body of Aspect 1 or Aspect 2, characterized in that the copper member contains one or more A group elements selected from Ca, Ba, Sr, Zr, Hf, Y, Sc, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu, and one or more B group elements selected from O, S, Se, and Te, in a total amount of 10 ppm by mass or more and 300 ppm by mass or less. According to the copper / ceramic joined body of Aspect 3 of the present invention, the copper members contain either one or both of the above-mentioned group A element and group B element in a total amount within the range of 10 ppm by mass or more and 300 ppm by mass or less. Therefore, even when a thermal cycle is applied, crystal growth is suppressed, coarsening of crystal grains and non-uniform crystal growth do not occur, uneven distribution of strain is suppressed, and hardening and deformation of the copper members can be reliably suppressed.

[0012] A copper / ceramic joined body of Aspect 4 of the present invention is the copper / ceramic joined body of Aspect 3, characterized in that compound particles containing Cu and either or both of the A group element and the B group element are precipitated in the copper members. According to the copper / ceramic joined body of Aspect 4 of the present invention, since compound particles containing Cu and either or both of the A group element and the B group element are precipitated, crystal grain growth can be suppressed even when subjected to a thermal cycle, and coarsening of crystal grains and non-uniform crystal growth do not occur, uneven distribution of strain is suppressed, and hardening and deformation of the copper members can be reliably suppressed.

[0013] An insulated circuit board according to a fifth aspect of the present invention is an insulated circuit board comprising a copper plate bonded to the surface of a ceramic substrate, the copper plate having a Cu content of 99.96 mass% or more, and characterized in that after 3,000 cycles of a thermal cycle test in a liquid bath (Galden liquid), in which one cycle is held at −65°C for 5 minutes and then at 150°C for 5 minutes, a cross section of the copper plate along the thickness direction is observed, and the ratio C / D of the proportion C of KAM values ​​of 0.25° or less in a measurement field of view centered on a grain boundary triple junction to the proportion D of KAM values ​​within the grains of 0.25° or less is in the range of 0.93 to 1.05.

[0014] In the insulated circuit board of Aspect 5 of the present invention, the copper plate has a Cu content of 99.96 mass% or more, which results in particularly excellent electrical and thermal conductivity. Furthermore, after 3,000 cycles of thermal cycle testing in a liquid bath (Galden solution), in which one cycle consists of holding at −65°C for 5 minutes and at 150°C for 5 minutes, the ratio C / D of the proportion C of KAM values ​​of 0.25° or less in a measurement field centered on the grain boundary triple junction to the proportion D of KAM values ​​of 0.25° or less within the grains is in the range of 0.93 to 1.05. Therefore, even when subjected to severe thermal cycles, strain does not segregate at the crystal grain boundaries, and hardening and deformation of the copper plate can be suppressed.

[0015] An insulated circuit board of Aspect 6 of the present invention is the insulated circuit board of Aspect 5, characterized in that the copper plate has a nanoindentation hardness in the range of 0.40 GPa or more and 1.03 GPa or less at a position 100 μm away from the bonding interface with the ceramic substrate. According to the insulated circuit board of Aspect 6 of the present invention, the nanoindentation hardness in the range of 0.40 GPa or more and 1.03 GPa or less at a position 100 μm away from the bonding interface with the ceramic substrate is prevented from hardening more than necessary, and the bonding reliability between the copper plate and the ceramic substrate can be further improved.

[0016] An insulated circuit board of Aspect 7 of the present invention is the insulated circuit board of Aspect 5 or Aspect 6, characterized in that the copper member contains Ca, Ba, Sr, Zr, Hf, Y, Sc, La, Ce, Pr, and the copper plate contains one or more A group elements selected from Ca, Ba, Sr, Zr, Hf, Y, Sc, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, and either one or both of one or more B group elements selected from O, S, Se, and Te, in a total amount of 10 ppm by mass or more and 300 ppm by mass or less. According to the insulating circuit board of Aspect 7 of the present invention, the copper plate contains either one or both of the above-mentioned group A elements and group B elements in a total amount within the range of 10 ppm by mass or more and 300 ppm by mass or less. Therefore, even when subjected to a thermal cycle, crystal growth is suppressed, coarsening of crystal grains and non-uniform crystal growth do not occur, uneven distribution of strain is suppressed, and hardening and deformation of the copper plate can be reliably suppressed.

[0017] An insulated circuit board of Aspect 8 of the present invention is the insulated circuit board of Aspect 7, characterized in that compound particles containing Cu and either or both of the group A element and the group B element are precipitated on the copper plate. According to the insulated circuit board of Aspect 8 of the present invention, since compound particles containing Cu and either or both of the group A element and the group B element are precipitated on the copper plate, crystal grain growth can be suppressed even when subjected to a thermal cycle, and coarsening of crystal grains and uneven crystal growth do not occur, uneven distribution of strain is suppressed, and hardening and deformation of the copper plate can be reliably suppressed.

[0018] According to the present invention, it is possible to provide a copper / ceramic bonded body that exhibits excellent bonding between a ceramic member and a copper member and excellent thermal cycle reliability even when subjected to severe thermal cycles, and an insulated circuit board made of this copper / ceramic bonded body.

[0019] FIG. 1 is a schematic explanatory diagram of a power module using an insulating circuit board according to an embodiment of the present invention; FIG. 2 is an explanatory diagram of KAM values; FIG. 3 is a photograph of a structure observation of a circuit layer and a metal layer of an insulating circuit board according to an embodiment of the present invention; FIG. 4 is a flow diagram of a manufacturing method of an insulating circuit board according to an embodiment of the present invention; FIG. 5 is a schematic explanatory diagram of a manufacturing method of an insulating circuit board according to an embodiment of the present invention; and FIG. 6 is a graph showing an example of measurement results of nanoindentation hardness of a circuit layer and a metal layer of an insulating circuit board in an example.

[0020] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

[0021] A copper / ceramic joined body according to an embodiment of the present invention is an insulating circuit board 10 formed by joining a ceramic substrate 11 as a ceramic member made of ceramic to a copper plate 22 (circuit layer 12) and a copper plate 23 (metal layer 13) as copper members made of copper or a copper alloy. Fig. 1 shows a power module 1 including the insulating circuit board 10 according to this embodiment.

[0022] This power module 1 includes an insulating circuit board 10 on which a circuit layer 12 and a metal layer 13 are arranged, a semiconductor element 3 bonded to one surface of the circuit layer 12 (the upper surface in FIG. 1 ) via a bonding layer 2, and a heat sink 5 disposed on the other side of the metal layer 13 (the lower side in FIG. 1 ).

[0023] The semiconductor element 3 is made of a semiconductor material such as Si. The semiconductor element 3 and the circuit layer 12 are bonded via a bonding layer 2. The bonding layer 2 is made of, for example, a Sn—Ag, Sn—In, or Sn—Ag—Cu solder material.

[0024] The heat sink 5 is used to dissipate heat from the insulating circuit board 10. The heat sink 5 is made of copper or a copper alloy, and in this embodiment, it is made of phosphorus-deoxidized copper. The heat sink 5 is provided with a flow path for a cooling fluid to flow. In this embodiment, the heat sink 5 and the metal layer 13 are joined by a solder layer 7 made of a solder material. The solder layer 7 is made of, for example, a Sn—Ag-based, Sn—In-based, or Sn—Ag—Cu-based solder material.

[0025] As shown in FIG. 1 , the insulating circuit board 10 of this embodiment includes a ceramic substrate 11, a circuit layer 12 disposed on one surface (the upper surface in FIG. 1 ) of the ceramic substrate 11, and a metal layer 13 disposed on the other surface (the lower surface in FIG. 1 ) of the ceramic substrate 11.

[0026] The ceramic substrate 11 is made of silicon nitride (Si) which has excellent insulating and heat dissipating properties. ３ N ４ In this embodiment, the ceramic substrate 11 is made of a ceramic material such as silicon nitride (SiN), which has particularly excellent heat dissipation properties. ３ N ４ The thickness of the ceramic substrate 11 is set to, for example, within a range of 0.2 mm to 1.5 mm, and is set to 0.32 mm in this embodiment.

[0027] As shown in Fig. 5, the circuit layer 12 is formed by bonding a copper plate 22 to one surface (the upper surface in Fig. 5) of the ceramic substrate 11. A circuit pattern is formed on this circuit layer 12, and one surface (the upper surface in Fig. 1) serves as a mounting surface on which the semiconductor element 3 is mounted. The thickness of the copper plate 22 that forms the circuit layer 12 is set within a range of 0.1 mm to 2.0 mm, and is set to 0.8 mm in this embodiment.

[0028] 5, the metal layer 13 is formed by joining a copper plate 23 to the other surface (the lower surface in FIG. 5) of the ceramic substrate 11. This metal layer 13 has the effect of efficiently transferring heat from the semiconductor element 3 to the heat sink 5. The thickness of the copper plate 23 that forms the metal layer 13 is set within the range of 0.1 mm to 2.0 mm, and is set to 0.8 mm in this embodiment.

[0029] In the insulating circuit board 10 of this embodiment, the circuit layer 12 and the metal layer 13 are made of a pure copper material with a Cu content of 99.96 mass% or more, and after performing a thermal cycle test in a liquid bath (Galden liquid) for 3,000 cycles, in which one cycle is held at −65° C. and then at 150° C. for 5 minutes, a cross section of the copper member along the thickness direction is observed, and the ratio C / D of the proportion C of KAM values ​​of 0.25° or less in a measurement field centered on the grain boundary triple junction to the proportion D of KAM values ​​within the grains of 0.25° or less is found to be in the range of 0.93 to 1.05.

[0030] Here, the KAM (Kernel Average Misorientation) value measured by EBSD is a value calculated by averaging the misorientation between one pixel and the pixels surrounding it, as shown in Figure 2. Since the shape of a pixel is a regular hexagon, when the proximity degree is set to 1, the average value of the misorientation between six adjacent pixels is calculated as the KAM value. By using the KAM value, it is possible to visualize the local misorientation, i.e., the distribution of strain. In Figure 2, the KAM value at measurement point MP can be calculated using the following formula. KAM value of measurement point MP = (orientation difference from A + orientation difference from B + ... orientation difference from F) / 6 In other words, in this embodiment, the ratio C / D of the proportion C of KAM values ​​of 0.25° or less in the measurement field of view centered on the grain boundary triple junction to the proportion D of KAM values ​​of 0.25° or less within the grain is set to be in the range of 0.93 to 1.05, so that the circuit layer 12 (copper plate 22) and the metal layer 13 (copper plate 23) are pure copper materials with a Cu content of 99.96 mass% or more, and strain is not unevenly distributed at the crystal grain boundaries even when subjected to thermal cycle loading.

[0031] Furthermore, in the insulating circuit board 10 of this embodiment, it is preferable that the nanoindentation hardness of the circuit layer 12 and the metal layer 13 at a position 100 μm away from the bonding interface with the ceramic substrate 11 is in the range of 0.40 GPa or more and 1.03 GPa or less.

[0032] Furthermore, in the insulating circuit board 10 of this embodiment, the circuit layer 12 (copper plate 22) and the metal layer 13 (copper plate 23) preferably contain one or more A group elements selected from Ca, Ba, Sr, Zr, Hf, Y, Sc, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu, and one or more B group elements selected from O, S, Se, and Te, in a total amount within the range of 10 ppm by mass or more and 300 ppm by mass or less.

[0033] Furthermore, in the insulating circuit board 10 of this embodiment, as shown in FIG. 3 , it is preferable that compound particles 18 containing Cu and either or both of one or more A group elements selected from Ca, Ba, Sr, Zr, Hf, Y, Sc, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu and one or more B group elements selected from O, S, Se, and Te are precipitated on the circuit layer 12 (copper plate 22) and the metal layer 13 (copper plate 23).

[0034] Furthermore, in the insulating circuit board 10 of this embodiment, no cracks were found in the ceramic substrate 11 after 3,000 cycles of a thermal cycle test in which one cycle consisted of holding the circuit board in a liquid bath (Galden liquid) at −65°C for 5 minutes and then at 150°C for 5 minutes.

[0035] Furthermore, in the insulating circuit board 10 of this embodiment, after performing a thermal cycle test in a liquid bath (Galden liquid) in which one cycle is held at −65° C. for 5 minutes and then at 150° C. for 5 minutes, for 3,000 cycles, it is preferable that the average crystal grain size in a cross section along the thickness direction of the circuit layer 12 and the metal layer 13 be 100 μm or less.

[0036] Here, the reasons for specifying the ratio C / D of the proportion C of KAM values ​​of 0.25° or less in a measurement field centered on the grain boundary triple junction after the thermal cycle test to the proportion D of KAM values ​​of 0.25° or less within the grains, the nanoindentation hardness at a position 100 μm away from the bonding interface with the ceramic substrate 11, the composition of the circuit layer 12 (copper plate 22) and the metal layer 13 (copper plate 23), the compound particles, the presence or absence of cracks in the ceramic substrate 11 after the thermal cycle test, and the average crystal grain size after the thermal cycle test, as described above, for the insulating circuit board 10 of this embodiment, are explained below.

[0037] (C / D is the ratio of C, the proportion of KAM values ​​of 0.25° or less in a measurement field of view centered on the grain boundary triple junction after the thermal cycle test, to D, the proportion of KAM values ​​of 0.25° or less within the grains.) Power module 1 using insulating circuit board 10 of this embodiment is used in high-temperature environments such as engine compartments, and may be subjected to severe thermal cycles. When strain accumulates at the grain boundaries during the thermal cycle test, the structure hardens, and eventually the stress caused by the thermal cycle test cannot be alleviated, resulting in destruction of the interface between the copper and the ceramic. In this embodiment, as described above, the ratio C / D, between the proportion C of KAM values ​​of 0.25° or less in the measurement field centered on the grain boundary triple junction after the thermal cycle test and the proportion D of KAM values ​​of 0.25° or less within the grains, is in the range of 0.93 to 1.05. Therefore, even after 3,000 cycles of a rigorous thermal cycle test in a liquid bath (Galden liquid), in which one cycle consists of a 5-minute hold at −65°C and a 5-minute hold at 150°C, strain is not unevenly distributed at the grain boundaries. Furthermore, the ratio C / D, between the proportion C of KAM values ​​of 0.25° or less in the measurement field centered on the grain boundary triple junction after the thermal cycle test and the proportion D of KAM values ​​of 0.25° or less within the grains, is preferably 0.93 or greater, and more preferably 0.98 or greater. Although the ratio C / D is not particularly limited, it is preferably 1.00 or less, and even when taking into account errors due to the field of view, etc., it is approximately 1.05 or less.

[0038] (Nanoindentation Hardness) In the insulating circuit board 10 of this embodiment, if the hardness of the circuit layer 12 and the metal layer 13 near the bonding interface with the ceramic substrate 11 is sufficiently low, the occurrence of cracks during thermal cycle loading can be suppressed. Therefore, in this embodiment, the nanoindentation hardness of the circuit layer 12 and the metal layer 13 at a position 100 μm away from the bonding interface with the ceramic substrate 11 is preferably in the range of 0.40 GPa or more and 1.03 GPa or less. Note that the lower the nanoindentation hardness, the more desirable it is, with 0.90 GPa or less being more preferable, and 0.81 GPa or less being even more preferable. On the other hand, since lowering the nanoindentation hardness more than necessary requires significant costs, the lower limit of the nanoindentation hardness is preferably 0.60 GPa or more, and more preferably 0.70 GPa or more.

[0039] (Cu Content: 99.96% by mass or More) The circuit layer 12 and metal layer 13 of the insulating circuit board 10 of this embodiment are required to have excellent electrical conductivity and thermal conductivity in order to suppress heat generation during electrical conduction. Therefore, in this embodiment, the purity of Cu in the circuit layer 12 (copper plate 22) and the metal layer 13 (copper plate 23) is specified to be 99.96% by mass or more. The purity of Cu is preferably 99.965% by mass or more, and more preferably 99.97% by mass or more. There is no particular upper limit to the purity of Cu, but if it exceeds 99.999% by mass, a special refining process is required, significantly increasing manufacturing costs, so it is preferably 99.999% by mass or less. In addition, if the purity of Cu in the circuit layer 12 (copper plate 22) and the metal layer 13 (copper plate 23) is 99.96 mass % or more, elements such as Mg may be contained in addition to the A group elements and B group elements.

[0040] (Total content of either or both of group A elements and group B elements: 10 ppm by mass or more and 300 ppm by mass or less) In the circuit layer 12 and metal layer 13 of the insulating circuit board 10 of this embodiment, by containing either or both of group A elements (Ca, Ba, Sr, Zr, Hf, Y, Sc, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu) and group B elements (O, S, Se, Te), compound particles 18 containing Cu and either or both of group A elements and group B elements are formed. Because these compound particles 18 are stable at high temperatures, they can suppress the migration of crystal grain boundaries at high temperatures, making it possible to suppress the growth of crystal grains during thermal cycling. Furthermore, the presence of compound particles 18 makes it possible to obtain little change in the crystalline structure even after thermal cycling, and a more uniform crystalline structure. On the other hand, if either or both of the group A elements and the group B elements are contained in large amounts, there is a high possibility that the periphery of the furnace will be contaminated, which may adversely affect productivity.

[0041] Therefore, when either or both of group A elements and group B elements are contained, the total content thereof is preferably in the range of 10 mass ppm to 300 mass ppm. The total content of either or both of group A elements and group B elements is more preferably 15 mass ppm or more, and even more preferably 20 mass ppm or more. The total content of either or both of group A elements and group B elements is more preferably 290 mass ppm or less, and even more preferably 280 mass ppm or less.

[0042] (Compound particles containing Cu and either or both of the A group element and the B group element) As described above, the compound particles 18 containing Cu and either or both of the A group element and the B group element have high stability at high temperatures. Therefore, during thermal cycle loading, the pinning effect of the compound particles 18 can sufficiently suppress the growth of crystal grains. In particular, when the ratio A / B of the total content A ppm of the A group elements to the total content B ppm of the B group elements is greater than 1.0, the reaction between the A group elements and the B group elements can be suppressed, and a compound consisting of either or both of the A group elements and the B group elements and Cu can be reliably formed. The pinning effect of the compound can further reliably suppress the growth of crystal grains during heat treatment.

[0043] (Presence or Absence of Cracks in Substrate After Thermal Cycle Test) After 3,000 cycles of thermal cycle test in a liquid bath (Galden liquid), in which one cycle consisted of holding at −65°C for 5 minutes and at 150°C for 5 minutes, the insulating circuit board was evaluated for the presence or absence of cracks using an ultrasonic flaw detector (FineSAT200 manufactured by Hitachi Power Solutions Co., Ltd.). In the insulating circuit board 10 (copper / ceramic bonded body) of this embodiment, cracks were confirmed in any of the circuit layer 12, the metal layer 13, and the ceramic substrate 11. On the other hand, in the insulating circuit board using oxygen-free copper, slight cracks occurred in the ceramic substrate at the copper / ceramic interface.

[0044] (Average Crystal Grain Size After Thermal Cycle Test) A power module 1 using the insulating circuit board 10 according to this embodiment may be used in a high-temperature environment, such as an engine compartment, and subjected to severe thermal cycles. Even after 3,000 cycles of a severe thermal cycle test in a liquid bath (Galden liquid), in which one cycle is held at −65°C for 5 minutes and then at 150°C for 5 minutes, if the average crystal grain size is 100 μm or less, coarsening of the crystal grains after the thermal cycle test is suppressed. The average crystal grain size after 3,000 cycles of the thermal cycle test is preferably 90 μm or less, and more preferably 80 μm or less. Although a smaller average crystal grain size after 3,000 cycles of the thermal cycle test is desirable, it may be 30 μm or more or 50 μm or more.

[0045] A method for manufacturing the insulating circuit board 10 according to this embodiment will be described below with reference to FIGS.

[0046] 5, a bonding material 25 is disposed between the ceramic substrate 11 and a copper plate 22 that will become the circuit layer 12, and between the ceramic substrate 11 and a copper plate 23 that will become the metal layer 13. As the bonding material 25, for example, a bonding material containing Ag and an active metal (Ti, Zr, Nb, Hf), that is, an Ag-Ti based brazing material (specifically, an Ag-Cu-Ti material), etc. can be used.

[0047] (Laminating Step S02) Next, the copper plate 22 and the ceramic substrate 11 are laminated with the bonding material 25 interposed therebetween, and the ceramic substrate 11 and the copper plate 23 are laminated with the bonding material 25 interposed therebetween.

[0048] (Bonding step S03) Next, the stacked copper plate 22, bonding material 25, ceramic substrate 11, bonding material 25, and copper plate 23 are pressed in the stacking direction and heated in a vacuum furnace to bond the copper plate 22, ceramic substrate 11, and copper plate 23. Here, it is preferable to set the temperature conditions and the like in the bonding step S03 appropriately depending on the bonding material 25 used. It is preferable to set the pressure load P in the bonding step S03 within a range of 0.098 MPa or more and 1.47 MPa or less.

[0049] As described above, the insulating circuit board 10 of this embodiment is manufactured by the bonding material applying step S01, the laminating step S02, and the bonding step S03.

[0050] (Heat sink bonding step S04) Next, the heat sink 5 is bonded to the other surface of the metal layer 13 of the insulating circuit board 10. The insulating circuit board 10 and the heat sink 5 are stacked with a solder material interposed therebetween and loaded into a heating furnace, where the insulating circuit board 10 and the heat sink 5 are solder-bonded to each other via the solder layer 7.

[0051] (Semiconductor element bonding step S05) Next, the semiconductor element 3 is soldered to one surface of the circuit layer 12 of the insulating circuit board 10. Through the above steps, the power module 1 shown in FIG.

[0052] Insulated circuit board 10 (copper / ceramic bonded body) of this embodiment configured as described above has a Cu content of 99.96 mass% or more in circuit layer 12 and metal layer 13, resulting in particularly excellent electrical conductivity and thermal conductivity of circuit layer 12 and metal layer 13. After 3,000 cycles of thermal cycle testing in a liquid bath (Galden solution), in which one cycle consisted of holding at −65° C. for 5 minutes and at 150° C. for 5 minutes, the ratio C / D of the proportion C of KAM values ​​of 0.25° or less in a measurement field centered on the grain boundary triple junction to the proportion D of KAM values ​​of 0.25° or less within the grains was 0.93 or more and 1.05 or less. Therefore, even when subjected to severe thermal cycles, strain does not segregate at the grain boundaries, and hardening and deformation of circuit layer 12 and metal layer 13 can be suppressed.

[0053] In the insulating circuit board 10 of this embodiment, when the nanoindentation hardness at a position 100 μm away from the bonding interface between the circuit layer 12 and the metal layer 13 and the ceramic substrate 11 is within the range of 0.40 GPa or more and 1.03 GPa or less, the bonding interface between the circuit layer 12 and the metal layer 13 and the ceramic substrate 11 is not hardened more than necessary, and the occurrence of cracks during thermal cycle loading can be suppressed, thereby further improving the bonding reliability between the circuit layer 12 and the metal layer 13 and the ceramic substrate 11.

[0054] In the insulating circuit board 10 of the present embodiment, when the circuit layer 12 and the metal layer 13 contain one or more group A elements selected from Ca, Ba, Sr, Zr, Hf, Y, Sc, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu, and one or more group B elements selected from O, S, Se, and Te in a total amount of 10 ppm by mass or more and 300 ppm by mass or less, crystal growth is suppressed, coarsening of crystal grains and non-uniform crystal growth do not occur, uneven distribution of strain is suppressed, and hardening and deformation of the circuit layer 12 and the metal layer 13 can be reliably suppressed even when subjected to a thermal cycle.

[0055] In the insulated circuit board 10 of this embodiment, when compound particles 18 containing Cu and either or both of the group A element and the group B element are precipitated in the circuit layer 12 and the metal layer 13, even when a thermal cycle is applied, the growth of crystal grains can be suppressed, coarsening of crystal grains and uneven crystal growth do not occur, uneven distribution of strain is suppressed, and hardening and deformation of the copper plate can be reliably suppressed.

[0056] Although the embodiments of the present invention have been described above, the present invention is not limited thereto and can be modified as appropriate within the scope of the technical concept of the invention. For example, in the present embodiments, a power module is configured by mounting semiconductor elements on an insulating circuit board, but the present invention is not limited thereto. For example, an LED module may be configured by mounting LED elements on a circuit layer of an insulating circuit board, or a thermoelectric module may be configured by mounting thermoelectric elements on a circuit layer of an insulating circuit board.

[0057] In addition, in the insulating circuit board of this embodiment, the ceramic substrate is made of silicon nitride (Si ３ N ４ ) has been described as an example, but the present invention is not limited to this, and aluminum nitride (AlN), alumina (Al ２ O ３ ) or other ceramic substrates may also be used.

[0058] Furthermore, in this embodiment, the circuit layer is described as being formed by bonding a copper plate to a ceramic substrate, but this is not limited thereto, and the circuit layer may be formed by bonding copper pieces punched out of a copper plate in a circuit pattern to a ceramic substrate. Also, the circuit pattern may be formed by etching.

[0059] The results of confirmation experiments conducted to confirm the effects of the present invention will be described below.

[0060] First, a ceramic substrate (40 mm × 40 mm × 0.32 mm thick) made of silicon nitride was prepared. Then, in the present invention, copper plates (37 mm × 37 mm × 0.8 mm thick) with the compositions shown in Tables 1 and 2 were used as copper plates to form the circuit layer and metal layer. As a comparative example, a copper plate (37 mm × 37 mm × 0.8 mm thick) made of commercially available oxygen-free copper was used.

[0061] Next, a bonding material containing Ag powder and active metal powder was applied to both sides of the ceramic substrate to a thickness of approximately 15 μm. Ti was selected as the active metal. The amounts of the metal powders in the paste were 94 mass% Ag and 6 mass% Ti. Next, the copper plate and the ceramic substrate were stacked and bonded together by holding them in a vacuum at a temperature of 780°C or higher but lower than 900°C for 30 minutes under a pressure of 0.6 MPa. In this manner, insulated circuit boards (copper / ceramic bonded bodies) of the present invention and comparative examples were produced.

[0062] (KAM Value After Thermal Cycle Test) The obtained insulating circuit board (copper / ceramic bonded body) was subjected to 3,000 thermal cycles in a liquid bath (Galden liquid) under the conditions of -65°C x 5 min ←→ 150°C x 5 min. After the thermal cycle test, the KAM value was measured in a measurement field centered on the grain boundary triple junction, and the ratio C / D of the proportion C of KAM values ​​of 0.25° or less to the proportion D of KAM values ​​within the grains of 0.25° or less was calculated. The evaluation results are shown in Table 1.

[0063] (Average Crystal Grain Size After Thermal Cycling Test) The average crystal grain size in the cross section along the thickness direction of the copper plate was measured before and after the thermal cycling test. The evaluation results are shown in Table 1. The average crystal grain size was measured as follows. The obtained insulating circuit board was cut in the lamination direction, and the cut surface was mechanically polished using waterproof abrasive paper and diamond abrasive grains, followed by finish polishing using a colloidal silica solution. Subsequently, using a scanning electron microscope, an electron beam was irradiated to individual measurement points (pixels) within the measurement range of the sample surface. Orientation analysis using backscattered electron diffraction determined that boundaries where the orientation difference between adjacent measurement points was 5° or more were defined as grain boundaries, boundaries where the orientation difference was 5° or more but less than 15° were defined as low-angle grain boundaries, and boundaries where the orientation difference was 15° or more were defined as high-angle grain boundaries. In this case, twin boundaries were also defined as high-angle grain boundaries. Furthermore, measurements of each sample were performed with the thickness from the Cu / Si3N4 interface to the Cu circuit layer surface as the vertical axis of the field of view, with a thickness direction:horizontal direction ratio of 2:1. From the obtained orientation analysis results, a grain boundary map was created using high-angle grain boundaries. In accordance with the cutting method of JIS H 0501, five line segments of predetermined length were drawn vertically and horizontally on the grain boundary map, the number of crystal grains that were completely cut was counted, and the average value of the cut lengths was recorded as the crystal grain size.

[0064] (Nanoindentation Hardness) The obtained insulating circuit board (copper / ceramic bonded body) was cut in the lamination direction, and the indentation hardness was measured at five locations in one visual field and five locations in five visual fields at positions 100 μm from the bonding surface of the ceramic substrate toward the circuit layer and metal layer, for a total of 50 locations, and the average value was calculated. The evaluation results are shown in Table 1. Figure 6 shows an example of the measurement results of the nanoindentation hardness of the circuit layer 12 and metal layer 13 of this embodiment.

[0065] (Presence or absence of compound particles) The obtained insulating circuit board was cut in the lamination direction, and then a region (17 μm × 23 μm) including the bonding interface between the copper plate and the ceramic substrate was observed at the cross section at the center in the width direction of the board using a scanning electron microscope (GeminiSEM 500 manufactured by Carl Zeiss) at a magnification of 5000 times and an acceleration voltage of 5.0 kV. In this observation, SEM images and element maps of one or more A group elements selected from Ca, Ba, Sr, Zr, Hf, Y, Sc, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu, and one or more B group elements selected from O, S, Se, and Te were obtained, and if a granular region was observed in the SEM image and Cu and an A group element or a B group element coexisted in this region, the compound particles were evaluated as "present." The evaluation results are shown in Table 1.

[0066] (Bonding rate before and after thermal cycles) 3,000 thermal cycles were performed in a liquid bath (Galden liquid) under conditions of -65°C x 5 min ←→ 150°C x 5 min. The bonding rate between the copper plate and the ceramic substrate was measured before and after the thermal cycles. The measurement results are shown in Table 1. The bonding rate of the bonding interface between the ceramic substrate and the metal piece after bonding was evaluated using an ultrasonic flaw detector (FineSAT200 manufactured by Hitachi Power Solutions Co., Ltd.) and calculated using the following formula. Here, the initial bonding area was defined as the area to be bonded before bonding, i.e., the area of ​​the circuit layer. Since peeling is indicated by a white area within the bonded area in an image obtained by binarizing the ultrasonic flaw detection image, the area of ​​this white area was defined as the peeled area (non-bonded area). (Bonding rate) = {(initial bonding area) - (non-bonded area)} / (initial bonding area) x 100

[0067]

[0068]

[0069] In the inventive examples, after thermal cycling, the ratio C / D (the percentage C of the KAM values ​​in the measurement field centered on the grain boundary triple junction where the KAM value is 0.25° or less to the percentage D of the KAM values ​​in the grains where the KAM value is 0.25° or less) was within the range of 0.93 to 1.05. Furthermore, in the inventive examples, similar to the comparative example (commercially available oxygen-free copper), the hardness decreased with increasing distance from the bonding interface with the ceramic substrate, and was confirmed to be sufficiently low at a position 100 μm away from the bonding interface with the ceramic substrate. Furthermore, in the inventive examples, the bonding rate was high even after thermal cycling, and thermal cycling reliability was excellent.

[0070] It was confirmed that the examples of the present invention can provide an insulated circuit board (copper / ceramic bonded body) that has excellent bonding between a ceramic substrate (ceramic member) and a copper plate (copper member) and is excellent in thermal cycle reliability even when subjected to severe thermal cycles.

[0071] According to the present invention, it is possible to provide a copper / ceramic joined body which has excellent bondability between a ceramic member and a copper member and excellent reliability against thermal cycles even when subjected to severe thermal cycles.

[0072] 10 Insulated circuit board (copper / ceramic bonded body) 11 Ceramic substrate (ceramic member) 12 Circuit layer (copper member) 13 Metal layer (copper member) 18 Compound particle MP Measurement point

Claims

1. A copper / ceramic bonded body formed by bonding a copper member and a ceramic member, the copper member having a Cu content of 99.96 mass% or more, characterized in that after 3,000 cycles of a thermal cycle test in a liquid bath, in which one cycle is held at -65°C for 5 minutes and then at 150°C for 5 minutes, a cross section of the copper member along the thickness direction is observed, and the ratio C / D of the proportion C of KAM values ​​of 0.25° or less in a measurement field centered on a grain boundary triple junction to the proportion D of KAM values ​​of 0.25° within the grains is within the range of 0.93 to 1.

05.

2. A copper / ceramic bonded body as described in claim 1, characterized in that the nanoindentation hardness of the copper member at a position 100 μm away from the bonded interface with the ceramic member is in the range of 0.40 GPa or more and 1.03 GPa or less.

3. The copper / ceramic bonded body according to claim 1, characterized in that the copper member contains one or more of group A elements selected from Ca, Ba, Sr, Zr, Hf, Y, Sc, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu, and one or more of group B elements selected from O, S, Se, and Te in a total amount within the range of 10 ppm by mass or more and 300 ppm by mass or less.

4. A copper / ceramic bonded body according to claim 3, characterized in that compound particles containing Cu and either or both of the A group element and the B group element are precipitated in the copper member.

5. An insulated circuit board having a copper plate bonded to the surface of a ceramic substrate, the copper plate having a Cu content of 99.96 mass% or more, and after 3,000 cycles of a thermal cycle test in a liquid bath, in which one cycle is held at -65°C for 5 minutes and then at 150°C for 5 minutes, the cross section of the copper plate along the thickness direction is observed, and the ratio C / D of the proportion C of KAM values ​​of 0.25° or less in a measurement field centered on a grain boundary triple junction to the proportion D of KAM values ​​of 0.25° or less within the grains is within the range of 0.93 to 1.

05.

6. The insulating circuit board according to claim 5, characterized in that the nanoindentation hardness of the copper plate at a position 100 μm away from the bonding interface with the ceramic substrate is within the range of 0.40 GPa to 1.03 GPa.

7. The insulating circuit board according to claim 5, characterized in that the copper plate contains one or more types of group A elements selected from Ca, Ba, Sr, Zr, Hf, Y, Sc, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu, and one or more types of group B elements selected from O, S, Se, and Te, in a total amount within the range of 10 ppm by mass or more and 300 ppm by mass or less.

8. The insulating circuit board according to claim 7, characterized in that compound particles containing Cu and either or both of the A group element and the B group element are precipitated on the copper plate.

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