Source follower circuit, and chip

Abstract

Disclosed in the present application are a source follower circuit, and a chip. The circuit comprises first to fourth transistors, a first current source, a second current source, a first load module, and a second load module, wherein a first electrode of the first transistor and a first electrode of the second transistor respectively receive a first input signal and a second input signal, a second electrode of the first transistor and a second electrode of the second transistor are respectively connected to the third transistor and the fourth transistor and respectively connected to the first current source and the second current source, and a third electrode of the first transistor and a third electrode of the second transistor are respectively connected to the first load module and the second load module; and a first electrode of the third transistor and a first electrode of the fourth transistor respectively receive the first input signal and the second input signal, a second electrode of the third transistor and a second electrode of the fourth transistor are connected to a power source, a third electrode of the third transistor and a third electrode of the fourth transistor are respectively connected to the first transistor and the second transistor, a substrate of the third transistor is connected to the third electrode of the fourth transistor, and a substrate of the fourth transistor is connected to the third electrode of the third transistor. In the present application, the third transistor and the fourth transistor are arranged to be cross-coupled, thereby improving the linearity and the driving capability of the circuit and reducing the power consumption of the circuit.

Description

Source follower circuit and chip

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on October 31, 2023, with application number 202311439954.8 and application name “Source Follower Circuit and Chip”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of integrated circuit technology, and in particular to a source follower circuit and chip. Background Art

[0003] The input buffer is usually used in the front-end circuit of the analog-to-digital converter. It is one of the most important modules of the analog-to-digital converter and directly determines the accuracy of the analog-to-digital converter. It is usually required to have high linearity for the input signal.

[0004] The input buffer is usually a source follower structure. However, the disadvantage of the traditional source follower structure is that it has a weak ability to suppress nonlinearity and is prone to nonlinear problems. Especially when the input signal frequency is very high, its linearity and gain will drop significantly.

[0005] Summary of the Invention

[0006] In view of the above problems, the present application provides a source follower circuit and chip to solve the above technical problems.

[0007] In a first aspect, the present application provides a source follower circuit, comprising: first to fourth transistors, a first current source and a second current source, a first load module and a second load module,

[0008] The first electrodes of the first transistor and the second transistor are respectively used to receive the first input signal and the second input signal, the second electrodes are respectively connected to the third transistor and the fourth transistor, and are respectively connected to the first current source and the second current source, the third electrodes are respectively connected to the first load module and the second load module, the substrate of the first transistor is short-circuited to the third electrode, and the substrate of the second transistor is short-circuited to the third electrode, and the first input signal and the second input signal are a pair of differential input signals;

[0009] The first electrodes of the third transistor and the fourth transistor are respectively used to receive the first input signal and the second input signal, the second electrodes are used to connect to the power supply, the third electrodes are respectively connected to the first transistor and the second transistor, the substrate of the third transistor is connected to the third electrode of the fourth transistor, and the substrate of the fourth transistor is connected to the third electrode of the third transistor;

[0010] The first current source and the second current source are further connected to the first load module and the second load module respectively.

[0011] In some embodiments, the source follower circuit provided by the present application further includes a first capacitor and a second capacitor.

[0012] One end of the first capacitor and the second capacitor are connected to the first transistor and the first electrode of the transistor respectively, and the other end thereof are connected to the second electrode of the first transistor and the second transistor respectively.

[0013] In some embodiments, the source follower circuit provided by the present application further includes a third capacitor, a fourth capacitor, a first resistor, and a second resistor.

[0014] One end of the third capacitor and the fourth capacitor are connected to the first electrodes of the first transistor and the second transistor respectively, and the other end thereof are connected to the first electrodes of the third transistor and the fourth transistor respectively;

[0015] One end of the first resistor and the second resistor is connected to the first electrode of the third transistor and the fourth transistor, and the other end is used to connect to the power supply.

[0016] In some embodiments, the source follower circuit provided by the present application further includes a fifth capacitor and a sixth capacitor.

[0017] One end of the fifth capacitor and the sixth capacitor are connected to the first electrodes of the first transistor and the second transistor to receive the first input signal and the second input signal respectively, and the other end are connected to the first load module and the second load module respectively to receive the first bias voltage signal input to the first load module and the second load module.

[0018] In some embodiments, in the source follower circuit provided by the present application, the first current source includes a fifth transistor, a sixth transistor, and a third resistor.

[0019] The first electrode of the fifth transistor is used to receive the first bias voltage signal, the second electrode is connected to the third resistor, the third electrode is connected to the sixth transistor, and the substrate is used to be grounded;

[0020] A first electrode of the sixth transistor is connected to the third resistor, a second electrode is connected to the fifth transistor, and a third electrode and the substrate are grounded;

[0021] One end of the third resistor is connected to the second electrode of the first transistor, and the other end of the third resistor is connected to the fifth transistor, the sixth transistor and the first load module.

[0022] In some embodiments, in the source follower circuit provided by the present application, the second current source includes a seventh transistor, an eighth transistor, and a fourth resistor.

[0023] The first electrode of the seventh transistor is used to receive the first bias voltage signal, the second electrode is connected to the fourth resistor, the third electrode is connected to the eighth transistor, and the substrate is used to be grounded;

[0024] A first electrode of the eighth transistor is connected to the third resistor, a second electrode is connected to the seventh transistor, and a third electrode and the substrate are grounded;

[0025] One end of the fourth resistor is connected to the second electrode of the second transistor, and the other end of the fourth resistor is connected to the seventh transistor, the eighth transistor and the second load module.

[0026] In some embodiments, the source follower circuit provided by the present application, the first load module includes a ninth transistor and a tenth transistor,

[0027] The first electrode of the ninth transistor is used to receive the first bias voltage signal, the second electrode is connected to the first transistor, the third electrode is connected to the tenth transistor, and the substrate is used to be grounded;

[0028] A first electrode of the tenth transistor is connected to the first current source, a second electrode is connected to the ninth transistor, and a third electrode and the substrate are grounded.

[0029] In some embodiments, the source follower circuit provided by the present application, the second load module includes an eleventh transistor and a twelfth transistor,

[0030] The first electrode of the eleventh transistor is used to receive the first bias voltage signal, the second electrode is connected to the second transistor, the third electrode is connected to the twelfth transistor, and the substrate is used to be grounded;

[0031] A first electrode of the twelfth transistor is connected to the second current source, a second electrode is connected to the eleventh transistor, and a third electrode and the substrate are grounded.

[0032] In some embodiments, the source follower circuit provided by the present application further includes a seventh capacitor and an eighth capacitor.

[0033] One end of the seventh capacitor and the eighth capacitor is connected to the third electrode of the first transistor and the second transistor, and the other end is grounded.

[0034] In a second aspect, the present application also provides a chip comprising the above-mentioned source follower circuit.

[0035] The present application provides a source follower circuit and chip, in which the third transistor and the fourth transistor receive a differential input signal, and the third stage thereof can change in response to the change of the differential input signal, so that the voltages of the second electrodes and the third stage of the first transistor and the second transistor can be kept constant, thereby improving the linearity of the source follower circuit; the substrate of the third transistor is cross-coupled to the third stage of the fourth transistor, and the substrate of the fourth transistor is cross-coupled to the third stage of the third transistor, thereby reducing the static power consumption of the third transistor and the fourth transistor, and giving the third transistor and the fourth transistor better driving capability. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0037] FIG1 shows a schematic structural diagram of a traditional source follower provided in an embodiment of the present application.

[0038] FIG2 shows a schematic diagram of a small signal model of a traditional source follower provided in an embodiment of the present application.

[0039] FIG3 shows a schematic structural diagram of a source follower circuit provided in an embodiment of the present application.

[0040] FIG4 shows another structural schematic diagram of a source follower circuit provided in an embodiment of the present application.

[0041] FIG5 shows another structural schematic diagram of a source follower circuit provided in an embodiment of the present application.

[0042] FIG6 shows another structural schematic diagram of a source follower circuit provided in an embodiment of the present application.

[0043] FIG7 shows another structural schematic diagram of a source follower circuit provided in an embodiment of the present application.

[0044] FIG8 shows a schematic diagram of a small signal model of a source follower circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0045] In order to enable those skilled in the art to better understand the solutions of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative efforts are within the scope of protection of this application.

[0046] In the embodiments of the present application, it should be noted that, in this document, relational terms such as first and second, etc., are merely used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations.

[0047] It should be noted that in the embodiments of the present application, "connection" can be understood as electrical connection, and the connection between two electrical components can be a direct or indirect connection between the two electrical components. For example, the connection between A and B can be either a direct connection between A and B or an indirect connection between A and B through one or more other electrical components.

[0048] The second electrode of each transistor used in the embodiments of the present application is one of the source and the drain, and the third electrode of each transistor is the other of the source and the drain. Since the source and drain of the transistor can be symmetrical in structure, the source and drain can be structurally indistinguishable. In other words, the second electrode and the third electrode of the transistor in the embodiments of the present application can be structurally indistinguishable. For example, in the case where the transistor is a P-type transistor, the second electrode of the transistor is the drain, and the third electrode is the source; for example, in the case where the transistor is an N-type transistor, the second electrode of the transistor is the source, and the third electrode is the drain.

[0049] For low-speed analog-to-digital converters, closed-loop op amps are generally used to drive the input signal directly without using an input buffer. However, in high-speed analog-to-digital converters, not using an input buffer to drive the input signal will result in poor stability, and direct input of high-frequency signals will cause severe signal distortion. Therefore, high-speed analog-to-digital converters generally use input buffers to improve the driving capability and linearity of the input signal.

[0050] A source follower is generally selected as the front end of the input buffer. Figure 1 shows a structural schematic diagram of a traditional source follower provided in an embodiment of the present application. As shown in Figure 1, the structure has high input impedance and low output impedance, which can reduce the nonlinear distortion caused by the load R and achieve a larger sampling bandwidth.

[0051] Specifically, FIG2 shows a schematic diagram of a small signal model of a traditional source follower provided in an embodiment of the present application. As shown in FIG2 , the relationship between the input signal and the output signal is: g m2 (V ip -V op )=V op / (Z o2 ‖Z L ‖R)

[0052] The distortion caused by transconductance can be obtained by taking the derivative of the output voltage with respect to the transconductance: dV out / dg m2 =V out / [g m2 (1+g m2 Z out )],Z out =Z o2 ‖Z L ‖R

[0053] In the above formula, g m2 is the transconductance of transistor M2 shown in Figure 1, Z o2 is the output impedance of transistor M2 shown in Figure 1, Z L is the output impedance of the current shown in Figure 1, and R is the output impedance of the load.

[0054] From the above formula, we can see that the distortion is related to g m2 ×Z out The linearity is inversely proportional to the input current, so to improve linearity, one can increase the load impedance or increase the transconductance. However, in short-channel MOS devices, the intrinsic gain does not exceed 40dB, so traditional source followers have a weak ability to suppress nonlinearity. Furthermore, source followers are affected by changes in the input MOS device current, which can cause changes in transconductance and output impedance, thereby causing nonlinearity.

[0055] It should be understood that the small-signal model shown in FIG2 only illustrates the small-signal model of transistor M2 and its column resistor R and capacitor CL in FIG1 to illustrate a conventional source follower structure. Because FIG1 illustrates a source follower structure applied to a differential input, the small-signal model of transistor M1 and its column resistor R and capacitor CL is also shown in FIG2 . The present embodiment uses only one of these small-signal models to illustrate a conventional source follower structure.

[0056] In view of the problems that the traditional source follower structure has poor linearity and weak linearity suppression capability, the embodiments of the present application provide a source follower circuit with good linearity, which can be used as an input buffer in a high-speed analog-to-digital converter.

[0057] An embodiment of the present application provides a source follower circuit. FIG3 shows a schematic structural diagram of the source follower circuit provided by the embodiment of the present application. As shown in FIG3 , the source follower circuit provided by the embodiment of the present application includes first to fourth transistors, a first current source and a second current source, a first load module and a second load module.

[0058] The first transistor M1 and the second transistor M2 are the main bodies of the source follower, which are used to receive the differential input signal (Vin and Vip) and output the differential output signal (Vout); specifically, the first electrodes of the first transistor M1 and the second transistor M2 are used to receive the first input signal and the second input signal respectively, the second electrodes are connected to the third transistor M3 and the fourth transistor M4 respectively, and are connected to the first current source and the second current source respectively, the third electrodes are connected to the first load module and the second load module respectively, the substrate of the first transistor M1 is short-circuited to its third electrode, the substrate of the second transistor M2 is short-circuited to its third electrode, and the third electrodes are connected to the first load module and the second load module respectively. The first input signal and the second input signal are differential input signals (Vin and Vip). Usually, the first electrodes of the first transistor M1 and the second transistor M2 are connected to two ports of the differential input end. These two ports are used to provide two differential input signals to the first transistor M1 and the second transistor M2. As the main body of the source follower, the third stage of the first transistor M1 and the second transistor M2 also serves as the output of the source follower, and is usually connected to two differential output ports. Optionally, the sources of the first transistor M1 and the second transistor M2 can also be connected to two identical capacitive loads respectively, and the other end of the capacitive load is grounded.

[0059] The third transistor M3 and the fourth transistor M4 form a cross-coupled stacked structure with the first transistor M1 and the second transistor M2. Specifically, the first electrode of the fourth transistor M4 is used to receive the first input signal and the second input signal respectively, the second electrode is used to connect to the power supply, and the third electrode is connected to the first transistor M1 and the second transistor M2 respectively. The substrate of the third transistor M3 is connected to the third electrode of the fourth transistor M4, and the substrate of the fourth transistor M4 is connected to the third electrode of the third transistor M3. The third transistor M3 and the fourth transistor M4 are arranged above the first transistor M1 and the second transistor M2, which can help the differential input signal drive the first electrode of the first transistor M1 and the second transistor M2. Without increasing the load of the external signal source, the voltage of the second electrode and the third level of the first transistor M1 and the second transistor M2 remains stable, thereby improving linearity.

[0060] The first current source and the second current source are also connected to the first load module and the second load module respectively. The first load module and the second load module are loads of the source follower circuit. The first current source and the second current source provide current to the first load module and the second load module respectively.

[0061] In some embodiments, the first load module and the second load module further receive a first bias voltage signal, and the first bias voltage signal provides voltage for the first load module and the second load module.

[0062] In some embodiments, the first current source and the second current source further receive a first bias voltage signal, and the first bias voltage signal is used to drive the first current source and the second current source.

[0063] Optionally, as shown in FIG3 , in the source follower circuit provided in the embodiment of the present application, the first to fourth transistors M4 are PMOS tubes, the first pole is the gate of the PMOS tube, the second pole is the drain of the PMOS tube, and the third pole is the source of the PMOS tube.

[0064] In the source follower circuit provided by the embodiment of the present application, the third transistor M3 and the fourth transistor M4 receive a differential input signal, and the third stage thereof can change in response to changes in the differential input signal, thereby keeping the voltages of the second electrodes and the third stage of the first transistor M1 and the second transistor M2 constant, thereby improving the linearity of the source follower circuit; the substrate of the third transistor M3 is cross-coupled to the third stage of the fourth transistor M4, and the substrate of the fourth transistor M4 is cross-coupled to the third stage of the third transistor M3, thereby reducing the static power consumption of the third transistor M3 and the fourth transistor M4, lowering the on-state voltage of the third transistor M3 and the fourth transistor M4, and having better driving capability.

[0065] In some embodiments, FIG4 shows another structural diagram of a source follower circuit provided in an embodiment of the present application. As shown in FIG4 , the source follower circuit provided in an embodiment of the present application further includes a first capacitor C1 and a second capacitor C2.

[0066] One end of the first capacitor C1 and the second capacitor C2 are connected to the first transistor M1 and the first electrode of the transistor respectively, and the other end are connected to the second electrode of the first transistor M1 and the second transistor M2 respectively.

[0067] Optionally, as shown in FIG4 , in the source follower circuit provided in an embodiment of the present application, each transistor is a PMOS tube, the first electrode is the gate of the PMOS tube, the second electrode is the drain of the PMOS tube, and the third electrode is the source of the PMOS tube.

[0068] Optionally, as shown in FIG4 , in the source follower circuit provided in an embodiment of the present application, the sources of the first transistor M1 and the second transistor M2 may be connected to two identical capacitive loads respectively, and the other ends of the capacitive loads are grounded.

[0069] Under advanced processes, transistors with short channel lengths will be preferred. In addition, in order to reduce the parasitic capacitance of the output node, the source follower usually also selects transistors with short channel lengths. When the output signal frequency is very high, the signal linearity of this transistor when outputting a low-frequency signal is low. The source follower circuit provided in the embodiment of the present application connects the first transistor M1 and the first and second electrodes of the second transistor M2, which serve as the main body of the source follower, through a capacitor, eliminating the channel length modulation effect of the first transistor M1 and the second transistor M2, and improving the linearity of the source follower circuit. In addition, adding the first capacitor C1 and the second capacitor C2 can also provide a bypass path for the source of the third transistor M3 and the fourth transistor M4, thereby improving the driving capability of the circuit.

[0070] In some embodiments, FIG5 shows another structural diagram of a source follower circuit provided in an embodiment of the present application. As shown in FIG5 , the source follower circuit provided in an embodiment of the present application further includes a third capacitor C3 and a fourth capacitor C4, a first resistor R1 and a second resistor R2.

[0071] One end of the third capacitor C3 and the fourth capacitor C4 are connected to the first electrodes of the first transistor M1 and the second transistor M2, respectively, and the other end are connected to the first electrodes of the third transistor M3 and the fourth transistor M4, respectively.

[0072] One end of the first resistor R1 and the second resistor R2 is connected to the first electrodes of the third transistor M3 and the fourth transistor M4 , and the other end is connected to a power supply.

[0073] Optionally, as shown in FIG5 , in the source follower circuit provided in an embodiment of the present application, each transistor is a PMOS tube, the first electrode is the gate of the PMOS tube, the second electrode is the drain of the PMOS tube, and the third electrode is the source of the PMOS tube.

[0074] Optionally, as shown in FIG5 , in the source follower circuit provided in an embodiment of the present application, the sources of the first transistor M1 and the second transistor M2 may be respectively connected to two identical capacitive loads, and the other ends of the capacitive loads are grounded.

[0075] The source follower circuit provided in the embodiment of the present application sets a third capacitor C3 and a first resistor R1 to make the gate of the third transistor M3 AC short-circuit, and sets a fourth capacitor C4 and a second resistor R2 to make the gate of the fourth transistor M4 AC short-circuit, and the first resistor R1 and the second resistor R2 also have the function of high-pass filtering. At this time, the differential input signal received by the third transistor M3 and the fourth transistor M4 is not affected by AC, and the source of the third transistor M3 and the fourth transistor M4 changes with the change of the differential input signal. Without increasing the external signal source load, the V of the first transistor M1 and the second transistor M2 is ds(drain-source voltage) can remain stable, improving the linearity of the source follower circuit.

[0076] It should be noted that in the source follower circuit provided in the embodiment of the present application, the aforementioned AC power is derived from a differential input signal. Since the differential input signal is a common-mode analog signal, an AC power input is used in many application scenarios.

[0077] In some embodiments, FIG6 shows another structural diagram of a source follower circuit provided in an embodiment of the present application. As shown in FIG6 , the source follower circuit provided in an embodiment of the present application further includes a fifth capacitor C5 and a sixth capacitor C6.

[0078] One end of the fifth capacitor C5 and the sixth capacitor C6 are connected to the first electrodes of the first transistor M1 and the second transistor M2 to receive the first input signal and the second input signal, respectively, and the other ends are connected to the first load module and the second load module to receive the first bias voltage signal input to the first load module and the second load module, respectively. Specifically, the fifth capacitor C5 and the sixth capacitor C6 provide feedforward compensation for the first transistor M1 and the second transistor M2, respectively.

[0079] Optionally, as shown in FIG6 , in the source follower circuit provided in an embodiment of the present application, each transistor is a PMOS tube, the first electrode is the gate of the PMOS tube, the second electrode is the drain of the PMOS tube, and the third electrode is the source of the PMOS tube.

[0080] Optionally, as shown in Figure 6, in the source follower circuit provided in an embodiment of the present application, the sources of the first transistor M1 and the second transistor M2 can also be connected to two identical capacitive loads respectively, and the other end of the capacitive load is grounded, and the fifth capacitor C5, the sixth capacitor C6 and the capacitive load are equal in size.

[0081] The source follower circuit provided in the embodiment of the present application provides a feed-forward capacitor for the required alternating current, and the feed-forward compensation of the load AC current reduces the current variation of the source follower, thereby improving the linearity of the source follower circuit.

[0082] In some embodiments, FIG7 shows another structural diagram of a source follower circuit provided in an embodiment of the present application. As shown in FIG7 , in the source follower circuit provided in an embodiment of the present application, the first current source includes a fifth transistor M5, a sixth transistor M6, and a third resistor R3.

[0083] The first electrode of the fifth transistor M5 is used to receive the first bias voltage signal, the second electrode is connected to the third resistor R3, the third electrode is connected to the sixth transistor M6, and the substrate is used to be grounded. The first bias voltage signal is used to drive the fifth transistor M5 to turn on.

[0084] A first electrode of the sixth transistor M6 is connected to the third resistor R3 , a second electrode is connected to the fifth transistor M5 , and a third electrode and the substrate are grounded.

[0085] One end of the third resistor R3 is connected to the second electrode of the first transistor M1 , and the other end is connected to the fifth transistor M5 , the sixth transistor M6 and the first load module.

[0086] The second current source includes a seventh transistor M7, an eighth transistor M8 and a fourth resistor R4,

[0087] The first electrode of the seventh transistor M7 is used to receive the first bias voltage signal, the second electrode is connected to the fourth resistor R4, the third electrode is connected to the eighth transistor M8, and the substrate is grounded. The first bias voltage signal is used to drive the sixth transistor M6 to turn on the sixth transistor M6.

[0088] A first electrode of the eighth transistor M8 is connected to the third resistor R3 , a second electrode is connected to the seventh transistor M7 , and a third electrode and the substrate are grounded.

[0089] One end of the fourth resistor R4 is connected to the second electrode of the second transistor M2 , and the other end is connected to the seventh transistor M7 , the eighth transistor M8 and the second load module.

[0090] Optionally, as shown in FIG7 , in the source follower circuit provided in an embodiment of the present application, each transistor is a PMOS tube, the first electrode is the gate of the PMOS tube, the second electrode is the drain of the PMOS tube, and the third electrode is the source of the PMOS tube.

[0091] Optionally, as shown in FIG7 , in the source follower circuit provided in an embodiment of the present application, the sources of the first transistor M1 and the second transistor M2 may be respectively connected to two identical capacitive loads, and the other ends of the capacitive loads may be grounded.

[0092] In the source follower circuit provided in an embodiment of the present application, the fifth transistor M5, the sixth transistor M6 and the third resistor R3 form a first current source, and the seventh transistor M7, the eighth transistor M8 and the fourth resistor R4 form a second current source. The two current sources are self-biased high-swing common-source and common-gate current source structures. Since a self-biased structure is used, no external bias is required, thereby reducing the power consumption of the source follower circuit. In addition, the self-biased high-swing common-source and common-gate current source structure can also increase the output impedance, improve the output swing, and eliminate errors caused by the channel length modulation effect and the threshold deviation caused by the drain. Since a self-biased structure is used, no external bias is required, thereby reducing power consumption.

[0093] In some embodiments, as shown in FIG7 , in the source follower circuit provided by the embodiment of the present application, the first load module includes a ninth transistor M9 and a tenth transistor M10.

[0094] A first electrode of the ninth transistor M9 is used to receive the first bias voltage signal, a second electrode is connected to the first transistor M1 , a third electrode is connected to the tenth transistor M10 , and a substrate is grounded.

[0095] A first electrode of the tenth transistor M10 is connected to the first current source, a second electrode is connected to the ninth transistor M9, and a third electrode and the substrate are grounded.

[0096] The second load module includes an eleventh transistor M11 and a twelfth transistor M12.

[0097] A first electrode of the eleventh transistor M11 is used to receive a first bias voltage signal, a second electrode is connected to the second transistor M2 , a third electrode is connected to the twelfth transistor M12 , and a substrate is grounded.

[0098] A first electrode of the twelfth transistor M12 is connected to the second current source, a second electrode is connected to the eleventh transistor M11 , and a third electrode and the substrate are grounded.

[0099] Optionally, as shown in FIG7 , in the source follower circuit provided in an embodiment of the present application, each transistor is a PMOS tube, the first electrode is the gate of the PMOS tube, the second electrode is the drain of the PMOS tube, and the third electrode is the source of the PMOS tube.

[0100] Optionally, as shown in FIG7 , in the source follower circuit provided in an embodiment of the present application, the sources of the first transistor M1 and the second transistor M2 may be respectively connected to two identical capacitive loads, and the other ends of the capacitive loads may be grounded.

[0101] In the source follower circuit provided in an embodiment of the present application, the ninth transistor M9 and the eleventh transistor M11 are driven by a first bias voltage, the tenth transistor M10 and the twelfth transistor M12 are driven by a first current source and a second current source, respectively, and the ninth transistor M9, the tenth transistor M10, the eleventh transistor M11 and the twelfth transistor M12 collectively serve as the load of the source follower circuit.

[0102] In some embodiments, in the source follower circuit provided by the present application, the seventh capacitor C7 and the eighth capacitor C8 are the capacitive loads of the source follower circuit, one end of the seventh capacitor C7 and the eighth capacitor C8 are connected to the third pole of the first transistor M1 and the second transistor M2, and the other end are used for grounding.

[0103] The source follower circuit provided in the embodiment of the present application is provided with a third capacitor C3 and a first resistor R1, a fourth capacitor C4 and a second resistor R2 to AC short-circuit the input end with the gates of the third transistor M3 and the fourth transistor M4. Therefore, the source of the third transistor M3 and the fourth transistor M4 changes with the input signal, ensuring that the first transistor M1 and the second transistor M2 maintain a constant value.

[0104] The substrates of the third transistor M3 and the fourth transistor M4 are cross-coupled to each other's sources, rather than connected to their own sources. This eliminates additional static power consumption because all additional components operate under AC conditions. Furthermore, the addition of the first capacitor C1 and the second capacitor C2 provides a bypass path for the sources of the third transistor M3 and the fourth transistor M4.

[0105] The fifth and sixth capacitors, C5 and C6, suppress current nonlinearity. Their magnitude is equal to the capacitive load (C7 and C8), providing a feedforward path for the desired AC current. Feedforward compensation of the load AC current reduces current variations in the source follower circuit, resulting in better circuit linearity at lower bias currents.

[0106] The first current source and the second current source are self-biased high-swing common-source and common-gate current source structures, which can increase the output impedance, improve the output swing, and eliminate errors caused by the channel length modulation effect and the threshold deviation caused by the drain. Due to the use of a self-biased structure, no external bias is required, thereby reducing power consumption.

[0107] Next, an example is given to illustrate the source follower circuit provided by the embodiment of the present application. After the differential input signal is input, the source of the first transistor M1 and the second transistor M2 will change with the input signal after the first transistor M1 and the second transistor M2 are turned on. After the ninth transistor M9, the tenth transistor M10, the eleventh transistor M11 and the twelfth transistor M12 are turned on, they act as a large load of the circuit to improve the linearity. The path where the fifth capacitor C5 and the sixth capacitor C6 are located is the feedforward path of the circuit, which reduces the current change of the first transistor M1 and the second transistor M2. The cross-coupling structure composed of the third transistor M3 and the fourth transistor M4 improves the driving ability of the first transistor M1 and the second transistor M2. The seventh capacitor C7 and the eighth capacitor C8 act as capacitive loads. At this time, if the capacitive load has an infinite value, the V gd A static value will be maintained, and the distortion from the third transistor M3 and the fourth transistor M4 will not reduce the linearity of the circuit.

[0108] FIG8 shows a schematic diagram of a small signal model of a source follower circuit provided in an embodiment of the present application. As shown in FIG8 , a small signal analysis is performed on the path where the first transistor M1 and the third transistor M3 are located. The relationship between the input signal and the output signal and the distortion caused by the transconductance can be expressed as follows:

[0109] From this we can get:

[0110] is the admittance of the first transistor M1 and the third transistor M3 (equal to the inverse of the impedance), Y e is the equivalent admittance of the ninth transistor M9, the equivalent admittance of the tenth transistor M10 can be ignored, Y c1 is the admittance of the first capacitor C1, g mb3 is the transconductance effect caused by the body effect of the third transistor M3, V1 is the voltage between the drain of the first transistor M1 and the source of the third transistor M3, -2g mb3 V1 is the current caused by the body effect of the third transistor M3 and the fourth transistor M4, V in -V out is the V of the first transistor M1 gs , g m1 (V in -V out ) is the current of the first transistor M1, V in -V1 is the V of the third transistor M3 gs , g m3 V in -V1 is the current of the third transistor M3.

[0111] It can be concluded from the above formula that the input signal is coupled to the gate and source of the third transistor M3, which reduces the influence of the transconductance of the third transistor M3, makes the first transistor M1 less affected by the input signal and closer to a constant, thereby improving the linearity of the first transistor M1.

[0112] Among them, the small signal model of the path where the second transistor M2 and the fourth transistor M4 are located is the same as the small signal model of the path where the first transistor M1 and the third transistor M3 are located. Therefore, the embodiment of the present application only performs small signal analysis on the path where the first transistor M1 and the third transistor M3 are located.

[0113] An embodiment of the present application further provides a chip, which includes the source follower circuit of the above embodiment.

[0114] The above content is a further detailed description of the present application in conjunction with specific implementation methods, and the specific implementation of the present application cannot be considered to be limited to these descriptions. For ordinary technicians in the technical field to which the present application belongs, they can make several simple deductions or substitutions without departing from the concept of the present application, which should be considered as the scope of protection of the present application.

Claims

1. A source follower circuit, characterized in that: The device comprises first to fourth transistors, a first current source and a second current source, a first load module and a second load module, The first electrodes of the first transistor and the second transistor are respectively used to receive a first input signal and a second input signal, the second electrodes are respectively connected to the third transistor and the fourth transistor, and are respectively connected to the first current source and the second current source, the third electrodes are respectively connected to the first load module and the second load module, the substrate of the first transistor is short-circuited to the third electrode, the substrate of the second transistor is short-circuited to the third electrode, and the first input signal and the second input signal are a pair of differential input signals; The first electrodes of the third transistor and the fourth transistor are respectively used to receive the first input signal and the second input signal, the second electrodes are used to connect to a power supply, the third electrodes are respectively connected to the first transistor and the second transistor, the substrate of the third transistor is connected to the third electrode of the fourth transistor, and the substrate of the fourth transistor is connected to the third electrode of the third transistor; The first current source and the second current source are also connected to the first load module and the second load module respectively.

2. The source follower circuit according to claim 1, wherein: Also includes a first capacitor and a second capacitor, One end of the first capacitor and the second capacitor are connected to the first transistor and the first electrode of the transistor respectively, and the other end is connected to the second electrode of the first transistor and the second transistor respectively.

3. The source follower circuit according to claim 1, wherein: It also includes a third capacitor, a fourth capacitor, a first resistor and a second resistor, One end of the third capacitor and the fourth capacitor are connected to the first electrode of the first transistor and the second transistor respectively, and the other end is connected to the first electrode of the third transistor and the fourth transistor respectively; One end of the first resistor and the second resistor is connected to the first electrode of the third transistor and the fourth transistor, and the other end is used to connect to a power supply.

4. The source follower circuit according to claim 1, wherein: Also includes a fifth capacitor and a sixth capacitor, One end of the fifth capacitor and the sixth capacitor are connected to the first electrodes of the first transistor and the second transistor to receive the first input signal and the second input signal respectively, and the other end is connected to the first load module and the second load module respectively to receive the first bias voltage signal input to the first load module and the second load module.

5. The source follower circuit according to claim 1, wherein: The first current source includes a fifth transistor, a sixth transistor and a third resistor, The first electrode of the fifth transistor is used to receive the first bias voltage signal, the second electrode is connected to the third resistor, the third electrode is connected to the sixth transistor, and the substrate is used to be grounded; The first electrode of the sixth transistor is connected to the third resistor, the second electrode is connected to the fifth transistor, and the third electrode and the substrate are used for grounding; One end of the third resistor is connected to the second electrode of the first transistor, and the other end is connected to the tube, the sixth transistor and the first load module.

6. The source follower circuit according to claim 1, wherein: The second current source includes a seventh transistor, an eighth transistor and a fourth resistor, The first electrode of the seventh transistor is used to receive the first bias voltage signal, the second electrode is connected to the fourth resistor, the third electrode is connected to the eighth transistor, and the substrate is used to be grounded; The first electrode of the eighth transistor is connected to the third resistor, the second electrode is connected to the seventh transistor, and the third electrode and the substrate are used for grounding; One end of the fourth resistor is connected to the second electrode of the second transistor, and the other end of the fourth resistor is connected to the seventh transistor, the eighth transistor and the second load module.

7. The source follower circuit according to claim 1, wherein: The first load module includes a ninth transistor and a tenth transistor, The first electrode of the ninth transistor is used to receive a first bias voltage signal, the second electrode is connected to the first transistor, the third electrode is connected to the tenth transistor, and the substrate is used to be grounded; A first electrode of the tenth transistor is connected to the first current source, a second electrode is connected to the ninth transistor, and a third electrode and a substrate are used for grounding.

8. The source follower circuit according to claim 1, wherein: The second load module includes an eleventh transistor and a twelfth transistor, The first electrode of the eleventh transistor is used to receive the first bias voltage signal, the second electrode is connected to the second transistor, the third electrode is connected to the twelfth transistor, and the substrate is used to be grounded; A first electrode of the twelfth transistor is connected to the second current source, a second electrode is connected to the eleventh transistor, and a third electrode and a substrate are used for grounding.

9. The source follower circuit according to claim 1, wherein: Also includes a seventh capacitor and an eighth capacitor, One end of the seventh capacitor and the eighth capacitor is connected to the third electrode of the first transistor and the third electrode of the second transistor, and the other end is grounded.

10. A chip, characterized in that: The invention comprises the source follower circuit as described in any one of claims 1 to 9.

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