Impedance matching array, impedance matching method, radio-frequency power source, and plasma radio-frequency system

Abstract

The present application belongs to the technical field of radio-frequency power sources, and relates to an impedance matching array, an impedance matching method, a radio-frequency power source, and a plasma radio-frequency system, which solve the problem of impedance matching. A plurality of reactance integrations, which are connected in parallel stage by stage, are comprised between an input end of the impedance matching array and an output end thereof. The reactance integration of each stage comprises a reactance unit, an input tube, an output tube and a series tube, wherein a current-stage input tube is connected between the input end of the impedance matching array and an input end of a current-stage reactance unit; a current-stage output tube is connected between an output end of the current-stage reactance unit and the output end of the impedance matching array; and a current-stage series tube is connected between the output end of the current-stage reactance unit and an input end of the next-stage reactance unit. Connected or disconnected states of the input tubes, the output tubes and the series tubes in the reactance integrations of all stages are controlled to form a reactance combination, thereby implementing impedance matching. In the present application, impedance matching can be quickly performed by means of switching switch tubes in reactance integrations.

Description

Impedance matching array, matching method, radio frequency power supply and plasma radio frequency system Technical Field

[0001] The present application belongs to the field of radio frequency power supply technology, and specifically relates to an impedance matching array, a matching method, a radio frequency power supply, and a plasma radio frequency system. Background Art

[0002] The overall RF plasma power system architecture consists of an RF power supply, a matching box, and a chamber load. The RF power supply outputs a power signal to the matching box, which performs impedance matching and transfers the power signal to the chamber load. During operation, the chamber load varies with process flow. The matching box adjusts its impedance to accommodate these changes, ensuring that the impedance of the matching box combined with the chamber load approaches and stabilizes the ideal value.

[0003] Existing matching devices primarily consist of a controller, a drive motor, and a variable reactance. The controller calculates the position of the variable reactance based on external information and controls the drive motor to adjust the position of the variable reactance. Typically, the drive motor is a stepper motor, and the variable reactance can be a variable capacitor or variable inductor, depending on design requirements.

[0004] Variable reactance relies on a stepper motor to adjust its value. However, the operating speed of a stepper motor is limited. Whether it is a capacitor or an inductor, the fastest speed to complete the displacement of the modulated component can only reach the s level. For processes such as semiconductor manufacturing and high-precision coating that require precise and fast device response, existing matchers cannot easily meet the requirements of these process impedance matching.

[0005] Summary of the Invention

[0006] In view of the above analysis, the present application aims to disclose an impedance matching array, matching method, RF power supply and plasma RF system, which can quickly meet impedance matching requirements and can be applied to impedance matching structures of various matching networks.

[0007] In one aspect, the present application discloses an impedance matching array connected in an impedance matching network. The impedance matching array includes a plurality of reactance integrations connected in parallel in stages between the input and output ends. Each stage of the reactance integration includes a reactance unit, an input tube, an output tube, and a series tube. The input tube of a stage is connected between the input end of the impedance matching array and the input end of the reactance unit of the stage; the output tube of the stage is connected between the output end of the reactance unit of the stage and the output end of the impedance matching array; and the series tube of the stage is connected between the output end of the reactance unit of the stage and the input end of the reactance unit of the next stage.

[0008] By controlling the on / off state of the input tube, output tube and series tube in each level of reactance integration, a reactance combination is formed to achieve impedance matching.

[0009] Another aspect of the present application further discloses an impedance matching method based on the impedance matching array as described above, comprising the following steps:

[0010] Step S1: establishing an impedance combination comparison table for the impedance matching array; in the impedance combination comparison table, each impedance matching value achieved by the impedance matching array corresponds to a switch tube combination mode of each reactance integration;

[0011] Step S2: query the impedance combination comparison table according to the required impedance matching value, select the corresponding switch tube combination mode to control the access mode of the reactance unit in the impedance matching array, and achieve impedance matching;

[0012] Step S3: If the matching reactance value does not exist in the impedance combination comparison table, perform approximate fast matching, generate control instructions for the switch tube, control the access mode of the reactance unit in the impedance matching array, and achieve approximate impedance matching.

[0013] Another aspect of the present application discloses a radio frequency power supply system, comprising a radio frequency power supply, a matching device and a load connected in sequence; the matching device comprises the impedance matching array as described above; by controlling each switch tube in each stage of the reactance integration in the impedance matching array, a set connected reactance combination is formed, and the impedance is modulated to perform impedance matching.

[0014] Another aspect of the present application discloses a plasma RF system, comprising a RF power supply, a matcher, and a chamber load connected in sequence; the matcher includes the impedance matching array as described above; when the chamber load changes due to process operation, the switching tubes of each reactance integrated in the impedance matching array are controlled in response to the load change to form a corresponding reactance combination, and the impedance is modulated so that the impedance of the matcher combined with the chamber load approaches and stabilizes toward an ideal value.

[0015] This application can achieve one of the following beneficial effects:

[0016] This application rapidly performs impedance matching by switching the various switches in the reactance integration. The matcher uses an array design, making it relatively simple to design and manufacture. As long as there is sufficient space and enough reactance units can be configured, more impedance matching points can be matched, resulting in more efficient impedance matching of the process. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The accompanying drawings are only used for the purpose of illustrating specific embodiments and are not to be considered as limiting the present application. Throughout the drawings, the same reference symbols denote the same components.

[0018] FIG1 is a schematic diagram of the power supply system components and connections in an embodiment of the present application;

[0019] FIG2 is a schematic diagram of an L-type network connection in an embodiment of the present application;

[0020] FIG3 is a schematic diagram of a T-type network connection in an embodiment of the present application;

[0021] FIG4 is a schematic diagram of a π-type network connection in an embodiment of the present application;

[0022] FIG5 is a schematic diagram of the components and connections of an impedance matching array in an embodiment of the present application;

[0023] FIG6 is a schematic diagram of the components and connections of the reactance integration in an embodiment of the present application;

[0024] FIG7 is a schematic diagram showing the connection components of a reactance integrated array using a capacitor as an example in an embodiment of the present application;

[0025] FIG8 is a schematic diagram showing the connection of a reactance integrated array using an inductor as an example in an embodiment of the present application;

[0026] FIG9 is a schematic diagram showing the connection of a reactance integrated array in which capacitors and inductors are alternately arranged in an embodiment of the present application;

[0027] FIG10 is a schematic diagram of the connection components of the reactance integration including the through-tube in an embodiment of the present application;

[0028] FIG11 is a schematic diagram showing the connection components of a reactance integrated array using a capacitor as an example in an embodiment of the present application;

[0029] FIG12 is a flow chart of an impedance matching method of an impedance matching array in an embodiment of the present application;

[0030] FIG13 is a schematic diagram showing the connection components of the plasma RF power supply system in an embodiment of the present application. DETAILED DESCRIPTION

[0031] The preferred embodiments of the present application are described in detail below in conjunction with the accompanying drawings, wherein the accompanying drawings constitute a part of the present application and are used together with the embodiments of the present application to illustrate the principles of the present application.

[0032] Example 1

[0033] An embodiment of the present application discloses an impedance matching array; the impedance matching array can be applied to, but is not limited to, a matcher including a radio frequency power supply system as shown in FIG1 ; the impedance matching array is connected to an impedance matching network of the matcher to replace an adjustable reactance element for impedance matching.

[0034] The impedance matching network may include an L-type network as shown in FIG. 2 , a T-type network as shown in FIG. 3 , or a π-type network as shown in FIG. 4 ; or may be other types of impedance matching networks.

[0035] The impedance matching network can be designed to include adjustable reactive elements (adjustable capacitors, adjustable inductors) according to matching requirements, or to include both adjustable reactive elements (adjustable capacitors, adjustable inductors) and non-adjustable fixed elements (fixed capacitors, fixed inductors); the adjustable reactive elements can be completely or partially replaced by corresponding impedance matching arrays according to design requirements to achieve fast impedance matching.

[0036] As shown in FIG5 , the impedance matching array connected to the impedance matching network disclosed in this embodiment includes a plurality of reactance integrations connected in parallel in succession between its input terminal RFin and output terminal RFout;

[0037] The number of stages of reactance integration is determined by the maximum impedance value that can be matched by the impedance matching array; the minimum impedance value in a single-stage reactance integration is determined by the impedance matching accuracy of the impedance matching array.

[0038] As shown in FIG6 , the integrated reactance structure of each stage can be the same, including a reactance unit Zj, an input tube T1, an output tube T2, and a series tube T3. The input tube T1 of this stage is connected between the input end of the impedance matching array and the input end of the reactance unit of this stage; the output tube T2 of this stage is connected between the output end of the reactance unit of this stage and the output end of the impedance matching array; and the series tube T3 of this stage is connected between the output end of the reactance unit of this stage and the input end of the reactance unit of the next stage.

[0039] By controlling the on / off state of the input tube, output tube and series tube in each level of reactance integration, the impedance matching array forms a set connected reactance combination, and the corresponding reactance value is obtained for impedance matching.

[0040] Among them, the on-off of the input tube T1 represents whether the reactance unit to which it belongs is the receiving unit of the reactance combination; the on-off of the series tube T3 indicates whether the reactance unit to which it belongs forms a series connection with the reactance unit in the next-level reactance integration; the on-off of the output tube T2 represents whether it serves as the output of the reactance combination formed by the reactance unit.

[0041] Specifically, the reactance combination formed includes reactance series, parallel or series / parallel combination; wherein, the reactance units in each level of reactance integration are continuously connected in stages to form a reactance series combination; the reactance units in each level of reactance integration are continuously connected or intermittently connected to form a reactance parallel combination; the series / parallel combination is a collection of series combination and parallel combination.

[0042] The reactance units included in the reactance integration of each stage are all capacitor units, or are all inductor units.

[0043] Figure 7 shows a reactance integrated array using capacitors as an example. As can be seen from the figure, each reactance integrated array is set to be connected in parallel with the same input / same output, and a series tube is connected between the capacitor output end of the next-level reactance integrated array and the input tube of this level. Since there is no next-level reactance integrated array in the last-level reactance integrated array, the series tube is omitted.

[0044] The reactance combination formed by controlling the on-circuit or off-circuit state of the input tube, output tube and series tube in the reactance integration includes capacitors in series, capacitors in parallel or a capacitor series / parallel combination.

[0045] When capacitors are connected in series, the level numbers of the reactance integrations at each level must be consecutive; that is, in the reactance integrations with consecutive numbers, the input tube path of the first reactance integration, the output tube path of the last reactance integration, and the series tube paths of the reactance integrations at the remaining intermediate levels constitute a capacitor series circuit.

[0046] When capacitors are connected in parallel, the numbers of the integrated reactances at each level in parallel do not need to be continuous and can be selected as needed; the series tubes between the parallel branches are disconnected, and the input and output tubes are connected to form a capacitor parallel circuit;

[0047] When capacitors are connected in series / parallel, any branch constituting the parallel circuit can be a series branch. In the series branches, capacitors with consecutive numbers are connected in series according to the control method for connecting capacitors in series as described above; each series branch is connected in parallel according to the control method for connecting capacitors in parallel, thereby forming a capacitor series / parallel circuit.

[0048] In the figure, the consecutively numbered series circuit of C5, C6, ... to CA is formed by connecting the input tube path of C5, the output tube path of CA, the series tube path between C5 and CA, and disconnecting the remaining switch tubes.

[0049] In the figure, the discontinuous parallel circuit from C3, C9, ... to CB is formed by connecting the input and output tubes from C3 and C9 to CB and disconnecting the series tubes.

[0050] In the figure, in each parallel branch of the series / parallel circuit,

[0051] The first branch C10; the C10 input and output pipes are connected, and the series pipe is disconnected;

[0052] The second branch C14-C16; the input tube path of C14, the output tube path of C16, the series tube path of C14 and C15, and the remaining switch tubes are disconnected;

[0053] …

[0054] The last branch is CC-3—CC; the input tube path of CC-3, the output tube path of CC, the series tube path between CC-3 and CC, and the remaining switch tubes are open.

[0055] Based on the above analysis, the composition rules of series / parallel combinations are as follows:

[0056] (1) Form one or more series sections according to series requirements;

[0057] (2) connecting the series segments to each other or to one or more independent capacitors to form two or more parallel connections;

[0058] (3) The same reactance unit is limited to one series connection, parallel connection or not used;

[0059] The above series, parallel or combination of the two is not limited to starting with the first or last capacitor, as long as the combination result meets the target capacitance value.

[0060] In a preferred solution, a combination comparison table can be formed by listing the switch states of the switch tubes of each capacitor integration in the capacitor integrated array and the capacitance values ​​of the formed capacitor array; the switch combination state corresponding to the capacitance value to be matched is obtained by a table lookup method, and the capacitor integrated array is switched and controlled to obtain the capacitance value to be matched.

[0061] Figure 8 shows a reactance integrated circuit array, using inductors as an example. Each reactance integrated circuit is configured as a parallel connection with the same input and output. A series transistor is connected between the inductor output of the next-stage reactance integrated circuit and the input transistor of the current stage. The series transistor is omitted in the final reactance integrated circuit, as there is no subsequent reactance integrated circuit.

[0062] The reactance combination formed by controlling the on-circuit or off-circuit state of the input tube, output tube and series tube in the reactance integration includes inductor series connection, inductor parallel connection or inductor series / parallel connection combination;

[0063] When inductors are connected in series, the level numbers of the reactance integrations at each level must be consecutive; that is, in the reactance integrations with consecutive numbers, the input tube path of the first reactance integration, the output tube path of the last reactance integration, and the series tube paths of the reactance integrations at the remaining intermediate levels constitute an inductor series circuit.

[0064] When inductors are connected in parallel, the numbers of the integrated reactances at each level in parallel do not need to be continuous and can be selected as needed; the series tubes between the parallel branches are disconnected, and the input and output tubes are connected to form an inductor parallel circuit;

[0065] When inductors are connected in series / parallel, any branch constituting the parallel circuit can be a series branch. In the series branch, the inductors with consecutive level numbers are connected in series according to the control method of the above-mentioned inductors connected in series; each series branch is connected in parallel according to the control method of the inductors connected in parallel to form an inductor series / parallel circuit.

[0066] In the figure, the consecutively numbered series circuits of L5, L6, ... to LA are formed by connecting the input tube path of L5, the output tube path of LA, the series tube path between L5 and LA, and disconnecting the remaining switch tubes.

[0067] In the figure, the discontinuous parallel circuits from L3, L9, ... to LB are formed by connecting the input and output tubes from L3, L9 to LB and disconnecting the series tubes.

[0068] In the figure, in each parallel branch of the series / parallel circuit,

[0069] The first branch L1-L2: L1 input tube path, L2 output tube path, L1 series tube path, and other switch tubes are disconnected;

[0070] The second branch L10; the input and output pipes of L10 are connected, and the series pipe is disconnected;

[0071] …

[0072] The last branch is LC-3—LC; the input tube path of LC-3, the output tube path of LC, the series tube path between LC-3—LC, and the remaining switch tubes are open.

[0073] Based on the above analysis, the composition rules of series / parallel combinations are as follows:

[0074] (1) Form one or more series sections according to series requirements;

[0075] (2) connecting the series sections to each other or to one or more independent inductors to form two or more parallel connections;

[0076] (3) The same reactance unit is limited to one series connection, parallel connection or not used;

[0077] The above series, parallel or combination of the two is not limited to starting with the first or last inductor, as long as the combination result meets the target inductance value.

[0078] In a preferred solution, a combination comparison table can be formed by listing the switch states of the switch tubes of each inductor integration in the inductor integrated array and the corresponding lists of the inductance values ​​of the formed inductor array; the switch combination states corresponding to the inductance value to be matched are obtained by a table lookup method, and the inductor integrated array is switched on and off to obtain the inductance value to be matched.

[0079] Furthermore, the reactance units in the reactance integration connected in parallel step by step are configured alternately with capacitors and inductors; if the reactance unit in the reactance integration of one level is a capacitor element, then the reactance unit in the reactance integration of the next level is an inductor element, and vice versa.

[0080] FIG9 is a schematic diagram showing a connection of capacitors and inductors in an alternating configuration.

[0081] As can be seen from the figure, each reactance integration is set to a parallel connection with the same input / same output, and the capacitors and inductors are arranged alternately; if the reactance integration of this stage is a capacitor element, the reactance integration of the next stage is an inductor element; a series tube is connected between the inductor output end of the next-stage reactance integration and the input tube of this stage; since there is no next-stage reactance integration in the last stage, the series tube is omitted.

[0082] The reactance combination formed by controlling the path or disconnection state of the input tube, output tube and series tube in the reactance integration includes capacitors in parallel, inductors in parallel, capacitors and inductors in parallel, LC alternating series or series / parallel combination.

[0083] When the capacitors are connected in parallel, the series tubes of the integrated reactance of each level including the capacitor elements are disconnected, and the input tube and the output tube are connected, forming a capacitor parallel circuit;

[0084] When the inductors are connected in parallel, the series tubes of the integrated reactances of each level including the inductor elements are disconnected, and the input tube and the output tube are connected, forming an inductor parallel circuit;

[0085] When the capacitor and inductor are connected in parallel, the series tubes of the integrated reactance of each level including the capacitor and inductor components are disconnected, and the input and output tubes are connected, forming a capacitor and inductor parallel circuit;

[0086] When LC is connected in series alternately, the level numbers of each level of reactance integration must be consecutive; that is, in the reactance integrations with consecutive numbers, the input tube path of the first reactance integration, the output tube path of the last reactance integration, and the series tube paths of the reactance integrations of the remaining intermediate levels form an inductor series circuit;

[0087] When two consecutive reactances are integrated to form an LC alternating series connection, an LC series circuit of capacitor-inductor or inductor-capacitor connection can be formed;

[0088] When three consecutive reactances are integrated to form an LC alternating series connection, an LC series circuit can be formed where a capacitor is connected to an inductor and then to a capacitor, or an inductor is connected to a capacitor and then to an inductor;

[0089] By analogy, a multi-stage LC series circuit with LC alternation can be formed.

[0090] When connected in series / parallel, any branch constituting the parallel circuit can be an LC alternating series branch. In the series branch, the inductors and capacitors with consecutive numbers are connected in series alternately according to the control method of the above-mentioned LC alternating series connection; each series branch is connected in parallel according to the parallel control method to form a series / parallel circuit.

[0091] The aforementioned series, parallel, or combination of the two is not limited to starting with the first or last capacitor or inductor, as long as the resulting combination meets the target reactance value.

[0092] In a preferred solution, a combination comparison table can be formed by listing the switching states of the switch tubes of each reactance integration in the impedance integrated array and the reactance values ​​of the formed reactance array; the switch combination state corresponding to the reactance value to be matched is obtained by a table lookup method, and the reactance integrated array is switched and controlled to obtain the reactance value to be matched.

[0093] In another embodiment, as shown in Figure 10, the integrated reactance system includes, in addition to the reactance unit Zj, input transistor T1, output transistor T2, and series transistor T3, a through-tube T4. This through-tube T4 is connected between the output of the reactance unit Zj and the output of the next-stage reactance unit. The addition of the through-tube T4 enables a variety of series-parallel combinations, including series connections across multiple levels of reactance elements.

[0094] Specifically, in an impedance matching array using reactance integration including through-tubes, the capacitance of the capacitive elements in each reactance integration can be different; the inductance of the inductive elements in each reactance integration can be different, thereby forming an array of reactance elements with different capacitance or inductance values.

[0095] Furthermore, the basic principles of an impedance matching array with integrated reactance including a through-hole tube are similar to those of an impedance matching array without integrated reactance including a through-hole tube. The difference between the two is that in an impedance matching array with integrated reactance including a through-hole tube, when the through-hole tube is connected, more impedance control can be achieved by controlling the switching transistors of the secondary reactance unit.

[0096] As shown in FIG11 , in the example of an impedance matching array of capacitor elements, various series and parallel connections formed by controlling the through-pipe paths are exemplified as follows:

[0097] (1) After the through-tube of capacitor C1 is connected, the input tube of capacitor C2 is disconnected, and the input tube of capacitor C3 is disconnected / the series tube is connected, capacitor C3 can be crossed, so that capacitors C1 and C3 are connected in series.

[0098] (2) After the through-tube path of capacitor C1, the input tube path of capacitor C2, and the input tube path of capacitor C3 are disconnected / connected in series, capacitors C1 and C2 are connected in parallel and then in series with capacitor C3.

[0099] (3) After the through-tube of capacitor C1 is connected, the input tube of capacitor C2 is disconnected, the input tube of capacitor C3 is connected, and the input tube of capacitor C4 is disconnected / connected in series, capacitors C1 and C3 are connected in parallel and then in series with capacitor C4.

[0100] In addition, when all the through-tubes are disconnected, the impedance matching array with integrated reactance including the through-tubes is used in the same manner as the impedance matching array with integrated reactance including the through-tubes, thus providing greater flexibility in use.

[0101] Specifically, when a series circuit of C4, C7, C9, ... to CA is formed in the figure:

[0102] First, C4 and C7 are connected in series, and the switch control is: the input tube path of C4, the through tube path of C4 and C5, and the series tube path of C6. The remaining control tubes of C4-C7 are disconnected, thus forming a series relationship between C4 and C7;

[0103] Secondly, C7 and C9 are connected in series, and the switch control is: C7's through-tube passage, C9's series tube passage, and the remaining control tubes of C7-C9 are disconnected, thus forming a series relationship between C7 and C9;

[0104] Connect the capacitors in series one by one according to this control relationship;

[0105] Finally, CA is connected in series, and the output tube of CA is connected to form a series circuit from the input end, C4, C7, C9... to CA to the output end.

[0106] When forming the parallel circuit of C3, C8, C1, ... to LB in the figure, the parallel inductance of C3, C8, C1, ... to LB is formed by connecting the input and output tubes of C3, C8, C1, ... to LB, and disconnecting the series tube and the through tube.

[0107] In the figure, when forming a series / parallel circuit, the parallel branches need to be numbered in sequence. In each branch, the series capacitors included are numbered from small to large; the maximum value of the capacitor number included in the previous numbered branch must be smaller than the minimum value of the capacitor number included in the next numbered branch.

[0108] In each branch, if there are capacitors with discontinuous numbers connected in series, refer to the control method for capacitors with discontinuous numbers connected in series as described above to form a series capacitor group;

[0109] The multiple branches are connected in parallel to form a series / parallel circuit by referring to the control method for connecting capacitors with discontinuous numbers as described above.

[0110] Based on the above analysis, the composition rules of series / parallel combinations are as follows:

[0111] (1) According to the series connection requirements, form more than one series connection section. The capacitors in series connection do not need to be continuous. The capacitor number of the previous section is smaller than that of the next section.

[0112] (2) connecting the series segments to each other or to one or more independent capacitors to form two or more parallel connections;

[0113] (3) The same reactance unit is limited to one series connection, parallel connection or not used;

[0114] The above series, parallel or combination of the two is not limited to starting with the first or last capacitor, as long as the combination result meets the target capacitance value.

[0115] In a preferred solution, a combination comparison table can be formed by listing the switch states of the switch tubes of each capacitor integration in the capacitor integrated array and the corresponding inductance values ​​of the formed capacitor array; the switch combination state corresponding to the capacitance value to be matched is obtained by a table lookup method, and the capacitor integrated array is switched and controlled to obtain the capacitance value to be matched.

[0116] The technical details of the impedance matching array composed of inductive elements including the through-tube can be obtained by referring to the above impedance matching array composed of capacitive elements.

[0117] The technical details of the impedance matching array including alternating configurations of inductors and capacitors through-holes can also be obtained by combining the impedance matching array including alternating configurations of capacitors and inductors without through-holes and the impedance matching array consisting of the above-mentioned capacitive elements.

[0118] In summary, the embodiments of the present application achieve rapid impedance matching by rapidly changing the impedance value through the switching of the various switches in the reactance integration. The adjustable reactance elements in the matcher are replaced with an impedance matching array; this array design is relatively simple to design and manufacture. As long as there is sufficient space and sufficient reactance units can be configured, more impedance matching points can be matched in the matcher, resulting in more efficient impedance matching in the operational process.

[0119] Example 2

[0120] An embodiment of the present application discloses an impedance matching method based on the impedance matching array described in the first embodiment, as shown in FIG12 , comprising the following steps:

[0121] Step S1: establishing an impedance combination comparison table for the impedance matching array; in the impedance combination comparison table, each impedance matching value achieved by the impedance matching array corresponds to a switch tube combination mode of each reactance integration;

[0122] Step S2: query the impedance combination comparison table according to the required impedance matching value, select the corresponding switch tube combination mode to control the access mode of the reactance unit in the impedance matching array, and achieve impedance matching;

[0123] Step S3: If the matching reactance value does not exist in the impedance combination comparison table, perform approximate fast matching, generate a control instruction for the switch tube, control the access mode of the reactance unit in the impedance matching array, and achieve approximate impedance matching.

[0124] Specifically, approximate fast matching includes:

[0125] A method for establishing an impedance combination comparison table with a total number of impedance units being n includes:

[0126] Cycle 1: Enable 1 impedance unit;

[0127] Loop 2: Enable 2 impedance units;

[0128] (1) The maximum number of rows is 1, and the maximum number of series connections in each row is 2;

[0129] (2) The maximum number of rows is 2, and the maximum number of series connections in each row is 1;

[0130] Loop 3: Enable 3 impedance units;

[0131] (1) The maximum number of rows is 1, and the maximum number of series connections in each row is 3;

[0132] (2) The maximum number of rows is 2, and the maximum number of series connections in each row is 2;

[0133] (3) The maximum number of rows is 3, and the maximum number of series connections in each row is 1;

[0134] …

[0135] The nth cycle: enable n impedance units;

[0136] (1) The maximum number of rows is 1, and the maximum number of series connections in each row is n;

[0137] (2) The maximum number of rows is 2, and the maximum number of series connections in each row is n-1;

[0138] (3) The maximum number of rows is 3, and the maximum number of series connections in each row is n-2;

[0139] …

[0140] (n-1) The maximum number of rows is n-1, and the maximum number of series connections in each row is 2;

[0141] (n) The maximum number of rows is n, and the maximum number of series connections in each row is 1;

[0142] During the loop execution process, the reactance value formed by each execution is recorded; according to the enabled impedance unit, the switching status of the input tube, output tube and series tube corresponding to the number of parallel rows and series numbers to which it belongs are recorded accordingly. Only one set of settings with the same reactance value is retained.

[0143] Furthermore, when the reactance integration also includes a through-tube, during the cyclic execution process of establishing the impedance combination comparison table, the reactance value formed by each execution is recorded; according to the enabled impedance unit, the switching status of the input tube, output tube, series tube and through-tube corresponding to the reactance unit is recorded accordingly according to the number of parallel rows and series numbers to which it belongs, and only one set of settings for the same reactance value is retained.

[0144] Furthermore, in the approximate fast matching, when all the reactance units in the impedance matching array are capacitive units, step S3 includes:

[0145] (1) Convert the matching capacitor value into a fraction; the denominator must be able to produce a prime factor less than 10. If the numerator is less than 1 / 4 of the denominator and has a band number greater than 1, adjust the band number by 1 to form a false fraction.

[0146] (2) Divide the denominator into all prime factors, select the largest prime factor, and increase or decrease the numerator to the nearest multiple of the prime factor;

[0147] (3) Reduce the fraction to the simplest possible fraction. If it is a false fraction, restore the original number and combine it with the true fraction, and then process it by looking up the table. If the numerator of the true fraction is not 1, split the true fraction into multiple fractions with a numerator of 1, and then process it by looking up the table.

[0148] (4) If the comparison table is not established, the numerical part is considered to be the number of capacitors connected in parallel. The numerator of the true fraction is the number of rows, and the denominator is the number of capacitors connected in series in each row. If the true fraction can be further split, it needs to be split into the simplest fraction to reduce the number of enabled capacitors.

[0149] Furthermore, in the approximate fast matching, when all the reactance units in the impedance matching array are inductive units, step S3 includes:

[0150] (1) Convert the matching inductance value into a fraction; the denominator must be able to produce a prime factor less than 10. If the numerator is less than 1 / 4 of the denominator and has a band number greater than 1, adjust the band number by 1 to form a false fraction.

[0151] (2) Divide the denominator into all prime factors, select the largest prime factor, and increase or decrease the numerator to the nearest multiple of the prime factor;

[0152] (3) Reduce the fraction to the simplest possible fraction. If it is a false fraction, restore the original number and combine it with the true fraction, and then process it by looking up the table. If the numerator of the true fraction is not 1, split the true fraction into multiple fractions with a numerator of 1, and then process it by looking up the table.

[0153] (4) If the comparison table is not established, the numerical part is considered to be the number of series inductors; the true fraction part, the numerator is the number of parallel inductor groups, and the denominator is the number of parallel inductors in each group; if the true fraction can be further split, it needs to be split into the simplest fraction to reduce the number of enabled inductors.

[0154] For more specific technical details and beneficial effects of this embodiment, please refer to the first embodiment above, which will not be described in detail here.

[0155] Example 3

[0156] One embodiment of the present application discloses a radio frequency power supply system, including a radio frequency power supply, a matching device, and a load;

[0157] The RF power supply outputs the power signal to the matcher, and the impedance matching network in the matcher performs impedance matching and then transfers the power signal to the load.

[0158] Specifically, the adjustable reactance element included in the impedance matching network in the matching device is replaced by the impedance matching array described in the first embodiment;

[0159] During the impedance matching process, by switching the switch tubes in the reactance integration of the impedance matching array, a set connected reactance combination is formed to modulate the impedance and achieve impedance matching.

[0160] The specific technical details and beneficial effects of this embodiment can be referred to Example 1, and will not be described in detail here.

[0161] Example 4

[0162] One embodiment of the present application discloses a plasma RF system, as shown in FIG13 , comprising an RF power supply, a matching device, and a chamber load;

[0163] The RF power supply outputs the power signal to the matcher, and the impedance matching network in the matcher performs impedance matching and then transfers the power signal to the chamber load.

[0164] Specifically, the adjustable reactance element included in the impedance matching network in the matching device is replaced by the impedance matching array described in the first embodiment;

[0165] During operation, when the chamber load changes due to process operation, in response to the load change, the corresponding reactance combination is formed by controlling each switch tube in each reactance integration in the impedance matching array included in the impedance matching network, and the impedance is adjusted so that the impedance of the matcher combined with the chamber load can approach and stabilize toward the ideal value.

[0166] The specific technical details and beneficial effects of this embodiment can be referred to Example 1, and will not be described in detail here.

[0167] The above is only a preferred specific implementation method of the present application, but the scope of protection of the present application is not limited thereto. Any changes or replacements that can be easily thought of by any technician familiar with this technical field within the technical scope disclosed in this application should be covered by the scope of protection of the present application.

Claims

1. An impedance matching array, characterized in that: Connected in an impedance matching network; including multiple reactance integrations connected in parallel step by step between the input end and the output end of the impedance matching array; each level of the reactance integration includes a reactance unit, an input tube, an output tube and a series tube; wherein the input tube of this level is connected between the input end of the impedance matching array and the input end of the reactance unit of this level; the output tube of this level is connected between the output end of the reactance unit of this level and the output end of the impedance matching array; the series tube of this level is connected between the output end of the reactance unit of this level and the input end of the reactance unit of the next level; By controlling the on-circuit or off-circuit state of the input tube, output tube and series tube in each level of the reactance integration, the impedance matching array forms a set connected reactance combination to perform impedance matching.

2. The impedance matching array according to claim 1, characterized in that: The reactance combination formed includes reactance series, parallel or series / parallel combination; wherein the reactance units in each level of reactance integration in the series combination are connected continuously in stages; the reactance units in each level of reactance integration in the parallel combination include continuous connection or intermittent connection; the series / parallel combination is a collection of the series combination and the parallel combination.

3. The impedance matching array according to claim 1, characterized in that: The reactance units included in the reactance integration of each stage are all capacitor units, or are all inductance units.

4. The impedance matching array according to claim 1, characterized in that: The reactance units in the reactance integration connected in parallel in stages are configured alternately with capacitors and inductors; if the reactance units in the reactance integration of one stage are capacitor elements, then the reactance units in the reactance integration of the next stage are inductor elements.

5. The impedance matching array according to any one of claims 1 to 4, characterized in that: The reactance integration also includes a through tube; the through tube at this stage is connected between the output end of the reactance unit at this stage and the output end of the reactance unit at the next stage.

6. The impedance matching array according to claim 5, characterized in that: In an impedance matching array using reactance integration including through-tubes, the capacitance of the capacitive elements in each reactance integration is different, and the inductance of the inductive elements in each reactance integration is different, thereby forming a reactance element array with different capacitance or inductance values.

7. An impedance matching method based on the impedance matching array according to any one of claims 1 to 6, characterized in that: The following steps are involved: Step S1, establishing an impedance combination comparison table for the impedance matching array; in the impedance combination comparison table, each impedance matching value achieved by the impedance matching array corresponds to a switch tube combination mode of each reactance integration; Step S2, querying the impedance combination comparison table according to the required impedance matching value, selecting the corresponding switch tube combination mode to control the access mode of the reactance unit in the impedance matching array, and realizing impedance matching; Step S3: If the matching reactance value does not exist in the impedance combination comparison table, an approximate fast matching is performed, a control instruction for the switch tube is generated, and the access mode of the reactance unit in the impedance matching array is controlled to achieve approximate impedance matching.

8. The impedance matching method according to claim 7, characterized in that: Approximate fast matching includes: A method for establishing an impedance combination comparison table with a total impedance unit number of n includes: Cycle 1: Enable 1 impedance unit; Cycle 2: Enable 2 impedance units; (1) The maximum number of rows is 1, and the maximum number of series connections in each row is 2; (2) The maximum number of rows is 2, and the maximum number of series in each row is 1; Cycle 3: Enable 3 impedance units; (1) The maximum number of rows is 1, and the maximum number of series in each row is 3; (2) The maximum number of rows is 2, and the maximum number of series connections in each row is 2; (3) The maximum number of rows is 3, and the maximum number of series in each row is 1; … The nth cycle: enable n impedance units; (1) The maximum number of rows is 1, and the maximum number of series connections in each row is n; (2) The maximum number of rows is 2, and the maximum number of series connections in each row is n-1; (3) The maximum number of rows is 3, and the maximum number of series connections in each row is n-2; … (n-1) The maximum number of rows is n-1, and the maximum number of series in each row is 2; (n) The maximum number of rows is n, and the maximum number of series connections in each row is 1; During the loop execution process, the reactance value formed by each execution is recorded; when the impedance unit is enabled, the switch states of the input tube, output tube and series tube matching the reactance unit are recorded accordingly according to the number of parallel rows and series numbers to which it belongs. Only one set of settings for the same reactance value is retained.

9. The impedance matching method according to claim 8, characterized in that: When the reactance integration also includes a through tube, during the cyclic execution of establishing the impedance combination comparison table, the reactance value formed by each execution is recorded; according to the enabled impedance unit, the switching states of the input tube, output tube, series tube and through tube matching the reactance unit are recorded accordingly according to the number of parallel rows and series numbers to which it belongs, and only one set of settings for the same reactance value is retained.

10. The impedance matching method according to claim 7, characterized in that: In the approximate fast matching, when the reactance units in the impedance matching array are all capacitive units, the step S3 includes: (1) Convert the matching capacitor value into a fraction; the denominator must be able to produce a prime factor less than 10. If the numerator is less than 1 / 4 of the denominator and has a band number greater than 1, adjust the band number by 1 to form a false fraction. (2) Divide all prime factors of the denominator, select the largest prime factor, and increase or decrease the numerator to the nearest multiple of the prime factor; (3) Reduce the fraction to the simplest possible fraction. If it is a false fraction, restore the original numerator and combine it with the proper fraction, and then process it by looking up the table. If the numerator of the proper fraction is not 1, split the proper fraction into multiple fractions with a numerator of 1, and then process it by looking up the table. (4) If the comparison table is not built, the numerical part is regarded as the number of capacitors connected in parallel. For the true fraction part, the numerator is the number of rows and the denominator is the number of capacitors connected in series in each row. If the true fraction can be further decomposed, it needs to be decomposed into the simplest fraction to reduce the enabled capacitors.

11. The impedance matching method according to claim 7, characterized in that: In the approximate fast matching, when the reactance units in the impedance matching array are all inductance units, the step S3 includes: (1) Convert the matching inductance value into a fraction; the denominator must be able to produce a prime factor less than 10. If the numerator is less than 1 / 4 of the denominator and has a band number greater than 1, adjust the band number by 1 to form a false fraction; (2) Divide all prime factors of the denominator, select the largest prime factor, and increase or decrease the numerator to the nearest multiple of the prime factor; (3) Reduce the fraction to the simplest possible fraction. If it is a false fraction, restore the original numerator and combine it with the proper fraction, and then process it by looking up the table. If the numerator of the proper fraction is not 1, split the proper fraction into multiple fractions with a numerator of 1, and then process it by looking up the table. (4) If the comparison table is not built, the numerical part is regarded as the number of series inductors; the true fraction part, the numerator is the number of parallel inductor groups, and the denominator is the number of parallel inductors in each group; if the true fraction can be further split, it needs to be split into the simplest fraction to reduce the enabled inductors.

12. A radio frequency power supply system, characterized in that: It comprises a radio frequency power supply, a matcher and a load connected in sequence; the matcher comprises an impedance matching array as described in any one of claims 1 to 6; by controlling each switch tube in each level of reactance integration in the impedance matching array, a set connected reactance combination is formed, and the impedance is modulated to perform impedance matching.

13. A plasma radio frequency system, characterized in that: It comprises a radio frequency power supply, a matcher and a chamber load connected in sequence; the matcher comprises an impedance matching array as described in any one of claims 1 to 6; when the chamber load undergoes a load change due to process operation, in response to the load change, each switch tube integrated with each reactance in the impedance matching array is controlled to form a corresponding reactance combination, and the impedance is modulated so that the impedance of the matcher combined with the chamber load approaches and stabilizes toward an ideal value.

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