Material processing method for improving channel mobility of silicon carbide metal oxide semiconductor field effect transistor

Abstract

The present application discloses a material processing method for improving channel mobility of a silicon carbide metal oxide semiconductor field effect transistor. When n-type and p-type ion implantation for a SiC wafer is completed, high-temperature annealing activation in an argon atmosphere is no longer carried out, and the SiC wafer directly enters an epitaxial furnace for performing annealing activation in a hydrogen atmosphere; in order to prevent the wafer structure from being damaged by hydrogen etching in a high-temperature annealing activation process, a high-concentration n-type heavily-doped SiC epitaxial layer is first epitaxially grown to serve as a hydrogen etching sacrificial layer. By introducing a small-flow silicon source into the hydrogen atmosphere, the hydrogen etching rate is effectively suppressed, and a silicon- and nitrogen-rich surface is formed when the etching of the n-type heavily-doped SiC epitaxial layer is completed, helping to further improve the mobility of the n channel of a SiC MOSFET device. The present invention is applicable to existing commercial SiC epitaxial furnaces, the process is compatible with existing conventional epitaxial processes, so that the method can be used for mass production of commercial SiC epitaxial wafers.

Description

Material processing method for improving channel mobility of silicon carbide metal oxide semiconductor field effect transistor Technical Field

[0001] The present application relates to the field of semiconductor single crystal thin film technology, and in particular to a material processing method for improving the channel mobility of a silicon carbide metal oxide semiconductor field effect transistor. Background Art

[0002] Silicon carbide (SiC) is a wide-bandgap semiconductor material with high critical breakdown electric field strength, high electron saturation velocity, and high thermal conductivity, making it an ideal material for the fabrication of high-voltage, high-power power electronic devices. Currently, 4H SiC crystal form has been widely used in the development of power electronic devices. SiC MOSFETs are unipolar devices with an insulated gate structure, characterized by fast switching speeds and high frequencies.

[0003] In the SiC MOSFET device process, the gate oxide process is a key step. Currently, there are two main methods for gate oxide process, namely (1) using low pressure chemical vapor deposition (LPCVD) equipment to directly grow a silicon dioxide layer and (2) directly oxidizing the SiC wafer in an oxidation furnace to form a silicon dioxide layer through the reaction of oxygen and SiC. Regardless of the gate oxide process, it is carried out after the SiC wafer is implanted and activated at high temperature. Therefore, the surface quality of the SiC wafer after implantation and high temperature activation directly affects the subsequent gate oxide interface quality. At present, the conventional process for high temperature activation of SiC wafers is carried out in an argon atmosphere, and the activation temperature is greater than 1600℃. In order to avoid the silicon atoms on the surface of the SiC material sublimating and causing a significant increase in the surface roughness of the wafer, a carbon film is coated on the SiC surface before high temperature annealing to prevent the silicon atoms from sublimating. After the annealing is completed, the carbon film is removed by oxygen plasma ashing and 900℃ oxygen heat treatment. The process steps are complex, and after the high temperature activation treatment, the rms surface roughness of the wafer is usually greater than 1nm, and there is still room for optimization.

[0004] Summary of the Invention

[0005] Technical issues solved:

[0006] The technical problem that this application needs to solve is that the process steps are complicated and the surface roughness increases. The increase in roughness will cause the gate oxide interface state density to increase, resulting in a decrease in device channel mobility and reliability degradation. A material processing method for improving the channel mobility of silicon carbide metal oxide semiconductor field effect transistors is provided.

[0007] Technical solution:

[0008] A material processing method for improving the channel mobility of silicon carbide metal oxide semiconductor field effect transistors uses chemical vapor deposition equipment to perform in-situ pretreatment on the silicon carbide wafer after ion implantation in a hydrogen atmosphere, and grows a layer of carbon dioxide with a concentration of ≥5E17cm on the surface of the silicon carbide wafer after ion implantation. -3 A high-concentration n-type heavily doped SiC epitaxial layer is used as a sacrificial layer. In a hydrogen atmosphere, the silicon carbide wafer after the n-type heavily doped SiC epitaxial layer is subjected to a hydrogen atmosphere high-temperature annealing activation treatment. After the hydrogen atmosphere high-temperature annealing activation is completed, the n-type heavily doped SiC epitaxial layer is completely removed by hydrogen etching or only a thin layer with a thickness of less than 10nm is left. Depending on whether the subsequent actual gate oxide process adopts a process of direct oxidation of the silicon carbide wafer, it is selected whether to epitaxially grow a thin layer of unintentionally doped SiC.

[0009] Furthermore, a material processing method for improving the channel mobility of a silicon carbide metal oxide semiconductor field effect transistor is provided, wherein the specific process conditions are as follows:

[0010] The first step is to place the silicon carbide wafer after n-type and p-type ion implantation in the reaction chamber;

[0011] Step 2: Using chemical vapor deposition (CVD) equipment, in a hydrogen atmosphere, heat the reaction chamber to 1450-1550°C and maintain the temperature for 0.5-2 minutes to perform in-situ pretreatment of the silicon carbide wafer.

[0012] Step 3: Raise the reaction chamber temperature to 1550-1650℃, introduce growth source and nitrogen, and grow n-type heavily doped SiC epitaxial layer on the silicon carbide wafer. The doping concentration of the epitaxial layer is ≥5E17cm -3 ;

[0013] Step 4: After the n-type heavily doped SiC epitaxial layer is grown, the reaction chamber temperature is raised to 1550-1750°C. The silicon carbide wafer is subjected to a high-temperature annealing activation treatment in a hydrogen atmosphere. During this process, a silicon source with a concentration of ≤0.04% is introduced. The hydrogen will continuously etch the n-type heavily doped SiC epitaxial layer. The time is controlled to retain a 0-10nm thick n-type heavily doped SiC epitaxial layer.

[0014] Step 5: Depending on whether the subsequent gate oxide process uses a direct oxidation process of silicon carbide wafers, choose whether to epitaxially grow a thin layer of unintentionally doped SiC;

[0015] Step 6: Turn off the heater in the hydrogen atmosphere and naturally cool the reaction chamber to room temperature;

[0016] Step 7: Replace the reaction chamber with argon atmosphere, open the reaction chamber and take out the SiC wafer.

[0017] As a preferred technical solution of the present application: the silicon source in the fourth step is silane or trichlorosilane.

[0018] As a preferred technical solution of the present application: the fifth step selects whether to epitaxially grow a layer of non-intentionally doped SiC thin layer with a thickness of 15nm-40nm based on the difference in whether the subsequent actual gate oxide process adopts the process of direct oxidation of silicon carbide wafers; if the subsequent actual gate oxide process adopts low-pressure chemical vapor deposition LPCVD equipment to directly grow a silicon dioxide layer, then proceed directly to the sixth step without additional processing; if the subsequent actual gate oxide process adopts a method of directly oxidizing the wafer to form silicon dioxide, it is necessary to introduce a growth source into the reaction chamber to grow a non-intentionally doped SiC thin layer with a thickness of 15nm-40nm, that is, a non-intentionally doped SiC epitaxial layer.

[0019] As a preferred technical solution of the present application: the growth source in the third step is composed of a silicon source and a carbon source, wherein the silicon source is silane and / or trichlorosilane, and the carbon source is ethylene and / or propane.

[0020] As a preferred technical solution of the present application: the thickness of the n-type heavily doped SiC epitaxial layer grown in the third step is not less than the hydrogen etching amount during the high-temperature annealing activation treatment in the hydrogen atmosphere in the fourth step; the hydrogen etching amount can be obtained by multiplying the hydrogen etching rate by the treatment time of the fourth step; the hydrogen etching rate Er needs to be additionally calibrated experimentally: a SiC epitaxial wafer with a known thickness d1 is used, and the same process conditions as the fourth step are used for a treatment time of t. After the treatment is completed, the thickness of the SiC epitaxial wafer is measured again as d2, and the hydrogen etching rate Er = (d1-d2) / t is obtained.

[0021] Principle explanation: The present invention proposes a material processing method for improving the channel mobility of SiC MOSFET. After the SiC wafer completes n-type and p-type ion implantation, it is no longer subjected to high-temperature annealing activation in an argon atmosphere. It is directly placed in an epitaxial furnace for annealing activation in a hydrogen atmosphere to avoid severe surface roughness degradation of the SiC wafer during the annealing process. At the same time, in order to prevent hydrogen etching from damaging the wafer structure during the high-temperature annealing activation process, a high-concentration n-type heavily doped SiC epitaxial layer is first epitaxially grown as a hydrogen etching sacrificial layer. By introducing a small flow of silicon source into the hydrogen atmosphere, the hydrogen etching rate can be effectively suppressed, and a silicon-rich and nitrogen-rich surface is formed after the etching of the n-type heavily doped SiC epitaxial layer is completed, which is beneficial to further improve the mobility of the n-channel of the SiC MOSFET device. Beneficial effects:

[0022] The material processing method for improving the channel mobility of silicon carbide metal oxide semiconductor field effect transistors described in this application adopts the above technical solution and has the following technical effects compared with the existing technology:

[0023] 1. Using a SiC epitaxial furnace, the SiC wafers after ion implantation were subjected to high-temperature annealing and activation in the same hydrogen atmosphere used for epitaxial growth. This can simplify the device process steps and effectively inhibit the degradation of the SiC wafer surface roughness. The roughness Rq of the SiC wafer surface (10μm×10μm) was significantly reduced from 2.2nm to 0.295nm.

[0024] 2. By epitaxially growing a high-concentration n-type heavily doped SiC epitaxial layer as a sacrificial layer, hydrogen can be prevented from damaging the SiC wafer structure;

[0025] 3. By introducing a small flow rate of silicon source into the hydrogen atmosphere, the hydrogen etching rate can be effectively reduced, and a silicon-rich and nitrogen-rich interface is formed after the etching of the n-type heavily doped SiC epitaxial layer, which is beneficial to further improve the mobility of the n-channel of the SiC MOSFET device;

[0026] 4. The present invention is applicable to existing commercial SiC epitaxial furnaces, and the process is compatible with existing conventional epitaxial processes, and can be used for the mass production of commercial SiC epitaxial wafers. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] FIG1 is a comparison of the surface roughness of SiC wafers treated by the argon atmosphere high temperature activation method (a) and the method of this patent (b). DETAILED DESCRIPTION

[0028] The technical solution of the present invention is described in detail below, but the protection scope of the present invention includes but is not limited to the embodiments.

[0029] Embodiment 1:

[0030] A material processing method for improving the channel mobility of a silicon carbide metal oxide semiconductor field effect transistor comprises the following specific steps:

[0031] Step 1: Place the silicon carbide wafer after n-type and p-type ion implantation in the reaction chamber. Considering the etching of the SiC wafer by hydrogen during the subsequent heating process, the n-type and p-type implantation depth is increased by 0.2 microns compared to the conventional process.

[0032] Step 2: Using chemical vapor deposition (CVD) equipment, in a hydrogen atmosphere, the reaction chamber is heated to 1500°C and maintained for 0.5 minutes to perform in-situ pretreatment of the silicon carbide wafer.

[0033] Step 3: Raise the reaction chamber temperature to 1580°C, introduce trichlorosilane, ethylene, and nitrogen, and grow an n-type heavily doped SiC epitaxial layer on the silicon carbide wafer. The doping concentration of the epitaxial layer is 8E18cm -3According to preliminary experimental calibration, the hydrogen etching rate of the epitaxial layer under the process conditions to be adopted in the fourth step is 480nm / h. The processing time to be processed in the fifth step is 30 minutes. Therefore, in this step, the thickness of the n-type heavily doped SiC epitaxial layer is controlled to 250nm by adjusting the growth time.

[0034] Step 4: After the n-type heavily doped SiC epitaxial layer is grown, the reaction chamber temperature is raised to 1600°C. The silicon carbide wafer is subjected to a high-temperature annealing activation treatment in a hydrogen atmosphere. During this process, a silicon source with a flow rate of 30 sccm is introduced to reduce the hydrogen etching rate.

[0035] Step 5: Maintain high-temperature annealing activation time in hydrogen atmosphere for 30 minutes, leaving a 10nm thick n-type heavily doped SiC thin layer and forming a silicon-rich and nitrogen-rich surface;

[0036] In the sixth step, the subsequent gate oxide process involves oxidizing the silicon carbide wafer to form a silicon dioxide layer. Trichlorosilane and ethylene are introduced into the reaction chamber to grow a 20nm thick, unintentionally doped SiC epitaxial layer to improve the quality of the silicon dioxide formed during the subsequent oxidation process.

[0037] Step 7: Turn off the heater in the hydrogen atmosphere and naturally cool the reaction chamber to room temperature;

[0038] Step 8: Replace the reaction chamber with argon, open the reaction chamber and take out the SiC wafer.

[0039] Example 2

[0040] A material processing method for improving the channel mobility of a silicon carbide metal oxide semiconductor field effect transistor comprises the following specific steps:

[0041] Step 1: Place the silicon carbide wafer after n-type and p-type ion implantation in the reaction chamber. Considering the etching of the SiC wafer by hydrogen during the subsequent heating process, the n-type and p-type implantation depth is increased by 0.2 microns compared to the conventional process.

[0042] Step 2: Using chemical vapor deposition (CVD) equipment, in a hydrogen atmosphere, the reaction chamber is heated to 1500°C and maintained for 0.5 minutes to perform in-situ pretreatment of the silicon carbide wafer.

[0043] Step 3: Raise the reaction chamber temperature to 1580°C, introduce trichlorosilane, ethylene, and nitrogen, and grow an n-type heavily doped SiC epitaxial layer on the silicon carbide wafer. The doping concentration of the epitaxial layer is 8E18cm -3According to preliminary experimental calibration, the hydrogen etching rate of the epitaxial layer under the process conditions to be adopted in the fourth step is 480nm / h. The processing time to be processed in the fifth step is 30 minutes. Therefore, in this step, the thickness of the n-type heavily doped SiC epitaxial layer is controlled to 250nm by adjusting the growth time.

[0044] Step 4: After the n-type heavily doped SiC epitaxial layer is grown, the reaction chamber temperature is raised to 1600°C. The silicon carbide wafer is subjected to a high-temperature annealing activation treatment in a hydrogen atmosphere. During this process, a silicon source with a flow rate of 30 sccm is introduced to reduce the hydrogen etching rate.

[0045] Step 5: Maintain high-temperature annealing activation time in hydrogen atmosphere for 30 minutes, leaving a 10nm thick n-type heavily doped SiC thin layer and forming a silicon-rich and nitrogen-rich surface;

[0046] Step 6: The subsequent gate oxide process plans to use LPCVD deposition equipment to directly grow the silicon dioxide layer; no additional processing is required in this step;

[0047] Step 7: Turn off the heater in the hydrogen atmosphere and naturally cool the reaction chamber to room temperature;

[0048] Step 8: Replace the reaction chamber with argon, open the reaction chamber and take out the SiC wafer.

[0049] The above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit the same. There are many practical production methods that can be adopted. All equivalent changes and decorations made according to the claims of the present invention fall within the scope of the present invention.

Claims

1. A material processing method for improving channel mobility of a silicon carbide metal oxide semiconductor field effect transistor, characterized in that: Chemical vapor deposition equipment is used to perform in-situ pretreatment on the silicon carbide wafer after ion implantation in a hydrogen atmosphere, and a layer of carbon dioxide with a concentration of ≥5E17cm is grown on the surface of the silicon carbide wafer after ion implantation. -3 A high-concentration n-type heavily doped SiC epitaxial layer is used as a sacrificial layer. In a hydrogen atmosphere, a high-temperature annealing activation treatment is performed on the silicon carbide wafer after the growth of the n-type heavily doped SiC epitaxial layer. After the high-temperature annealing activation in the hydrogen atmosphere is completed, the n-type heavily doped SiC epitaxial layer is completely removed by hydrogen etching or only a thin layer with a thickness of less than 10nm is left. Depending on whether the subsequent actual gate oxide process adopts a process of direct oxidation of the silicon carbide wafer, it is selected whether to epitaxially grow a layer of unintentionally doped SiC thin layer.

2. The material processing method for improving channel mobility of silicon carbide metal oxide semiconductor field effect transistor according to claim 1, characterized in that: The specific process conditions are: The first step is to place the silicon carbide wafer after n-type and p-type ion implantation in the reaction chamber; Step 2: Using chemical vapor deposition (CVD) equipment, in a hydrogen atmosphere, heat the reaction chamber to 1450-1550°C, maintain the temperature for 0.5-2 minutes, and perform in-situ pretreatment of the silicon carbide wafer; Step 3: Raise the temperature of the reaction chamber to 1550-1650°C, introduce growth source and nitrogen, and grow n-type heavily doped SiC epitaxial layer on the silicon carbide wafer. The doping concentration of the epitaxial layer is ≥5E17cm -3 ; Step 4: After the growth of the n-type heavily doped SiC epitaxial layer is completed, the temperature of the reaction chamber is increased to 1550-1750°C; in a hydrogen atmosphere, the silicon carbide wafer is subjected to a high-temperature annealing activation treatment in a hydrogen atmosphere, and a silicon source with a concentration of ≤0.04% is introduced during the process. The hydrogen will continuously etch the n-type heavily doped SiC epitaxial layer, and the time is controlled to retain a 0-10nm thick n-type heavily doped SiC epitaxial layer; Step 5: Depending on whether the gate oxide process actually used later adopts the process of direct oxidation of silicon carbide wafers, it is selected whether to epitaxially grow a layer of unintentionally doped SiC thin layer; Step 6: Turn off the heater in the hydrogen atmosphere and naturally cool the reaction chamber down to room temperature; Step 7: Replace the reaction chamber with argon atmosphere, open the reaction chamber and take out the SiC wafer.

3. The material processing method for improving channel mobility of silicon carbide metal oxide semiconductor field effect transistor according to claim 1, characterized in that: In the fourth step, the silicon source is silane or trichlorosilane.

4. The material processing method for improving channel mobility of a silicon carbide metal oxide semiconductor field effect transistor according to claim 1, characterized in that: The fifth step is to select whether to epitaxially grow a layer of unintentionally doped SiC thin layer with a thickness of 15nm-40nm according to the difference in whether the subsequent actual gate oxide process adopts the process of direct oxidation of silicon carbide wafers; if the subsequent actual gate oxide process adopts low-pressure chemical vapor deposition LPCVD equipment to directly grow a silicon dioxide layer, then proceed directly to the sixth step without additional processing; if the subsequent actual gate oxide process adopts a method of directly oxidizing the wafer to form silicon dioxide, it is necessary to introduce a growth source into the reaction chamber to grow a 15nm-40nm thick unintentionally doped SiC thin layer, i.e., an unintentionally doped SiC epitaxial layer.

5. The material processing method for improving channel mobility of a silicon carbide metal oxide semiconductor field effect transistor according to claim 2, characterized in that: In the third step, the growth source is composed of a silicon source and a carbon source, wherein the silicon source is silane and / or trichlorosilane, and the carbon source is ethylene and / or propane; 6. The material processing method for improving channel mobility of a silicon carbide metal oxide semiconductor field effect transistor according to claim 2, characterized in that: The thickness of the n-type heavily doped SiC epitaxial layer grown in the third step is not less than the amount of hydrogen etching during the high-temperature annealing activation treatment in the hydrogen atmosphere in the fourth step; the amount of hydrogen etching can be obtained by multiplying the hydrogen etching rate by the processing time of the fourth step; the hydrogen etching rate Er needs to be additionally calibrated experimentally: using a SiC epitaxial wafer with a known thickness d1, the same process conditions as the fourth step are used for a treatment time of t. After the treatment is completed, the thickness of the SiC epitaxial wafer is measured again as d2, and the hydrogen etching rate Er = (d1-d2) / t is obtained.

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