Packaging module and manufacturing method therefor, power supply module and electronic device

Abstract

The present application provides a packaging module and a manufacturing method therefor, a power supply module and an electronic device. The packaging module comprises a magnetic energy storage layer, wherein the magnetic energy storage layer is made of a magnetic material, and the magnetic energy storage layer comprises a first surface and a second surface which are opposite to each other; a circuit layer, wherein the circuit layer comprises a first layer, a second layer, and a connecting body, the first layer is arranged on the first surface of the magnetic energy storage layer, the second layer is arranged on the second surface of the magnetic energy storage layer, and the connecting body penetrates through the magnetic energy storage layer and is separately connected to the first layer and the second layer; and a chip, wherein the chip is arranged on one side of the magnetic energy storage layer, and the chip is electrically connected to the first layer or the second layer. In the present application, the magnetic energy storage layer and the circuit layer are used as a bearing platform of the packaging module, and load the chip, the use of traditional bearing platforms made of resin or ceramic materials and the like and independent magnetic energy storage apparatuses is avoided, and the packaging module of the present application has the advantages of miniaturization, high efficiency and high heat dissipation.

Description

Packaging module and manufacturing method thereof, power supply module, and electronic equipment

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office on November 22, 2023, with application number 202311567364.3 and application name “Packaging module and its manufacturing method, power supply module, electronic device”, all contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of chip packaging technology, and specifically to a packaging module and a manufacturing method thereof, a power supply module, and an electronic device. Background Art

[0003] With the continuous development of electronic technology, the performance requirements of electronic products are getting higher and higher, and the size requirements are getting smaller and thinner. Therefore, high-density integration and miniaturization of electronic product packaging structures are the future development trend.

[0004] A system-in-package (SiP) module is a single, standardized package that prioritizes the assembly of multiple active electronic components with different functions, along with other devices such as optional passive components, to achieve a specific function, forming a system or subsystem. Typically, SiP modules combine chips and multiple other passive components to create a high-density module. This high density increases the module's thermal density exponentially, significantly reducing its heat dissipation. Furthermore, the module typically requires a supporting platform made of resin or ceramic materials, along with an independent magnetic energy storage device. This results in a relatively large module size, making it difficult to meet demand.

[0005] Summary of the Invention

[0006] In view of this, the present application provides a packaging module and a manufacturing method thereof, a power supply module, and an electronic device, which can improve the size of the packaging module and enhance the heat dissipation effect and efficiency of the packaging module.

[0007] In a first aspect, an embodiment of the present application provides a packaging module, comprising:

[0008] A magnetic energy storage layer, the magnetic energy storage layer is composed of a magnetic material, and the magnetic energy storage layer includes a first surface and a second surface arranged opposite to each other;

[0009] a circuit layer, the circuit layer comprising a first layer, a second layer, and a connector, the first layer being disposed on a first surface of the magnetic energy storage layer, the second layer being disposed on a second surface of the magnetic energy storage layer, the connector penetrating the magnetic energy storage layer and being connected to the first layer and the second layer, respectively;

[0010] A chip is provided on a side of the first layer away from the magnetic energy storage layer, and the chip is electrically connected to the first layer.

[0011] In the above scheme, in the packaging module of the present application, the magnetic energy storage layer composed of magnetic material serves as the magnetic core, and the magnetic energy storage layer and the circuit layer are combined to realize the inductor function. At the same time, the magnetic energy storage layer and the circuit layer serve as the supporting platform of the packaging module and load the chip, avoiding the use of a substrate made of traditional resin or ceramic materials, etc., and greatly reducing the volume in the module. In addition, the chip is arranged on one side of the first layer, that is, the chip is exposed in the packaging module. The heat generated by the chip can be directly dissipated to the outside world, greatly improving the heat dissipation capacity of the module. At the same time, the chip and the first layer are electrically connected, so that the circuit layer can not only be used to realize the inductor function, but also realize electrical interconnection in the packaging module. There is no obstruction between the chip and the first layer, so that the power path of the module is arranged vertically, reducing line loss and improving module efficiency.

[0012] In this application, the magnetic energy storage layer and circuit layer serve as the supporting platform of the module, and the chip is placed on one side of the magnetic energy storage layer, so that the size of the packaging module is determined by the size of the magnetic energy storage layer, the circuit layer and the chip. Generally, the size of the circuit layer and the chip is relatively fixed, that is, this application can customize the size (length, width and height) of the magnetic energy storage layer according to the actual inductance requirements, thereby designing the size of the packaging module, which can maximize the miniaturization of the packaging module.

[0013] In some feasible implementations, the circuit layer is an integrally formed structure.

[0014] In the above solution, the circuit layer of the one-piece molded structure is distributed inside and on the surface of the magnetic energy storage layer. On the one hand, it can enhance the inductance function, and on the other hand, it can enhance the mechanical strength of the inductor, so that the module can continue to work for a long time in a high current environment with lower power.

[0015] In some feasible implementations, the packaging module further includes passive components, and the passive components are arranged inside and / or on the surface of the magnetic energy storage layer.

[0016] In the above scheme, the passive components can be integrated passive components or independent passive components. Independent passive components include resistors and capacitors. The present application can enhance and improve the module function and achieve high density of the packaged module by arranging the passive components inside and / or on the surface of the magnetic energy storage layer. In addition, the passive components inside the magnetic energy storage layer can further achieve miniaturization of the module while ensuring the heat dissipation performance of the packaged module.

[0017] In some feasible implementations, the chip is a bare chip, and the packaging module further includes a plastic package, which at least covers the bare chip and the first surface of the magnetic energy storage layer.

[0018] In the above scheme, when the chip used in the packaging module is a bare chip, by providing a plastic package on the surface of the bare chip and the magnetic energy storage layer, the bare chip can be protected from the influence of the harsh external environment and the overall pressure resistance of the module can be improved.

[0019] In some feasible embodiments, the first layer has a patterned structure, and the second layer has a patterned structure.

[0020] In the above scheme, the first layer and the second layer have a patterned structure, indicating that the first layer and the second layer both have a solid part and a hollow part. The solid part is used to realize the electrical interconnection of the module, and the hollow part is used to realize electrical isolation, avoid short circuit of the packaging module, and improve the safety of the packaging module.

[0021] In some feasible embodiments, the chip is a packaged chip, and the packaging module further includes a solder resist layer, the solder resist layer is arranged on the first surface and the second surface of the magnetic energy storage layer, the solder resist layer has a patterned structure, the solder resist layer located on the first surface of the magnetic energy storage layer is staggered with the first layer, and the solder resist layer located on the second surface of the magnetic energy storage layer is staggered with the second layer;

[0022] Or the chip is a bare chip, the packaging module further includes a solder resist layer, the solder resist layer is arranged on the second surface of the magnetic energy storage layer, the solder resist layer has a patterned structure, and the solder resist layer located on the second surface of the magnetic energy storage layer is staggered with the second layer.

[0023] In the above scheme, the solder mask layer, also known as the green oil layer, prevents conductive solder from bridging between the various electronic components on the package module, thus preventing short circuits in the module. For bare chips, which require a protective plastic package, solder mask is only required on the second surface of the magnetic energy storage layer. For packaged chips, the chip itself has a protective structure, so solder mask is provided on both the first and second surfaces of the magnetic energy storage layer. The solder mask is staggered with the first layer and the second layer, respectively. This helps reduce the height of the module and facilitates miniaturization of the package module.

[0024] In some feasible implementations, a magnetic shielding layer is provided between part of the connector and the magnetic energy storage layer.

[0025] In the above solution, a portion of the connector is used to conduct the circuit layers on both sides of the magnetic energy storage layer. A magnetic shielding layer is provided between this portion of the connector and the magnetic energy storage layer, which can ensure the electrical connection between the connector and the first layer and the second layer, and prevent the magnetic energy storage layer from causing electromagnetic interference to this portion of the connector.

[0026] In some feasible implementations, an adhesive layer is provided between the chip and the circuit layer.

[0027] In the above solution, the adhesive layer is used to fix the chip, which can strengthen the connection between the chip and the circuit layer and improve the stability of the overall structure of the module.

[0028] In some feasible implementations, the thickness of the magnetic energy storage layer is greater than or equal to 0.3 mm.

[0029] In the above scheme, the thickness of the magnetic energy storage layer of the present application can be specifically 0.3mm, 0.5mm, 0.8mm, 1mm, 2mm, 3mm, 4mm, or 5mm. The thickness of the magnetic energy storage layer of the present application can be adjusted over a wide range and can be reduced, which facilitates miniaturization of the package module. The thickness of the magnetic energy storage layer can be designed based on the actual sensor requirements of the module.

[0030] In some feasible embodiments, the thickness of the first layer is greater than or equal to 0.01 mm; and / or the thickness of the second layer is greater than or equal to 0.01 mm.

[0031] In the above scheme, the thickness of the first layer of the present application can be specifically 0.01mm, 0.02mm, 0.05mm, 0.08mm, 0.1mm, 0.15mm, 0.2mm, 0.3mm, 0.4mm or 0.5mm, etc., and the thickness of the second layer of the present application can be specifically 0.01mm, 0.02mm, 0.05mm, 0.08mm, 0.1mm, 0.15mm, 0.2mm, 0.3mm, 0.4mm or 0.5mm, etc. The thickness of the first layer and the second layer of the present application has a large adjustable range and can achieve a smaller thickness, which is conducive to the miniaturization of the packaging module.

[0032] In a second aspect, an embodiment of the present application further provides a method for manufacturing a packaging module, the method comprising the following steps:

[0033] forming a second layer and a plurality of connectors, wherein the connectors are arranged perpendicularly to a surface of the second layer;

[0034] forming a magnetic energy storage layer, wherein the magnetic energy storage layer and the connector are alternately arranged on the surface of the second layer, the magnetic energy storage layer is composed of a magnetic material, and the magnetic energy storage layer includes a first surface and a second surface arranged opposite to each other;

[0035] forming a first layer covering the connector and the first surface of the magnetic energy storage layer;

[0036] A chip is arranged on a side of the first layer facing away from the magnetic energy storage layer, and the chip is electrically connected to the first layer.

[0037] In the above scheme, the present application first forms a plurality of connectors and a second layer, and then forms a magnetic energy storage layer on the second layer, so that the magnetic energy storage layer and the plurality of connectors are arranged alternately, and finally forms a first layer covering the second layer and the magnetic energy storage layer, forming a complete circuit layer. The circuit layer covers and penetrates the magnetic energy storage layer to realize the inductance function, and as a whole serves as a supporting platform for the packaging module, greatly improving and reducing the volume of the packaging module. Moreover, the chip is arranged on one side of the first layer, that is, the chip is exposed in the packaging module, and the heat generated by the chip can be directly dissipated to the outside world, greatly improving the heat dissipation capacity of the module. At the same time, the chip and the first layer are electrically connected, so that the circuit layer can not only be used to realize the inductance function, but also realize the interconnection function in the packaging module. There is no obstruction between the chip and the first layer, so that the power path of the module is arranged vertically, reducing the line loss and improving the module efficiency.

[0038] In some feasible implementations, the manufacturing method further includes: arranging passive components on the second layer, wherein the passive components are electrically connected to the second layer; and / or

[0039] Passive elements are arranged on the first layer, and the passive elements are electrically connected to the first layer.

[0040] In the above scheme, placing the passive components on the second layer, i.e., placing the passive components inside the package module, facilitates miniaturization of the package module. Placing the passive components on the first layer, i.e., placing both the passive components and the chip on the first layer, increases the density of the components within the package module, facilitating miniaturization and high density of the package module. It will be appreciated that placing the passive components on the second layer requires placement before forming the magnetic energy storage layer.

[0041] In some feasible implementations, the chip is a bare chip, and the manufacturing method further includes: forming a plastic package that at least covers the chip and the first surface of the magnetic energy storage layer.

[0042] In the above solution, by forming a plastic package that at least covers the chip and the first surface of the magnetic energy storage layer, the bare chip can be protected from the influence of the external harsh environment, and the overall pressure resistance of the module can be improved.

[0043] In some feasible implementations, the manufacturing method further includes: patterning the first layer and the second layer.

[0044] In the above scheme, the first layer and the second layer are patterned to form a patterned structure, that is, the first layer and the second layer both have a solid part and a hollow part, the solid part is used to realize the electrical interconnection of the module, and the hollow part is used to realize electrical isolation, thereby avoiding short circuit of the packaging module and improving the safety of the packaging module.

[0045] In some feasible embodiments, the manufacturing method further includes: the chip is a bare chip, and the manufacturing method further includes: forming a solder resist layer on the second surface of the magnetic energy storage layer, the solder resist layer having a patterned structure, and the solder resist layer located on the second surface of the magnetic energy storage layer is staggered with the second layer; or

[0046] The chip is a packaged chip, and the manufacturing method further includes: forming a solder resist layer on the first surface and the second surface of the magnetic energy storage layer, the solder resist layer having a patterned structure, the solder resist layer located on the first surface of the magnetic energy storage layer and the first layer being staggered, and the solder resist layer located on the second surface of the magnetic energy storage layer and the second layer being staggered.

[0047] In the above solution, the solder mask layer, also known as the green oil layer, can prevent conductive solder bridging between various electronic components on the packaging module, thereby avoiding short circuits in the module. For bare chips, the bare chips require a plastic package for protection, so the solder mask layer only needs to be provided on the second surface of the magnetic energy storage layer. For packaged chips, the chip itself has a protective structure, so the solder mask layer is provided on both the first and second surfaces of the magnetic energy storage layer. The solder mask layer is staggered with the first layer and the second layer, which helps to reduce the height of the module and facilitate the miniaturization of the packaging module.

[0048] In some feasible implementations, the manufacturing method further includes: coating a magnetic shielding material on a portion of the outer surface of the connector.

[0049] In the above solution, the connector within a portion of the first through-hole is used to conduct electricity between the circuit layers on both sides of the magnetic energy storage layer. A magnetic shielding material is coated within this portion of the first through-hole to form a magnetic shielding layer. This ensures electrical connection between the connector and the first and second layers, preventing electromagnetic interference from the magnetic energy storage layer on this portion of the connector. It is understood that the magnetic shielding material can be coated on the outer surface of a portion of the connector before the magnetic energy storage layer is formed.

[0050] In some feasible implementations, the manufacturing method further includes: coating an adhesive material between the chip and the first layer.

[0051] In the above solution, an adhesive material is applied between the chip and the first layer to fix the chip. This can strengthen the connection between the chip and the circuit layer and improve the stability of the overall structure of the module.

[0052] In a third aspect, an embodiment of the present application further provides a method for manufacturing a packaging module, comprising the following steps:

[0053] Providing a magnetic energy storage layer, wherein the magnetic energy storage layer is composed of a magnetic material and comprises a first surface and a second surface disposed opposite to each other;

[0054] forming a plurality of first through holes penetrating the magnetic energy storage layer;

[0055] forming a first layer on the first surface of the magnetic energy storage layer, forming a second layer on the second surface of the magnetic energy storage layer, and forming a connector in the first through hole, wherein two ends of the connector are respectively connected to the first layer and the second layer;

[0056] A chip is arranged on a side of the first layer facing away from the magnetic energy storage layer, and the chip is electrically connected to the first layer.

[0057] In the above scheme, the present application first provides a magnetic energy storage layer, forms a first through hole on the magnetic energy storage layer, and forms a first layer, a second layer and a connector on the first surface and the second surface of the magnetic energy storage layer and inside the magnetic energy storage layer through the first through hole. The connected first layer, the second layer and the connector constitute a circuit layer. On the one hand, the circuit layer and the magnetic energy storage layer work together to realize the inductance function. On the other hand, the circuit layer and the chip are electrically connected to realize the interconnection function. In the packaging module of the present application, the chip is loaded on the magnetic energy storage layer, and there is no need to use a substrate made of traditional resin or ceramic materials. The size of the chip, the circuit layer and the magnetic energy storage layer determines the size of the packaging module, which greatly reduces the volume of the module. Moreover, the chip is arranged on one side of the first layer, that is, the chip is exposed in the packaging module. The heat generated by the chip can be directly dissipated to the outside, which greatly improves the heat dissipation capacity of the module. At the same time, there is no obstruction between the chip and the first layer, so that the power path of the module is arranged vertically, reducing line loss and improving module efficiency.

[0058] In some feasible implementations, the manufacturing method further includes: arranging passive components on the first layer, wherein the passive components are electrically connected to the first layer.

[0059] In the above solution, the passive components are arranged on the first layer, that is, the passive components and chips are arranged on the first layer, which improves the distribution density of the devices in the packaging module and is conducive to the miniaturization and high density of the packaging module.

[0060] In some feasible implementations, the chip is a bare chip, and the manufacturing method further includes: forming a plastic package covering the chip and the first surface of the magnetic energy storage layer.

[0061] In the above solution, when the chip is a bare chip, by forming a plastic package that at least covers the chip and the first surface of the magnetic energy storage layer, the bare chip can be protected from the influence of the external harsh environment and the overall pressure resistance of the module can be improved.

[0062] In some feasible implementations, the manufacturing method further includes: patterning the first layer and the second layer.

[0063] In the above scheme, the first layer and the second layer are patterned to form a patterned structure, that is, the first layer and the second layer both have a solid part and a hollow part, the solid part is used to realize the electrical interconnection of the module, and the hollow part is used to realize electrical isolation, thereby avoiding short circuit of the packaging module and improving the safety of the packaging module.

[0064] In some feasible embodiments, the manufacturing method further includes: the chip is a bare chip, and the manufacturing method further includes: forming a solder resist layer on the second surface of the magnetic energy storage layer, the solder resist layer having a patterned structure, and the solder resist layer located on the second surface of the magnetic energy storage layer is staggered with the second layer; or

[0065] The chip is a packaged chip, and the manufacturing method further includes: forming a solder resist layer on the first surface and the second surface of the magnetic energy storage layer, the solder resist layer having a patterned structure, the solder resist layer located on the first surface of the magnetic energy storage layer and the first layer being staggered, and the solder resist layer located on the second surface of the magnetic energy storage layer and the second layer being staggered.

[0066] In the above scheme, the solder mask layer, also known as the green oil layer, prevents conductive solder from bridging between the various electronic components on the package module, thus preventing short circuits in the module. For bare chips, which require a protective plastic package, solder mask is only required on the second surface of the magnetic energy storage layer. For packaged chips, the chip itself has a protective structure, so solder mask is provided on both the first and second surfaces of the magnetic energy storage layer. The solder mask is staggered with the first layer and the second layer, respectively. This helps reduce the height of the module and facilitates miniaturization of the package module.

[0067] In some feasible implementations, the manufacturing method further includes: coating a magnetic shielding material in a portion of the first through holes.

[0068] In the above scheme, the connector in part of the first through hole is used to conduct the circuit layers on both sides of the magnetic energy storage layer. The magnetic shielding material is coated in the part of the first through hole to form a magnetic shielding layer, which can ensure the electrical connection between the connector and the first layer and the second layer, and avoid electromagnetic interference of the magnetic energy storage layer on the part of the connector.

[0069] In some feasible implementations, the manufacturing method further includes: coating an adhesive material between the chip and the first layer.

[0070] In the above solution, an adhesive material is applied between the chip and the first layer to fix the chip, which can strengthen the connection between the chip and the circuit layer and improve the stability of the overall structure of the module.

[0071] In a fourth aspect, an embodiment of the present application further provides a power supply module, including:

[0072] a circuit board layer, the circuit board layer having a second through hole and a third through hole, the circuit board layer including a first surface and a second surface arranged opposite to each other;

[0073] A power supply, a power chip and a packaging module are provided on the circuit board layer, the packaging module is electrically connected to the power supply through the second through hole, and the packaging module is electrically connected to the power chip through the third through hole;

[0074] a first heat sink, the first heat sink being arranged on a side of the power chip away from the circuit board layer;

[0075] a second radiator, the second radiator being arranged on a side of the packaging module away from the circuit board layer;

[0076] The packaging module includes the packaging module described in the first aspect, or the packaging module manufactured by the manufacturing method described in the second aspect, or the packaging module manufactured by the manufacturing method described in the third aspect.

[0077] In the above scheme, since the main part of the packaging module of the present application only includes the magnetic energy storage layer, the circuit layer and the chip, the volume of the packaging module on the circuit board layer is relatively small, and the layout of the power module can be optimized, so that the first heat sink and the second heat sink can be set in the power module of the present application. The first heat sink and the second heat sink are set in the power module to realize two-way heat dissipation of the power chip, thereby greatly improving the heat dissipation effect of the power module.

[0078] In a fifth aspect, an embodiment of the present application provides an electronic device, which includes the packaging module described in the first aspect or the packaging module manufactured by the manufacturing method described in the second aspect.

[0079] By adopting the solution provided by the embodiment of the present application, the packaging module avoids the use of traditional bearing platforms made of materials such as resin or ceramic materials and the use of independent magnetic energy storage devices. The circuit layer and the magnetic storage layer are directly used to realize the inductance function and serve as the bearing platform of the packaging module. The chip is arranged on the circuit layer and electrically connected to the circuit layer. In this way, the volume proportion of the magnetic energy storage layer or the chip in the packaging module can be increased, which is conducive to the high integration and miniaturization of the packaging module. The chip is arranged on one side of the first layer, that is, the chip is exposed in the packaging module. The heat generated by the chip can be directly dissipated to the outside world, which greatly improves the heat dissipation capacity of the module. At the same time, there is no obstruction between the chip and the first layer, so that the power path of the module is arranged vertically, which reduces the line loss and improves the module efficiency. The packaging module of the present application can simultaneously achieve high-density miniaturization, high efficiency and strong heat dissipation capacity of the module, and has good application prospects. BRIEF DESCRIPTION OF THE DRAWINGS

[0080] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0081] FIG1 is a schematic cross-sectional view of a first packaging module according to prior art 1 provided by an embodiment of the present application;

[0082] FIG2 is a schematic cross-sectional view of a second packaging module according to prior art 2 provided by an embodiment of the present application;

[0083] FIG3 is a schematic cross-sectional view of a packaging module provided in an embodiment of the present application;

[0084] FIG4 is a schematic cross-sectional view of another packaging module provided in an embodiment of the present application;

[0085] FIG5 is a flowchart of a manufacturing process of a packaging module provided in an embodiment of the present application;

[0086] FIG6 is a schematic diagram of the cross-sectional structure of the second layer and the connector provided in an embodiment of the present application;

[0087] FIG7 is a schematic diagram of a cross-sectional structure after a magnetic energy storage layer is formed on the second layer according to an embodiment of the present application;

[0088] FIG8 is a schematic diagram of a cross-sectional structure after the magnetic energy storage layer is ground to be flush with the upper surface of the connector according to an embodiment of the present application;

[0089] FIG9 is a schematic cross-sectional view of a structure after a second layer is formed on the surface of the magnetic energy storage layer and the connector according to an embodiment of the present application;

[0090] FIG10 is a schematic diagram of a cross-sectional structure obtained after patterning the first layer and the second layer according to an embodiment of the present application;

[0091] FIG11 is a schematic cross-sectional view of a solder resist layer formed on the second surface of the magnetic energy storage layer according to an embodiment of the present application;

[0092] FIG12 is a schematic cross-sectional view of a solder resist layer formed on a first surface and a second surface of a magnetic energy storage layer according to an embodiment of the present application;

[0093] FIG13 is a flow chart of another method for preparing a packaging module according to an embodiment of the present application;

[0094] FIG14 is a schematic diagram of the cross-sectional structure of the entire magnetic energy storage layer provided in an embodiment of the present application;

[0095] FIG15 is a schematic cross-sectional view of a first through hole provided in an entire magnetic energy storage layer according to an embodiment of the present application;

[0096] FIG16 is a schematic diagram of a cross-sectional structure obtained after a magnetic shielding material is coated in a portion of the first through hole according to an embodiment of the present application;

[0097] FIG17 is a schematic cross-sectional view of a circuit layer provided in an embodiment of the present application having a first layer of a full-layer structure and a second layer of a full-layer structure;

[0098] FIG18 is a schematic diagram of a cross-sectional structure obtained after patterning the first layer and the second layer according to an embodiment of the present application;

[0099] FIG19 is a schematic cross-sectional view of a solder resist layer formed on a first surface and a second surface of a magnetic energy storage layer according to an embodiment of the present application;

[0100] FIG20 is a schematic cross-sectional view of a solder resist layer formed on the second surface of the magnetic energy storage layer according to an embodiment of the present application;

[0101] FIG21 is a schematic cross-sectional view of a packaging module manufactured by a second manufacturing method according to an embodiment of the present application;

[0102] FIG22 is a schematic cross-sectional view of a packaging module of another structure manufactured by the second manufacturing method provided in an embodiment of the present application;

[0103] FIG23 is a schematic cross-sectional view of a power supply module according to an embodiment of the present application;

[0104] FIG24 is a schematic diagram of the cross-sectional structure of an electronic device provided in an embodiment of the present application.

[0105] In the figure: 100 - first packaging module; 101 - first substrate; 102 - first chip; 103 - first inductor; 104 - first capacitor; 105 - first resistor; 200 - second packaging module; 201 - second substrate; 202 - second chip; 203 - second inductor; 204 - second capacitor; 10 - packaging module; 1 - chip; 11 - bare chip; 12 - packaged chip; 2 - magnetic energy storage layer; 3 - circuit layer; 31 - first layer; 32 - second layer; 33 - connector; 4 - magnetic shielding layer; 5 - passive components; 6 - solder mask layer; 7 - plastic package; 8 - first through hole; 20 - circuit board layer; 201 - second through hole; 202 - third through hole; 30 - power supply; 40 - power chip; 50 - first heat sink; 60-second heat sink; 70-capacitor; 1000-electronic device; 1001-housing; 1002-motherboard. DETAILED DESCRIPTION

[0106] In order to better understand the technical solution of the present application, the embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0107] It should be clear that the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0108] The terms used in the embodiments of the present application are for the purpose of describing specific embodiments only and are not intended to limit the present application. The singular forms "a", "an", "the" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms unless the context clearly indicates otherwise.

[0109] It should be understood that the term "and / or" as used herein simply describes a relationship between associated objects, indicating that three possible relationships exist. For example, "A and / or B" can represent: A alone, A and B together, or B alone. Furthermore, the character " / " in this document generally indicates an "or" relationship between the associated objects.

[0110] In the related art, the layout of the packaging module generally uses a resin or ceramic substrate to load the chip and other passive components (capacitors, inductors and resistors, etc.). The module can be formed by burying the chip in the substrate or attaching the chip to the surface of the substrate. As shown in Figure 1, it is a schematic diagram of the cross-sectional structure of a first packaging module 100 provided by an existing technology. The first packaging module 100 includes a first substrate 101, a first chip 102 and a first capacitor 104 are buried in the first substrate 101, a first inductor 103 and a first resistor 105 are attached to the surface of the first substrate 101, and the first chip 102 and the first inductor 103 are arranged relative to each other to obtain the first packaging module 100. In the above-mentioned packaging module, since the first chip 102 is arranged inside the first substrate 101, the volume of the first chip 102 / first packaging module 100 is not high, which reduces the utilization rate of the first chip 102, resulting in a larger module size, which is not conducive to the development of module miniaturization. In addition, since the first chip 102 needs to dissipate heat toward the first substrate 101 and the first inductor 103, on the one hand, the first inductor 103 blocks the upward heat dissipation of the first chip 102, resulting in a significant decrease in the heat dissipation capacity of the module; on the other hand, since the first chip 102 is inside the first substrate 101, the temperature of the first substrate 101 is relatively high, affecting the selection of other devices on the first substrate 101. Moreover, this manufacturing process is complex and costly. As shown in Figure 2, a cross-sectional structural diagram of a second packaging module 200 provided by another prior art is shown. The second packaging module 200 includes a second substrate 201, a second inductor 203 embedded in the second substrate 201, a second capacitor 204 and a second chip 202 arranged on the surface of the second substrate 201, and the second chip 202 and the second inductor 203 arranged correspondingly to obtain the second packaging module 200. In the above packaging module, since the second inductor 203 is arranged inside the second substrate 201, on the one hand, the volume ratio of the second inductor 203 / the second packaging module 200 is not high, which reduces the utilization rate of the second inductor 203 and results in poor performance of the second inductor 203; on the other hand, the second inductor 203 needs to be placed inside the second substrate 201, which requires high precision for the second inductor 203. It is also necessary to additionally arrange auxiliary materials between the second inductor 203 and the second substrate 201 to prevent the second inductor 203 from delaminating from the second substrate 201, which greatly increases the difficulty of the manufacturing process. In addition, the power path between the second inductor 203 and the second chip 202 is relatively far, which greatly reduces the efficiency of the module.

[0111] In response to the above problems, an embodiment of the present application provides a packaging module 10 and a manufacturing method thereof, a power supply module, and an electronic device. As shown in Figure 3, the packaging module 10 includes: a magnetic energy storage layer 2, a circuit layer 3 and a chip 1, the magnetic energy storage layer 2 is composed of a magnetic material, and the magnetic energy storage layer 2 includes a first surface and a second surface arranged opposite to each other; the circuit layer 3 includes a first layer 31, a second layer 32 and a connector 33, the first layer 31 is arranged on the first surface of the magnetic energy storage layer 2, the second layer 32 is arranged on the second surface of the magnetic energy storage layer 2, and the connector 33 passes through the magnetic energy storage layer 2 and is respectively connected to the first layer 31 and the second layer 32; the chip 1 is arranged on the side of the first layer 31 away from the magnetic energy storage layer 2, and the chip 1 is electrically connected to the first layer 31. The packaging module 10 of the present application does not need to use a traditional resin or ceramic material substrate as a carrying platform. It directly combines the circuit layer 3 and the magnetic energy storage layer 2 to realize the inductance function while serving as the carrying platform of the module, which is beneficial to reducing the volume of the packaging module 10, and further couples the chip 1 and the circuit layer 3 to form a packaging module, thereby increasing the volume ratio of the magnetic energy storage layer 2 and the chip 1 in the module, and improving the utilization rate of the magnetic energy storage layer 2 and the chip 1. Moreover, the chip 1 is arranged on one side of the first layer 31, that is, the chip 1 is exposed in the packaging module 10, and the heat generated by the chip 1 can be directly dissipated to the outside world, greatly improving the heat dissipation capacity of the module. At the same time, the chip 1 and the first layer 31 are electrically connected, so that the circuit layer 3 can not only be used to realize the inductance function, but also realize the interconnection function in the packaging module 10, and there is no obstruction between the chip 1 and the first layer 31, so that the power path of the module is arranged vertically, reducing line loss and improving module efficiency.

[0112] The packaging module 10 provided in the embodiment of the present application is applied to an electronic device 1000 , such as common terminals such as mobile phones, smart watches, and laptop computers.

[0113] The packaging module 10 provided in the embodiment of the present application is described in detail below with reference to specific drawings.

[0114] Please refer to Figure 3, which is a structural schematic diagram of the packaging module 10 provided in an embodiment of the present application, including a magnetic energy storage layer 2, a circuit layer 3 and a chip 1. The magnetic energy storage layer 2 is composed of a magnetic material, which has magnetism and can generate inductance with the circuit layer 3 under power-on conditions. Specifically: the magnetic energy storage layer 2 includes a first surface and a second surface arranged opposite to each other, the circuit layer 3 includes a first layer 31, a second layer 32 and a connector 33 for connecting the first layer 31 and the second layer 32. The first layer 31 is arranged on the first surface of the magnetic energy storage layer 2, and the second layer 32 is arranged on the second surface of the magnetic energy storage layer 2. The connector 33 penetrates the magnetic energy storage layer 2 and is respectively connected to the first layer 31 and the second layer 32. The chip 1 is arranged on the side of the first layer 31 away from the magnetic energy storage layer 2, and the chip 1 is electrically connected to the first layer 31. That is, the circuit layer 3 of the present application can partially cover the magnetic energy storage layer 2 and penetrate from the interior of the magnetic energy storage layer 2, so that the magnetic energy storage layer 2 and the circuit layer 3 work together to realize the inductance function. It can be understood that inductance is a property of a closed circuit, that is, when the current passing through the closed circuit changes, an electromotive force will appear to resist the change in current. It is an abbreviation for the "electromagnetic induction" phenomenon. Hereinafter, the structure composed of the magnetic energy storage layer 2 and the circuit layer 3 will be referred to as the "inductance structure". At the same time, the inductance structure serves as a supporting platform for the chip 1 and further serves as the main frame of the packaging module 10 and is interconnected with the chip 1. As such, the size of the packaging module 10 of the present application is determined by the size of the inductance structure, which greatly increases the volume ratio of the inductance structure and chip 1 in the module, thereby improving the utilization rate of the inductance structure and chip 1.

[0115] This application does not limit the first surface and the second surface of the magnetic energy storage layer. It only indicates that the first layer 31 and the second layer 32 are located on two different and opposite surfaces of the magnetic energy storage layer 2. That is, the chip 1 can be set on the first layer 31 or on the second layer 32. This application only takes the chip 1 set on the first layer 31 as an example for explanation.

[0116] In some feasible embodiments, the magnetic energy storage layer 2 is composed of a magnetic material, and the magnetic material can be, for example, a ferromagnetic material, a nickel-zinc ferromagnetic material, and a manganese-zinc magnetic material, among which the ferromagnetic material is mainly made of pure iron powder with an insulating agent and a binder added thereto, and is obtained by extrusion molding. The ferromagnetic powder has a very high saturation magnetic flux density and can be used for power-type magnetic ring inductors; the nickel-zinc ferromagnetic material relies on magnetic loss and electric loss to absorb electromagnetic energy to absorb interfering electromagnetic waves. It has a high surface resistance and can be used in medium and high frequency circuits. Manganese-zinc magnetic material has a high initial magnetic permeability, a high saturation magnetic flux density, and low loss, and is generally used in magnetic ring common-mode inductors, etc. This application does not limit the magnetic material, and it can be selected according to the specific requirements of the packaging module 10.

[0117] Optionally, the number of connectors 33 is multiple, specifically two, three, five or seven, etc., and this application does not impose any restrictions on this. Preferably, in order to strengthen the interconnection effect of the circuit layer 3, more than three connectors 33 are provided. As shown in FIG3 , the inductor structure can be regarded as a three-layer structure stacked along the first direction, wherein the first layer structure includes the first layer 31, the second layer structure includes connectors 33 and magnetic energy storage blocks alternately arranged along the second direction, and multiple magnetic energy storage blocks constitute the magnetic energy storage layer 2. The connectors 33 can be regarded as multiple conductor columnar structures vertically inserted into the magnetic energy storage layer, and the third layer structure includes the second layer 32, wherein the first direction is the thickness direction of the packaging module 10, and can also be the thickness direction of the chip 1, that is, the Z-axis direction shown in FIG3 , and the second direction is perpendicular to the first direction, and the second direction is the extension direction along the first layer 31 or along the extension direction along the second layer 32, that is, the X-axis direction shown in FIG3 .

[0118] Optionally, the circuit layer 3 is an integrally formed structure. During the manufacturing process of the packaging module 10 of the present application, a connected circuit layer 3 can be formed on the first surface, the second surface and the interior of the magnetic energy storage layer 2 by electroplating, chemical plating, etc., so that the circuit layer 3 is an integrally formed structure. On the one hand, it can enhance the inductance function. On the other hand, the magnetic energy storage layer 2 is arranged inside the circuit layer 3, that is, the circuit layer 3 serves as a supporting platform for the packaging module 10. The integrally formed circuit layer 3 can enhance the overall mechanical strength of the module.

[0119] In some feasible embodiments, in the packaging module 10 of the present application, since the connector 33 passes through the magnetic energy storage layer 2, there is direct contact between the connector 33 and the magnetic energy storage layer 2. Since a portion of the connector 33 needs to connect the first layer 31 and the second layer 32 for the purpose of conducting the circuit layer 3, in order to avoid electromagnetic interference of the magnetic energy storage layer 2 on the connector 33, as shown in Figure 3, a magnetic shielding layer 4 is provided between the connector 33 and the magnetic energy storage layer 2. The magnetic shielding layer 4 is a layer structure between the connector 33 and the magnetic energy storage layer 2. The magnetic shielding layer 4 is circumferentially arranged around the surface of the connector 33. The magnetic shielding layer 4 is made of a magnetic shielding material. The magnetic shielding material is a material with high magnetic permeability, such as Permalloy.

[0120] In some feasible embodiments, please continue to refer to Figure 3. The first layer 31 has a patterned structure, and the second layer 32 has a patterned structure, that is, the first layer 31 has a hollow portion and a solid portion on the first surface of the magnetic energy storage layer 2, and the second layer 32 has a solid portion and a hollow portion on the second surface of the magnetic energy storage layer 2. During the preparation process, the entire first layer 31 and the entire second layer 32 can be prepared first, and then the first layer 31 and the second layer 32 can be patterned using a mask method or laser processing, so that the first layer 31 and the second layer 32 have a patterned structure of hollow portions and solid portions. It can be understood that the pattern of the patterned structure can be specifically designed according to the electrical connection circuit of the packaging module 10. This application does not specifically limit the patterned structure. The patterned structures of the first layer 31 and the second layer 32 can be the same or different.

[0121] In some feasible embodiments, the chip 1 is arranged on the side of the first layer 31 away from the magnetic energy storage layer 2, and the chip 1 is electrically connected to the first layer 31. The present application realizes electrical interconnection between the chip 1 and the inductor structure by electrically connecting the first layer 31 and the chip 1, and the distance between the first layer 31 and the chip 1 is relatively close, which is conducive to shortening the power path between the inductor structure and the chip 1, reducing line loss, and improving module efficiency.

[0122] In this application, chip 1 refers to a semiconductor including an integrated circuit, specifically:

[0123] Depending on the mounting method of chip 1, chip 1 includes two types: upright chip and flip chip. The upright chip structure, from top to bottom, consists of: electrode, P-type semiconductor layer, light-emitting layer, N-type semiconductor layer, and substrate. In this structure, heat generated at the PN junction must pass through the substrate to be transferred to the heat sink. The substrate's poor thermal conductivity results in poor thermal conductivity of the structure, thereby reducing the luminous efficiency and reliability of chip 1. The flip chip structure, from top to bottom, consists of substrate, N-type semiconductor layer, light-emitting layer, P-type semiconductor layer, and electrode. Compared to the upright structure, heat generated at the PN junction in this structure can be directly transferred to the heat sink without passing through the substrate, resulting in excellent heat dissipation performance and higher luminous efficiency and reliability of chip 1. Furthermore, in the flip chip structure, both the p-electrode and n-electrode are located on the bottom surface, avoiding obstruction of the emitted light and improving the chip's light extraction efficiency. Furthermore, the greater distance between the electrodes in the flip chip reduces the risk of short circuits caused by metal migration. Preferably, the chip 1 is an FC flip chip 1. During the preparation of the flip chip 1, conductive bumps are made on one side of the bare chip 11 through an under bump metallization (UBM) process. Specifically, a metal material can be formed into a bump-like structure on one side of the chip 1 by sputtering, evaporation, and chemical plating. The chip 1 is connected to the first layer 31 through the conductive bumps to achieve electrical connection between the chip 1 and the first layer 31. In this way, the problem of using wires to connect the chip 1 and the first layer 31, which causes a chaotic layout and occupies excess space in the packaging module 10, is avoided. Optionally, the conductive bumps are made of any one of copper, gold, silver, aluminum, molybdenum, and titanium.

[0124] Depending on whether the chip is packaged, the chip 1 includes two types: a bare chip 11 and a packaged chip 12. The bare chip 11 refers to a chip 1 that has not been packaged after the wafer has been cut and tested. This bare chip only has pressure welding points for packaging. The packaged chip 12 refers to the bare chip 11 that connects the internal circuit to the packaging pins through gold wires and the packaging pins, and after binding, it is led out through the shell covered by the bare chip 11. In some embodiments, the chip 1 of the present application refers to the bare chip 11. As shown in Figure 3, the packaging module 10 also includes a plastic packaging member 7 that at least covers the first surface of the chip 1 and the magnetic energy storage layer 2, that is, the plastic packaging member 7 is arranged on the top of the packaging module 10. The bare chip 11 is usually embedded in epoxy molding compound (EMC-Epoxy Molding Compound), and cross-linked and cured to obtain a plastic packaging member 7 with a certain structural shape, which is used to package and protect the bare chip 11, which is beneficial for protecting the bare chip 11 from the influence of harsh external environment during use, and at the same time can improve the overall pressure resistance of the module. In other embodiments, as shown in Figure 4, the chip 1 of the present application is a packaged chip 12, that is, the packaged module 10 of the present application includes a stacked packaged chip 12 and an inductor structure, and there is no need to set a plastic package 7, and the packaged chip 12 is directly exposed to the external environment.

[0125] In some feasible embodiments, the packaging module 10 also includes a solder resist layer 6, which is a non-wiring layer on the magnetic energy storage layer 2. The non-wiring area on the magnetic energy storage layer 2 is coated with a solder resist. The solder resist has a certain thickness and hardness and has a certain acid and alkali resistance. The solder resist includes ultraviolet (UV) curing solder resist, thermal curing solder resist, liquid photosensitive solder resist and dry film solder resist, etc., such as epoxy resin and epoxy acrylic resin. In the present application, the solder resist layer 6 can be set on the first surface of the magnetic energy storage layer 2, or on the second surface of the magnetic energy storage layer 2. Of course, it can also be set on the first surface and second surface of the magnetic energy storage layer 2 at the same time, mainly depending on the type of chip selected. Please continue to refer to Figure 3. For the bare chip 11, since the first surface of the magnetic energy storage layer 2 is provided with a plastic package 7, it only needs to be provided on the second surface of the magnetic energy storage layer 2. Please continue to refer to Figure 4. For the packaged chip 12, the solder resist layer is provided on both the first surface and the second surface of the magnetic energy storage layer 2.

[0126] Optionally, the solder resist layer 6 has a patterned structure, and the solder resist layer 6 located on the first surface of the magnetic energy storage layer 2 is staggered with the first layer 31, and the solder resist layer 6 located on the second surface of the magnetic energy storage layer 2 is staggered with the second layer 32. In this way, the solder resist layer 6 and the first layer 31 are alternately arranged on the first surface of the magnetic energy storage layer 2, and the solder resist layer 6 and the second layer 32 are alternately arranged on the second surface of the magnetic energy storage layer 2. This not only prevents conductive solder bridging between various electronic components on the packaging module 10 and avoids short circuit of the module, but also reduces the height of the module and realizes miniaturization of the module.

[0127] In some feasible embodiments, for a packaging module that uses a bare chip 11, an adhesive layer is provided between the bare chip 11 and the circuit layer 3 (the adhesive layer is not shown in the accompanying drawings). The adhesive layer is filled around the edges of the bare chip 11 and contacts the first surface of the magnetic energy storage layer 2. The adhesive layer not only enables the bare chip 11 to adhere more firmly to the first layer 31 to improve the connection stability of the chip in the packaging module 10, but also prevents impurities from entering the area between the chip and the magnetic energy storage layer 2.

[0128] Optionally, the adhesive layer may be made of a light-shielding material or a light-absorbing material. This arrangement can provide a light-shielding or light-absorbing effect, thereby preventing light leakage at the edges of the connection between the chip 1 and the magnetic energy storage layer 2, and preventing the entry of external light from interfering with the imaging of the chip 1.

[0129] In some feasible embodiments, please continue to refer to Figures 3 and 4. The packaging module 10 also includes a passive component 5. The passive component 5 can be an integrated passive component or an independent passive component. The independent passive component 5 includes resistors and capacitors. Depending on the preparation process, the passive component 5 can be installed on the surface of the packaging module 10, that is, after the magnetic energy storage layer 2 and the circuit layer 3 are prepared, the passive component 5 is installed on the first layer 31 of the circuit layer 3 and electrically connected to the first layer 31; the passive component 5 can also be installed inside the packaging module 10, that is, first make the second layer 32 and the connector 33 of the circuit layer 3, and before preparing the magnetic energy storage layer 2, pre-install the passive component 5 on the second layer 32 and electrically connect it to the second layer 32, and then make the magnetic energy storage layer 2 on the second layer 32. In this way, the passive component 5 can be embedded in the packaging module 10, optimizing the layout of the packaging module 10, which is conducive to the miniaturization of the packaging module 10. The passive component 5 of the present application is indirectly connected to the chip 1 through the circuit layer 3, thereby enhancing the function of the chip 1.

[0130] In some feasible embodiments, the thickness of the magnetic energy storage layer 2 is greater than or equal to 0.3 mm, and specifically can be 0.3 mm, 0.5 mm, 0.8 mm, 1 mm, 2 mm, 3 mm, 4 mm, or 5 mm. The thickness of the magnetic energy storage layer of the present application can be adjusted over a wide range and can be reduced, facilitating miniaturization of the package module. The thickness of the magnetic energy storage layer can be designed based on the actual sensor requirements of the module.

[0131] In some feasible embodiments, the thickness of the first layer 31 is greater than or equal to 0.01 mm, and specifically can be 0.01 mm, 0.02 mm, 0.05 mm, 0.08 mm, 0.1 mm, 0.15 mm, 0.2 mm, 0.3 mm, 0.4 mm or 0.5 mm, etc.

[0132] In some feasible embodiments, the thickness of the second layer 32 is greater than or equal to 0.01 mm, and specifically can be 0.01 mm, 0.02 mm, 0.05 mm, 0.08 mm, 0.1 mm, 0.15 mm, 0.2 mm, 0.3 mm, 0.4 mm or 0.5 mm.

[0133] The thickness of the first layer 31 and the second layer 32 of the present application can be adjusted in a wide range and can achieve a smaller thickness, which is conducive to miniaturization of the packaging module.

[0134] The thickness of the packaging module 10 of the present application is greater than 0.4 mm, which is significantly smaller than the packaging module 10 in the prior art that uses a plastic or ceramic substrate. Compared with the prior art, the embodiment of the present application can make the packaging module 10 lighter and thinner, and does not require a traditional plastic or ceramic substrate. The combination of the circuit layer 3 and the magnetic energy storage layer 2 realizes the inductance function while having a certain load-bearing capacity, which can meet the needs of subsequent module applications.

[0135] The present application also provides a method for manufacturing a packaging module 10, which is used to manufacture the packaging module 10 provided in any embodiment of the present application. FIG5 is a flow chart of the method for manufacturing the packaging structure provided in the embodiment of the present application. As shown in FIG5 , the manufacturing method includes the following steps:

[0136] Step S100 : forming a second layer 32 and a plurality of connectors 33 , wherein the plurality of connectors 33 are vertically arranged on the surface of the second layer 32 .

[0137] Step S200: forming a magnetic energy storage layer 2, wherein the magnetic energy storage layer 2 and the connector 33 are alternately arranged on the surface of the second layer 32, and the magnetic energy storage layer 2 is made of a magnetic material;

[0138] Step S300 , forming a first layer 31 covering the connector 33 and the magnetic energy storage layer 2 ;

[0139] Step S400 : arranging a chip 1 on a side of the first layer 31 away from the magnetic energy storage layer 2 , and electrically connecting the chip 1 to the first layer 31 .

[0140] Using the manufacturing method provided in the embodiment of the present application, by first preparing the second layer 32 and the connector 33, then preparing the magnetic energy storage layer 2, and finally preparing the first layer 31 covering the connector 33 and the magnetic energy storage layer 2, the resulting structure includes a circuit layer 3 and a magnetic energy storage layer 2, wherein the magnetic energy storage layer 2 is located between the first layer 31 and the second layer 32, and the connector 33 penetrates the magnetic energy storage layer 2, so that the circuit layer 3 and the magnetic energy storage layer 2 together constitute an inductor structure for realizing the inductor function, and then the chip 1 is arranged on the first layer 31 to obtain the packaging module 10. The inductor structure of the present application serves as a supporting platform for the packaging module 10, so that the volume of the magnetic energy storage layer 2 and the circuit layer 3 mainly determines the volume of the packaging module 10, greatly increasing the volume ratio of the magnetic energy storage layer 2 or the chip 1 in the module. Moreover, the chip 1 is exposed in the packaging module 10, and the heat generated by the chip 1 can be directly dissipated to the outside world, greatly improving the heat dissipation capacity of the module. At the same time, the chip 1 is electrically connected to the first layer 31, so that the circuit layer 3 can not only be used to realize the inductor function, but also realize electrical interconnection in the packaging module 10. There is no obstruction between the chip 1 and the first layer 31, so that the power path of the module is arranged vertically, reducing line loss and improving module efficiency. The manufacturing method of the present application has a simple process and a high degree of feasibility, and can produce a high-efficiency, miniaturized, and high-heat dissipation packaging module 10.

[0141] In some feasible embodiments, step S100 forms the second layer 32 and the connector 33, including: forming the second layer 32 by molding, magnetron sputtering, and electroplating processes, and forming the connector 33 on the second layer 32 by magnetron sputtering and electroplating processes, and the connector 33 is vertically arranged on the surface of the second layer 32. The obtained structure is shown in Figure 6. It can be understood that the second layer 32 and the connector 33 can be prepared by an integrated molding process such as magnetron sputtering and electroplating process, and can also be prepared by first preparing the second layer 32 and then preparing the connector 33.

[0142] Furthermore, the material forming the second layer 32 and the connector 33 can be the same conductor material or different conductor materials. The conductive material can be a metal, such as copper (Cu), silver (Ag), tin (Sn), aluminum (Al) or other metals or metal alloys, etc. The conductive material can also be indium tin oxide (ITO), graphite, graphene, etc., which is not limited in the embodiments of the present application.

[0143] Furthermore, as shown in Figure 6, there are generally multiple connectors 33, and a portion of the connectors 33 is used to conduct the circuit layers 3 on both sides of the magnetic energy storage layer 2. A magnetic shielding material is coated on the outer surface of this portion of the connector 33 to obtain a magnetic shielding layer 4 circumferentially surrounding the connector 33, which can play a protective role in advance and prevent the magnetic energy storage layer produced later from causing electromagnetic interference to this portion of the connector 33. The connector 33 that is not coated with the magnetic shielding material is used to serve as the lead of the packaging module 10.

[0144] In some feasible embodiments, after forming the second layer 32 and the connector 33, it also includes: arranging a passive component 5 on the second layer 32. The setting position of the passive component is shown in Figure 6. The number of passive components 5 can be one or more. The passive component 5 is electrically connected to the first layer 31. That is, in this embodiment, the passive component 5 is arranged inside the packaging module 10, which is conducive to the high density and miniaturization of the packaging module 10. The passive component 5 can be, for example, a resistor, a capacitor, etc.

[0145] In some feasible embodiments, step S200 of forming the magnetic energy storage layer 2 includes forming the magnetic energy storage layer 2 on the surface of the second layer 32 through molding, magnetron sputtering, and electroplating processes. The resulting structure is shown in FIG7 . For example, using molding as an example, the shape of the magnetic energy storage layer 2 is designed, and a corresponding mold is fabricated. Metal magnetic powder is placed into the mold and pressed to form the magnetic energy storage layer 2. The metal magnetic powder can be made of a variety of different materials, such as iron powder, sendust magnetic powder, high magnetic flux powder, molybdenum permalloy magnetic powder, etc. The iron powder core is composed of a combination of extremely fine iron powder and organic materials. The magnetic permeability of the iron powder is between 10 and 75. The alloy composition of sendust magnetic powder is 85% iron, 9% silicon, and 6% aluminum. Sendust magnetic powder has low loss and a hard material. The magnetic permeability of sendust magnetic powder can be 26, 60, 75, 90, 125, etc. High-flux powder, for example, is an iron-nickel powder core, whose alloy powder may be composed of 50% nickel and 50% iron. High-flux powder cores have the highest magnetic flux density, with higher core loss than sendust and lower than iron powder cores. The magnetic permeability of high-flux powder ranges from 14 to 200. Molybdenum permalloy powder is composed of 2% molybdenum, 81% nickel, and 17% iron. Among these powder cores, molybdenum permalloy powder has the lowest loss and saturation flux density.

[0146] In this embodiment, the first surface and the second surface of the magnetic energy storage layer 2 refer to any surfaces arranged relative to each other. In some embodiments, the first surface and the second surface refer to surfaces perpendicular to the thickness direction of the packaging module 10, wherein the second layer 32 is located on the second surface of the magnetic energy storage layer 2.

[0147] Furthermore, in the process of forming the magnetic energy storage layer 2, the upper surface of the magnetic energy storage layer 2 should be flush with the upper surface of the connector 33. If the upper surface of the magnetic energy storage layer 2 covers the connector 33 after the magnetic energy storage layer 2 is prepared, it is necessary to expose the upper surface of the connector 33 through a grinding process. The resulting structure is shown in Figure 8 to ensure the subsequent electrical connection of the connector 33.

[0148] In some feasible embodiments, step S300 forms a first layer 31 covering the connector 33 and the magnetic energy storage layer 2, including: forming the first layer 31 on the first surface of the magnetic energy storage layer 2 by molding, magnetron sputtering, and electroplating processes, the first layer 31 and the second layer 32 are parallel to each other and connected by the connector 33 to form a complete circuit layer 3. The resulting structural schematic diagram is shown in Figure 9. Different from the circuit layer 3 in the prior art, the circuit layer 3 of the present application can not only play the role of realizing electrical connection in the packaging module 10, but also can work together with the magnetic energy storage layer 2 to realize the inductance function.

[0149] Furthermore, the material forming the first layer 31 and the material forming the second layer 32 can be the same conductor material or different conductor materials. The conductive material can be a metal, such as copper (Cu), silver (Ag), tin (Sn), aluminum (Al) or other metals or metal alloys, etc. The conductive material can also be indium tin oxide (ITO), graphite, graphene, etc., which is not limited in the embodiments of the present application.

[0150] Furthermore, after obtaining the circuit layer 3, the first layer 31 and the second layer 32 are patterned, and the resulting structure is shown in Figure 10. In Figure 10, the first layer 31 includes a solid portion and a hollow portion, and the solid portion and the hollow portion are alternately arranged on the first surface of the magnetic energy storage layer 2. The second layer 32 includes a solid portion and a hollow portion, and the solid portion and the hollow portion are alternately arranged on the second surface of the magnetic energy storage layer 2.

[0151] Specifically, the material of the first layer 31 is removed from some areas by masking, etching, etc. to obtain a patterned first layer 31. The material of the second layer 32 is removed from some areas by masking, etching, etc. to obtain a patterned second layer 32. By patterning the first layer 31 and the second layer 32, short circuits in the packaging module 10 are avoided, thereby improving the safety of the packaging module 10. Of course, other methods such as laser cutting can also be used for patterning, and this application does not limit this.

[0152] In some feasible embodiments, after step S300, the step further includes: forming a solder resist layer 6 on the first surface and / or the second surface of the magnetic energy storage layer 2, wherein the solder resist layer 6 has a patterned structure, and the solder resist layer 6 is selectively formed on the first surface and the second surface of the magnetic energy storage layer according to the type of chip 1 selected for the packaging module 10:

[0153] When the chip 1 selected for the packaging module 10 is a bare chip 11, additional plastic sealing is usually required on the bare chip 11 to protect the bare chip 11. The plastic sealing component protects the bare chip 11 while also covering a portion of the magnetic energy storage layer 2. Therefore, there is no need to set a solder resist layer 6 on the surface of the magnetic energy storage layer 2 close to the preset chip 1 position, that is, the solder resist material is coated on the second surface of the magnetic energy storage layer 2 through coating, spraying and other processes to form a solder resist layer 6. More specifically, please refer to Figure 11, the solder resist material is coated in the gap of the patterned second layer 32 to form a solder resist layer 6. The solder resist layer 6 and the second layer 32 are alternately arranged and are both on the second surface of the magnetic energy storage layer 2. The solder resist layer 6 can not only prevent the packaging module 10 from short circuiting, but also reduce the height of the packaging module 10, which is conducive to the miniaturization of the packaging module 10.

[0154] When the chip 1 selected for the packaging module 10 is the packaging chip 12, it is necessary to provide a solder resist layer 6 on both the first surface and the second surface of the magnetic energy storage layer 2. Specifically, the solder resist material is formed on the first surface and the second surface of the magnetic energy storage layer 2 by coating, spraying or other processes to form the solder resist layer 6. The solder resist layer on the first surface of the magnetic energy storage layer 2 is alternately arranged with the first layer 31, and the solder resist layer on the second surface of the magnetic energy storage layer 2 is alternately arranged with the second layer 32. The resulting structure is shown in FIG12 .

[0155] Optionally, the solder resist material includes any one of exposure ink, UV ink and character ink.

[0156] In some feasible embodiments, step S300 further includes: arranging passive components 5 on the first layer 31, and electrically connecting the passive components 5 to the first layer 31 to enhance the function of the packaging module 10. The number of passive components 5 can be one or more. Specifically, the passive components 5 can be capacitors, resistors, etc. It can be understood that in the manufacturing method described in the embodiment of the present application, when the passive components 5 are arranged on the first layer 31, the passive components 5 are set on the surface of the packaging module 10, and when the passive components 5 are arranged on the second layer 32, the passive components 5 are set inside the packaging module 10. The present application can set the distribution position of the passive components 5 according to actual needs. Of course, the passive components 5 can also be arranged on the first layer 31 and the second layer 32 at the same time.

[0157] In some feasible implementations, in step S400 , the chip 1 is arranged on a side of the first layer 31 away from the magnetic energy storage layer 2 , and the chip 1 is electrically connected to the first layer 31 to obtain a packaging module 10 .

[0158] Specifically, the chip 1 of the present application has conductive bumps, which are arranged toward the first layer 31. The chip 1 and the first layer 31 are electrically connected through the conductive bumps, that is, the chip 1 of the present application is directly arranged on the inductor structure, so that the power path between the inductor structure and the chip 1 is shorter, which can reduce line loss. At the same time, the inductor structure serves as a supporting platform for the chip 1, and there is no need to set up a traditional resin or ceramic substrate, which can greatly reduce the volume share of the inductor structure and the chip 1 in the packaging module 10.

[0159] Furthermore, after arranging the chip 1 on the side of the first layer 31 away from the magnetic energy storage layer 2 , the process further includes: coating an adhesive material between the first surface of the magnetic energy storage layer 2 and the chip 1 to form an adhesive layer between the chip 1 and the magnetic energy storage layer 2 to fix the chip 1 .

[0160] Specifically, the adhesive material may be epoxy resin glue, UV glue, etc.

[0161] Furthermore, as previously described, chip 1 can be either a bare chip 11 or a packaged chip 12. When chip 1 is a bare chip 11, after electrically connecting the bare chip 11 to the first layer 31, a plastic encapsulation member 7 is formed on the first surface of the magnetic energy storage layer 2. The resulting structure is shown in FIG3 . Plastic encapsulation member 7 covers chip 1 and the first surface of the magnetic energy storage layer 2, protecting chip 1. When chip 1 is a packaged chip 12, chip 1 already has a protective structure, eliminating the need for plastic encapsulation member 7. The resulting structure is shown in FIG4 .

[0162] Specifically, the plastic packaging material is extruded into the mold cavity by transfer molding to prepare the plastic packaging part 7, and then the prepared plastic packaging part 7 is placed on the first surface of the magnetic energy storage layer 2 so that the plastic packaging part 7 covers the chip 1, and then the plastic packaging part 7 is bonded to the first surface of the magnetic energy storage layer 2.

[0163] The molding material may be one or more of epoxy molding compound (EMC), polyethylene, polypropylene, polyolefin, polyamide, polyurethane, etc., or a combination thereof.

[0164] The present application also provides a method for manufacturing a packaging module 10, which is used to manufacture the packaging module 10 provided in any embodiment of the present application. The method differs from the above-mentioned method for manufacturing the packaging module 10 provided in the present application in that the magnetic energy storage layer 2 is manufactured first, and then the circuit layer 3 is manufactured. FIG11 is a flow chart of the method for manufacturing the packaging structure provided in the embodiment of the present application. As shown in FIG13, the manufacturing method includes the following steps:

[0165] Step S100: providing a magnetic energy storage layer 2, wherein the magnetic energy storage layer 2 is made of a magnetic material and includes a first surface and a second surface opposite to each other;

[0166] Step S200 , forming a first through hole 8 penetrating the magnetic energy storage layer 2 ;

[0167] Step S300: forming a first layer 31 on the first surface of the magnetic energy storage layer 2, forming a second layer 32 on the second surface of the magnetic energy storage layer 2, and forming a connector 33 in the first through hole 8, wherein both ends of the connector 33 are connected to the first layer 31 and the second layer 32 respectively;

[0168] Step S400 : arranging a chip 1 on a side of the first layer 31 away from the magnetic energy storage layer 2 , and electrically connecting the chip 1 and the first layer 31 .

[0169] By adopting the manufacturing method provided in the embodiment of the present application, the circuit layer 3 does not need to be manufactured in steps, but can be directly formed on the first surface, the second surface and the interior of the magnetic energy storage layer 2, which can simplify the process and improve the module manufacturing efficiency.

[0170] In some feasible embodiments, step S100 of providing the magnetic energy storage layer 2 includes: using a molding method to press metal magnetic powder to form the magnetic energy storage layer 2. The resulting structure is shown in FIG14 . After the pressing is completed, the magnetic energy storage layer 2 needs to be annealed to reduce the loss of the magnetic material. Of course, commercial metal cores can also be directly purchased and cut into the required shape.

[0171] Specifically, the annealing temperature is not lower than 350°C, for example, it can be 350°C, 380°C, 400°C, 450°C, 500°C, etc. Within the above-mentioned limited range, it can reduce the overall loss of the magnetic material as an inductor structure and ensure that the inductor structure has a lower operating temperature.

[0172] Specifically, the metal magnetic powder can be made of various types of materials, such as iron powder, sendust magnetic powder, high magnetic flux powder, molybdenum permalloy magnetic powder, etc.

[0173] In some feasible implementations, in step S200 , a first through hole 8 is formed penetrating the magnetic energy storage layer 2 , and the resulting structure is shown in FIG. 15 .

[0174] Among them, the first through hole 8 is used to reserve space for preparing the circuit layer 3 that passes through the magnetic energy storage layer 2. The number of the first through holes 8 is usually set to multiple, for example, it can be three, five, six or seven, etc. The first through holes 8 can be formed by laser drilling or other methods, and this application does not limit this.

[0175] Furthermore, among the multiple first through holes 8, a connector 33 needs to be set in the first through hole 8 later. A part of the connector 33 is used to realize the electrical connection of the packaging module 10, and a part of the conductor is used to realize the connection of the circuit layer 3 on both sides of the magnetic energy storage layer 2. Therefore, the first through hole 8 of the connector 33 for realizing the connection of the circuit layer 3 on both sides of the magnetic energy storage layer 2 needs to be pre-coated with a magnetic shielding material to form a magnetic shielding layer 4. The resulting structure is shown in Figure 16, which avoids the magnetic energy storage layer 2 from electromagnetic interference with the connector 33 in this part of the first through hole 8.

[0176] In some feasible embodiments, in step S300, a first layer 31 is formed on the first surface of the magnetic energy storage layer 2, a second layer 32 is formed on the second surface of the magnetic energy storage layer 2, and a connector 33 is formed in the first through hole 8, and the two ends of the connector 33 are respectively connected to the first layer 31 and the second layer 32, and the resulting structure is shown in Figure 17.

[0177] Specifically, the conductor material is formed into a first layer 31 on the first surface of the magnetic energy storage layer 2, a second layer 32 is formed on the second surface of the magnetic energy storage layer 2, and a connector 33 is formed in the first through hole 8 through chemical plating, magnetron sputtering and electroplating processes to obtain the circuit layer 3. In this step, the circuit layer 3 can be formed through a one-step process with simple process and high production efficiency. It is also possible to prepare the second layer 32 first, then the connector 33, and finally the first layer 31 in a step-by-step manner.

[0178] Furthermore, the conductive material can be a metal, such as copper (Cu), silver (Ag), tin (Sn), aluminum (Al) or other metals or metal alloys, etc. The conductive material can also be indium tin oxide (ITO), graphite, graphene, etc., which is not limited in the embodiments of the present application.

[0179] In some feasible embodiments, after obtaining the circuit layer 3, the first layer 31 and the second layer 32 are patterned, and the resulting structure is shown in Figure 18. In Figure 18, the first layer 31 includes a solid part and a hollow part, and the second layer 32 includes a solid part and a hollow part.

[0180] Specifically, the material of the first layer 31 is removed from some areas by masking, etching, etc. to obtain the patterned first layer 31, and the material of the second layer 32 is removed from some areas by masking, etching, etc. to obtain the patterned second layer 32. The arrangement of the patterned first layer 31 and the second layer 32 can prevent the package module 10 from short-circuiting and improve the safety of the package module 10. Of course, other methods such as laser cutting can also be used for patterning, and this application does not limit this.

[0181] In some feasible embodiments, after step S300, the step further includes: forming a solder resist layer 6 on the first surface and / or the second surface of the magnetic energy storage layer 2, wherein the solder resist layer 6 has a patterned structure, and the solder resist layer 6 is selectively formed on the first surface and the second surface of the magnetic energy storage layer according to the type of chip 1 selected for the packaging module 10:

[0182] When the chip 1 selected for the packaging module 10 is a bare chip 11, additional plastic packaging is usually required on the bare chip 11 to protect the bare chip 11. While the plastic packaging protects the bare chip 11, it will also cover a portion of the magnetic energy storage layer 2. Therefore, there is no need to set a solder resist layer 6 on the surface of the magnetic energy storage layer 2 close to the preset bare chip 11 position. That is, the solder resist material is coated on the first surface of the magnetic energy storage layer 2 through coating, spraying and other processes to form a solder resist layer 6. Specifically, please refer to Figure 19. The solder resist material is coated on the gap of the patterned first layer 31 to form a solder resist layer 6. The solder resist layer 6 and the first layer 31 are alternately arranged and are both on the first surface of the magnetic energy storage layer 2. The solder resist layer 6 can not only prevent the packaging module 10 from short circuiting, but also reduce the height of the packaging module 10, which is conducive to the miniaturization of the packaging module 10.

[0183] When the chip 1 selected for the packaging module 10 is the packaging chip 12, it is necessary to set a solder resist layer 6 on both the first surface and the second surface of the magnetic energy storage layer 2. Specifically, please refer to Figure 20. The solder resist material is formed on the first surface and the second surface of the magnetic energy storage layer 2 by coating, spraying and other processes to form a solder resist layer 6. The solder resist layer on the first surface of the magnetic energy storage layer 2 is alternately arranged with the first layer 31, and the solder resist layer on the second surface of the magnetic energy storage layer 2 is alternately arranged with the second layer 32.

[0184] Optionally, the solder resist material includes any one of exposure ink, UV ink and character ink.

[0185] In some feasible embodiments, after obtaining the circuit layer 3, passive components 5 are arranged on the first layer 31 to enhance the functionality of the package module 10. The number of passive components 5 can be one or more, and the passive components 5 are electrically connected to the first layer 31. Specifically, the passive components 5 can be capacitors, resistors, etc.

[0186] In some feasible implementations, in step S400 , the chip 1 is arranged on a side of the first layer 31 facing away from the magnetic energy storage layer 2 , and the chip 1 is electrically connected to the first layer 31 .

[0187] Specifically, the chip 1 of the present application has conductive bumps, which are arranged toward the first layer 31. The chip 1 and the first layer 31 are electrically connected through the conductive bumps, that is, the chip 1 of the present application is directly arranged on the inductor structure, so that the power path between the inductor structure and the chip 1 is shorter, which can reduce line loss. At the same time, the inductor structure serves as a supporting platform for the chip 1, and there is no need to set up a traditional resin or ceramic substrate, which can greatly reduce the volume share of the chip 1 in the packaging module 10.

[0188] Furthermore, after arranging the chip 1 on the side of the first layer 31 away from the magnetic energy storage layer 2 , the process further includes: coating an adhesive material between the first surface of the magnetic energy storage layer 2 and the chip 1 to form an adhesive layer between the chip 1 and the magnetic energy storage layer 2 to fix the chip 1 .

[0189] Specifically, the adhesive material may be epoxy resin glue, UV glue, etc.

[0190] Optionally, as previously described, the chip 1 can be a bare chip 11 or a packaged chip 12. When the chip 1 is a bare chip 11, after electrically connecting the bare chip 11 to the first layer 31, a plastic encapsulation layer needs to be formed on the first surface of the magnetic energy storage layer 2. When the chip 1 is a packaged chip 12, the chip 1 already has a protective structure, and there is no need to provide a plastic encapsulation member 7. When the selected chip is a bare chip 11, the structural schematic diagram of the packaging module 10 is shown in FIG21. When the selected chip is a packaged chip 12, the structural schematic diagram of the packaging module 10 is shown in FIG22.

[0191] Specifically, the plastic packaging material is extruded into the mold cavity by transfer molding to prepare the plastic packaging part 7, and then the prepared plastic packaging part 7 is placed on the first surface of the magnetic energy storage layer 2 so that the plastic packaging part 7 covers the chip 1, and then the plastic packaging part 7 is bonded to the first surface of the magnetic energy storage layer 2.

[0192] The molding material may be one or more of epoxy molding compound (EMC), polyethylene, polypropylene, polyolefin, polyamide, polyurethane, etc., or a combination thereof.

[0193] Please refer to Figure 23. The present application also provides a power supply module, which includes a circuit board layer 20 and a power supply 30, a power chip 40 and a packaging module 10 arranged on the circuit board layer 20. The circuit board layer 20 has a second through hole 201 and a third through hole 202. The power supply 30 and the packaging module 10 are electrically connected through the second through hole 201, and the power chip 40 and the packaging module 10 are electrically connected through the third through hole 202. Such an arrangement makes the connection path between the packaging module 10 and the power supply 30 and the power chip 40 shorter, which can reduce the line loss of the power supply module and improve the efficiency of the power supply module. A second heat sink 60 is arranged on the side of the power chip 40 facing away from the circuit board layer 20, and a first heat sink 50 is arranged on the side of the packaging module 10 facing away from the circuit board layer 20. Since the packaging module 10 of the present application has a smaller volume, the volume of the packaging module 10 on the circuit board layer 20 is smaller, which is beneficial for the power chip 40 to dissipate heat upward through the second heat sink 60 and dissipate heat downward through the first heat sink 50, thereby achieving a two-way heat dissipation effect.

[0194] As a possible implementation method, the circuit board layer 20 includes a printed circuit board (PCB) or a flexible circuit board (FPC). Specifically, the circuit board layer 20 includes a substrate and circuit traces formed on the substrate using a film forming process. The substrate can be a glass substrate, a resin material substrate, an aluminum substrate, etc.

[0195] Optionally, the circuit board layer 20 includes a first surface and a second surface that are oppositely disposed. The first surface and the second surface are different. In some embodiments, the first surface and the second surface are adjacent surfaces. In other embodiments, the first surface and the second surface are opposite surfaces. In some embodiments, please continue to refer to FIG. 23 . The power supply 30 and the power chip 40 are mounted upright on the circuit board layer 20, that is, the power supply 30 and the power chip 40 are arranged on the first surface of the circuit board layer 20, and the packaging module 10 is arranged on the second surface of the circuit board layer 20. In other embodiments, the power supply 30 and the power chip 40 can also be flipped on the circuit board layer 20 and soldered to the circuit board layer 20 via conductive bump solder balls, that is, the power supply 30 and the power chip 40 are arranged on the second surface of the circuit board layer 20, and the packaging module 10 is arranged on the first surface of the circuit board layer 20. The power supply 30 and the power chip 40 are electrically connected to the packaging module 10 by wire bonding.

[0196] As a possible implementation, the power supply 30 converts the bus voltage into the direct current required by the load, which can meet the requirements of different voltages in the power supply module.

[0197] As a possible implementation method, the packaging module 10 is electrically connected to the circuit board layer 20 through a second conductive bump. By connecting the packaging module 10 with the circuit board layer 20, an input signal can be provided to the substrate layer in the packaging module 10 through the circuit board, and an output signal fed back by the substrate layer can be received.

[0198] As a possible implementation method, the power chip 40 is fixed on the circuit board layer 20 through pins and is electrically connected to the circuit board layer 20. In this way, the substrate layer in the packaging module 10 is electrically connected to the circuit board layer 20 through the second conductive bump, and the power chip 40 is electrically connected to the circuit board layer 20 through the pins to realize the transmission of physical information.

[0199] As a possible implementation method, the first heat sink 50 and the second heat sink 60 are respectively arranged on both sides of the circuit board layer 20. The heat generated by the power chip 40 can be dissipated through the second heat sink 60 adjacent to it, and the heat generated by the power chip 40 can also be dissipated through the circuit board layer 20 and the first heat sink 50, thereby improving the heat dissipation effect of the power chip 40. The heat dissipation of the substrate layer in the packaging module 10 can also be dissipated through the first heat sink 50.

[0200] Optionally, the first heat sink 50 is a heat sink, and the second heat sink 60 is a heat sink. For example, they are aluminum alloy heat sinks. Aluminum alloy has good thermal conductivity, which improves the heat dissipation effect of the heat sink. In addition, the heat sink can be configured in a groove shape to increase the contact area between the heat sink and the air. Of course, the present application can also use other forms of heat sinks to dissipate heat from the power module, such as using air cooling.

[0201] As a possible implementation, please continue to refer to FIG. 23 . A third capacitor 70 is further provided on the second surface of the circuit board layer 20 . The third capacitor 70 is electrically connected to the power chip 40 by wire bonding.

[0202] The embodiment of the present application provides an electronic device 1000, which can be a common terminal such as a mobile phone, tablet, laptop computer in the prior art, including a packaging module or a power module in any of the above embodiments. Since the packaging module of the present application directly uses the substrate layer and the magnetic energy storage layer 2 as the main structure, the packaging module 10 has the characteristics of miniaturization, strong heat dissipation capacity and high efficiency. Therefore, the layout of the electronic device can be optimized and the efficiency and heat dissipation performance of the electronic device can be improved. As shown in Figure 24, it is a structural schematic diagram of the packaging module 10 of the present application applied to the electronic device 1000. The electronic device 1000 includes a housing 1001 and a mainboard 1002 arranged inside the housing 1001. The packaging module 10 is fixed on the mainboard 1002 and electrically connected to the mainboard 1002.

[0203] In this specification, reference can be made to the same or similar parts between the various embodiments. In particular, for the device embodiment and the terminal embodiment, since they are basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the description in the method embodiment.

Claims

1. A packaging module, characterized in that: include: A magnetic energy storage layer, the magnetic energy storage layer is made of a magnetic material, and the magnetic energy storage layer includes a first surface and a second surface arranged opposite to each other; A circuit layer, the circuit layer comprising a first layer, a second layer and a connector, the first layer is arranged on a first surface of the magnetic energy storage layer, the second layer is arranged on a second surface of the magnetic energy storage layer, and the connector penetrates the magnetic energy storage layer and is respectively connected to the first layer and the second layer; A chip is arranged on a side of the first layer away from the magnetic energy storage layer, and the chip is electrically connected to the first layer.

2. The packaging module according to claim 1, characterized in that: The circuit layer is an integrated structure.

3. The packaging module according to claim 1 or 2, characterized in that: The packaging module also includes passive components, which are arranged inside and / or on the surface of the magnetic energy storage layer.

4. The packaging module according to any one of claims 1 to 3, characterized in that: The chip is a bare chip, and the packaging module further comprises a plastic package, which at least covers the bare chip and the first surface of the magnetic energy storage layer.

5. The packaging module according to any one of claims 1 to 4, characterized in that: The first layer has a patterned structure, and the second layer has a patterned structure.

6. The packaging module according to claim 5, characterized in that: The chip is a packaged chip, and the package module further comprises a solder resist layer, which is arranged on a first surface and a second surface of the magnetic energy storage layer, and has a patterned structure, wherein the solder resist layer on the first surface of the magnetic energy storage layer is staggered with the first layer, and the solder resist layer on the second surface of the magnetic energy storage layer is staggered with the second layer; Or the chip is a bare chip, the packaging module also includes a solder resist layer, the solder resist layer is arranged on the second surface of the magnetic energy storage layer, the solder resist layer has a patterned structure, and the solder resist layer located on the second surface of the magnetic energy storage layer is staggered with the second layer.

7. The packaging module according to any one of claims 1 to 6, characterized in that: A magnetic shielding layer is arranged between part of the connector and the magnetic energy storage layer.

8. The packaging module according to any one of claims 1 to 7, characterized in that: An adhesive layer is arranged between the chip and the circuit layer.

9. The packaging module according to any one of claims 1 to 8, characterized in that: The thickness of the magnetic energy storage layer is greater than or equal to 0.3 mm.

10. The packaging module according to any one of claims 1 to 9, characterized in that: The thickness of the first layer is greater than or equal to 0.01 mm; and / or The thickness of the second layer is greater than or equal to 0.01 mm.

11. A method for manufacturing a packaging module, characterized in that: The production method comprises the following steps: forming a second layer and a plurality of connectors, wherein the connectors are vertically disposed on a surface of the second layer; forming a magnetic energy storage layer, wherein the magnetic energy storage layer and the connector are alternately arranged on the surface of the second layer, the magnetic energy storage layer is made of a magnetic material, and the magnetic energy storage layer includes a first surface and a second surface arranged opposite to each other; forming a first layer covering the connector and the first surface of the magnetic energy storage layer; A chip is arranged on a side of the first layer facing away from the magnetic energy storage layer, and the chip is electrically connected to the first layer.

12. The manufacturing method according to claim 11, characterized in that: The manufacturing method further includes: arranging a passive element on the second layer, wherein the passive element is electrically connected to the second layer; and / or A passive element is arranged on the first layer, and the passive element is electrically connected to the first layer.

13. The production method according to claim 11 or 12, characterized in that: The chip is a bare chip, and the manufacturing method further comprises: forming a plastic package that at least covers the chip and the first surface of the magnetic energy storage layer.

14. The production method according to any one of claims 11 to 13, characterized in that: The manufacturing method further includes: performing patterning processing on the first layer and the second layer.

15. The manufacturing method according to claim 14, characterized in that: The chip is a bare chip, and the manufacturing method further comprises: forming a solder resist layer on the second surface of the magnetic energy storage layer, the solder resist layer having a patterned structure, and the solder resist layer located on the second surface of the magnetic energy storage layer is staggered with the second layer; or The chip is a packaged chip, and the manufacturing method also includes: forming a solder resist layer on the first surface and the second surface of the magnetic energy storage layer, the solder resist layer having a patterned structure, the solder resist layer located on the first surface of the magnetic energy storage layer is staggered with the first layer, and the solder resist layer located on the second surface of the magnetic energy storage layer is staggered with the second layer.

16. The production method according to any one of claims 11 to 15, characterized in that: The manufacturing method further comprises: coating a magnetic shielding material on a portion of the outer surface of the connector.

17. The production method according to any one of claims 11 to 16, characterized in that: The manufacturing method further includes: coating an adhesive material between the chip and the first layer.

18. A method for manufacturing a packaging module, characterized in that: The production method comprises the following steps: Providing a magnetic energy storage layer, wherein the magnetic energy storage layer is composed of a magnetic material and comprises a first surface and a second surface arranged opposite to each other; forming a plurality of first through holes penetrating the magnetic energy storage layer; Forming a first layer on the first surface of the magnetic energy storage layer, forming a second layer on the second surface of the magnetic energy storage layer, and forming a connector in the first through hole, wherein two ends of the connector are respectively connected to the first layer and the second layer; A chip is arranged on a side of the first layer facing away from the magnetic energy storage layer, and the chip is electrically connected to the first layer.

19. The manufacturing method according to claim 18, characterized in that: The manufacturing method further includes: arranging a passive element on the first layer, wherein the passive element is electrically connected to the first layer.

20. The production method according to claim 18 or 19, characterized in that: The chip is a bare chip, and the manufacturing method further comprises: forming a plastic package covering the chip and the first surface of the magnetic energy storage layer.

21. The production method according to any one of claims 18 to 20, characterized in that: The manufacturing method further includes: performing patterning processing on the first layer and the second layer.

22. The manufacturing method according to claim 21, characterized in that: The chip is a bare chip, and the manufacturing method further comprises: forming a solder resist layer on the second surface of the magnetic energy storage layer, the solder resist layer having a patterned structure, and the solder resist layer located on the second surface of the magnetic energy storage layer is staggered with the second layer; or The chip is a packaged chip, and the manufacturing method also includes: forming a solder resist layer on the first surface and the second surface of the magnetic energy storage layer, the solder resist layer having a patterned structure, the solder resist layer located on the first surface of the magnetic energy storage layer is staggered with the first layer, and the solder resist layer located on the second surface of the magnetic energy storage layer is staggered with the second layer.

23. The production method according to any one of claims 18 to 22, characterized in that: The manufacturing method further includes: coating a magnetic shielding material in a portion of the first through holes.

24. The method according to any one of claims 18 to 23, characterized in that: The manufacturing method further includes: coating an adhesive material between the chip and the first layer.

25. A power module, characterized in that: include: A circuit board layer, wherein the circuit board layer has a second through hole and a third through hole; A power supply, a power chip and a packaging module are arranged on the circuit board layer, the packaging module is electrically connected to the power supply through the second through hole, and the packaging module is electrically connected to the power chip through the third through hole; A first heat sink, the first heat sink is arranged on a side of the power chip away from the circuit board layer; A second heat sink, the second heat sink is arranged on a side of the packaging module away from the circuit board layer; The packaging module includes the packaging module according to any one of claims 1 to 10, or the packaging module manufactured by the manufacturing method according to any one of claims 11 to 17, or the packaging module manufactured by the manufacturing method according to any one of claims 18 to 24.

26. An electronic device, characterized in that: The electronic device comprises the packaging module according to any one of claims 1 to 10, or a packaging module manufactured by the manufacturing method according to any one of claims 11 to 17, or a packaging module manufactured by the manufacturing method according to any one of claims 18 to 24.

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