Method and device for depositing a iii-v semiconductor layer in a process chamber having a surface coated with a iii-v protective layer

By applying a GaP protective layer on the process chamber walls within a CVD reactor, the challenges of layer uniformity and defect density in III-V semiconductor layer deposition on InP substrates are addressed, resulting in improved surface quality and reduced scrap rates during series production.

WO2025108931A1PCT designated stage expired Publication Date: 2025-05-30AIXTRON AG
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Patent Information

Application Number
PCT/EP2024/082835
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-08-06
Filing Date
2024-11-19
Publication Date
2025-05-30

AI Technical Summary

Technical Problem

Existing methods for depositing III-V semiconductor layers on InP substrates suffer from insufficient layer uniformity and high defect densities, particularly due to parasitic coatings formed during the process, which can lead to start-up problems during series production.

Method used

A protective layer consisting of arsenic-containing or phosphorus-containing compounds, specifically GaP, is applied to the process chamber walls before the deposition of III-V layers. This layer has a thickness ranging from 0.5 μm to 2.5 μm and is deposited on cleaned surfaces using a CVD reactor, improving the quality of the deposited layers by reducing defect density and enhancing surface quality.

Benefits of technology

The use of a GaP protective layer significantly reduces defect densities and improves the uniformity of III-V semiconductor layers, leading to enhanced surface quality and extended service life of components, while minimizing scrap at the beginning of series production.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to a method for depositing a III-V semiconductor layer on a substrate in a CVD reactor, wherein prior to depositing of the III-V semiconductor layer, surfaces of components arranged in the process chamber (2) are cleaned of parasitic coatings. To counteract start-up problems during series production of coated substrates, it is proposed that before the substrates (6) to be coated are introduced into the process chamber (2), the cleaned surfaces are coated with a III-V protective layer (B), the protective layer preferably being a GaP layer.
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Description

Description Method and apparatus for depositing a III-V semiconductor layer in a process chamber having a surface coated with a III-V protective layer field of technology

[0001] The invention relates to a method for depositing a III-V semiconductor layer on a substrate in a CVD reactor. The CVD reactor has a reactor housing, made in particular of stainless steel, in which a process chamber is located. The process chamber has a component that has a surface that, when a process gas is fed in, comes into contact with the process gas in such a way that decomposition products of the process gas are deposited on the surface as parasitic coatings. After coating a substrate with the III-V semiconductor layer, the coatings are removed in a cleaning step comprising several sub-steps. State of the art

[0002] Such a process is previously known from DE 102022 114 717 A1. All features of this patent application relating to the cleaning step are incorporated into the disclosure of this patent application.

[0003] CN 117051384 Al describes a process for deposition of LEDs, in which layers of GaN and GaAlN are deposited on a sapphire substrate, a silicon substrate, or a silicon carbide substrate. Before the deposition process, surfaces of the process chamber are coated with a protective layer, for which aluminum-containing, gallium-containing, or Magnesium-containing gases are fed into the process chamber. In particular, a protective layer consisting of AlGaN or GaN is to be formed.

[0004] From US 2023 / 062105 Al a coating process for depositing aluminum is known in which, after a cleaning step, a surface is provided with a coating, whereby the composition of this coating can be identical to a semiconductor layer deposited later in the process chamber.

[0005] US 2023 / 038880 Al also describes the deposition of a protective layer on a previously cleaned surface.

[0006] US 2020 / 385861 A1 describes a method for cleaning quartz surfaces within a process chamber from a parasitic coating that may contain arsenic and phosphorus. A protective layer is deposited prior to cleaning.

[0007] EP 1 348 778 B1 describes a method for depositing indium, gallium, arsenic, and nitrogen. A phosphorus- or nitrogen-containing layer is to be deposited on a surface without prior cleaning.

[0008] DE 10 2017100 725 describes a CVD reactor in which surfaces of the process chamber are cleaned by introducing chlorine.

[0009] In a coating process in which III-V layers are deposited on a substrate made of a III-V material, but also of Si, SiC or another If a material, which may consist of a particularly crystalline material, is to be deposited, a gas mixture is used as the process gas. The gas mixture usually contains an organometallic compound of an element of the third main group and a hydride of an element of the fifth main group. If the process gas contains a carbon-containing component, carbon or a carbon compound can form during the decomposition of this component, for example an organometallic compound, and this carbon compound is deposited on the surface of a component of the process chamber. In particular, such residues can accumulate on the surface of a graphite part or a coated graphite part, wherein the coating can be SiC or TaC. DE 10 2013 104 105 A1 describes that such a parasitic coating also forms, in particular, when the process gas contains NH?. In the prior art, such carbon residues are removed with an etching gas.

[0010] The methods described in the prior art for cleaning the parasitically coated surfaces exhibit side effects during the subsequent deposition of a III-V semiconductor layer on InP. In particular, insufficient layer uniformity and an excessively high defect density have been found when depositing InP, InGaAsP, AlInGaAs, or other quaternary semiconductor layers on InP.

[0011] In experiments in which a metal protective layer, and in particular an Al protective layer, was applied to a previously cleaned surface of a component of a process chamber and then AlInGaAs or InGaAsP layers were deposited, a reduction in defect density and an increase in the uniformity of the layer was observed (see unpublished DE 102023 105081 Al and related families). members). Nevertheless, this coating process still has disadvantages regarding the service life of the components. In particular, it was found that after a complete cleaning of a process chamber, in which all coatings have been removed from the surfaces, start-up problems arise during series production of layers and layer systems. This is attributed to the fact that a parasitic layer thickness on the surfaces of the components, and in particular of the susceptor, increases over time during series production. At the beginning of the production series, start-up effects therefore occur, so that the first coated substrates must be considered scrap. The aim of the invention is therefore also to provide measures by which this scrap can be reduced at the beginning of series production. Summary of the invention

[0012] The invention is based on the results of experiments in which it was recognized that arsenic-containing or phosphorus-containing protective layers for depositing layers on substrates consisting of a III-V material are advantageous for improving the quality of a layer deposited on this substrate which contains the same element of main group V as the substrate. In particular, it was found that the defect density is reduced and the surface quality is improved when phosphorus-containing compounds are deposited, and in particular on an InP substrate. Surprisingly, the advantages are greatest when the protective coating consists not of InP, but of GaP. The layer thickness of the GaP protective layer can be in the range between 0.5 μm and 2.5 μm. On the other hand, an InP protective layer also has a defect density-reducing effect in such a region. However, this effect is limited to the front side of the substrate.

[0013] A protective layer also improves quality when depositing GaAs or AlAs. However, it was found that a phosphorus-containing protective layer leads to a deterioration compared to a lack of a protective layer. When depositing AlAs or GaAs, an arsenic-containing protective layer should be used. In experiments with an arsenic-containing protective layer, the material pairing GaAs proved particularly advantageous for reducing defect density. The reduced defect densities on the surface found in the experiments affected both the front and back sides of the GaAs substrate.

[0014] According to the invention, it is therefore proposed that when depositing III-V layers on III-V substrates, at least some of the process chamber walls have a coating consisting of elements of main groups III and V, wherein the element of main group V is the same as that which is also a component of the substrate.

[0015] The experiments conducted showed that, depending on the material combination, the protective layer should have a minimum layer thickness of 0.4 μm to 2.5 μm. The improvement in the layer properties compared to starting a series production with uncoated process chamber walls occurs significantly at a minimum layer thickness of 0.5 μm. Increasing the layer thickness of the protective layer may result in a slight improvement depending on the material combination of the layers deposited on the substrates. However, this slight improvement is of little technological relevance, as it increases the duration of the overall process and requires more material for the increased layer thickness, which is not economical given the limited success, which is often compensated for by other effects. It is therefore essential that the Coating is deposited on cleaned surfaces of the process chamber walls. The process chamber is first cleaned in the absence of the substrate. This is preferably carried out using a method described in DE 10 2022114 717 A1, which is described in more detail below. The cleaning process removes all coatings that were created on surfaces of the process chamber during the deposition of the III-V layer. These are preferably surfaces of components in the process chamber that consist of graphite. The surfaces can be coatings that contain Si, Ta and / or C. Such coatings are not attacked by the cleaning gases used in the cleaning process. After cleaning, the result is coating-free SiC surfaces, TaC surfaces, surfaces of solid solutions or a pure graphite surface.According to the invention, this surface is coated with a protective layer consisting of elements from main groups III and V. For this purpose, one or more coating gases are fed into the process chamber, which is heated to an elevated temperature. The elevated temperature is selected such that at this temperature the coating gases decompose or react with each other, or decomposition products of the coating gases react with each other. The reaction product then consists of elements from main groups III and V and is preferably a III-V crystal. An amorphous III-V protective layer or a crystalline, in particular polycrystalline III-V protective layer forms on the previously cleaned surface. The protective layer can be created by feeding the same gases into the process chamber that are also used to deposit the III-V layers on the substrates.The coating gases can thus contain TMA1, TMGa, or TMIn as the III component. The coating gases can also contain AsH?, PH?, or NH? as the V component. The coating gases can be introduced through a gas inlet. organ are fed into the process chamber of the CVD reactor. In particular, it is intended that the mass flow ratio of the coating gas of the V component to the coating gas of the III component is in the range between 1 and 5. At a suitable coating temperature, a growth rate of more than 30 gm / h can be achieved in order to deposit layer thicknesses in the range between 200 nm and 2 pm on surface sections of the components. The layer thickness can also be between 300 and 700 nm and preferably between 450 nm and 550 nm, or for a GaP coating or InP coating, 0.5 | μm to 1.5 | μm. The mass flow of the reactive coating gas can be in the range between 1 and 10 3Mol / minute. The temperature during the deposition of the protective layer can be in the range between 600°C and 800°C, with the process chamber being heated with a heating device such that the surfaces to be coated reach these temperatures. The deposition of the protective layer can take place at a total pressure between 20 mbar and 100 mbar, preferably at 50 mbar. A layer thickness of 500 nm is preferred. The deposition of a III-V layer and in particular a GaInAsP layer on a substrate in a process chamber pretreated in this way produces layers with increased uniformity and a reduced defect density. However, the method according to the invention can also be used to deposit aluminum-containing III-V semiconductor layers. In particular, layers made of the following compounds can be deposited: GaP, InP, GaInP, AlP, AlInP, AlGaInP, GaAs, AlAs, GaAsP, GaInAsP, AlGaInAsP.It has proven advantageous if the protective layer contains phosphorus and / or arsenic. It is also advantageous if the protective layer contains gallium and / or aluminum. Suitable components include, in particular, a susceptor, a substrate holder, a process chamber ceiling, or a gas inlet or gas outlet device. The protective layer is applied, in particular, to A graphite part is deposited. However, it can also be deposited on a quartz part or a ceramic component. The previously cleaned surface is preferably a TaC surface or a SiC surface. The surface can be the surface of such a coating or the surface of a solid TaC or SiC component. The surface can also consist of such solid solutions. The protective layer effectively leads to a passivation of the component's surface.

[0016] According to a second aspect of the invention, it is proposed that, during the deposition of phosphorus-containing III-V layers, surfaces of components in the process chamber are coated with a III-P protective layer, and in particular with a GaP protective layer or InP protective layer, prior to the deposition of this layer in the absence of a substrate. This is particularly advantageous if, after the application of the protective layer, InP substrates are brought into the process chamber, on which a III-V layer is deposited.

[0017] It is particularly provided that the III-V protective layer is removed again after the deposition of the III-V layer on the substrate using a cleaning step, which may include one or more etching steps. This preferably takes place in the absence of the substrate. The removal of the III-V protective layer takes place simultaneously with the removal of parasitic deposits deposited thereon during the coating step of the substrate. It is particularly provided that after each coating process in which one or more layers are deposited on a substrate, after removal of the substrate from the process chamber, a cleaning step is carried out to completely remove both the parasitic coating and the underlying III-V protective layer, so that after the cleaning step, the The component has a clean surface, in particular a SiC surface, TaC surface, graphite surface, quartz surface, or ceramic surface. The III-V protective layer is then deposited onto this surface in a processing step that preferably follows immediately after the final cleaning step.

[0018] An embodiment according to the invention requires the use of a CVD reactor having a reactor housing in which a graphite part is located. The reactor housing may also contain multiple graphite parts. At least one of the preferably multiple graphite parts is coated. It may be coated with silicon carbide. However, it may also be coated with another coating that makes the graphite part resistant to exposure to CH, O2, or HCl. The graphite parts may be parts of the process chamber or parts that delimit the process chamber. In particular, it is provided that a susceptor, which forms the floor of the process chamber, is made of graphite and coated with silicon carbide. The susceptor may have a rear side facing away from the process chamber and adjacent to a heating zone. A heating device may be arranged in the heating zone. The heating device may be an IR heater or an RF heater.The graphite part can also be a process chamber ceiling, which defines the upper boundary of the process chamber. The process chamber can be heated to an elevated temperature as a result of thermal radiation emanating from the susceptor. The susceptor can be heated to temperatures of up to 1000°C or higher during layer deposition. A gas inlet element can be located in the center of the process chamber. This can generally be made of quartz or metal. However, it is also possible to manufacture the gas inlet element or parts of the gas inlet element from graphite. These parts can also be coated with silicon carbide. Pockets can be arranged in the susceptor. The pockets can be arranged at a uniform angular distribution around the center of the process chamber. They are thus located at an equal distance from the gas inlet element, so that process gas escaping from the gas inlet element flows radially through the process chamber and over the pockets. Each pocket contains at least one substrate holder that supports the substrate, so that the process gas flow flows over the substrate. Gas supply lines can open into the bottoms of the pockets, through which an inert gas can be fed into the pockets. A gas cushion is formed. By means of a directed gas flow, the substrate holder can be forced to rotate around its axis via the gas cushion. The process chamber is surrounded by a gas outlet element, which can be made of a ceramic material or metal.However, it is also possible to manufacture parts of the gas outlet element or the entire gas outlet element from graphite, particularly from SiC-coated graphite. The gas inlet element can have a plurality of gas outlet zones arranged one above the other, through which different components of the process gas can be fed into the process chamber. The graphite part can also be only partially coated with SiC.

[0019] In a first step of a method for depositing III-V layers on substrates, a layer is deposited on one or more substrates that have previously been brought into the process chamber and that are arranged, in particular, on the substrate carriers. This is preferably done by feeding a component of the process gas into the process chamber that comprises an element of main group V. Preferably, the process gas contains a further component that comprises an element of main group III. The process gas can thus be a mixture of a hydride of an element of main group V and an organometallic compound of a element of main group III. For example, the process gas can contain AsH?, PH3 (or even NH3). The process gas can also contain a metalloorganic gas, which in particular contains an element of main group III, for example TMGa, TMIn or TMA1 or TEGa. The latter reactive gases are fed into the process chamber together with an inert gas, for example H2. The reactive gases of the process gas decompose due to the increased temperature within the process chamber and in particular the increased temperature of the substrate, so that a layer consisting of the elements of main groups III and V is deposited on the substrate surface.As a result, the reaction products of the reactive gases or parasitic compounds that form in the reaction products of the reactive gases condense on the surfaces of the process chamber, and in particular on the surfaces of the at least partially coated graphite parts, in particular those coated with a CH / O2-resistant coating, such as SiC. After completion of the first step, for example after the deposition of one or more layers on the substrate, the at least one substrate is removed from the process chamber. During this intermediate step of removing the substrates from the process chamber, no reactive gases, or at most the reactive gas of main group V, are fed into the process chamber. Otherwise, only an inert gas, for example hydrogen, is fed into the process chamber. During the intermediate step of removing the at least one substrate, the process chamber can be cooled to a lower temperature.

[0020] In a further process following the first step, the process chamber is cleaned. The parasitic coatings on the walls of the process chamber, and in particular on the walls of the graphite parts, are removed. This is done by introducing cleaning gases that are successively which forms various volatile compounds with the molecules of the coating, which are then transported away through the gas outlet element. According to the invention, after the removal of at least one substrate, the process chamber is heated to a first cleaning temperature. The first cleaning temperature can be in a range from 500°C to 1000°C or in a range between 800°C and 900°C. At the first cleaning temperature, a first cleaning step is carried out in which a halogen or a halogen compound is fed into the process chamber. Preferably, HCl or CH is fed into the process chamber. The halogen or Cl2 is fed into the process chamber together with nitrogen. The total pressure in the process chamber can be in the range between 50 mbar and 200 mbar. It is further provided that during the first cleaning step, approximately 11 slm of N2 is fed into the process chamber.The first cleaning gas used for cleaning and additional cleaning gases mentioned below are each kept ready in the form of gas sources. The halogen, for example Cl2, can be kept ready in any desired mixing ratio with nitrogen. A 5% mixture is preferred. This cleaning gas is fed into the process chamber at a mass flow rate of 2 to 40 slm when the temperature of the process chamber has reached the first cleaning temperature. In the first cleaning step, essentially metallic components of the parasitic coating and components belonging to main group V are converted into volatile compounds, which are then removed from the process chamber together with the inert gas. Etching rates of 80 ± 20 gm / h are achieved, especially with Cl2.

[0021] The intermediate step of heating the process chamber from, for example, 300°C to a first cleaning temperature of, for example, 900°C takes approximately 10 minutes. During this intermediate step, the inert gas can be switched from hydrogen to nitrogen. During this intermediate step, the total pressure within the process chamber can also be changed to the above-mentioned pressure, and in particular, lowered.

[0022] The first cleaning step is carried out at a constant temperature of, for example, 900°C for approximately 20 to 30 minutes. Afterward, the flow of the first cleaning gas is shut off. In a subsequent intermediate step, the temperature of the process chamber is changed, specifically raised to a second cleaning temperature. During this intermediate step, the total pressure within the process chamber can also be changed.

[0023] The intermediate step is completed when the second cleaning temperature is reached. The second cleaning temperature can be between 500°C and 1100°C. For example, it can be between 950°C and 1000°C. As soon as the second cleaning temperature is reached, a second cleaning gas is fed into the process chamber. This cleaning gas can be dry air, O3, O2, or even NH3. The cleaning gas can be kept ready as a mixture in nitrogen. Preferably, 9 slm of this mixture are fed into the process chamber. N2 is fed into the process chamber together with this second cleaning gas, preferably at a mass flow of 11 slm. The total pressure during the second cleaning step is 100 mbar to 800 mbar, but in particular also 600 mbar to 800 mbar. During the second cleaning step, carbon-containing components of the parasitic coating are essentially removed.To do this, the carbon or carbon-containing compounds react with the supplied oxygen to form carbon oxides. The second cleaning step can be performed for a duration of 7 to 15 minutes. It is preferable that the duration of the second cleaning step be shorter than the duration of the first cleaning step. However, the duration may also depend on the layer thickness to be removed. Removing a thicker layer requires more time than removing a thinner layer.

[0024] In a further intermediate step after the second cleaning step, in which no cleaning gas but only an inert gas is fed into the process chamber, the temperature of the process chamber is changed and in particular lowered to a third cleaning temperature, which can be between 500°C and 1100°C. However, it can also be between 800°C and 1000°C. At the same time, the total pressure in the process chamber can also be changed. Preferably, the total pressure is lowered to a pressure between 50 mbar and 200 mbar. A third cleaning step is then carried out at this total pressure. During the intermediate step, the inert gas can also be changed, so that hydrogen is fed into the process chamber after the intermediate step.

[0025] The third cleaning step is an "EE-bake" or an "N-bake," in which the process chamber is heated essentially only in the presence of H2. This occurs at the aforementioned third cleaning temperature for a time between 15 and 30 minutes. The third cleaning step can be longer than the first cleaning step. During the third cleaning step, only hydrogen is fed into the process chamber, preferably at a mass flow of 26 slm.

[0026] The third cleaning step can be followed by further optional steps in which the process chamber is alternately flooded with an inert gas, which can be hydrogen or nitrogen, and then evacuated. This is done using a vacuum pump connected to the gas outlet device.

[0027] Immediately following this cleaning process, the III-V protective layer described above is deposited. The process chamber is preferably not opened between the cleaning steps and the deposition of the III-V protective layer. The process chamber remains closed. Only the temperature within the process chamber and, if applicable, the total pressure are changed. After completion of the deposition of the III-V protective layer, during which a gas comprising an element from main group III and another gas comprising an element from main group V are simultaneously fed into the process chamber, the process chamber is purged with the inert gases described above and brought to a reduced temperature at which one or more substrates can be introduced into the process chamber.After the substrates have been brought into the process chamber, the coating process of the substrates described above takes place, whereby the substrates are coated in particular with a quaternary III-V material.

[0028] The invention further relates to a CVD reactor with an electronic control device which is designed to carry out the method or in which the process chamber has surfaces coated with GaP before the deposition of a III-V layer. Short description of the drawings

[0029] An embodiment of the invention is explained below with reference to the accompanying drawings. They show: Fig. 1 shows schematically in cross section a CVD reactor, a gas supply device with gas sources 25 and schematically an electronic control device 32; Fig. 2 shows a section along the line II-II in Figure 1; Fig. 3 is a time-temperature diagram of a method according to the invention; Fig. 4 shows the dependence of a mean wavelength of an InGaAsP layer deposited on an InP substrate in a process chamber provided with a protective layer of GaP as a function of the thickness d of the protective layer and Fig. 5 shows the results of the same experiments, but here the standard deviation of the wavelength of the layers as a function of the thickness d of the protective layer. Description of the embodiments

[0030] The method according to the invention is carried out in a device as shown in Figure 1. A CVD reactor has a gas-tight housing 1, made of stainless steel, for example, in which a process chamber 2 is located. The bottom of the process chamber 2 is covered by a A susceptor 3 is formed, which may be made of graphite and coated with SiC. The susceptor 3 has a circular disk shape and a downward-facing rear side facing a heating device 31. The heating device 31 may be a coil that generates an RF field that induces eddy currents in the susceptor 3, which heat the susceptor 3 to a process temperature.

[0031] Using a shaft 9 and a rotary drive (not shown), the susceptor 3 can be driven in rotation about a rotation axis 8. Also not shown are supply lines that run through the shaft 9 to feed an inert gas into gas channels (not shown) of the susceptor 3. These gas channels open into the bottoms of pockets 4 arranged in the upwardly facing broad side surface of the susceptor 3. A substrate holder 5 made of graphite is located in each of these pockets 3. The substrate holder 5 can also be coated with SiC. A substrate 6 can be placed on the substrate holder 5. This substrate can be made of Si, GaAs, InGaAs, InP, Ge, or a substrate made of sapphire or another suitable material.

[0032] In the central area of ​​the susceptor 3 there is a recess 18 into which a lower section of a gas inlet element 11 can be immersed. The gas inlet element 11 is fixedly attached to the housing 1 and has three gas outlet zones 13, 15, 17 arranged vertically one above the other. A gas supply line 12, 14, 16 leads to each of the three gas outlet zones 13, 15, 17. Reactive gases and inert gases can be fed into the process chamber 2 through the gas supply line 12, 14, 16, which extends between a process chamber ceiling 10 and the susceptor 3. The process gas, which passes through the gas outlet zones 13, 15, 17 enters the process chamber 2, flows through the process chamber 2 in a radial direction and flows over the substrates 6.

[0033] The process chamber ceiling 2 may be made of graphite and coated with SiC, TaC or the like.

[0034] The process chamber 2 is surrounded by an annular gas outlet element 19 which has a gas outlet opening (not shown) to which a suction line of a vacuum pump (not shown) is connected in order to evacuate the process chamber 2 or to be able to set a predetermined total pressure in the process chamber 2.

[0035] Figure 1 also schematically shows a gas supply device with a plurality of gas sources 25. The gas supply device can, for example, provide the following gases: AsEE, PH3 as a component of a reactive gas of a process gas, TMGa, TMIn, TMA1 also as a component of the reactive gas of the process gas for depositing a III-V layer on the substrates 6 arranged in a ring around the gas inlet element 11 according to Figure 2. The gas supply device can also provide inert gases, for example H2 and N2. Furthermore, the gas supply device can provide cleaning gases Cl2 and O2. The two cleaning gases are preferably provided as a 5% mixture in N2.

[0036] A programmable electronic control device 32 can control valves 27 and mass flow controllers 26 to feed predetermined mass flows of the aforementioned gases through the supply lines 12, 14, 16 into the process chamber 2.

[0037] The device described above is used to deposit layers of elements from main groups III and V on the substrates described above. These can be AlInGaAs or GaInAsP layers or layers containing at least two of the aforementioned elements. For this purpose, the substrates are first brought into the process chamber 2 and then, after the process chamber 2 has been heated to a process temperature, the previously described reactive gases are fed into the process chamber 2. After the deposition of one or more layers, the process chamber 2 is cooled to, for example, 300°C and the substrates are removed. During the deposition process described above, coatings form on some SiC surfaces from the solid chemical compounds formed during the reactions of the reactive gases.

[0038] After the removal of the substrates, the temperature within the process chamber 2 is heated to a first cleaning temperature Tl, which can be 900°C, in a heating step 20 from a time t1 to a time t2. A total pressure of between 50 mbar and 100 mbar is set in the process chamber.

[0039] After reaching the first cleaning temperature T1, in a first cleaning step 21, from time t2 to time t3, Ch is fed into the process chamber together with N2. In process chamber 2, the chemical compounds deposited on the SiC surfaces react with Cl2. Volatile reaction products are formed, which are removed from process chamber 2 with the N2.

[0040] In an intermediate step following the first cleaning step 21, from a time t3 to a time t4, the temperature of the process chamber 2 is heated to a second cleaning temperature T2 of 1000°C in an N2 atmosphere. The total pressure within the process chamber is changed to 600 mbar to 800 mbar. After the second cleaning temperature T2 is reached, O2 is fed into the process chamber together with N2 for the time t4 to t5. During this second cleaning step 22, carbon compounds are removed from the SiC surfaces by a chemical reaction of the carbon compounds with oxygen. Volatile oxides are formed, which are removed from the process chamber 2 with the N2.

[0041] After reaching time t5, the temperature of the process chamber is lowered to a third cleaning temperature T3, which can be 900°C. At the same time, the total pressure can be set to a value between 50 mbar and 100 mbar. After reaching the third cleaning temperature T3, only H2 is fed into the process chamber during the time t6 to t7. During this third cleaning step 23, any remaining oxides are removed from the surfaces. In addition, the CVD reactor can be conditioned.

[0042] During the purging step 21', the etching gases used in the CH etching step 21, and in particular O2, can be completely removed from the reactor housing, so that no more CI2 is present in the process chamber in a subsequent O2 etching step 22. Purging can be performed with nitrogen.

[0043] An example of the cleaning process can be carried out with the following steps: Heating the process chamber to a first cleaning temperature T2 (800°C to 900°C); Feeding of Ch into a nitrogen atmosphere (5% CI2, 12 slm, N211 slm, total pressure 50 mbar to 100 mbar); Stop feeding O2 and heat up to a second cleaning temperature T2 (950°C to 1000°C); Injection of O2 in a nitrogen atmosphere (5% O2, 9 slm, N211 slm, total pressure 600 mbar to 800 mbar); Stop the O2 injection and change the temperature to a third cleaning temperature T3 (800°C to 1000°C); Baking in a hydrogen atmosphere (26 slm, total pressure 50 mbar to 100 mbar).

[0044] After cleaning the surfaces of the components that may come into contact with the process gases within the process chamber 2, these surfaces are coated with a protective or passivation layer made of a III-V material. The coating has a layer thickness of approximately 500 nm. The deposition of the protective layer preferably takes place immediately after the last of the cleaning steps, namely the hydrogen annealing 23.

[0045] At a temperature T4 of approximately 600°C to 800°C, a coating gas flow is fed into the process chamber at a total pressure of preferably 50 mbar and a mass flow of 28 slm of hydrogen. This represents a material flow of approximately 3 x 10-3 mol / minute. This coating step 33 takes approximately 3 minutes.

[0046] The process chamber is heated to a coating temperature T4. Together with a carrier gas, which is hydrogen An organometallic compound of an element from main group III and a hydride from main group V are simultaneously fed into the process chamber. Pyrolytic decomposition of the organometallic compound and the hydride takes place on the surfaces of the components, which are particularly coated graphite components. A thin coating of InP, GaAs, InAs, GaP, or another III-V compound forms. The layer thickness is preferably less than 1 μm and can be 500 nm. The layer thickness can be between 100 nm and 2 μm.

[0047] The components coated with the protective layer in this way can be located between the gas inlet element 11 and the substrate holder 5 in a flow direction of the process gas. However, surfaces located downstream of the substrate holder 5, i.e., between the substrate holder 5 and the gas outlet element 19, are also preferably coated with the protective layer. It can also be provided that the surface of the substrate holder 5 is coated with the protective layer.

[0048] It may also be provided that surfaces of the gas inlet element 11 are coated with the protective layer. Preferably, the surfaces within the process chamber 2 that have previously been cleaned in the cleaning step are coated with the protective layer.

[0049] The cleaning step and the coating step for depositing the metal coating preferably take place immediately after each other. The cleaning step can be carried out immediately after the removal of a substrate after the deposition of a semiconductor layer. However, the cleaning step can also be carried out immediately before the insertion of a substrate. before the deposition of the semiconductor layer. Here, too, the metal layer is deposited immediately after the cleaning step.

[0050] A preferred embodiment of the device has several substrate holders arranged in a circular array around a gas inlet element 15. One or more substrates can be arranged on each of the substrate holders 5. The substrate holders 5 are rotated about a rotation axis during coating of the semiconductor layer.

[0051] In Figure 1, the III-V protective layer is labeled B.

[0052] In a first embodiment, trimethylindium, trimethylaluminium or trimethylgallium is used with a mass flow of 3xl0 3 Mol / minute together with arsine or phosphine at a total pressure in the range between 20 mbar and 100 mbar and at a temperature between 600°C and 800°C. The ratio between the hydride (arsine or phosphine) and the organometallic starting material can be between 1 and 5. A hydrogen flow of 28 slm can be used. During this process step, it is preferable to avoid introducing nitrogen and oxygen into the process chamber. Trimethylgallium and phosphine are preferably introduced simultaneously to create a protective layer of GaP.

[0053] In further experiments, it was found that the III-V layer on the substrate and in particular InGaAsP deposited on InP can have the following properties depending on the protective layer: No protective layer: Low catalytic phosphorus incorporation, resulting in very good compositional uniformity down to a nano- meter or less long component lifetime, but leads to a high defect density >1,000 cnr 2 , AlAs protective layer: High catalytic phosphorus incorporation, resulting in poor composition uniformity, good defect densities <1 cm 2 , and a long lifetime of the components Al protective layer: Low catalytic phosphorus incorporation, resulting in very good composition uniformity down to 1 nm or less and a low defect density <1 cnr 2 but leads to a short service life of the components GaP protective layer: Low catalytic phosphorus incorporation, resulting in very good composition uniformity down to 1 nm or less, resulting in a defect density <1 cm 2 , and leads to a long service life of the components. In the experiments described above, the protective layers were deposited directly onto a cleaned surface.

[0054] In further experiments, after a Ch-based in-situ cleaning of the reactor, the surfaces of the components were coated with various protective layers. The quality of the III-V semiconductor layers deposited in subsequent coating steps was investigated with regard to their morphology, brightness of light emission, and wavelength uniformity of light emission. Substrate coatings were deposited with four semiconductor materials: AlGaInP, AlGaAs on GaAs substrates, and AlInGaAs or InGaAsP on InP substrates.

[0055] The following material pairings showed good properties: The use of GaAs substrates with a GaAs protective layer, an AlAs protective layer. The use of InP substrates with an AlAs protective layer, an Al protective layer and a GaP protective layer.

[0056] Experiments have shown that a protective layer made of GaP is particularly suitable for depositing layers on InP containing phosphorus. Experiments have shown that an AlAs protective layer is particularly suitable for depositing layers on GaAs containing arsenic.

[0057] However, the experiments have also shown that a GaP protective layer is disadvantageous when depositing arsenic-containing layers on gallium arsenide substrates.

[0058] Both effects are attributed to the evaporation of the highly volatile phosphorus from the protective layer, and in arsenic-containing layers, the arsenic is exchanged for the phosphorus, whereas in phosphorus-containing layers, the evaporated phosphorus stabilizes the phosphorus component of the layer. Surprisingly, the best results were achieved using GaP as the material for the protective layer.

[0059] The following table shows the quality of the layer homogeneity (+: good quality), the quality of the back surface of the substrate (-: rough layer, unevenness; +: smooth surface) and the defect density for the material pairings of a layer deposited on an InP substrate: From this table it can be seen that a protective layer of GaP leads to a higher backside quality of the substrate.

[0060] Figures 4 and 5 show the wavelength profile of an InGaAsP layer deposited on InP, where the substrate storage area is previously uncoated (layer thickness 0) or layer thicknesses of 500, 1500, 3000, and 7500 nm. It can be seen that above a protective layer thickness of 1500 nm, the wavelength stabilizes at a value between 1202 and 1206.

[0061] Figure 5 shows the results of the same experiments, but with respect to the standard deviation of the half-width distribution over the substrate. Here, too, it is evident that stabilization occurs at values ​​above 500 nm protective layer thickness. A layer thickness of more than 2500 nm is therefore not necessary.

[0062] In further experiments, which are given in the table below: shows the difference in wavelength between the layers of two substrates deposited on distant substrate holders. AX is the layer-to-layer inhomogeneity. It is evident that the layer thickness inhomogeneity AX also decreases with the layer thickness d of the protective layer. The value of 0.6 nm achieved with a protective layer thickness of 1500 nm is already sufficient to meet the technological requirements.

[0063] The above statements serve to explain the inventions covered by the application as a whole, which also independently develop the state of the art at least by the following combinations of features, whereby two, several or all of these combinations of features can also be combined, namely:

[0064] A process characterized in that the element of main group V is phosphorus or arsenic and the substrate consists of this element and an element of main group III.

[0065] A method characterized in that the protective layer is made of AlAs and the substrate is made of GaAs or that the protective layer is made of GaP and the substrate is made of InP.

[0066] A method which is characterized in that, after a heating step following a last of in particular several cleaning steps, TMA1, TMGa or TMIn is fed into the process chamber 2 together with PH3 or AsH? to form the protective layer and that the process gas contains molecules of the elements In, Al, Ga, As or P and the layer has an In x Ga y Al z As(i- X.y-Z ) layer or an in x Ga y In z A s (i- x.y.z) layer, where x, y, z can take the values ​​0 to 1 and x + y + z is greater than zero, or that the layer contains at least one of the elements InAlGaAs and P and As.

[0067] A method which is characterized in that the protective layer has a layer thickness between 500 nm and 2.5 μm and / or that a reactive gas with a mass flow of 1 to 10 3 Mol / minute is fed into the process chamber 2 and / or that the depositing protective layer is carried out at a temperature between 600 °C and 800 °C and / or a total pressure between 20 mbar and 100 mbar and / or for a time between 1 minute and 5 minutes.

[0068] A method characterized in that before each process step in which a new substrate 6 is introduced into the process chamber 2 of the reactor housing 1, the surface is cleaned of the parasitic coatings and then the metal protective layer is applied.

[0069] A method according to any one of the preceding claims, wherein the graphite part 3, 5, 10, 11, 19 is coated with SiC, wherein a process gas is provided which has molecules containing at least one element of main group V; wherein at least one substrate 6 is brought into the process chamber 2; wherein the process gas is fed into the process chamber 2, the process gas decomposes in the process chamber 2 heated to a process temperature, and the at least one element of main group V.Main group is deposited as a component of the layer on the substrate; wherein the substrate 6 is removed from the process chamber 2; wherein the process chamber 2 is heated to a first cleaning temperature Ti; wherein after reaching the first cleaning temperature T2, in a first cleaning step 21, a halogen cider or a halogen compound is fed into the process chamber 2; wherein after the first cleaning step 21, the process chamber 2 is brought to a second cleaning temperature T2; wherein after reaching the second cleaning temperature T2, in a second cleaning step 22, O2 is fed into the. Process chamber 2 is fed; wherein after the second cleaning step 22 the process chamber 2 is brought to a third cleaning temperature T3; wherein after reaching the third cleaning temperature T2, in a third cleaning step 23 essentially only H2 is fed into the process chamber 2; and wherein after the third cleaning step 23 the protective layer is deposited in a coating step 33 and then the process chamber 2 is cooled in a cooling step 24.

[0070] A process characterized in that the process gas contains AsEE, PH3 or NH3 and / or that the process gas additionally contains a gas whose molecules contain an element of main group III and / or that the process gas additionally contains TMGa, TMIn or TMA1.

[0071] A method characterized in that during the first cleaning step 21 only the halogen or the halogen compound and N2 are fed into the process chamber 2 and / or only Cl2 is fed together with N2 into the process chamber 2.

[0072] A method characterized in that during the second cleaning step 22 only O2 is fed together with N2 into the process chamber 2 and / or that during the cooling 23 only H2 is fed into the process chamber 2.

[0073] A method characterized in that the protective layer is removed again with one or more cleaning steps after the layer has been deposited on the substrate 6.

[0074] A method which is characterized in that the graphite part is a susceptor 3 delimiting the process chamber 2 and / or that the graphite part is a process chamber ceiling 10 delimiting the process chamber 2 and / or that the graphite part is a gas inlet element 11 and / or that the graphite part is a gas outlet element 19 and / or that the graphite part is a substrate holder 5 which is mounted in a pocket 4 of the susceptor 3, wherein an inert gas can be fed into the pocket 4 through a gas supply line in such a way that a gas cushion is formed there which sets the substrate holder 5 in rotation about an axis 7.

[0075] A method which is characterized in that the susceptor 3 is driven in rotation about a rotation axis 8 at least during the deposition of the layer and / or that the susceptor 3 is heated by a heating device 31 during the deposition of the layer and during the heating 20, and / or during the three cleaning steps 21, 22, 23.

[0076] A device which is characterized in that for carrying out the method with a CVD reactor which has a reactor housing 1 in which at least one component, in particular graphite part 3, 5, 10, 11, 19 is arranged, with a gas supply device which has gas sources 25 with which a process gas whose molecules contain an element of main group III, a halogen or a halogen compound, O2, H2 and N2 is provided, and with a control device 32 for controlling valves 27 and mass flow controllers 26 such that a method according to one of the preceding claims is carried out in a process chamber 2 of the reactor housing 1.

[0077] All disclosed features are essential to the invention (individually, but also in combination with one another). The disclosure content of the associated / attached priority documents (copy of the prior application) is hereby fully incorporated into the disclosure of the application, also for the purpose of incorporating features of these documents into claims of the present application. The subclaims characterize, with their features, independent inventive developments of the prior art, even without the features of a referenced claim, in particular for filing divisional applications based on these claims. The invention specified in each claim may additionally have one or more of the features provided in the above description, in particular with reference numbers and / or specified in the list of reference numbers.The invention also relates to designs in which individual features mentioned in the above description are not implemented, in particular insofar as they are clearly unnecessary for the respective intended use or can be replaced by other technically equivalent means. List of reference symbols 1 Reactor casing 23 Bakeout with hydrogen 2 Process chamber 24 Cooling 3 Susceptor 25 Gas source 3' Surface 26 Mass Flow Controller 4 Pocket 27 Valve 5 Substrate holder 28 Supply line 5' Surface 29 Supply line 6 Substrate 30 Supply line 7 Rotation axis substrate holder 31 Heating device 8 Rotation axis susceptor 32 Control device 9 Shaft 33 Coating with III-V- 10 Process chamber ceiling protective layer 10' surface 11 Gas inlet element 12 Supply line B protective layer 13 Gas outlet zone TI first temperature of the chlorine 14 Supply line cleaning steps 15 Gas outlet zone T2 second temperature of the oxygen cleaning step 16 Supply line T3 third temperature of the annealing 17 Gas outlet zone zens with hydrogen 18 Well T4 fourth temperature of the 19 Gas outlet element separating the aluminum 20 Heating layer 21 Cleaning with chlorine 21' Rinse 22 Cleaning with oxygen

Claims

Claims:

1. A method for depositing a layer on a substrate (6) in a process chamber (2) of a reactor housing (1) of a CVD reactor by feeding in a process gas which comprises the elements of the layer, wherein decomposition products of the process gas are deposited as parasitic coatings on surfaces of components (3, 5, 10, 11, 19) of the process chamber (2), wherein the surfaces are cleaned of the parasitic coatings by feeding in one or more cleaning gases before or after the deposition of the layer in the absence of the substrate (6), wherein at least some of the cleaned surfaces are coated with a protective layer consisting of elements of main groups V and III before the deposition of the layer, characterized in that the element of main group V is phosphorus or arsenic and the substrate consists of this element and an element of main group III.

2. Method according to claim 1, characterized in that the protective layer consists of AlAs and the substrate of GaAs or that the protective layer consists of GaP and the substrate of InP.

3. Method according to one of the preceding claims, characterized in that after a heating step following a last of in particular several cleaning steps for forming the protective layer, TMA1, TMGa or TMIn together with PH? or AsH? is fed into the process chamber (2) and that the process gas contains molecules of the elements In, Al, Ga, As or P and the layer has an In x Ga y Al z As(ix- y -z) layer or an in x Ga y In z A s (i- x.y.z ) layer, where x, y, z are the can take values from 0 to 1 and x + y + z is greater than zero, or that the layer contains at least one of the elements InAlGaAs and P and As.

4. Method according to one of the preceding claims, characterized in that the protective layer has a layer thickness between 500 nm and 2.5 gm and / or that a reactive gas with a mass flow of 1 to 10 3 Mol / minute is fed into the process chamber (2) and / or that the depositing of the protective layer is carried out at a temperature between 600 °C and 800 °C and / or a total pressure between 20 mbar and 100 mbar and / or for a time between 1 minute and 5 minutes.

5. Method according to one of the preceding claims, characterized in that before each process step in which a new substrate (6) is introduced into the process chamber (2) of the reactor housing (1), the surface is cleaned of the parasitic coatings and then the metal protective layer is applied.

6. Method according to one of the preceding claims, wherein the graphite part (3, 5, 10, 11, 19) is coated with SiC, wherein a process gas is provided which has molecules containing at least one element of the V main group; wherein at least one substrate (6) is brought into the process chamber (2); wherein the process gas is fed into the process chamber (2), the process gas decomposes in the process chamber (2) heated to a process temperature and the at least one element of the V main group is deposited as a component of the layer on the substrate; wherein the substrate (6) is removed from the process chamber- mer (2); wherein the process chamber (2) is heated to a first cleaning temperature (Ti); wherein, after the first cleaning temperature (T2) is reached, a halogen or a halogen compound is fed into the process chamber (2) in a first cleaning step (21); wherein, after the first cleaning step (21), the process chamber (2) is brought to a second cleaning temperature (T2); wherein, after the second cleaning temperature (T2) is reached, O2 is fed into the process chamber (2) in a second cleaning step (22); wherein, after the second cleaning step (22), the process chamber (2) is brought to a third cleaning temperature (T3); wherein, after the third cleaning temperature (T2) is reached, essentially only H2 is fed into the process chamber (2) in a third cleaning step (23).and wherein after the third cleaning step (23) the protective layer is deposited in a coating step (33) and then the process chamber (2) is cooled in a cooling step (24); 7. Method according to one of the preceding claims, characterized in that the process gas contains AsH?, PH3 or NH3 and / or that the process gas additionally contains a gas whose molecules comprise an element of main group III and / or that the process gas additionally contains TMGa, TMIn or TMA1.

8. Method according to one of the preceding claims, characterized in that during the first cleaning step (21) only the halogen or the halogen compound and N2 is fed into the process chamber (2) and / or only CI2 is fed together with N2 into the process chamber (2).

9. Method according to one of the preceding claims, characterized in that during the second cleaning step (22) only O2 together with N2 is fed into the process chamber (2) and / or that during the cooling (23) only H2 is fed into the process chamber (2).

10. Method according to one of the preceding claims, characterized in that the protective layer is removed again with one or more cleaning steps after the deposition of the layer on the substrate (6).

11. Method according to one of the preceding claims, characterized in that the graphite part is a susceptor (3) delimiting the process chamber (2) and / or that the graphite part is a process chamber ceiling (10) delimiting the process chamber (2) and / or that the graphite part is a gas inlet element (11) and / or that the graphite part is a gas outlet element (19) and / or that the graphite part is a substrate holder (5) which is mounted in a pocket (4) of the susceptor (3), wherein an inert gas can be fed into the pocket (4) through a gas supply line in such a way that a gas cushion is formed there which causes the substrate holder (5) to rotate about an axis (7).

12. Method according to one of the preceding claims, characterized in that the susceptor (3) is driven to rotate about an axis of rotation (8) at least during the deposition of the layer and / or that the susceptor (3) is heated by a heating device (31) during the deposition of the layer and during the heating (20), and / or during the three cleaning steps (21, 22, 23).

13. Device for carrying out the method with a CVD reactor which has a reactor housing (1) in which at least one component, in particular a graphite part (3, 5, 10, 11, 19) is arranged, with a gas supply device which has gas sources (25) with which a process gas, the molecules of which contain an element of main group III, a halogen or a halogen compound, O2, H2 and N2, is provided, and with a control device (32) for controlling valves (27) and mass flow controllers (26) in such a way that a method according to one of the preceding claims is carried out in a process chamber (2) of the reactor housing (1).

14. Method or device characterized by one or more of the characterizing features of one of the preceding claims.

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