Flow control method and apparatus for network device

Abstract

The present invention relates to the technical field of network devices, and provides a flow control method and apparatus for a network device. The method comprises: when the application processing capacity of a user side of a first FPGA processor is insufficient, transferring flow control pressure to a first cache unit in the first FPGA processor; when the data occupation proportion of the first cache unit rises to a first preset threshold, transferring the flow control pressure to a user side of a second FPGA processor; when the application processing capacity of the user side of the second FPGA processor is insufficient, transferring the flow control pressure to a second cache unit of the second FPGA processor; and on the basis of the change condition of the data occupation proportion of the second cache unit, controlling data transmission of a flow control receiver. According to the present invention, step-by-step transmission of the flow control pressure to the flow control receiver is implemented, and on the basis of the data proportions of the cache units, real-time flow control is carried out, such that the data proportions of the cache units are within a preset range, the flow control stability is improved, and a desirable flow control effect is achieved.

Description

A flow control method and device for network equipment

Technical field

[0001] The present invention relates to the technical field of network equipment, and in particular to a flow control method and device for network equipment. [Background Technology]

[0002] The Internet provides a data transmission pipeline between network devices. The sequence of data transmitted between network devices can be called a data stream. Network devices can be switches, routers, or switching chips.

[0003] The existing flow control methods of network devices (such as FIFO flow control, Ethernet flow control, and Aurora flow control) are all single application scenarios and are difficult to adapt to more complex scenarios (such as the flow control scenario of a cryptographic machine).

[0004] On the other hand, the existing technology also has the defects of poor stability and poor flow control effect.

[0005] [Summary of the invention]

[0006] The present invention provides a flow control method and device for network equipment, which are used to solve the defects of the prior art such as single applicable scenario and poor flow control effect.

[0007] In a first aspect, the present invention provides a flow control method for a network device, which is applicable to data flow control of a flow control initiator, wherein the flow control initiator includes a first FPGA processor and a second FPGA processor, and the method includes: when the application processing capability on the user side of the first FPGA processor is insufficient, transferring the flow control pressure to a first cache unit in the first FPGA processor; when the data occupancy ratio of the first cache unit rises to a first preset threshold, transferring the flow control pressure to the user side of the second FPGA processor; when the application processing capability on the user side of the second FPGA processor is insufficient, transferring the flow control pressure to the second cache unit of the second FPGA processor; and controlling data sending of a flow control receiver according to changes in the data occupancy ratio of the second cache unit.

[0008] According to a flow control method for a network device provided by the present invention, when the data occupancy ratio of a first cache unit rises to a first preset threshold, the flow control pressure is transferred to the user side of a second FPGA processor, including: when the data occupancy ratio of the first cache unit rises to the first preset threshold, controlling the sending end in the first FPGA processor to send a first flow control message to the receiving end of the second FPGA processor to reverse the flow control pressure to the intermediate cache unit of the second FPGA processor to perform flow control on the first FPGA processor side; the intermediate cache unit transfers the flow control pressure to the user side of the second FPGA processor.

[0009] According to a flow control method for a network device provided by the present invention, after transferring the flow control pressure to the user side of the second FPGA processor, the method further includes: when the data occupancy ratio of the first cache unit drops to a second preset threshold, controlling the sending end in the first FPGA processor to send a second flow control message to the receiving end of the second FPGA processor to stop flow control on the first FPGA processor side; wherein the first preset threshold is greater than the second preset threshold.

[0010] According to a flow control method for a network device provided by the present invention, data transmission of a flow control receiver is controlled according to changes in the data occupancy ratio of a second cache unit, including: when the data occupancy ratio of the second cache unit rises to a third preset threshold, controlling the transmitting end in the second FPGA processor to send a first PAUSE frame to the flow control receiver to perform flow control on the second FPGA processor side; judging whether the flow control receiver supports flow control based on the PAUSE frame according to changes in the data occupancy ratio of the second cache unit, and controlling data transmission of the flow control receiver according to the judgment result.

[0011] According to a flow control method for a network device provided by the present invention, whether a flow control receiver supports flow control based on a PAUSE frame is judged according to changes in the data occupancy ratio of a second cache unit, and data transmission of the flow control receiver is controlled according to the judgment result, including: when the data occupancy ratio of the second cache unit drops to a fourth preset threshold, determining that the flow control receiver supports flow control based on a PAUSE frame; and a transmitting end in the second FPGA processor sends a second PAUSE frame to the flow control receiver to stop flow control on the second FPGA processor side; wherein the fourth preset threshold is less than the third preset threshold.

[0012] According to a flow control method for a network device provided by the present invention, whether a flow control receiver supports flow control based on a PAUSE frame is judged according to a change in the data occupancy ratio of a second cache unit, and data transmission of the flow control receiver is controlled according to the judgment result, including: if the data occupancy ratio of the second cache unit is greater than a third preset threshold, determining that the flow control receiver does not support flow control based on a PAUSE frame;

[0013] The second FPGA processor continues to execute the frame discard operation until the data occupancy rate of the second cache unit drops to a fourth preset threshold.

[0014] According to a flow control method for a network device provided by the present invention, the first cache unit and the second cache unit are both FIFO cache queues.

[0015] In a second aspect, the present invention further provides a flow control device for a network device, comprising:

[0016] A first processing module, configured to transfer flow control pressure to a first cache unit in the first FPGA processor when the application processing capability of the user side of the first FPGA processor is insufficient;

[0017] A second processing module is configured to transfer the flow control pressure to the user side of the second FPGA processor when the data occupancy ratio of the first cache unit rises to a first preset threshold;

[0018] A third processing module is configured to transfer the flow control pressure to the second cache unit of the second FPGA processor when the application processing capability of the user side of the second FPGA processor is insufficient;

[0019] The fourth processing module is used to control the data transmission of the flow control receiver according to the change of the data occupancy ratio of the second cache unit.

[0020] In a third aspect, the present invention provides a network device, applying any of the flow control methods for the network device described above.

[0021] In a fourth aspect, the present invention further provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the flow control method for a network device as described in any one of the above.

[0022] The flow control method and apparatus for a network device provided by the present invention realize the step-by-step transmission of flow control pressure to a flow control receiver by setting two FPGA processors as flow control initiators. In addition, real-time flow control is performed based on the data proportion of the cache unit, so that the data proportion of the cache unit is within a preset range to achieve dynamic balance, improve the stability of flow control, and have a good flow control effect.

[0023] The present invention integrates the advantages of multiple flow control methods (such as FIFO flow control, Ethernet flow control and Aurora flow control), and provides a system-level flow control method that can be more flexibly and efficiently adapted to more complex application scenarios such as link ciphers, and achieve good flow control effects.

Brief Description of the Drawings

[0024] In order to more clearly illustrate the technical solutions in the present invention or the prior art, a brief introduction is given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0025] FIG1 is a schematic diagram of a framework of an existing flow control method provided by the present invention;

[0026] FIG2 is a second schematic diagram of the framework of the existing flow control method provided by the present invention;

[0027] FIG3 is a schematic diagram of a framework of a flow control method of a network device provided by the present invention;

[0028] FIG4 is a flow diagram of a flow control method for a network device provided by the present invention;

[0029] FIG5 is a schematic diagram of changes in the occupancy of the first cache unit provided by the present invention;

[0030] FIG6 is a schematic diagram showing a change in occupancy of the second cache unit provided by the present invention;

[0031] FIG. 7 is a second schematic diagram of changes in the occupancy of the second cache unit provided by the present invention. [Specific implementation method]

[0032] To make the objectives, technical solutions, and advantages of the present invention more clearly apparent, the technical solutions of the present invention are described below in detail and in full, with reference to the accompanying drawings. It should be understood that the embodiments described herein are only a portion of the embodiments of the present invention, not all of them. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of the present invention without inventive effort are intended to fall within the scope of protection of the present invention.

[0033] It should be noted that, in the description of the embodiments of the present invention, the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements but also other elements not explicitly listed, or also includes elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or apparatus comprising the element.

[0034] The terms "first," "second," and the like in this application are used to distinguish similar objects, and are not used to describe a particular order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate, so that the embodiments of this application can be implemented in orders other than those illustrated or described herein. Furthermore, the objects distinguished by "first," "second," and the like generally refer to a class of objects and do not limit the number of objects. For example, the first object may be one or more.

[0035] In order to more clearly illustrate the technical solution of the present invention, some related existing technologies are briefly described.

[0036] (1) Design of Stream FIFO flow control based on SpinalHDL language

[0037] The SpinalHDL language, implemented in Scala, features flexible RTL generation. Within the open-source RTL design library implemented in SpinalHDL, the Stream FIFO is an efficient, streamlined, handshake-based reliable stream transmission Stream FIFO compatible with standard Amba Axi4-stream flows. When the FIFO capacity is nearing full, writing to the Stream automatically controls the upstream flow device by throttling the flow (setting tready in Axi4-Stream to low). Simultaneously, real-time FIFO occupancy and remaining status are made available to upstream flow devices in the write clock domain, allowing them to proactively implement self-flow control.

[0038] (2) Design of Tri Mode Ethernet Mac IP flow control

[0039] Xilinx's Tri-Mode Ethernet MAC IP core (TEMAC), designed based on the IEEE 802.3 specification, supports network layer rates of 10 / 100 Mb / s, 1 Gb / s, 2.5 Gb / s, or 10 / 100 / 1000 Mb / s, and supports both full-duplex and half-duplex transmission. This IP provides the MAC sublayer and MAC control sublayer of the data link layer. The IEEE 802.3-2008 standard layer division is as follows.

[0040] 1) Ethernet MAC layer, defined in IEEE 802.3-2008 Sections 2, 3, and 4. The MAC is responsible for Ethernet frame protocol transmission and is independent of any physical layer device, yet can interconnect with any physical layer device.

[0041] 2) Ethernet MAC control sublayer, defined in Article 31 of IEEE 802.3-2008, can provide real-time flow control for the MAC sublayer.

[0042] The Ethernet flow control mechanism based on the IEEE 802.3 protocol suite supports only full-dual mode, and the peer end must have this feature enabled.

[0043] Figure 1 is a schematic diagram of a conventional flow control scheme according to the present invention. As shown in Figure 1 , assume that the initiator of flow control is A and the recipient of flow control is B. When A requires flow control, the TEMAC sends an Ethernet pause frame (PAUSE frame) to B via its transmit interface. This frame contains the expected pause duration (in clock cycles) for B. Upon receiving the pause frame, B parses the content and responds to the flow control, ceasing data transmission for the specified duration.

[0044] (3) Design based on Aurora IP flow control

[0045] Xilinx's Aurora IP core uses the FPGA's built-in high-speed serial-to-parallel converter (SerDes) to interconnect two FPGAs. Because inter-board transmission uses serial signals, flow control cannot be directly implemented using the handshake-based Amba4 Axi4-Stream signaling. Therefore, flow control can only be implemented using a message-back mechanism from the flow control initiator.

[0046] FIG2 is a second schematic diagram of the framework of the existing flow control method provided by the present invention. As shown in FIG2 , assuming that the initiator of the flow control is A and the receiver of the flow control is B, Aurora IP has two message-based flow control methods:

[0047] 1) NFC flow control

[0048] When A initiates flow control, the flow control message is sent with the highest priority, bypassing all send queues (FIFOs) on the other side. It directly interrupts the current transmission of the 8b / 10b encoder and sends the flow control message instead. When B's 8b / 10b encoder receives the flow control message, it parses the message content. The flow control message contains the desired pause time (in clock cycles) for the sender on the user side of B. This corresponds to the Axi4-Stream signal on the user side, which is the number of ticks that tready will continuously reduce, thereby implementing back pressure on B's upstream Aurora module.

[0049] 2) UFC flow control

[0050] The transmission method and mechanism are similar to NFC flow control. However, after the flow control message enters the 8b / 10b decoder of party B, the encoder will not parse the specific content, nor will the user-side Axi4-Stream interface of party B be operated to perform back pressure on the upstream flow module. Instead, the message is given the highest priority, bypassing all receiving queues (FIFO) of party B, and is sent in the form of ordinary Axi4-Stream to allow users to obtain and process the flow control message.

[0051] The flow control method and apparatus for a network device provided by an embodiment of the present invention will be described below with reference to FIG. 3 to FIG. 7 .

[0052] The flow control method for a network device provided by the present invention is applicable to data flow control of a flow control initiator, wherein the flow control initiator includes a first FPGA processor and a second FPGA processor.

[0053] The present invention uses two FPGAs as an example. A1 (i.e., the first FPGA processor) and A2 (i.e., the second FPGA processor) together constitute the flow control initiator A; the flow control receiver B is a network flow test instrument or a common server with network message sending function. The design premise of the present invention is:

[0054] 1) Decouple and distribute the logic evenly across the two FPGAs as much as possible

[0055] 2) Ensure that the network messages received by the user-side applications on the A1 and A2 sides are complete (measured by the complete Axi4-Stream transmission termination signal tlast) to reduce the fault-tolerant logic complexity of the user-side application design.

[0056] Optionally, the first cache unit and the second cache unit are both FIFO cache queues.

[0057] Figure 3 is a schematic diagram of the flow control scheme of the network device provided by the present invention. The FIFOs (i.e., cache units) in Figure 3 are all the aforementioned Stream FIFOs. For simplicity, details such as data bit width conversion and clock domain conversion are omitted. Referring to Figure 3 , the first cache unit is the FIFO in A1, the middle cache unit is FIFO1 in A2, and the second cache unit is FIFO2 in A2.

[0058] FIG4 is a flow diagram of a flow control method for a network device provided by the present invention, as shown in FIG4 , including but not limited to the following steps:

[0059] Step 401: When the application processing capability of the user side of the first FPGA processor is insufficient, transfer the flow control pressure to the first cache unit in the first FPGA processor;

[0060] Step 402: When the data occupancy rate of the first cache unit rises to a first preset threshold, transferring the flow control pressure to the user side of the second FPGA processor;

[0061] Step 403: When the application processing capability of the user side of the second FPGA processor is insufficient, transferring the flow control pressure to the second cache unit of the second FPGA processor;

[0062] Step 404: Control the data transmission of the flow control receiver according to the change of the data occupancy ratio of the second cache unit.

[0063] The flow control method for a network device provided by the present invention realizes the step-by-step transmission of flow control pressure to flow control receivers by setting two FPGA processors as flow control initiators, thereby improving the flow control effect.

[0064] Based on the contents of the above embodiments, as an optional embodiment, the flow control method of the network device provided by the present invention, after transferring the flow control pressure to the user side of the second FPGA processor, further includes: when the data occupancy ratio of the first cache unit drops to a second preset threshold, controlling the sending end in the first FPGA processor to send a second flow control message to the receiving end of the second FPGA processor to stop flow control on the first FPGA processor side; wherein the first preset threshold is greater than the second preset threshold.

[0065] Specifically, the flow control design on the A1 side is further described below.

[0066] When the user-side application processing capacity on A1 is insufficient, the flow control pressure will be immediately transferred to the FIFO in A1. When the data retained in the FIFO exceeds the first preset threshold, the Aurora interface in A1 will be prompted to send an NFC / UFC flow control message to the sender, transferring the flow control pressure to A2.

[0067] FIG5 is a schematic diagram of changes in the occupancy of the first cache unit provided by the present invention, as shown in FIG5 :

[0068] a) At time t1, the FIFO occupancy reaches the first preset threshold of 7 / 8. At this time, flow control is required. A1 sends an NFC flow control message (i.e., the first flow control message) to A2. The flow control duration field in the NFC message content can be filled in according to the maximum value that can be filled in.

[0069] b) At time t2, the FIFO occupancy reaches the second preset threshold 3 / 4. At this time, flow control is stopped and an NFC flow control message (second flow control message) is sent to end A2. The flow control duration field in the content is filled with 0. This message is equivalent to informing the other party to cancel flow control and start sending data normally.

[0070] c) At time t3, the FIFO occupancy reaches 7 / 8 again, and then the process of a) and b) is repeated.

[0071] Through the above steps, the FIFO occupancy rate (data occupancy ratio) can be maintained in a dynamic balance within the cycle, thereby realizing the flow control function.

[0072] Based on the contents of the above embodiments, as an optional embodiment, the flow control method of the network device provided by the present invention transfers the flow control pressure to the user side of the second FPGA processor when the data occupancy ratio of the first cache unit rises to a first preset threshold, including: when the data occupancy ratio of the first cache unit rises to the first preset threshold, controlling the sending end in the first FPGA processor to send a first flow control message to the receiving end of the second FPGA processor to reverse the flow control pressure to the intermediate cache unit of the second FPGA processor to perform flow control on the first FPGA processor side; the intermediate cache unit transfers the flow control pressure to the user side of the second FPGA processor.

[0073] Specifically, when the A2 user receives the first flow control message from the Aurora interface, it will be back-pressured to FIFO1 in A2, and FIFO1 will further transfer the flow control pressure to the user side of A2. At this time, if the user side processing capacity is insufficient, the flow control pressure will be immediately transferred to FIFO2 in A2.

[0074] At this time, FIFO2 can transfer the pressure directly to the TEMAC side of A2, prompting TEMAC to send PAUSE frames to limit the flow of party B.

[0075] Optionally, according to the change of the data occupancy ratio of the second cache unit, the data sending of the flow control receiver is controlled, including: when the data occupancy ratio of the second cache unit rises to a third preset threshold, controlling the sending end in the second FPGA processor to send a first PAUSE frame to the flow control receiver to perform flow control on the second FPGA processor side; according to the change of the data occupancy ratio of the second cache unit, judging whether the flow control receiver supports flow control based on the PAUSE frame, and controlling the data sending of the flow control receiver according to the judgment result.

[0076] Optionally, based on the change in the data occupancy ratio of the second cache unit, a judgment is made as to whether the flow control receiver supports flow control based on the PAUSE frame, and based on the judgment result, the data sending of the flow control receiver is controlled, including: when the data occupancy ratio of the second cache unit drops to a fourth preset threshold, determining that the flow control receiver supports flow control based on the PAUSE frame; the sending end in the second FPGA processor sends a second PAUSE frame to the flow control receiver to stop flow control on the second FPGA processor side; wherein the fourth preset threshold is less than the third preset threshold.

[0077] FIG6 is a schematic diagram showing a change in the occupancy of the second cache unit provided by the present invention, as shown in FIG6 :

[0078] ① At time t1, FIFO2 occupancy reaches the third preset threshold of 7 / 8. At this time, flow control is required, and the first PAUSE frame is sent to terminal B. The flow control duration field in the frame content is filled with the maximum value that can be filled in.

[0079] ② At time t2, the occupancy of FIFO2 reaches the fourth preset threshold 3 / 4. At this time, flow control is stopped and a second PAUSE frame is sent to end B. The flow control duration field in the frame content is filled with 0. This frame is equivalent to informing the other party to cancel flow control and start sending data normally.

[0080] ③ At time t3, the FIFO2 occupancy reaches the third preset threshold 7 / 8 again, and then the ①② process is repeated.

[0081] Through the above steps, the FIFO2 occupancy rate can be maintained in a dynamic balance within the cycle, thereby realizing the flow control function.

[0082] Optionally, if the data occupancy ratio of the second cache unit is greater than a third preset threshold (or if the data occupancy ratio of the second cache unit reaches a fifth preset threshold, where the fifth preset threshold is greater than the third preset threshold), it is determined that the flow control receiver does not support flow control based on PAUSE frames; and the second FPGA processor continues to execute the frame discard operation until the data occupancy ratio of the second cache unit drops to a fourth preset threshold.

[0083] Specifically, if it is uncertain whether the MAC layer of party B supports the Ethernet control sublayer PAUSE frame flow control, a flow control protection module can be inserted between FIFO2 and TEMAC of A2 to ensure active packet loss processing when the flow control of party B is not effective.

[0084] FIG7 is a second schematic diagram of changes in the occupancy of the second cache unit provided by the present invention, as shown in FIG7 :

[0085] 1) At time t1, the occupancy of FIFO2 reaches the third preset threshold of 7 / 8. At this time, flow control is required, and the first PAUSE frame is sent to terminal B. The flow control duration field in the frame content is filled with the maximum value that can be filled in.

[0086] 2) At time t2, the FIFO2 occupancy continues to increase to the fifth preset threshold of 8 / 9 (it is necessary to ensure that the capacity of 1 / 9 is greater than the currently set MTU). At this time, it is determined that the flow control receiver does not support PAUSE frame flow control. It is necessary to call the flow control protection module. After the current frame transmission is completed (defined by the tlast signal of Axi4-Stream), the active frame discarding operation is continuously started.

[0087] 3) At time t3, the FIFO2 occupancy returns to the fourth preset threshold 3 / 4. At this time, the flow control protection module is called. After the current frame is discarded (defined by the tlast signal of Axi4-Stream), it starts to allow frame reception again. At the same time, it also sends a flow control cancellation frame to the TEMAC of party B to prevent the flow control from taking effect late.

[0088] 4) At time t4, FIFO2 occupancy reaches the third preset threshold of 7 / 8 again. If the flow control frame takes effect, it will return to 3 / 4 at the next time point; if the flow control fails, FIFO2 occupancy reaches 8 / 9 again at time t5.

[0089] It should be noted that, in the present invention, the first preset threshold and the third preset threshold may be equal, and the second preset threshold and the fourth preset threshold may be equal.

[0090] On the other hand, the present invention also provides a flow control device for a network device, the device comprising:

[0091] A first processing module, configured to transfer flow control pressure to a first cache unit in the first FPGA processor when the application processing capability of the user side of the first FPGA processor is insufficient;

[0092] A second processing module is configured to transfer the flow control pressure to the user side of the second FPGA processor when the data occupancy ratio of the first cache unit rises to a first preset threshold;

[0093] A third processing module is configured to transfer the flow control pressure to the second cache unit of the second FPGA processor when the application processing capability of the user side of the second FPGA processor is insufficient;

[0094] The fourth processing module is used to control the data transmission of the flow control receiver according to the change of the data occupancy ratio of the second cache unit.

[0095] It should be noted that the flow control device of the network device provided in the embodiment of the present invention can execute the flow control method of the network device described in any of the above embodiments during specific operation, which will not be described in detail in this embodiment.

[0096] In summary, the flow control method and device for a network device provided by the present invention realize the step-by-step transmission of flow control pressure to the flow control receiver by setting two FPGA processors as flow control initiators, and perform real-time flow control based on the data proportion of the cache unit, so that the data proportion of the cache unit is within a preset range to achieve dynamic balance, improve the stability of flow control, and have a better flow control effect.

[0097] The present invention also provides a network device, which applies the flow control method in the above embodiment.

[0098] It should be noted here that the terminal and network equipment provided in the embodiment of the present invention can implement all the method steps implemented in the above method embodiment and can achieve the same technical effects. The parts and beneficial effects of this embodiment that are the same as those in the method embodiment will not be described in detail here.

[0099] On the other hand, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, it is implemented to execute the flow control method of the network device provided by the above-mentioned embodiments. The method includes: when the application processing capacity of the user side of the first FPGA processor is insufficient, transferring the flow control pressure to the first cache unit in the first FPGA processor; when the data occupancy ratio of the first cache unit rises to a first preset threshold, transferring the flow control pressure to the user side of the second FPGA processor; when the application processing capacity of the user side of the second FPGA processor is insufficient, transferring the flow control pressure to the second cache unit of the second FPGA processor; and controlling the data sending of the flow control receiver according to the change in the data occupancy ratio of the second cache unit.

[0100] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, i.e., they may be located in one location or distributed across multiple network units. Some or all of the modules may be selected based on actual needs to achieve the objectives of the present embodiment. Persons of ordinary skill in the art will be able to understand and implement the present invention without inventive effort.

[0101] Through the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus a necessary general hardware platform, or of course, by hardware. Based on this understanding, the essence of the above technical solution or the part that contributes to the existing technology can be embodied in the form of a software product. The computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a magnetic disk, an optical disk, etc., and includes a number of instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or certain parts of the embodiments.

[0102] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A flow control method for a network device, characterized in that: The method is applicable to data flow control of a flow control initiator, wherein the flow control initiator includes a first FPGA processor and a second FPGA processor, and the method includes: When the application processing capability of the user side of the first FPGA processor is insufficient, transferring the flow control pressure to the first cache unit in the first FPGA processor; When the data occupancy ratio of the first cache unit rises to a first preset threshold, transferring the flow control pressure to the user side of the second FPGA processor; When the application processing capability of the user side of the second FPGA processor is insufficient, transferring the flow control pressure to the second cache unit of the second FPGA processor; According to the change of the data occupancy ratio of the second cache unit, the data sending of the flow control receiver is controlled.

2. The flow control method of a network device according to claim 1, characterized in that: When the data occupancy ratio of the first cache unit rises to a first preset threshold, transferring the flow control pressure to the user side of the second FPGA processor includes: When the data occupancy ratio of the first cache unit rises to a first preset threshold, the sending end in the first FPGA processor is controlled to send a first flow control message to the receiving end of the second FPGA processor, so as to push the flow control pressure back to the intermediate cache unit of the second FPGA processor, and perform flow control on the first FPGA processor side; The intermediate cache unit transfers the flow control pressure to the user side of the second FPGA processor.

3. The flow control method of a network device according to claim 1, characterized in that: After transferring the flow control pressure to the user side of the second FPGA processor, the method further includes: When the data occupancy ratio of the first cache unit drops to a second preset threshold, controlling the sending end in the first FPGA processor to send a second flow control message to the receiving end of the second FPGA processor to stop flow control on the first FPGA processor side; Among them, the first preset threshold is greater than the second preset threshold.

4. The flow control method of a network device according to claim 1, characterized in that: According to the change of the data occupancy ratio of the second cache unit, controlling the data transmission of the flow control receiver includes: When the data occupancy ratio of the second cache unit rises to a third preset threshold, controlling the sending end in the second FPGA processor to send a first PAUSE frame to the flow control receiving end to perform flow control on the second FPGA processor side; According to the change of the data occupancy ratio of the second cache unit, it is judged whether the flow control receiver supports flow control based on the PAUSE frame, and according to the judgment result, the data sending of the flow control receiver is controlled.

5. The flow control method of a network device according to claim 4, characterized in that: According to the change of the data occupancy ratio of the second cache unit, whether the flow control receiver supports flow control based on the PAUSE frame is judged, and according to the judgment result, the data sending of the flow control receiver is controlled, including: When the data occupancy ratio of the second cache unit drops to a fourth preset threshold, determining that the flow control receiver supports flow control based on the PAUSE frame; The transmitting end in the second FPGA processor sends a second PAUSE frame to the flow control receiving end to stop the flow control on the second FPGA processor side; Among them, the fourth preset threshold is smaller than the third preset threshold.

6. The flow control method of a network device according to claim 4, characterized in that: According to the change of the data occupancy ratio of the second cache unit, whether the flow control receiver supports flow control based on the PAUSE frame is judged, and according to the judgment result, the data sending of the flow control receiver is controlled, including: When the data occupancy ratio of the second cache unit is greater than a third preset threshold, determining that the flow control receiver does not support flow control based on the PAUSE frame; The second FPGA processor continues to execute the frame discarding operation until the data occupancy ratio of the second cache unit drops to a fourth preset threshold.

7. The flow control method of a network device according to claim 1, characterized in that: The first cache unit and the second cache unit are both FIFO cache queues.

8. A flow control device for a network device, characterized in that: include: A first processing module, configured to transfer flow control pressure to a first cache unit in the first FPGA processor when the application processing capability of the user side of the first FPGA processor is insufficient; A second processing module is used to transfer the flow control pressure to the user side of the second FPGA processor when the data occupancy ratio of the first cache unit rises to a first preset threshold; A third processing module, configured to transfer the flow control pressure to the second cache unit of the second FPGA processor when the application processing capability of the user side of the second FPGA processor is insufficient; The fourth processing module is used to control the data transmission of the flow control receiver according to the change of the data occupancy ratio of the second cache unit.

9. A network device, characterized in that: Apply the flow control method as described in any one of claims 1 to 7.

10. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the flow control method for a network device as claimed in any one of claims 1 to 7 are implemented.

Images