Sensor system

Abstract

This sensor system comprises a first sensor element, a second sensor element, and a processing circuit element. The first sensor element outputs a first analog signal in accordance with the applied inertial force. The second sensor element is a different element from the first sensor element, and outputs a second analog signal in accordance with the inertial force. The processing circuit element comprises a first processing unit and a second processing unit. The first processing unit generates a first digital signal from the first analog signal. The second processing unit generates a second digital signal from the second analog signal. In the processing circuit element, a first processing region, which is a region in which the first processing unit implements processing, and a second processing region, which is a region in which the second processing unit implements processing, are separated.

Description

Sensor System

[0001] The present disclosure relates generally to a sensor system, and more particularly to a sensor system including a plurality of sensor elements that output a signal in response to an inertial force.

[0002] Patent Literature 1 discloses a sensor diagnostic system including an acquisition unit and a diagnosis unit. The acquisition unit acquires detection values ​​from a plurality of sensors. The plurality of sensors share a part of their sensitivity range, which is the range of detectable values ​​for a predetermined physical quantity, and differ from each other in the remainder. The diagnosis unit diagnoses at least one of the plurality of sensors by comparing the detection values ​​of the plurality of sensors within the part of the range.

[0003] Japanese Patent Application Laid-Open No. 2020-134340

[0004] The sensor diagnostic system described in Patent Document 1 includes a first unit including three sensors from a plurality of sensors that detect physical quantities, and a second unit including three sensors from the plurality of sensors that are different from the three sensors included in the first unit. Therefore, even if the three sensors included in the first unit are malfunctioning, the three sensors included in the second unit detect the physical quantities. In other words, the sensor diagnostic system described in Patent Document 1 ensures redundancy among the multiple sensors. However, in a sensor system such as the sensor diagnostic system described in Patent Document 1, it is necessary to ensure redundancy throughout the entire system.

[0005] A sensor system according to one aspect of the present disclosure includes a first sensor element, a second sensor element, and a processing circuit element. The first sensor element outputs a first analog signal in response to an applied inertial force. The second sensor element is an element different from the first sensor element and outputs a second analog signal in response to the inertial force. The processing circuit element processes the first analog signal and the second analog signal. The processing circuit element includes a first processing unit, a second processing unit, a digital comparison unit, a first output terminal, and a second output terminal. The first processing unit generates a first digital signal from the first analog signal. The second processing unit generates a second digital signal from the second analog signal. The digital comparison unit compares the first digital signal with the second digital signal. The first output terminal outputs the first digital signal. The second output terminal outputs the second digital signal. The processing circuit element is separated into a first processing area where the first processing unit performs processing and a second processing area where the second processing unit performs processing.

[0006] The present disclosure has the advantage of ensuring redundancy of the entire system.

[0007] FIG. 1 is a block diagram showing a schematic configuration of a sensor system according to a first embodiment. FIG. 2 is an explanatory diagram illustrating a state in which a first processing region and a second processing region are separated in a processing circuit element of the sensor system. FIG. 3 is a block diagram showing a schematic configuration of a sensor system according to a second embodiment. FIG. 4 is a block diagram showing a schematic configuration of a sensor system according to a third embodiment. FIG. 5 is a block diagram showing a schematic configuration of a sensor system according to a fourth embodiment. FIG. 6 is a graph showing a first cutoff frequency of a first low-pass filter, a second cutoff frequency of a second low-pass filter, a first resonant frequency of a first sensor element, and a second resonant frequency of a second sensor element in the sensor system according to the first embodiment. FIG. 7 is a graph showing a first cutoff frequency of a first low-pass filter, a second cutoff frequency of a second low-pass filter, a first resonant frequency of a first sensor element, and a second resonant frequency of a second sensor element in a modified example of the sensor system according to the first embodiment.

[0008] The embodiments and modifications described below are merely examples of the present disclosure. The present disclosure is not limited to the embodiments and modifications, and various modifications other than the embodiments and modifications may be made depending on the design, etc., as long as they do not deviate from the technical concept of the present disclosure.

[0009] (1) First Embodiment (1-1) Overview Hereinafter, an overview of a sensor system 100 according to a first embodiment will be described with reference to FIGS. 1 and 2. FIG.

[0010] The sensor system 100 according to the first embodiment is a system for detecting an applied inertial force. The sensor system 100 can be provided in various devices, such as a moving body such as a vehicle (including an automobile and a motorcycle), an aircraft, or a ship, a home appliance, a mobile terminal, a camera, a wearable terminal, a game console, or a drone. In the following description, it is assumed that the sensor system 100 is provided in a vehicle such as an automobile and used in a system for controlling the vehicle.

[0011] As shown in Fig. 1, the sensor system 100 includes a first sensor element 1a, a second sensor element 1b, and a processing circuit element 2. The first sensor element 1a outputs a first analog signal Si1a in response to an applied inertial force. The second sensor element 1b is an element different from the first sensor element 1a and outputs a second analog signal Si1b in response to the inertial force. The processing circuit element 2 processes the first analog signal Si1a and the second analog signal Si1b.

[0012] As shown in FIG. 1, the processing circuit element 2 has a first processing unit 3a, a second processing unit 3b, a digital comparison unit 4, a first output terminal 5a, and a second output terminal 5b. The first processing unit 3a generates a first digital signal Si2a from a first analog signal Si1a. The second processing unit 3b generates a second digital signal Si2b from a second analog signal Si1b. The digital comparison unit 4 compares the first digital signal Si2a with the second digital signal Si2b. The first output terminal 5a outputs the first digital signal Si2a. The second output terminal 5b outputs the second digital signal Si2b. As shown in FIG. 2, the processing circuit element 2 is separated into a first processing area Ar1, which is an area where the first processing unit 3a performs processing, and a second processing area Ar2, which is an area where the second processing unit 3b performs processing. That is, the area within the processing circuit element 2 where the first processing unit 3a performs processing, including the first processing unit 3a, is the first processing region Ar1, and the area within the processing circuit element 2 where the second processing unit 3b performs processing, including the second processing unit 3b, is the second processing region Ar2. The first processing region Ar1 is separated from the second processing region Ar2.

[0013] As described above, the sensor system 100 of the first embodiment has the advantage of ensuring redundancy in the event of a failure of either the first sensor element 1a or the second sensor element 1b. Furthermore, by separating the first processing area Ar1 and the second processing area Ar2, the sensor system 100 can also ensure redundancy in the event of a failure of either the first processing unit 3a or the second processing unit 3b. The first processing unit 3a continues to function even if the second processing area Ar2 is damaged for some reason, and the second processing unit 3b continues to function even if the first processing area Ar12 is damaged for some reason. In other words, the sensor system 100 of the first embodiment has the advantage of ensuring redundancy of the entire system. In this disclosure, "redundancy" refers to safety achieved by redundancy, and "redundancy" refers to providing a spare component as a backup so that inertial force can be detected in the event of a failure in part of the sensor system 100.

[0014] (1-2) Detailed Configuration (1-2-1) Overall The detailed configuration of the sensor system 100 of the first embodiment will be described below with reference to FIGS. 1 and 2. FIG.

[0015] As shown in FIG. 1, the sensor system 100 includes a first sensor element 1a, a second sensor element 1b, and a processing circuit element 2.

[0016] (1-2-2) Sensor Elements The first sensor element 1a and the second sensor element 1b are different elements. The first sensor element 1a outputs a first analog signal Si1a (see FIG. 1) in response to an applied inertial force. Similarly, the second sensor element 1b outputs a second analog signal Si1b (see FIG. 1) in response to an applied inertial force. The inertial force applied to the first sensor element 1a and the inertial force applied to the second sensor element 1b are the same inertial force. The first analog signal Si1a and the second analog signal Si1b are different signals.

[0017] In the first embodiment, the inertial force applied to each of the first sensor element 1 a and the second sensor element 1 b includes an angular velocity. More specifically, the inertial force applied to each of the first sensor element 1 a and the second sensor element 1 b includes a force acting due to an angular velocity (i.e., a Coriolis force).

[0018] The first sensor element 1a vibrates at a first drive frequency to output a first analog signal Si1a in response to the applied angular velocity (acting Coriolis force). In other words, the "first drive frequency" is a frequency at which the first sensor element 1a vibrates to output the first analog signal Si1a in response to the applied angular velocity. The first drive frequency of the first sensor element 1a is generated based on the operation clock of the first processing unit 3a.

[0019] Similarly, the second sensor element 1b vibrates at the second drive frequency, thereby outputting a second analog signal Si1b in response to the applied angular velocity (acting Coriolis force). In short, the "second drive frequency" is the frequency at which the second sensor element 1b vibrates in order to output the second analog signal Si1b in response to the applied angular velocity. The second drive frequency of the second sensor element 1b is generated based on the operation clock of the second processing unit 3b. This configuration has the advantage of easily generating the first drive frequency of the first sensor element 1a and the second drive frequency of the second sensor element 1b. The "operation clock" referred to in this disclosure is, in other words, the frequency at which the sensor element operates, i.e., the operating frequency.

[0020] The first resonant frequency of the first sensor element 1a is different from the second resonant frequency of the second sensor element 1b. The "first resonant frequency" in this disclosure refers to a specific frequency determined by the shape, fixing method, material, etc. of the first sensor element 1a, and is a frequency that is likely to cause output fluctuations when a disturbance is input to the first sensor element 1a. Similarly, the "second resonant frequency" in this disclosure refers to a specific frequency determined by the shape, fixing method, material, etc. of the second sensor element 1b, and is a frequency that is likely to cause output fluctuations when a disturbance is input to the second sensor element 1b. This configuration has the advantage of limiting the effect of output fluctuations due to disturbances to one of the first sensor element 1a and the second sensor element 1b. In other words, it has the advantage of preventing simultaneous output fluctuations caused by disturbances in both the first sensor element 1a and the second sensor element 1b.

[0021] The detection method of the first sensor element 1a and the detection method of the second sensor element 1b are the same. In the first embodiment, the detection method of the first sensor element 1a and the detection method of the second sensor element 1b are the same capacitance type. This configuration can reduce variations in the detection results of the first sensor element 1a and the second sensor element 1b due to factors other than malfunction. This has the advantage of improving the accuracy of comparison by the digital comparator 4.

[0022] The first sensor element 1a is, for example, a uniaxial gyro element that detects angular velocity around the detection axis and outputs a first analog signal Si1a in response to the detected angular velocity. Similarly, the second sensor element 1b is, for example, a uniaxial gyro element that detects angular velocity around the detection axis and outputs a second analog signal Si1b in response to the detected angular velocity. More specifically, the first sensor element 1a and the second sensor element 1b each have a vibrating electrode and a detection electrode. The vibrating electrode of the first sensor element 1a vibrates at a first drive frequency in a first direction perpendicular to the detection axis. Similarly, the vibrating electrode of the second sensor element 1b vibrates at a second drive frequency in the first direction perpendicular to the detection axis. The detection electrode of each of the first sensor element 1a and the second sensor element 1b uses electrostatic capacitance to detect movement of the vibrating electrode in a second direction perpendicular to both the detection axis and the first direction. When acceleration is applied to the sensor system 100, the vibrating electrode moves according to the magnitude of the acceleration, and the detection electrode detects the movement of the vibrating electrode using capacitance. The first sensor element 1a converts changes in the applied acceleration into changes in capacitance and outputs a signal in which the carrier signal is modulated according to the change in capacitance as a first analog signal Si1a. Similarly, the second sensor element 1b converts changes in the applied acceleration into changes in capacitance and outputs a signal in which the carrier signal is modulated according to the change in capacitance as a second analog signal Si1b. The "carrier signal" referred to in this disclosure is a rectangular wave signal of a constant amplitude that alternates between a high level (High) and a low level (Low) at a constant cycle.

[0023] Each of the first sensor element 1 a and the second sensor element 1 b includes a microelectromechanical system, for example, a resonator configured by a so-called MEMS (Micro Electro Mechanical System).

[0024] In the first embodiment, the first sensor element 1a and the second sensor element 1b are each mounted on one surface (upper surface) of the processing circuit element 2, as shown in FIG.

[0025] (1-2-3) Processing Circuit Element As shown in FIG. 1, the processing circuit element 2 has a first processing unit 3a, a second processing unit 3b, a digital comparison unit 4, a first output terminal 5a, a second output terminal 5b, a first power supply terminal 6a, and a second power supply terminal 6b.

[0026] 2, the processing circuit element 2 is configured by a single integrated circuit mounted on (the upper surface of) a mounting board Bo1. For example, the processing circuit element 2 is configured by a single ASIC (Application Specific Integrated Circuit). This configuration has the advantage of simplifying the configuration of the sensor system 100.

[0027] 2, the processing circuit element 2 is separated into a first processing region Ar1, which is a region where the first processing unit 3a performs processing, and a second processing region Ar2, which is a region where the second processing unit 3b performs processing. In the processing circuit element 2 of embodiment 1, the first processing region Ar1 and the second processing region Ar2 are separated so as not to overlap in a top view (viewed from above the processing circuit element 2). In the processing circuit element 2 of embodiment 1, the first processing region Ar1 and the first sensor element 1a overlap in a top view. Similarly, in the processing circuit element 2 of embodiment 1, the second processing region Ar2 and the second sensor element 1b overlap in a top view.

[0028] The first processing unit 3a generates a first digital signal Si2a from the first analog signal Si1a. The first processing unit 3a is electrically connected to the first output terminal 5a and outputs the first digital signal Si2a to the first output terminal 5a and the digital comparison unit 4. The first output terminal 5a outputs the first digital signal Si2a input from the first processing unit 3a to the outside.

[0029] The first processing unit 3a includes a CV conversion circuit 31a, a demodulation circuit 32a, and an AD converter 33a. The CV conversion circuit 31a, the demodulation circuit 32a, and the AD converter 33a are connected in series in the order shown. The CV conversion circuit 31a, the demodulation circuit 32a, and the AD converter 33a operate in accordance with the operating clock of the first processing unit 3a.

[0030] The CV conversion circuit 31a converts a change in capacitance input as the first analog signal Si1a into a change in voltage and outputs the voltage. When the capacitance input as the first analog signal Si1a changes in response to the acceleration applied to the sensor system 100, the output of the CV conversion circuit 31a changes accordingly. The CV conversion circuit 31a also includes an amplifier. The CV conversion circuit 31a outputs a voltage amplified to a predetermined level by the amplifier.

[0031] The demodulation circuit 32a demodulates the voltage (voltage signal) output from the CV conversion circuit 31a, thereby removing the carrier signal component from the voltage signal, and the demodulation circuit 32a outputs a voltage having a magnitude corresponding to the capacitance of the first sensor element 1a.

[0032] The AD converter 33a converts the voltage output from the demodulation circuit 32a from an analog signal to a digital signal, and outputs the digital signal to the first output terminal 5a and the digital comparison unit 4 as a first digital signal Si2a.

[0033] The second processing unit 3b generates a second digital signal Si2b from the second analog signal Si1b. The second processing unit 3b is electrically connected to the second output terminal 5b and outputs the second digital signal Si2b to the second output terminal 5b and the digital comparison unit 4. The second output terminal 5b outputs the second digital signal Si2b input from the second processing unit 3b to the outside.

[0034] The second processing unit 3b includes a CV conversion circuit 31b, a demodulation circuit 32b, and an AD converter 33b. The CV conversion circuit 31b, the demodulation circuit 32b, and the AD converter 33b are connected in series in the order shown. The CV conversion circuit 31b, the demodulation circuit 32b, and the AD converter 33b operate in accordance with the operating clock of the second processing unit 3b.

[0035] The CV conversion circuit 31b converts a change in capacitance input as the second analog signal Si1b into a change in voltage and outputs the voltage. When the capacitance input as the second analog signal Si1b changes in response to the acceleration applied to the sensor system 100, the output of the CV conversion circuit 31b changes accordingly. The CV conversion circuit 31b also includes an amplifier. The CV conversion circuit 31b outputs a voltage amplified to a predetermined level by the amplifier.

[0036] The demodulation circuit 32b demodulates the voltage (voltage signal) output from the CV conversion circuit 31b, thereby removing the carrier signal component from the voltage signal, and outputs a voltage whose magnitude corresponds to the capacitance of the second sensor element 1b.

[0037] The AD converter 33b converts the voltage output from the demodulation circuit 32b from an analog signal into a digital signal, and outputs the digital signal to the second output terminal 5b and the digital comparison unit 4 as a second digital signal Si2b.

[0038] The first power supply terminal 6a is a terminal through which power is input to the first processing unit 3a. Meanwhile, the second power supply terminal 6b is a terminal through which power is input to the second processing unit 3b. In other words, the first processing unit 3a receives power via the first power supply terminal 6a, and the second processing unit 3b receives power via the second power supply terminal 6b. In other words, the first processing unit 3a and the second processing unit 3b receive power via different terminals. This configuration has the advantage that, even if a failure occurs in the first power supply terminal 6a, power can be supplied to the second processing unit 3b from the second power supply terminal 6b. Similarly, even if a failure occurs in the second power supply terminal 6b, power can be supplied to the first processing unit 3a from the first power supply terminal 6a. That is, this configuration has the advantage of ensuring redundancy against failure of either the first power supply terminal 6a or the second power supply terminal 6b.

[0039] The digital comparator 4 compares the first digital signal Si2a with the second digital signal Si2b. More specifically, the digital comparator 4 compares the first digital signal Si2a output from the AD converter 33a of the first processing unit 3a with the second digital signal Si2b output from the AD converter 33b of the second processing unit 3b.

[0040] The digital comparator 4 diagnoses whether or not there is an abnormality in the sensor system 100 based on the comparison result between the first digital signal Si2a and the second digital signal Si2b. More specifically, the digital comparator 4 diagnoses whether or not there is an abnormality in at least one of the first sensor element 1a, the second sensor element 1b, the first processing unit 3a, and the second processing unit 3b based on the comparison result between the first digital signal Si2a and the second digital signal Si2b. The digital comparator 4 performs the diagnosis using a preset threshold. If the difference between the voltage value of the first digital signal Si2a and the voltage value of the second digital signal Si2b is greater than the threshold, the digital comparator 4 diagnoses that there is an abnormality in at least one of the first sensor element 1a, the second sensor element 1b, the first processing unit 3a, and the second processing unit 3b.

[0041] (1-3) Modifications of Embodiment 1 Below, we will list modifications of the above-described embodiment 1. The following modifications may be realized in appropriate combination.

[0042] In the first embodiment described above, the inertial force applied to each of the first sensor element 1 a and the second sensor element 1 b includes angular velocity, but may also include velocity, angular acceleration, vibration, load, air pressure, electromagnetic force, and temperature. In short, the inertial force applied to each of the first sensor element 1 a and the second sensor element 1 b may include at least one of angular velocity, velocity, angular acceleration, vibration, load, air pressure, electromagnetic force, and temperature.

[0043] The detection method of each of the first sensor element 1a and the second sensor element 1b in the first embodiment is a capacitance method, but may be, for example, a piezoelectric method, etc. The detection method of each of the first sensor element 1a and the second sensor element 1b is not limited.

[0044] In the first embodiment described above, the detection method of the first sensor element 1a and the detection method of the second sensor element 1b are the same, but they may be different.

[0045] In the above-described first embodiment, the first drive frequency of the first sensor element 1a is generated based on the operation clock of the first processing unit 3a. However, the first drive frequency of the first sensor element 1a is a preset value, and does not necessarily have to be generated based on the operation clock of the first processing unit 3a.

[0046] Similarly, in the above-described first embodiment, the second drive frequency of the second sensor element 1b is generated based on the operation clock of the second processing unit 3b. However, the second drive frequency of the second sensor element 1b is a preset value, and does not necessarily have to be generated based on the operation clock of the second processing unit 3b.

[0047] In the first embodiment described above, the processing circuit element 2 has both the first power supply terminal 6a and the second power supply terminal 6b, but may have only one of the first power supply terminal 6a and the second power supply terminal 6b. In this case, power is supplied to each of the first processing unit 3a and the second processing unit 3b via one of the first power supply terminal 6a and the second power supply terminal 6b that the processing circuit element 2 has. In other words, the first processing unit 3a and the second processing unit 3b may be supplied with power from the same terminal.

[0048] (2) Second Embodiment (2-1) Overview A sensor system 100A according to a second embodiment will be described below with reference to Fig. 3. Components similar to those in the first embodiment will be denoted by the same reference numerals and will not be described again.

[0049] 3, the sensor system 100A of the second embodiment includes a first sensor element 1a, a second sensor element 1b, and a processing circuit element 2A. The processing circuit element 2A includes a first processing unit 3a, a second processing unit 3b, a digital comparator 4, a first output terminal 5a, a second output terminal 5b, a first power supply terminal 6a, a second power supply terminal 6b, and an analog comparator 7.

[0050] The sensor system 100A according to the second embodiment differs from the sensor system 100 according to the first embodiment in that the processing circuit element 2A has an analog comparison unit 7.

[0051] (2-2) Detailed Configuration The processing circuit element 2A has an analog comparator 7 (see FIG. 3) that compares the first analog signal Si1a and the second analog signal Si1b. More specifically, the analog comparator 7 compares the first analog signal Si1a output from the first sensor element 1a with the second analog signal Si1b.

[0052] The analog comparator 7 diagnoses whether or not there is an abnormality in at least one of the first sensor element 1a and the second sensor element 1b based on the comparison result between the first analog signal Si1a and the second analog signal Si1b. The analog comparator 7 performs the diagnosis using a preset threshold. If the difference between the voltage value of the first analog signal Si1a and the voltage value of the second analog signal Si1b is greater than the threshold, the analog comparator 7 diagnoses that there is an abnormality in at least one of the first sensor element 1a and the second sensor element 1b.

[0053] The above configuration has the advantage that it is possible to determine whether there is an abnormality in either the first sensor element 1a or the second sensor element 1b, or whether there is an abnormality in either the first processing unit 3a or the second processing unit 3b, based on the diagnostic results of the digital comparison unit 4 and the diagnostic results of the analog comparison unit 7.

[0054] (3) Third Embodiment (3-1) Overview A sensor system 100B according to a third embodiment will be described below with reference to Fig. 4. Components similar to those in the first embodiment will be denoted by the same reference numerals and will not be described again.

[0055] 4, the sensor system 100B of the third embodiment includes a first sensor element 1a, a second sensor element 1b, and a processing circuit element 2B. The processing circuit element 2B includes a first processing unit 3a, a second processing unit 3b, a digital comparison unit 4, a first output terminal 5a, a second output terminal 5b, a first power supply terminal 6a, a second power supply terminal 6b, and a synchronization unit 8.

[0056] The sensor system 100B of the third embodiment differs from the sensor system 100 of the first embodiment in that the processing circuit element 2B has a synchronization unit 8.

[0057] (3-2) Details The processing circuit element 2B has a synchronization unit 8 (see FIG. 4) that synchronizes the operation clock of the first processing unit 3a with the operation clock of the second processing unit 3b. As an example, the synchronization unit 8 generates a reference clock and outputs the generated reference clock to the first processing unit 3a and the second processing unit 3b. The first processing unit 3a uses the reference clock generated by the synchronization unit 8 as its operation clock, and the CV conversion circuit 31a, demodulation circuit 32a, and AD converter 33a operate in accordance with the reference clock. Similarly, the second processing unit 3b uses the reference clock generated by the synchronization unit 8 as its operation clock, and the CV conversion circuit 31b, demodulation circuit 32b, and AD converter 33b operate in accordance with the reference clock.

[0058] The above configuration has the advantage that the first processing unit 3a and the second processing unit 3b can be easily synchronized while the first processing area Ar1, which is the area where the first processing unit 3a performs processing, and the second processing area Ar2, which is the area where the second processing unit 3b performs processing, are separated.

[0059] The sensor system 100B according to the third embodiment may be realized by appropriately combining it with the configuration of the sensor system 100A according to the second embodiment.

[0060] (4) Fourth Embodiment (4-1) Overview A sensor system 100C according to a fourth embodiment will be described below with reference to Fig. 5 and Fig. 6. The same components as those in the first embodiment will be denoted by the same reference numerals and will not be described again.

[0061] 5, the sensor system 100C of the fourth embodiment includes a first sensor element 1a, a second sensor element 1b, and a processing circuit element 2C. The processing circuit element 2C includes a first processing unit 3a, a second processing unit 3b, a digital comparison unit 4A, a first output terminal 5a, a second output terminal 5b, a first power supply terminal 6a, a second power supply terminal 6b, a first low-pass filter 9a, and a second low-pass filter 9b.

[0062] The sensor system 100C of the fourth embodiment differs from the sensor system 100 of the first embodiment in that the processing circuit element 2C has a first low-pass filter 9a and a second low-pass filter 9b.

[0063] (4-2) Details As shown in FIG. 5, the processing circuit element 2C has a first low-pass filter 9a and a second low-pass filter 9b.

[0064] The first low-pass filter 9a is disposed between the first processing unit 3a and the first output terminal 5a. The first processing unit 3a, the first low-pass filter 9a, and the first output terminal 5a are connected in series in the order shown. In the fourth embodiment, the AD converter 33a of the first processing unit 3a converts the voltage output from the demodulation circuit 32a from an analog signal to a digital signal and outputs the converted signal to the first low-pass filter 9a as a first digital signal Si2a.

[0065] The first low-pass filter 9a passes frequency components of the first digital signal Si2a output from the first processing unit 3a that are lower in frequency than the first cutoff frequency fc1 (see FIG. 6). More specifically, the first low-pass filter 9a hardly attenuates frequency components of the first digital signal Si2a output from the first processing unit 3a that are lower in frequency than the first cutoff frequency fc1, and gradually reduces frequency components higher than the first cutoff frequency fc1.

[0066] 5, the second low-pass filter 9b is disposed between the second processing unit 3b and the second output terminal 5b. The second processing unit 3b, the second low-pass filter 9b, and the second output terminal 5b are connected in series in the order shown. In the fourth embodiment, the AD converter 33b of the second processing unit 3b converts the voltage output from the demodulation circuit 32b from an analog signal to a digital signal and outputs the converted signal to the second low-pass filter 9b as a second digital signal Si2b.

[0067] The second low-pass filter 9b passes components of the second digital signal Si2b output from the second processing unit 3b that are in a frequency band lower than the second cut-off frequency fc2 (see FIG. 6). More specifically, the second low-pass filter 9b barely attenuates components of the second digital signal Si2b output from the second processing unit 3b that are in a frequency band lower than the second cut-off frequency fc2, and gradually reduces components of the second digital signal Si2b that are in a frequency band higher than the second cut-off frequency fc2.

[0068] 6 illustrates an example in which the first low-pass filter 9 a or the second low-pass filter 9 b barely attenuates frequency components lower than the first cutoff frequency fc1 or the second cutoff frequency fc2, while gradually reducing frequency components higher than the first cutoff frequency fc1 or the second cutoff frequency fc2. Note that, although the first cutoff frequency fc1 and the second cutoff frequency fc2 are the same value in the illustrated example, they may be different values.

[0069] Next, system noise that may occur in the first digital signal Si2a and the second digital signal Si2b will be described.

[0070] It is considered that the system noise in the first digital signal Si2a and the second digital signal Si2b occurs in a frequency band that depends on the first resonant frequency of the first sensor element 1a and the second resonant frequency of the second sensor element 1b. More specifically, it is considered that the system noise in the first digital signal Si2a and the second digital signal Si2b occurs in a frequency band that corresponds to the difference between the first resonant frequency of the first sensor element 1a and the second resonant frequency of the second sensor element 1b.

[0071] More specifically, when the value of the first resonant frequency is f1 and the value of the second resonant frequency is f2, and the first resonant frequency f1 is higher than the second resonant frequency f2, it is considered that the system noise in the first digital signal Si2a and the second digital signal Si2b occurs in a frequency band corresponding to the value of f1-f2.

[0072] Graph X2 in Fig. 6 illustrates the first analog signal Si1a output from the first sensor element 1a resonating at the first resonant frequency f1. Similarly, graph X3 in Fig. 6 illustrates the second analog signal Si1b output from the second sensor element 1b resonating at the second resonant frequency f2. Graph X4 in Fig. 6 illustrates system noise occurring in the first digital signal Si2a and the second digital signal Si2b in a frequency band corresponding to the value of f1-f2.

[0073] Therefore, in the sensor system 100C of embodiment 4, when the value of the first cutoff frequency of the first low-pass filter 9a is fc1 and the value of the second cutoff frequency of the second low-pass filter 9b is fc2, as shown in Figure 6, all of f1 > f2, f1 - f2 > fc1, and f1 - f2 > fc2 are satisfied.

[0074] The above configuration has the advantage that the first low-pass filter 9a and the second low-pass filter 9b can remove system noise that may occur in the first digital signal Si2a and the second digital signal Si2b.

[0075] The first low-pass filter 9a passes components in a frequency band lower than the first cutoff frequency fc1 to generate a first digital signal Si3a (see FIG. 5), which is then output to the first output terminal 5a and the digital comparator 4A. Similarly, the second low-pass filter 9b passes components in a frequency band lower than the second cutoff frequency fc2 to generate a second digital signal Si3b (see FIG. 5), which is then output to the second output terminal 5b and the digital comparator 4A.

[0076] The digital comparator 4A of the fourth embodiment compares the first digital signal Si3a with the second digital signal Si3b. More specifically, the digital comparator 4A compares the first digital signal Si3a output from the first low-pass filter 9a with the second digital signal Si3b output from the second low-pass filter 9b.

[0077] The digital comparator 4A diagnoses whether or not there is an abnormality in the sensor system 100C based on the comparison result between the first digital signal Si3a and the second digital signal Si3b. More specifically, the digital comparator 4A diagnoses whether or not there is an abnormality in at least one of the first sensor element 1a, the second sensor element 1b, the first processing unit 3a, the second processing unit 3b, the first low-pass filter 9a, and the second low-pass filter 9b based on the comparison result between the first digital signal Si3a and the second digital signal Si3b. The digital comparator 4A performs the diagnosis using a preset threshold. If the difference between the voltage value of the first digital signal Si3a and the voltage value of the second digital signal Si3b is greater than the threshold, the digital comparator 4A diagnoses that there is an abnormality in at least one of the first sensor element 1a, the second sensor element 1b, the first processing unit 3a, the second processing unit 3b, the first low-pass filter 9a, and the second low-pass filter 9b.

[0078] Furthermore, the sensor system 100C according to the fourth embodiment may be realized by appropriately combining with at least one of the configurations of the sensor system 100A according to the second embodiment and the sensor system 100B according to the third embodiment.

[0079] (4-3) Modifications The following are modifications of the above-described embodiment 4. The following modifications may be implemented in appropriate combination.

[0080] When the value of the first resonant frequency is f1, the value of the second resonant frequency is f2, the value of the first cutoff frequency is fc1, and the value of the second cutoff frequency is fc2, as shown in FIG. 7, both of f1-f2>2·fc1 and f1-f2>2·fc2 may be further satisfied.

[0081] The above configuration has the advantage of being able to remove not only system noise that may occur in the first digital signal Si2a and the second digital signal Si2b, but also disturbance noise that may occur when a disturbance is input to the first sensor element 1a or the second sensor element 1b.

[0082] In the above-described fourth embodiment, the digital comparator 4A compares the first digital signal Si3a output from the first low-pass filter 9a with the second digital signal Si3b output from the second low-pass filter 9b. However, the digital comparator 4A may also compare the first digital signal Si2a output from the AD converter 33a of the first processing unit 3a with the second digital signal Si2b output from the AD converter 33b of the second processing unit 3b.

[0083] (Summary) A sensor system (100, 100A to 100C) of a first aspect includes a first sensor element (1a), a second sensor element (1b), and a processing circuit element (2, 2A to 2C). The first sensor element (1a) outputs a first analog signal (Si1a) in response to an applied inertial force. The second sensor element (1b) is an element different from the first sensor element (1a) and outputs a second analog signal (Si1b) in response to the inertial force. The processing circuit element (2, 2A to 2C) processes the first analog signal (Si1a) and the second analog signal (Si1b). The processing circuit element (2, 2A to 2C) includes a first processing unit (3a), a second processing unit (3b), a digital comparison unit (4, 4A), a first output terminal (5a), and a second output terminal (5b). The first processing unit (3a) generates a first digital signal (Si2a, Si3a) from a first analog signal (Si1a). The second processing unit (3b) generates a second digital signal (Si2b, Si3b) from a second analog signal (Si1b). The digital comparison unit (4, 4A) compares the first digital signal (Si2a, Si3a) with the second digital signal (Si2b, Si3b). The first output terminal (5a) outputs the first digital signal (Si2a, Si3a). The second output terminal (5b) outputs the second digital signal (Si2b, Si3b). In the processing circuit element (2, 2A-2C), a first processing area (Ar1) in which the first processing unit (3a) performs processing is separated from a second processing area (Ar2) in which the second processing unit (3b) performs processing.

[0084] This embodiment has the advantage of ensuring redundancy in the entire system.

[0085] In the sensor system (100A) of the second aspect, in the first aspect, the processing circuit element (2A) further includes an analog comparison section (7) that compares the first analog signal (Si1a) and the second analog signal (Si1b).

[0086] This aspect has the advantage of being able to distinguish whether there is an abnormality in either the first sensor element (1a) or the second sensor element (1b), or whether there is an abnormality in either the first processing unit (3a) or the second processing unit (3b).

[0087] In the sensor system (100B) of the third aspect, in the first or second aspect, the processing circuit element (2B) further has a synchronization unit (8) that synchronizes the operating clock of the first processing unit (3a) with the operating clock of the second processing unit (3b).

[0088] This aspect has the advantage that the first processing section (3a) and the second processing section (3b) can be easily synchronized while the first processing area (Ar1) and the second processing area (Ar2) are separated.

[0089] In the sensor system (100, 100A to 100C) of the fourth aspect, in any one of the first to third aspects, the processing circuit element (2, 2A to 2C) further has a first power supply terminal (6a) and a second power supply terminal (6b). The first power supply terminal (6a) is a terminal to which power supplied to the first processing unit (3a) is input. The second power supply terminal (6b) is a terminal to which power supplied to the second processing unit (3b) is input.

[0090] This embodiment has the advantage of ensuring redundancy against failure of either the first power supply terminal (6a) or the second power supply terminal (6b).

[0091] In the sensor system (100, 100A to 100C) of the fifth aspect, in any one of the first to fourth aspects, the first resonant frequency of the first sensor element (1a) is different from the second resonant frequency of the second sensor element (1b).

[0092] According to this aspect, there is an advantage that the influence of output fluctuations due to disturbances can be limited to one of the first sensor element (1a) and the second sensor element (1b).

[0093] In a sixth aspect of the sensor system (100C), the processing circuit element (2C) further includes a first low-pass filter (9a) and a second low-pass filter (9b). The first low-pass filter (9a) is disposed between the first processing unit (3a) and the first output terminal (5a) and passes components of the first digital signal (Si2a) in a frequency band lower than the first cutoff frequency. The second low-pass filter (9b) is disposed between the second processing unit (3b) and the second output terminal (5b) and passes components of the second digital signal (Si2b) in a frequency band lower than the second cutoff frequency. When the value of the first resonant frequency is f1, the value of the second resonant frequency is f2, the value of the first cutoff frequency is fc1, and the value of the second cutoff frequency is fc2, all of the following relationships are satisfied: f1 > f2, f1 - f2 > fc1, and f1 - f2 > fc2.

[0094] This embodiment has the advantage that it is possible to remove system noise that may occur in the first digital signal (Si2a) and the second digital signal (Si2b).

[0095] The sensor system (100C) of the seventh aspect is the sixth aspect, and further satisfies both f1-f2>2·fc1 and f1-f2>2·fc2.

[0096] This aspect has the advantage of being able to remove not only system noise but also disturbance noise that may occur when a disturbance is input to the first sensor element (1a) or the second sensor element (1b).

[0097] In the sensor system (100, 100A-100C) of an eighth aspect, in any one of the first to seventh aspects, the inertial force includes angular velocity. The first sensor element (1a) vibrates at a first drive frequency to output a first analog signal (Si1a) in accordance with the angular velocity. The second sensor element (1b) vibrates at a second drive frequency to output a second analog signal (Si1b) in accordance with the angular velocity. The first drive frequency is generated based on an operation clock of the first processing unit (3a). The second drive frequency is generated based on an operation clock of the second processing unit (3b).

[0098] This aspect has the advantage that the first drive frequency of the first sensor element (1a) and the second drive frequency of the second sensor element (1b) can be easily generated.

[0099] In the sensor system (100, 100A to 100C) of the ninth aspect, in any of the first to eighth aspects, the detection method of the first sensor element (1a) and the detection method of the second sensor element (1b) are the same.

[0100] This embodiment has the advantage that the accuracy of comparison by the digital comparison section (4, 4A) can be improved.

[0101] A sensor system (100, 100A to 100C) of a tenth aspect is any one of the first to ninth aspects, wherein the processing circuit element (2, 2A to 2C) is configured by a single integrated circuit.

[0102] This aspect has the advantage that the configuration of the sensor system (100, 100A to 100C) can be simplified.

[0103] 100, 100A to 100C Sensor system 1a First sensor element 1b Second sensor element 2, 2A to 2C Processing circuit element 3a First processing unit 3b Second processing unit 4, 4A Digital comparison unit 5a First output terminal 5b Second output terminal 6a First power supply terminal 6b Second power supply terminal 7 Analog comparison unit 8 Synchronization unit 9a First low-pass filter 9b Second low-pass filter Ar1 First processing region Ar2 Second processing region f1 First resonance frequency f2 Second resonance frequency fc1 First cutoff frequency fc2 Second cutoff frequency Si1a First analog signal Si1b Second analog signal Si2a, Si3a First digital signal Si2b, Si3b Second digital signal

Claims

1. A sensor system comprising: a first sensor element that outputs a first analog signal in response to an applied inertial force; a second sensor element that is an element different from the first sensor element and outputs a second analog signal in response to the inertial force; and a processing circuit element that processes the first analog signal and the second analog signal, wherein the processing circuit element has: a first processing unit that generates a first digital signal from the first analog signal; a second processing unit that generates a second digital signal from the second analog signal; a digital comparison unit that compares the first digital signal with the second digital signal; a first output terminal that outputs the first digital signal; and a second output terminal that outputs the second digital signal, wherein the processing circuit element is separated into a first processing area where the first processing unit performs processing and a second processing area where the second processing unit performs processing.

2. The sensor system according to claim 1, wherein the processing circuit element further comprises an analog comparator that compares the first analog signal with the second analog signal.

3. The sensor system according to claim 1, wherein the processing circuit element further comprises a synchronization section that synchronizes an operation clock of the first processing section and an operation clock of the second processing section.

4. The sensor system of claim 1, wherein the processing circuit element further has: a first power supply terminal to which power to be supplied to the first processing unit is input; and a second power supply terminal to which power to be supplied to the second processing unit is input.

5. The sensor system of claim 1, wherein a first resonant frequency of the first sensor element is different from a second resonant frequency of the second sensor element.

6. The sensor system of claim 5, wherein the processing circuit element further comprises: a first low-pass filter, arranged between the first processing unit and the first output terminal, for passing components of the first digital signal in a frequency band lower than a first cut-off frequency; and a second low-pass filter, arranged between the second processing unit and the second output terminal, for passing components of the second digital signal in a frequency band lower than a second cut-off frequency; wherein, when the value of the first resonant frequency is f1, the value of the second resonant frequency is f2, the value of the first cut-off frequency is fc1, and the value of the second cut-off frequency is fc2, all of f1>f2, f1-f2>fc1, and f1-f2>fc2 are satisfied.

7. The sensor system according to claim 6, further satisfying both f1-f1>2·fc1 and f1-f2>2·fc2.

8. The sensor system of claim 1, wherein the inertial force includes an angular velocity, the first sensor element vibrates at a first drive frequency to output the first analog signal in response to the angular velocity, and the second sensor element vibrates at a second drive frequency to output the second analog signal in response to the angular velocity, the first drive frequency being generated based on an operation clock of the first processing unit, and the second drive frequency being generated based on an operation clock of the second processing unit.

9. The sensor system according to claim 1, wherein the detection method of the first sensor element and the detection method of the second sensor element are the same.

10. The sensor system of claim 1, wherein the processing circuit element is configured as a single integrated circuit.

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