Method for improving polar code performance using local pre-transform

Abstract

Provided is an encoder using local pre-transform. The encoder in an embodiment comprises: a bit distribution unit configured to generate a specific information signal and remaining information signals by dividing an input signal; a pre-transform unit configured to generate connection signals by performing local pre-transform in parallel on the basis of each of the remaining information signals; and a polar transform unit configured to generate an output signal by performing polar transform on the basis of the specific information signal and the connection signals.

Description

A method for improving polar code performance using local pretransformation

[0001] The present disclosure relates to channel coding, and more particularly, to a method for improving polar code performance using local pre-transformation and a system using the same.

[0002] This research was supported by the Samsung Future Technology Promotion Project (Project Number: SRFC-IT2302-04).

[0003] There is a persistent demand for ultra-reliable low-latency communication (URLLC) in next-generation wireless communication systems. URLLC achieves ultra-high-speed data packet transmission within a very short time, such as 1 ms, while achieving a packet error rate (PER) of 10. -5 The focus is on ensuring reliability below 100 MHz. To achieve this, the development of cutting-edge channel coding techniques capable of achieving optimal performance within the finite blocklength (FBL) range is crucial.

[0004] Polar codes are a type of channel code that achieves channel capacity over an infinite blocklength (IBL) range. When constructing a code for pre-transformation using polar codes, a performance degradation occurs in decoders based on channel polarization, which is commonly used in polar codes.

[0005] It is important to construct a pre-transform of polar codes suitable for a channel polarization-based decoder.

[0006] An encoder using local pre-transformation according to the technical idea of ​​the present invention is disclosed to achieve the above technical task.

[0007] The encoder may include a bit splitting unit configured to split an input signal to generate a specific information signal and remaining information signals. The encoder may include a pre-transform unit configured to generate connection signals by performing a local pre-transform in parallel based on each of the remaining information signals. The encoder may include a polar transform unit configured to generate an output signal by performing a polar transform based on the specific information signal and the connection signals.

[0008] In one embodiment, the polar conversion unit may be configured to perform polar conversion based on non-consecutive information bits of the specific information signal and the connection signals, and obtain the output signal from the result of the polar conversion.

[0009] In one embodiment, the number of consecutive information bits of the connection signals may be limited based on the size of each connection signal.

[0010] In one embodiment, the pre-transformation unit includes local pre-transformation units, and each of the local pre-transformation units can be configured to generate a connection signal by performing a local pre-transformation using an upper-triangular matrix based on a corresponding remaining information signal.

[0011] In one embodiment, the pre-conversion unit may include local pre-conversion units, each of which may be configured to generate a pre-conversion input signal by adding one or more frozen bits to a corresponding remaining information signal, and to generate a connection signal by performing local pre-conversion on the pre-conversion input signal.

[0012] In one embodiment, the concatenated signal may include non-contiguous information bits as one or more freeze bits are added to the corresponding remaining information signal.

[0013] In one embodiment, each of the local pre-transformation units may be configured to assign the corresponding remaining information signal to one or more elements of the pre-transformation input signal indicated by a corresponding information index set, and to assign the one or more frozen bits to one or more remaining elements of the pre-transformation input signal.

[0014] In one embodiment, the polar transform unit may be configured to generate a polar transform input signal including the specific information signal, the connection signals, and one or more freeze bits, and to perform polar transformation on the polar transform input signal to generate the output signal.

[0015] In one embodiment, the polar transformation unit may be configured to assign the specific information signal to one or more elements of the polar transformation input signal indicated by a corresponding information index set, assign a corresponding connection signal to one or more elements of the polar transformation input signal indicated by a connection index set, and assign one or more freeze bits to one or more remaining elements of the polar transformation input signal.

[0016] In one embodiment, the information index set and the connection index set may include, among all indices of the polar transformation input signal, indices having high channel reliability and a corresponding row-weight of the polar transformation matrix greater than or equal to a predetermined threshold value.

[0017] An encoding method using local pre-transformation according to the technical idea of ​​the present invention to achieve the above technical task is disclosed.

[0018] The encoding method may include a step of dividing an input signal to generate a specific information signal and remaining information signals. The encoding method may include a step of generating connected signals by performing local pre-transformation in parallel based on each of the remaining information signals. The encoding method may include a step of generating an output signal by performing polar transformation based on the specific information signal and the connected signals.

[0019] In one embodiment, the step of generating the output signal may include the step of performing polar transformation based on the discontinuous information bits of the specific information signal and the connection signals, and the step of obtaining the output signal from the result of the polar transformation.

[0020] In one embodiment, the number of consecutive information bits of the connection signals may be limited based on the size of each connection signal.

[0021] In one embodiment, the step of generating the connection signals may include the step of obtaining the connection signals by performing local pre-transformation using an upper-triangular matrix in parallel based on each of the remaining information signals.

[0022] In one embodiment, the step of generating the connection signals may include the step of generating the pre-conversion input signals by adding one or more freeze bits to each of the remaining information signals, and the step of generating the connection signals by performing local pre-conversion in parallel on each of the pre-conversion input signals.

[0023] In one embodiment, each of the connection signals may include non-contiguous information bits, as one or more freeze bits are added to each of the remaining information signals.

[0024] In one embodiment, the step of generating the pre-transform input signals may include the step of assigning a corresponding remaining information signal to one or more elements of the pre-transform input signal indicated by the corresponding information index set, and the step of assigning one or more freeze bits to one or more remaining elements of the pre-transform input signal.

[0025] In one embodiment, the step of generating the output signal may include the step of generating a polar transformation input signal including the specific information signal, the connection signals, and one or more freeze bits, and the step of performing a polar transformation on the polar transformation input signal, thereby generating the output signal.

[0026] In one embodiment, the step of generating the polar transformation input signal may include the step of assigning the specific information signal to one or more elements of the polar transformation input signal indicated by a corresponding information index set, the step of assigning a corresponding connection signal to one or more elements of the polar transformation input signal indicated by a connection index set, and the step of assigning the one or more freeze bits to one or more remaining elements of the polar transformation input signal.

[0027] A decoding method according to the technical idea of ​​the present invention is disclosed to achieve the above technical task.

[0028] The above decoding method may include a step of receiving an input signal, a step of sequentially searching decoding paths for the input signal, and a step of selecting a final decoding path among the decoding paths, thereby generating an output signal corresponding to the input signal.

[0029] In one embodiment, the number of decoding paths may not exceed a predetermined number.

[0030] In one embodiment, the input signal may correspond to a codeword encoded based on parallel local pre-transformation and polar transformation.

[0031] According to embodiments provided by the present disclosure, low-complexity decoding is possible by utilizing the channel polarization phenomenon while improving the distance characteristics of polar codes through local pre-transformation in a finite block length.

[0032] In addition, through the embodiments provided by the present disclosure, a basic technology suitable for low-latency and high-reliability communication required in a next-generation communication system can be provided.

[0033] Additionally, according to embodiments provided by the present disclosure, a method for designing a pre-transform polar code suitable for low-complexity decoding using channel polarization (as a non-limiting example, successive cancellation (SC) type decoding) can be provided.

[0034] Furthermore, the embodiments provided by the present disclosure can improve the distance characteristics of codewords by locally applying pre-transformation using an upper-triangular matrix to carefully selected groups of bits. Furthermore, the correct decoding path can be prevented from being discarded in SC-type decoding.

[0035] The effects that can be obtained from the exemplary embodiments of the present disclosure are not limited to the effects mentioned above, and other effects that are not mentioned can be clearly derived and understood by a person having ordinary skill in the technical field to which the exemplary embodiments of the present disclosure belong, from the description of the exemplary embodiments of the present disclosure below. In other words, unintended effects that result from practicing the exemplary embodiments of the present disclosure can also be derived by a person having ordinary skill in the technical field from the exemplary embodiments of the present disclosure.

[0036] FIG. 1 illustrates a channel coding system according to one embodiment.

[0037] Figure 2 illustrates an encoder structure according to one embodiment.

[0038] Figure 3 illustrates a decoding process according to one embodiment.

[0039] The advantages and features of the disclosed embodiments, and the methods for achieving them, will become clearer with reference to the embodiments described below, along with the accompanying drawings. However, the present disclosure is not limited to the embodiments disclosed below and may be implemented in various different forms. These embodiments are provided solely to ensure the completeness of the disclosure and to fully inform those skilled in the art of the present disclosure of the scope of the invention.

[0040] It will be understood that each block of the flowchart can be performed by computer program instructions. These computer program instructions can be installed in a processor of a general-purpose computer, special-purpose computer, or other programmable data processing equipment, so that the instructions executed by the processor of the computer or other programmable data processing equipment create means for performing the functions described in the block(s). These computer program instructions can also be stored in a computer-available or computer-readable memory that can be directed to a computer or other programmable data processing equipment to implement functions in a specific manner, so that the instructions stored in the computer-available or computer-readable memory can produce an article of manufacture that includes instruction means for performing the functions described in the block(s). The computer program instructions can also be installed in a computer or other programmable data processing equipment, so that a series of operational steps are performed on the computer or other programmable data processing equipment to create a computer-executable process, so that the instructions that execute on the computer or other programmable data processing equipment can provide steps for performing the functions described in the block(s). Additionally, each block may represent a module, segment, or portion of code that contains one or more executable instructions for performing a specified logical function(s).

[0041] The terms used in this specification will be briefly explained, and the disclosed embodiments will be described in detail.

[0042] The terms used in this specification have been selected from widely used, current terms, taking into account the functions of the present disclosure. However, these terms may vary depending on the intentions of engineers working in the relevant fields, precedents, the emergence of new technologies, etc. Furthermore, in certain cases, terms may be arbitrarily selected by the applicant, and in such cases, their meanings will be described in detail in the relevant description of the invention. Therefore, the terms used in this disclosure should not be defined simply as names, but rather based on the meanings of the terms and the overall content of the present disclosure.

[0043] For the convenience of explanation in this disclosure, we introduce a subscript notation to represent vector indexing. For example, given a vector u = [1,3,2,4,5] and a set A = {2,4} for indexing, in vector indexing using the subscript notation, u A =[u2,u4]=[3,4].

[0044] In this disclosure, for the sake of brevity, a <b에 있어서,u a:b =[u a ,u a+1 ,…,u b ] is decided.

[0045] In this disclosure, the expression “at least one of a, b or c” may refer to “a”, “b”, “c”, “a and b”, “a and c”, “b and c”, “all of a, b and c”, or variations thereof.

[0046] In this specification, singular expressions include plural expressions unless the context clearly specifies that they are singular.

[0047] When a part of a specification is said to "include" a component, this does not mean that it excludes other components, but rather that it may include other components, unless otherwise stated.

[0048] Also, the term "part" used in the specification means a software or hardware component, and the "part" performs certain functions. However, the "part" is not limited to software or hardware. The "part" may be configured to reside on an addressable storage medium and may be configured to execute one or more processors. Thus, by way of example, the "part" includes components such as software components, object-oriented software components, class components, and task components, as well as processes, functions, attributes, procedures, subroutines, segments of program code, drivers, firmware, microcode, circuits, data, databases, data structures, tables, arrays, and variables. The functionality provided within the components and "parts" may be combined into a smaller number of components and "parts" or further separated into additional components and "parts."

[0049] The term "processor" should be interpreted broadly to include general-purpose processors, central processing units (CPUs), microprocessors, digital signal processors (DSPs), controllers, microcontrollers, state machines, and the like. In some environments, "processor" may also refer to an application-specific integrated circuit (ASIC), a programmable logic device (PLD), a field-programmable gate array (FPGA), and the like. The term "processor" may also refer to a combination of processing devices, such as, for example, a combination of a DSP and a microprocessor, a combination of a plurality of microprocessors, a combination of one or more microprocessors in conjunction with a DSP core, or any other such configuration.

[0050] The term "memory" should be interpreted broadly to include any electronic component capable of storing electronic information. The term memory may also refer to various types of processor-readable media, such as random access memory (RAM), read-only memory (ROM), non-volatile random access memory (NVRAM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable PROM (EEPROM), flash memory, magnetic or optical data storage, registers, and the like. Memory is said to be in electronic communication with the processor if the processor can read information from and / or write information to the memory. Memory integrated in a processor is in electronic communication with the processor.

[0051] Various embodiments of the present disclosure are described with reference to the accompanying drawings.

[0052] Figure 1 illustrates a channel encoding system (100) according to one embodiment.

[0053] In the channel coding system (100), a transmission message (m) and a reception message ( ) is the same. To this end, the transmitter (110) performs channel encoding to transmit the transmission message (m) more robustly, generates a codeword (x), and transmits the codeword through the channel (120, W:X→Y). In addition, the receiver (130) receives the codeword (y) mixed with noise and performs channel decoding to generate the reception message ( ) can be restored.

[0054] The encoder (111) can encode a K-bit transmission message (m) to generate an N-bit codeword (x). The length of the codeword (x) can be increased by inserting appropriate parity bits into the transmission message (m). The parity bits are used by the receiver (130) to generate a received message ( ) to help restore it smoothly.

[0055] The transmission message (m) can be expressed as in mathematical expression 1.

[0056]

[0057] Here, for k∈K, m k is an independent and uniformly distributed random variable on {0, 1}. {0,1} K is from 0 to 2 K A set whose elements are binary numbers up to -1. For example, {0,1} 2 ={00, 01, 10, 11}.

[0058] The codeword (x) can be expressed as in mathematical expression 2.

[0059]

[0060] The code rate is defined as the ratio of transmitted information bits to the code block length. In one embodiment, the code rate is K / N.

[0061] The codeword (x) can pass through a channel (120). The type of the channel (120) can be various. For example, the channel (120) can be a channel for wireless communication, wired communication, communication between a base station and an end system, communication of an electronic device, or communication of a chip (or chiplet), but is not limited thereto. For example, the channel (120) can be a memoryless channel (MC), a discrete memoryless channel (DMC), or a binary-discrete memoryless channel (B-DMC), but is not limited thereto.

[0062] The output sequence (y) of the channel (120) (i.e., the codeword passing through the channel) can be expressed as in mathematical expression 3.

[0063]

[0064] The decoder (131) decodes the codeword (y) to produce a K-bit received message ( ) can be generated. The decoder (131) can be designed to minimize the block error rate (BLER). Here, the block error rate can mean the ratio of the number of error blocks to the total number of transmitted blocks.

[0065] For the channel (120, W:X→Y), the channel capacity (I(W)) and the Bhattacharyya parameter (Z(W)) can be used as channel parameters related to the block error rate.

[0066] If the channel (120, W:X→Y) is B-DMC, the channel capacity (I(W)) can be expressed as in mathematical expression 4.

[0067]

[0068] Additionally, the Bhattacharya parameter (Z(W)) can be expressed as in mathematical expression 5.

[0069]

[0070] Here, X represents a binary alphabet and Y represents an arbitrary alphabet. W(y|x) represents the transition probability of channel W for input x and output y.

[0071] The block error rate is related to channel reliability. Higher channel reliability reduces the block error rate, while lower channel reliability can increase the block error rate. The channel capacity (I(W)) is a parameter related to the maximum transmission amount that can be transmitted with high reliability on the channel. A higher channel capacity (I(W)) can lower the block error rate and thus increase channel reliability. In addition, the Bhattacharya parameter (Z(W)) is a parameter related to the error probability of the channel. A lower Bhattacharya parameter (Z(W)) can lower the block error rate and thus increase channel reliability.

[0072] Minimum distance (d) of linear block code (C) min , minimum distance) can be expressed as in mathematical equation 6.

[0073]

[0074] Here, , which means the number of 1s in vector x.

[0075] The weight spectrum (A(C)) of the linear block code (C) can be expressed as in mathematical expression 7.

[0076]

[0077] Here, am.

[0078] Minimum distance (d) min) and the number of minimum-weight codewords (A d min ) plays an important role in determining the performance of ML (Maximum Likelihood) decoding. The minimum distance (d min ) while simultaneously increasing the number of minimum-weight codewords (A d min ) can be used to improve code performance.

[0079] Figure 2 illustrates an encoder structure according to one embodiment.

[0080] The encoder may include a bit distribution unit (210), a pre-conversion unit (220), and a polar conversion unit (230). The bit distribution unit (210) divides the input signal (m) into a specific information signal (m0) and the remaining information signals (m1,…,m L ) can be generated. The pre-conversion unit (220) generates the remaining information signals (m1,…,m L ) by performing local pre-transformation in parallel based on each of the connected signals (u1,…,u L ) can be generated. The polar conversion unit (230) generates a specific information signal (m0) and connection signals (u1,…,u L ) can be used to generate an output signal (x).

[0081] The input signal (m) of the encoder may be a transmission message (m). The input signal (m) is an information vector and may contain K information bits.

[0082] The output signal (x) of the encoder can be a codeword (x). The length of the output signal (x) can be N.

[0083] The bit distribution unit (210) divides the input signal (m) into L+1 information signals (m0, m1,…, m L) can be split into. Among L+1 information signals, one information signal is referred to as a specific information signal (m0), and the remaining L information signals are referred to as the remaining information signals (m1,…,m L ) can be referred to as a specific information signal (m0) and the remaining information signals (m1,…,m L ) each may contain one or more bits of information.

[0084] For l∈{0,1,…,L}, the lth information signal (m l ) has a length of K l can be expressed as . That is, the lth information signal (m l ) is K l It can be a vector with elements of .

[0085] The lengths of the information signals can vary. For example, |m1|=2, |m2|=2, |m3|=4.

[0086] The pre-conversion unit (220) may include local pre-conversion units corresponding to the number of divisions of the input signal (m) by the bit distribution unit (210). In one embodiment, the pre-conversion unit (220) may include L local pre-conversion units. The L remaining information signals (m1,…,m L ) can be transmitted to each of L local pre-transformation units. In Fig. 2, three local pre-transformation units (221-223) are illustrated for concise explanation.

[0087] The input signal of the lth local pre-conversion unit (222), the pre-conversion input signal (v l ) can be expressed as in mathematical expression 8.

[0088]

[0089] Here, I l represents the lth information index set. The lth information index set (I l ) The number of elements is |I1|=K l It is. F lrepresents the lth set of frozen indices. v l,Il is the lth pre-conversion input signal (v l ) in the lth information index set (I l ) are one or more elements that v points to. l,Fl is the lth pre-conversion input signal (v l ) in the lth frozen index set (F l ) are one or more elements that are pointed to.

[0090] The remaining information signal (m l ) is the pre-conversion input signal (v l ) can form part of the pre-conversion input signal (v l ) of the corresponding information index set (I l ) points to one or more elements (v l,Il ), the corresponding remaining information signal (m l ) can be assigned. That is, v l,Il In m l This can be allocated and can be expressed as in mathematical expression 9.

[0091]

[0092] One or more frozen bits (i.e., values ​​known to both the encoder and decoder) are added to the pre-converted input signal (v l ) can form part of the pre-conversion input signal (v l ) one or more remaining elements (v l,Fl ) can be assigned one or more freeze bits. In other words, the pre-conversion input signal (v l ) of the corresponding frozen index set (F l ) points to one or more elements (v l,Fl ), freeze bits may be allocated. In one embodiment, v l,Fl A zero vector can be assigned to it, which can be expressed as in mathematical expression 10.

[0093]

[0094] For l∈{1,…,L}, the lth pre-transformed input signal (v l ) is the set of indices of [N l ], [N l ] can be expressed as in mathematical formula 11.

[0095]

[0096] Local pre-transformation units (221-223) are pre-transformation input signals (v1,…,v L ) can perform local pre-transformation in parallel. In other words, the first local pre-transformation unit (221) performs local pre-transformation on the first pre-transformation input signal (v1), and the lth local pre-transformation unit (222) performs local pre-transformation on the lth pre-transformation input signal (v l ) performs local pre-transformation, and the L-th local pre-transformation unit (223) performs local pre-transformation on the L-th pre-transformation input signal (v L ) can be used to perform local pre-transformations, and each local pre-transformation can be performed in parallel.

[0097] Each of the local pre-transformation units (221-223) can perform a local pre-transformation by performing a transformation using a pre-transformation matrix. The pre-transformation input signal (v) of the lth local pre-transformation unit (222) l ) and the corresponding pre-transformation matrix (T l ) is the output signal of the lth local pre-transformation unit (222), which is the connection signal (u l ) can be generated. Connection signal (u l ) can be expressed as in mathematical expression 12.

[0098]

[0099] Here, v l Silver 1xN l is a vector, and T l Silver N l xN l is a matrix, u l is a 1xN1 vector.

[0100] In one embodiment, the local pretransformation units (221-223) may use an upper-triangular matrix as the pretransformation matrix. For example, the pretransformation matrix (T) of the lth local pretransformation unit (222) l ) may be an upper-triangular matrix. Since the local pretransform units (221-223) use an upper-triangular matrix as a pretransform matrix, the weight spectrum may be improved. For example, the number of minimum-weight codewords may be reduced compared to when the local pretransform is not used.

[0101] In one embodiment, the pre-transformation matrix of the local pre-transformation units (221-223) may be a binary matrix. That is, the pre-transformation matrix of the local pre-transformation units (221-223) may be a matrix having 0 or 1 as elements.

[0102] In one embodiment, the local pre-transformation units (221-223) may use the transpose matrix of the polar transformation matrix as the pre-transformation matrix. For example, the pre-transformation matrix (T) of the lth local pre-transformation unit (222) l ) can be the transpose matrix of the polar transformation matrix. In this case, mathematical expression 12 can be expressed as mathematical expression 13.

[0103]

[0104] Here, Silver N l xN l The polar transformation matrix G Nl represents the transpose matrix of .

[0105] In one embodiment, the local pre-transformation units (221-223) may use different pre-transformation matrices. The local pre-transformation units (221-223) may use pre-transformation matrices of different sizes. For example, the pre-transformation matrix of the first local pre-transformation unit (221) and the pre-transformation matrix of the second local pre-transformation unit may have different sizes. The local pre-transformation units (221-223) may use pre-transformation matrices having different elements. For example, the value of the element of the ith row and the jth column of the pre-transformation matrix (T1) of the first local pre-transformation unit (221) and the value of the element of the ith row and the jth column of the pre-transformation matrix of the second local pre-transformation unit may be different.

[0106] The polar conversion input signal (u0), which is the input signal of the polar conversion unit (230), can be expressed as in mathematical expression 14.

[0107]

[0108] Here, for l∈{1,…,L}, A l represents the lth set of connected indices.

[0109] A specific information signal (m0) can be assigned to one or more elements of a polar transformation input signal (u0) pointed to by a set of information indices (I0) of a specific information signal (m0). That is, u 0,I0 m0 can be assigned, which can be expressed as in mathematical expression 15.

[0110]

[0111] For l∈{1,…,L}, the lth set of connected indices (A l ) is connected to one or more elements of the polar transformation input signal (u0) pointed to by the lth connection signal (u l ) can be assigned. That is, u 0,Al In u l This can be allocated and can be expressed as in mathematical expression 16.

[0112]

[0113] One or more frozen bits may be assigned to one or more remaining elements of the polar transformation input signal (u0). That is, one or more frozen bits may be assigned to one or more remaining elements of the polar transformation input signal (u0) indicated by the frozen index set (F0). This can be expressed as in mathematical expression 17.

[0114]

[0115] If the index set of the polar transformation input signal (u0) is [N], [N] can be expressed as in mathematical expression 18.

[0116]

[0117] Pre-transformation matrices (T1,…,T L ), the polar transformation input signal (u0) can be expressed as in mathematical expression 19.

[0118]

[0119] Here, the sparse pretransformation matrix (T) is the pretransformation matrix (T1,…,T L ) is a block diagonal matrix located on the main diagonal block. I is the identity matrix.

[0120] The polar conversion unit (230) can generate an output signal (x) by performing polar conversion on a polar conversion input signal (u0). This can be expressed as in mathematical expression 20.

[0121]

[0122] Here, the polar transformation matrix And, am.

[0123] Consider two types of errors that can cause decoding errors in a successive cancellation list (SCL) decoder. The first error is that the correct decoding path is not included in the final list. The second error is that the transmitted codeword is present in the final list, but another codeword, closer to the received signal, is closer to the received message.

[0124] The encoder of the present disclosure can improve the weight spectrum of codewords (i.e., reduce the second error) while minimizing the loss of probability that the final list contains the correct decoding path by using parallel local pre-transformation.

[0125] Specifically, the encoder of the present disclosure can reduce the first error by preventing the use of non-consecutive unreliable information bits through parallel local pre-transformation. Since the pre-transformation input signal of each local pre-transformation unit includes one or more frozen bits, the concatenation signal of each local pre-transformation unit includes non-consecutive information bits. Accordingly, the polar transformation unit (230) generates concatenation signals (u1,…,u L ) can perform polar transformation based on the discontinuous information bits. Specifically, the pre-transformation input signal of each local pre-transformation unit includes one or more frozen bits, and the connection signal of each local pre-transformation unit is assigned to the polar transformation input signal based on the corresponding connection index set, so that the connection signals (u1,…,u L ) can be limited based on the size of each set of connection indices, i.e., the size of each connection signal. For example, connection signals (u1,…,u L ) is the number of consecutive information bits in each set of connection indices (A) for l∈{1,…,L}. l ) size |A l |(=Nl ) may be limited.

[0126] Furthermore, the encoder of the present disclosure can reduce the second error by appropriately swapping information bits and frozen bits through parallel local pre-transformation, and by using information bits with relatively low channel reliability as connection signals, thereby reducing the number of minimum-weight codewords. In this regard, a method for selecting an information index set and a connection index set is described.

[0127] First, the lth pre-conversion input signal (v l ) for the lth information index set (I l ) is described. The described method can be performed by at least one processor.

[0128] Pre-conversion input signal (v l ) size is N l =2 b When b is smaller, it is suitable for a small-sized SCL decoder, and when b is larger, the distance characteristics of the codeword can be improved. Based on this, by selecting an appropriate b, the pre-conversion input signal (v l ) size (N l ) can be selected. In one embodiment, a set of information indices (I l ) is I l ={1,2,…,K l} can be set. Here, K l is a design parameter. For example, K l =N l -1 or K l =N l -2 can be set as the lth information index set (I l ) can be determined in various other ways.

[0129] Next, a set of information indices (I0) and a set of connection indices (A0) for the polar transformation input signal (u0) (where, ) is described. The described method can be performed by at least one processor.

[0130] For a concise explanation, the ordered index set (R) is defined as in Equation 21.

[0131]

[0132] Here, n p is the number of bits required for local pre-transformation, am.

[0133] The sorted set of indices (R) is such that for all i∈R, wt(g i )≥d min The first condition of or is a sequence that satisfies the second condition. In the first condition, g i is the polar transformation matrix (G N ) represents the i-th row of the polar transformation matrix (G N ) the i-th row-weight (wt(g) i )) is a predetermined threshold (d min ) means the above conditions. The second condition is a channel that is synthesized and separated by polar transformation. This means that the order in which the reliability is sorted in descending order is not reversed.

[0134] i-th bit channel can be defined as in mathematical formula 22.

[0135]

[0136] Here, W N (y|x) denotes N copies of B-DMCs W(y|x), i∈[N].

[0137] The number of parity bits (ρ) can be determined based on mathematical expression 23.

[0138]

[0139] By selecting the first K+ρ elements with high channel reliability from the sorted index set (R), an auxiliary set ( , auxiliary set) can be created. Auxiliary set( ) can be assigned a predetermined number of elements, i.e., |m0|, in the order of highest channel reliability to the information index set (I0). And, the auxiliary set ( ) can be assigned to the set of linked indices (A0) (i.e., A0 = \I0). Finally, each set of connection indices (A l ) can be set to satisfy the condition of mathematical expression 24.

[0140]

[0141] The local pre-transformations of the pre-transformation unit (220) can be classified into a first type of local pre-transformation and a second type of local pre-transformation. The first type of local pre-transformation may correspond to the aforementioned local pre-transformation. The second type of local pre-transformation may correspond to a transformation that merges information bits and succeeding frozen bits. For example, the first local pre-transformation unit (221) may perform the first type of local pre-transformation, and the Lth local pre-transformation unit (223) may perform the second type of local pre-transformation.

[0142] In performing L local pre-transformations in parallel, it is assumed that the pre-transformation unit (220) performs L1 local pre-transformations of the first type and L2 local pre-transformations of the second type (i.e., L=L1+L2).

[0143] First, a set of information indices (I0) and a set of connection indices (A) for the first type of local pretransformation l )(where, l∈[L1]). The described method can be performed by at least one processor.

[0144] A set of information indices (I0) and a set of connection indices (A) for the first type of local pretransformation l ) can be substantially the same as the method of selecting the information index set (I0) and the connection index set (A0) described above.

[0145] The sorted index set (R) is defined as in mathematical expression 25.

[0146]

[0147]

[0148]

[0149] The sorted index set (R) is partitioned according to the row-weight of the polar transformation matrix, as in Equation 26.

[0150]

[0151]

[0152] Here, B w Among (R), is the least reliable index, is the most reliable index. g N,i is the i-th row of the NxN polar transformation matrix.

[0153] When said, B wmin Size n filled with indices contained in (R) p Auxiliary set of ( ) can be generated. Specifically, the index corresponding to the least reliable bit is set as an auxiliary set ( ) can be included in the auxiliary set ( ) has a number of elements of n pIf it is smaller, then the next largest row weight index set B 2wmin By repeating the process of using (R), the auxiliary set ( ) can be created.

[0154] Auxiliary set ( ), the information index set (I0) can be generated as in mathematical expression 27.

[0155]

[0156] After that, the auxiliary set ( ) can be rearranged in a naturally ascending sequence. This can be expressed as in mathematical expression 28.

[0157]

[0158] Rearranged auxiliary set ( ), the lth set of connected indices (A l ) can be generated as in mathematical expression 29.

[0159]

[0160] Additionally, the lth information index set (I l ) can be generated as in mathematical formula 30.

[0161]

[0162]

[0163] Next, a set of information indices (I0) and a set of connection indices (A) for the second type of local pretransformation l )(where, l∈[L2]). The described method can be performed by at least one processor.

[0164] Given a pair of an index i belonging to an information index set and an index j belonging to a subsequent frozen index set, the pre-transformation unit (220) can perform a second type of local pre-transformation on the elements indicated by the pair. The second type of local pre-transformation includes a pre-transformation matrix can be used. That is, the second type of local pre-transformation can correspond to a row-merging operation.

[0165] The pair (i,j) may be chosen for the purpose of merging information bits and subsequent frozen bits to reduce the number of minimum-weight codewords.

[0166] The notation is defined as in mathematical expressions 31 and 32.

[0167]

[0168]

[0169] Also, the lth pair (M l ) is expressed as in mathematical expression 33.

[0170]

[0171] Here, M l,1 is the information index, M l,2 represents a merged frozen index.

[0172] Information index i∈B wmin (I0) and a predetermined merged pair M l Given this, the candidate (Pi) of the merged frozen index can be expressed as in mathematical expression 34.

[0173]

[0174] This means that all subsequent frozen indices that do not belong to the first type of local pre-transformation can be candidates (Pi) for the merged frozen index.

[0175] Information index i∈B wmin For (I0), if Equation 35 is satisfied, then j∈P j can be selected as a merged frozen index.

[0176]

[0177] Next, information index i∈B wmin (I0)\(∪ l M l,1 ), if equation 36 is satisfied, then j∈P j can be selected as a merged frozen index.

[0178]

[0179] Finally, j∈P satisfying Equation 37 j can be selected as a merged frozen index.

[0180]

[0181] By performing a second type of local pre-transformation on the pair (i, j) determined in this way, the number of minimum-weight codewords can be reduced.

[0182] As described above, the first and second errors can be improved as the information index set and the connection index set are determined. Specifically, by considering the channel reliability and the minimum-weight rows, the information index set and the connection index set are determined so that the information bits and the frozen bits are properly exchanged, thereby minimizing the loss in the probability that the correct decoding path is included in the final list (i.e., reducing the first error) and simultaneously reducing the number of minimum-weight codewords, thereby improving the weight spectrum of the codeword (i.e., reducing the second error).

[0183] Figure 3 illustrates a decoding process according to one embodiment.

[0184] When a codeword encoded by a transmitter (110 in Fig. 1) is received by a receiver (130 in Fig. 1) through a channel, the receiver converts a received signal (y) into a received message ( ) is performed to recover the polarity. The decoder (112 in Fig. 1) can sequentially decode the input signal (u0) of the polarity transformation from the first element to the last element by utilizing the channel polarization obtained by the polarity transformation.

[0185] The decoder sequentially searches decoding paths for the received signal (y) and selects the final decoding path among the decoding paths, thereby decoding the received message (y) corresponding to the received signal (y). ) can be generated. Here, the number of decoding paths may not exceed a predetermined number.

[0186] The decoder may be an SCL decoder.

[0187] Since the decoder performs the same process for each element, for simplicity, we describe the process by which the decoder decodes the ith element.

[0188] When the decoder decodes the i-th element, it combines the received signal (y) with the previously decoded elements Decoding is performed by referring to . It is assumed that the decoder has at most S hypotheses about previously decoded elements. The lth hypothesis Let us denote it as , and call it the decoding path.

[0189] In step S301, the decoder receives a codeword (y) through a channel.

[0190] In step S302, the decoder performs decoding starting from the first element (i←1) of the codeword (y).

[0191] In step S303, the decoder checks whether the i-th element for each candidate is a frozen bit.

[0192] If it is determined to be correct (YES) in step S303, proceed to step S311 to determine the i-th element ( ) is shared with the encoder. ) is allocated. Then, the process proceeds to step S309 to perform decoding of the i+1th element.

[0193] If it is determined as NO in step S303, the process proceeds to step S304, copies the current decoding path, and generates a decoding path by assuming the i-th element to be 0 and 1.

[0194] Next, the decoder performs a process of reducing the decoding path.

[0195] In step S305, the decoder determines whether i is a set of connected indices (A l ) belongs to the set of connection indices (A l ) determines whether it corresponds to the maximum value among the elements.

[0196] If it is determined to be correct (YES) in step S305, the set of connection indices (A l ) corresponding to the local pretransformation (T j ) is reversely transformed to check whether the current path is a valid path. Specifically, in step S306, the local pretransformation (T j ) corresponding to the output of the component ( ) to inversely transform the input component ( ) is obtained, and the freezing bits of the input components in step S308 ( ) checks whether it matches a predetermined value.

[0197] If it is determined to be correct (YES) in step S308, the process proceeds to step S309 to decode the next element.

[0198] If it is determined as NO in step S308, the process proceeds to step S310, and the remaining decoding paths are removed from the hypothesis except for the S most probable paths, and the process proceeds to step S309 to decode the next element.

[0199] If it is determined as not (NO) in step S305, the process proceeds to step S307 to determine whether there are S decoding paths. If there are more than S, the process proceeds to step S310 to exclude the S most probable decoding paths from the hypothesis and proceeds to step S309 to decode the next element. If there are not more than S, the process proceeds to S309 to decode the next element.

[0200] In step S312, the decoder repeats the process described above.

[0201] In step S313, the decoder selects the most probable decoding path among the S decoding paths obtained by decoding up to the last element, thereby decoding the received message ( ) is restored.

[0202] Since the decoder targets the encoded codeword (x) based on the parallel local pre-transform and polar transform, the elements corresponding to the input signal of the polar transform of the encoder obtained in the decoding process ( ) may contain non-consecutive bits of information.

[0203] The above-described method can be recorded on a computer-readable recording medium having recorded thereon one or more programs including commands for executing the method. Examples of possible computer-readable recording media include magnetic media such as hard disks, floppy disks, and magnetic tapes, optical media such as CD-ROMs and DVDs, magneto-optical media such as floptical disks, and hardware devices specially configured to store and execute program instructions such as ROMs, RAMs, flash memories, etc. Examples of program instructions include not only machine language codes such as those generated by a compiler, but also high-level language codes that can be executed by a computer using an interpreter, etc.

[0204] The above description of the present disclosure is provided for illustrative purposes only, and those skilled in the art will readily appreciate that modifications to other specific forms can be made without altering the technical spirit or essential features of the present disclosure. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive. For example, components described as being single may be implemented in a distributed manner, and similarly, components described as being distributed may be implemented in a combined manner.

[0205] The scope of the present disclosure is indicated by the claims described below rather than the detailed description above, and all changes or modifications derived from the meaning and scope of the claims and their equivalent concepts should be interpreted as being included in the scope of the present disclosure.

Claims

1. In an encoder using local pre-transformation, A bit distribution unit configured to divide an input signal to generate specific information signals and remaining information signals; A pre-transformation unit configured to generate connection signals by performing local pre-transformation in parallel based on each of the remaining information signals; and An encoder comprising a polarity conversion unit configured to generate an output signal by performing polarity conversion based on the above-described specific information signal and the above-described connection signals.

2. In paragraph 1, The above polar conversion part is, Perform polar transformation based on the discontinuous information bits of the above specific information signal and the above connection signals, An encoder configured to obtain the output signal from the result of the above polar transformation.

3. In paragraph 1, An encoder in which the number of consecutive information bits of the above connection signals is limited based on the size of each connection signal.

4. In paragraph 1, The above pre-transformation unit includes local pre-transformation units, Each of the above local pre-transformation units, An encoder configured to generate a connected signal by performing a local pre-transform using an upper-triangular matrix based on the corresponding remaining information signal.

5. In paragraph 1, The above pre-transformation unit includes local pre-transformation units, Each of the above local pre-transformation units, By adding one or more freeze bits to the corresponding remaining information signal, a pre-conversion input signal is generated, An encoder configured to generate a connected signal by performing a local pre-transform on the above-mentioned pre-transform input signal.

6. In paragraph 5, An encoder wherein the concatenated signal comprises non-consecutive information bits, as one or more freeze bits are added to the corresponding remaining information signal.

7. In paragraph 5, Each of the above local pre-transformation units, Assigning the corresponding remaining information signal to one or more elements of the pre-transformed input signal pointed to by the corresponding information index set, An encoder configured to assign one or more freeze bits to one or more remaining elements of the pre-converted input signal.

8. In paragraph 1, The above polar conversion part is, Generating a polarity-converted input signal including the specific information signal, the connection signals, and one or more freeze bits, An encoder configured to generate the output signal by performing polar conversion on the polar conversion input signal.

9. In paragraph 8, The above polar conversion part is, Assigning said specific information signal to one or more elements of said polar transformed input signal pointed to by a corresponding set of information indices, Assigning a corresponding connection signal to one or more elements of the polar transformed input signal pointed to by the set of connection indices, An encoder configured to assign one or more freeze bits to one or more remaining elements of the above polar transformed input signal.

10. In paragraph 9, An encoder wherein the above information index set and the above connection index set include, among all indices of the polar transform input signal, indices having high channel reliability and a corresponding row-weight of the polar transform matrix greater than a predetermined threshold value.

11. In an encoding method using local pre-transformation, A step of dividing an input signal to generate specific information signals and remaining information signals; A step of generating connection signals by performing local pre-transformation in parallel based on each of the remaining information signals; and An encoding method comprising the step of generating an output signal by performing polar transformation based on the specific information signal and the connection signals.

12. In paragraph 11, The step of generating the above output signal is: A step of performing polar transformation based on the discontinuous information bits of the above specific information signal and the above connection signals; and An encoding method comprising a step of obtaining the output signal from the result of the polar transformation.

13. In paragraph 11, An encoding method in which the number of consecutive information bits of the above connection signals is limited based on the size of each connection signal.

14. In paragraph 11, The step of generating the above connection signals is: An encoding method comprising the step of obtaining the connection signals by performing local pre-transformation using an upper-triangular matrix in parallel based on each of the remaining information signals.

15. In paragraph 11, The step of generating the above connection signals is: A step of generating pre-conversion input signals by adding one or more freeze bits to each of the remaining information signals; and An encoding method comprising a step of generating the connection signals by performing local pre-transformation in parallel on each of the above pre-transformation input signals.

16. In paragraph 15, An encoding method, wherein each of the connection signals comprises non-consecutive information bits, as one or more freeze bits are added to each of the remaining information signals.

17. In paragraph 15, The step of generating the above pre-conversion input signals is: A step of assigning a corresponding remaining information signal to one or more elements of a pre-transformed input signal pointed to by a corresponding information index set; and An encoding method, comprising the step of allocating one or more freeze bits to one or more remaining elements of the pre-converted input signal.

18. In paragraph 1, The step of generating the above output signal is: generating a polarity-converted input signal including the specific information signal, the connection signals, and one or more freeze bits; and An encoding method comprising the step of generating the output signal by performing polar transformation on the polar transformed input signal.

19. In Article 18, The step of generating the above polar conversion input signal is: A step of assigning the specific information signal to one or more elements of the polar transformed input signal pointed to by the corresponding information index set; A step of assigning a corresponding connection signal to one or more elements of the polar transformed input signal pointed to by the set of connection indices; and An encoding method, comprising the step of allocating one or more freeze bits to one or more remaining elements of the polar transformed input signal.

20. In the decoding method, A step of receiving an input signal; and A method comprising: sequentially searching decoding paths for the input signal and selecting a final decoding path among the decoding paths, thereby generating an output signal corresponding to the input signal; The number of the above decoding paths does not exceed a predetermined number, A method wherein the above input signal corresponds to a codeword encoded based on parallel local pre-transform and polar transform.

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