Encoding method, decoding method, and apparatus

Abstract

An encoding method, a decoding method, and an apparatus, which are applied to support IEEE 802.11ax next-generation WiFi protocols (for example, 802.11be, WiFi 7 or EHT), or IEEE 802.11be next-generation WiFi protocols (for example, 802.11bn, WiFi 8 or UHR), or WiFi AI, or millimeter wave (MMW), or ultra-wideband (UWB), or sensing, etc. The encoding and decoding methods comprise: a first communication apparatus acquiring an information bit sequence, and on the basis of a check matrix, performing LDPC encoding on the information bit sequence, so as to obtain an encoded sequence, and outputting the sequence, wherein the length of the sequence is N1, N1 is n times 1944, and n is an integer greater than or equal to 2; and a second communication apparatus performing LDPC decoding on the basis of the check matrix after obtaining information to be decoded, so as to obtain the information bit sequence. The methods can improve the decoding performance.

Description

Coding method, decoding method and device

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office of China on December 4, 2023, with application number 202311652604.X, and priority to the Chinese patent application with the invention name “Encoding method, decoding method and device”, all contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of communication technology, and in particular to an encoding method, a decoding method and a device. Background Art

[0003] The Institute of Electrical and Electronics Engineers (IEEE) 802.11n / ac / ax / be wireless local area network (WLAN) transmission standards primarily focus on improving the user experience in high-bandwidth scenarios (e.g., 60 GHz), including increasing average user throughput and energy efficiency for battery-powered devices. High-bandwidth scenarios require high-speed, reliable transmission of data, video, and other services within limited frequency and power resources, necessitating highly reliable and efficient channel coding schemes.

[0004] In the field of channel coding, concatenated codes (such as Turbo codes) and low-density parity-check (LDPC) codes are currently the two most mature and widely used channel coding methods. Both have performance close to the Shannon limit. Compared with concatenated codes, LDPC codes offer the following advantages: excellent bit error performance without the need for a deep interleaver; improved frame error rate performance; significantly reduced error floor; non-trellis-based decoding; support for parallel decoding and minimal decoding latency. Therefore, LDPC codes have become the standard channel coding scheme for low-frequency, short-range WLAN communication systems such as IEEE 802.11n / ac / ax.

[0005] How to further improve the decoding performance of LDPC codes needs to be solved urgently. Summary of the Invention

[0006] The embodiments of the present application provide an encoding method, a decoding method, and an apparatus that can support LDPC codes with longer code lengths and improve decoding performance.

[0007] In a first aspect, an embodiment of the present application provides an encoding method, which is applied to a first communication device, where the first communication device includes a Wi-Fi device, or a chip or functional module disposed in the Wi-Fi device, and the method includes:

[0008] Acquire an information bit sequence; perform low-density parity check (LDPC) encoding on the information bit sequence based on a check matrix to obtain an encoded sequence, where the length of the encoded sequence is N1, where N1 is n times 1944, and n is an integer greater than or equal to 2; and output the encoded sequence.

[0009] In the embodiment of the present application, the parity check matrix can be applied to an information bit sequence with a code length of n times 1944, where n is an integer greater than or equal to 2, thereby improving the transmission reliability of the system and improving decoding performance. Generally speaking, the longer the applicable code length, the better the reliability of the parity check matrix and the better the decoding performance.

[0010] In a second aspect, an embodiment of the present application provides a decoding method, which is applied to a second communication device, where the second communication device includes a Wi-Fi device, or a chip or functional module disposed in the Wi-Fi device, and the method includes:

[0011] Obtain information to be decoded, where the length of the information to be decoded is N1, where N1 is n times 1944, and n is an integer greater than or equal to 2; perform low-density parity check (LDPC) decoding on the information to be decoded based on a check matrix to obtain an information bit sequence.

[0012] In combination with the first aspect or the second aspect, in one possible implementation, the check matrix is ​​determined based on a reference check matrix, the code length N0 corresponding to the reference check matrix is ​​less than or equal to 1944, and the code rate corresponding to the reference check matrix is ​​the same as the code rate corresponding to the check matrix.

[0013] In combination with the first aspect or the second aspect, in a possible implementation method, it is characterized in that Z1(i, j) and Z0(i, j) satisfy a modular operation relationship; wherein, Z1(i, j) represents the i-th row and j-th column element in the matrix prototype of the check matrix corresponding to the information bit, and Z0(i, j) represents the i-th row and j-th column element in the matrix prototype of the reference check matrix corresponding to the information bit.

[0014] In combination with the first aspect or the second aspect, in one possible implementation, Z1(i, j) = Z0(i, j) or Z1(i, j) = Z0(i, j) + Z0, where Z0 represents the expansion factor of the reference check matrix, Z0 = M0 / 24.

[0015] In combination with the first aspect or the second aspect, in a possible implementation manner, the matrix corresponding to the check bits in the matrix prototype of the check matrix is ​​the same as the matrix corresponding to the check bits in the matrix prototype of the reference check matrix.

[0016] In combination with the first aspect or the second aspect, in a possible implementation, N1=3888.

[0017] In combination with the first aspect or the second aspect, in a possible implementation manner, the code rate corresponding to the check matrix includes any one of the following: 1 / 2, 2 / 3, 3 / 4 or 5 / 6.

[0018] In a third aspect, an embodiment of the present application provides a first communication device configured to execute the method in the first aspect or any possible implementation. The first communication device includes a module configured to execute the method in the first aspect or any possible implementation.

[0019] In a fourth aspect, embodiments of the present application provide a second communication device configured to execute the method in the second aspect or any possible implementation. The second communication device includes a module configured to execute the method in the second aspect or any possible implementation.

[0020] In a fifth aspect, an embodiment of the present application provides a first communication device, comprising a processor configured to execute the method described in the first aspect or any possible implementation. The processor is configured to execute a program stored in a memory, and when the program is executed, the method described in the first aspect or any possible implementation is executed.

[0021] In a possible implementation, the memory is located outside the first communication device.

[0022] In a possible implementation, the memory is located within the first communication device.

[0023] In the embodiment of the present application, the processor and the memory may also be integrated into one device, that is, the processor and the memory may also be integrated together. For example, the first communication device may be a chip.

[0024] In a possible implementation, the first communication device further includes a transceiver, where the transceiver is configured to receive information or send information.

[0025] In a sixth aspect, an embodiment of the present application provides a second communication device, comprising a processor configured to execute the method described in the second aspect or any possible implementation. The processor is configured to execute a program stored in a memory, and when the program is executed, the method described in the second aspect or any possible implementation is executed.

[0026] In a possible implementation, the memory is located outside the second communication device.

[0027] In a possible implementation, the memory is located within the second communication device.

[0028] In the embodiment of the present application, the processor and the memory may also be integrated into one device, that is, the processor and the memory may also be integrated together. Exemplarily, the second communication device may be a chip.

[0029] In a possible implementation, the second communication device further includes a transceiver, where the transceiver is configured to receive information or send information.

[0030] In the seventh aspect, an embodiment of the present application provides a first communication device, which includes a logic circuit and an interface, and the logic circuit and the interface are coupled; the interface is used to input and / or output information, and the logic circuit is used to execute the method described in the first aspect or any possible implementation method.

[0031] In an eighth aspect, an embodiment of the present application provides a second communication device, which includes a logic circuit and an interface, and the logic circuit and the interface are coupled; the interface is used to input and / or output information, and the logic circuit is used to execute the method described in the second aspect or any possible implementation method.

[0032] In the ninth aspect, an embodiment of the present application provides a computer-readable storage medium, which is used to store a computer program. When the computer-readable storage medium is run on a computer, the method shown in any one of the above-mentioned first to second aspects or any possible implementation method is executed.

[0033] In a tenth aspect, an embodiment of the present application provides a computer program product, which, when executed on a computer, enables the method shown in any one of the first to second aspects or any possible implementation thereof to be executed.

[0034] In an eleventh aspect, an embodiment of the present application provides a computer program. When the computer program is run on a computer, the method shown in any one of the first to second aspects or any possible implementation is executed.

[0035] In the twelfth aspect, an embodiment of the present application provides a communication system, which includes a first communication device and / or a second communication device, the first communication device is used to execute the method shown in the above-mentioned first aspect or any possible implementation of the first aspect, and the second communication device is used to execute the method shown in the above-mentioned second aspect or any possible implementation of the second aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] FIG1a is a schematic diagram of a matrix prototype of a reference check matrix provided in an embodiment of the present application;

[0037] FIG1b is a schematic diagram of a CPM provided in an embodiment of the present application;

[0038] FIG2a is a schematic diagram of the architecture of a communication system provided in an embodiment of the present application;

[0039] FIG2b is a schematic diagram of the architecture of a communication system provided in an embodiment of the present application;

[0040] FIG2c is a schematic diagram of the architecture of a communication system provided in an embodiment of the present application;

[0041] FIG3 is a flow chart of an encoding method and a decoding method provided in an embodiment of the present application;

[0042] FIG4 is a partial schematic diagram of a shortening operation in an LDPC encoding provided in an embodiment of the present application;

[0043] FIG5a is a schematic diagram of two options for satisfying a modular operation relationship provided by an embodiment of the present application;

[0044] FIG5 b is a schematic diagram of a tree expansion provided by an embodiment of the present application;

[0045] FIG6a is a schematic diagram of a check matrix provided in an embodiment of the present application;

[0046] FIG6 b is a schematic diagram of a factor graph provided in an embodiment of the present application;

[0047] FIG7a is a schematic diagram of a simulation result provided by an embodiment of the present application;

[0048] FIG7 b is a schematic diagram of a simulation result provided by an embodiment of the present application;

[0049] FIG7c is a schematic diagram of a simulation result provided by an embodiment of the present application;

[0050] FIG7 d is a schematic diagram of a simulation result provided by an embodiment of the present application;

[0051] FIG8 is a schematic structural diagram of a communication device provided in an embodiment of the present application;

[0052] FIG9 is a schematic structural diagram of a communication device provided in an embodiment of the present application;

[0053] FIG10 is a schematic structural diagram of a communication device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0054] To facilitate understanding of the technical solution of the present application, the present application will be further described below with reference to the accompanying drawings.

[0055] The terms "first" and "second" in the specification, claims, and drawings of this application are used only to distinguish different objects and are not used to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units that are not listed, or may optionally include other steps or units that are inherent to the process, method, product, or device.

[0056] References to "embodiments" herein mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it refer to independent or alternative embodiments that are mutually exclusive of other embodiments. It will be understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0057] In this application, "at least one (item)" means one or more, "more than one" means two or more, "at least two (items)" means two or three and more than three, and "and / or" is used to describe the association relationship of associated objects, indicating that three relationships can exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. "Or" means that two relationships can exist, such as only A exists, only B exists; when A and B are not mutually exclusive, it can also mean that three relationships exist, such as only A exists, only B exists, and A and B exist at the same time. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c".

[0058] The LDPC codes used in the IEEE 802.11ac / ax standards are quasi-cyclic (QC) LDPC (QC-LDPC) codes. QC-LDPC codes are a widely used type of structured LDPC codes. Due to the unique structure of their parity check matrices, they can be encoded using simple feedback shift registers, effectively alleviating the coding complexity issues associated with LDPC codes.

[0059] The current standard adopts 12 LDPC code parity check matrices, with three code lengths N: N = 648, N = 1296, or N = 1944. Each code length can support four different coding rates: 1 / 2, 2 / 3, 3 / 4, and 5 / 6. The matrix prototypes of the parity check matrices for each code length and coding rate are different. The parity check bit portion (the matrix corresponding to the parity bits, or parity matrix, shown below) in the matrix prototypes of the 12 parity check matrices for different code lengths and coding rates has the same structure. For example, the code rate selection can be determined by the modulation and coding scheme (MCS) selected by the transmission system based on link adaptation. Therefore, a communication device in a traditional WLAN can select a parity check matrix from the 12 parity check matrices based on a given code length and coding rate. The aforementioned identical structure can be understood as meaning that the parity bit portion of the matrix prototypes of the different parity check matrices in Figure 1a has the first row and first column elements all set to 1, and the last row and first column elements all set to 1.

[0060] Figure 1a shows the matrix prototype of the LDPC code check matrix with code length N=1944 and different code rates. The “-” in Figure 1a represents a Z*Z all-zero matrix, the “0” in Figure 1a represents a Z*Z unit matrix, and the non-zero elements in Figure 1a represent the circulant permutation matrix (CPM) of the Z*Z unit matrix. For example, CPM uses P i Indicates that i represents the cyclic shift value or the number of bits of the unit matrix cyclically shifted to the right or the CPM coefficient or the element greater than or equal to 0 in the matrix prototype of the check matrix, etc. The specific name of i is not limited in the embodiments of the present application. i is a non-negative integer, such as 0≤i≤Z-1. When i=0, CPM can be understood as a Z*Z unit matrix, or a CPM with a cyclic shift value of 0. Exemplarily, Z=N / 24. The aforementioned "24" can be the same as the number of columns of the matrix prototype of the check matrix in the IEEE802.11ac / ax standard. For IEEE 801.11ac / ax, regardless of the code length N=648, N=1296, or N=1944, the number of columns of the matrix prototype of the check matrix is ​​24 columns.

[0061] For example, taking element "1" (i.e., i=1) in FIG1a as an example, the element 1 can be expanded to a CPM of 81*81 (1944 / 24=81). The CPM can be expanded by cyclically shifting the unit matrix right by 1 bit, as shown below:

[0062] For example, taking the 4*4 CPM as an example, FIG1b shows the CPM when i=0, the CPM when i=1, the CPM when i=2, and the CPM when i=3. The CPM shown in FIG1b is only an example. The CPM of other Z*Z unit matrices in the embodiments of the present application can refer to the principle shown in FIG1a or FIG1b to obtain the final P i , I will not go into details here.

[0063] Because LDPC codes can improve the transmission reliability of wireless transmission systems, they have been widely used in WLAN standards. To further improve the data transmission reliability of Wi-Fi systems, current and next-generation standards may consider LDPC codes with longer code lengths, thereby achieving stronger error control performance in the encoding module and improving the decoding performance of the decoding module.

[0064] In view of this, embodiments of the present application provide an encoding method, a decoding method, and an apparatus. The method involves a new LDPC code that can support longer code lengths. The check matrix provided in embodiments of the present application can be applied to longer code lengths, such as a code length that is n times 1944, where n is an integer greater than or equal to 2, and the check matrix can also improve decoding performance. For example, considering the implementation complexity of new Wi-Fi systems, the new LDPC long code provided in embodiments of the present application requires minimal changes to the LDPC encoding and decoding modules in existing Wi-Fi systems, thereby reducing the implementation complexity of LDPC encoding and decoding.

[0065] In the embodiments of the present application, the various matrices shown below can be called prototypes of check matrices, or matrix prototypes of check matrices (matrix prototypes for parity-matrices), or matrix prototypes for codeword block length N (matrix prototypes for codeword block length N) or mother matrices, etc. The specific names of the matrices involved in the embodiments of the present application are not limited in the embodiments of the present application. Generally speaking, a matrix including element 0 and element 1 after expansion based on Z and cyclic shift value i is called a check matrix, so the various matrices shown below can also be called matrices before CPM expansion, etc. The various matrices shown in Examples 1 to 12 below can be called matrix prototypes of check matrices, and the matrices after expansion based on the elements in the various matrices shown in Examples 1 to 12 can be called check matrices. For the specific method of expansion, please refer to the above description of Figure 1a. For the specific content of the expanded check matrix, the embodiments of the present application will no longer list them one by one.

[0066] In the embodiments of the present application, the code length may also be referred to as a codeword block length (acodewordblocklength), etc., and the specific name of the code length is not limited in the embodiments of the present application. In the embodiments of the present application, Z may be referred to as a subblock size (subblocksize), an expansion factor, or a lift factor, etc., and the specific name of Z is not limited in the embodiments of the present application. For ease of description, the following description uses Z as an example of an expansion factor.

[0067] Generally speaking, Z = N / 24. However, as standards progress, the subsequent method of calculating Z may also change, and the embodiments of this application do not limit this. For ease of understanding, different letter parameters are used in the embodiments of this application to represent different meanings, such as N for code length, Z for expansion factor, R for code rate, K for the number of information bits, and E for the number of check bits. However, the various letter parameters shown in the embodiments of this application are only examples and should not be understood as limitations on the embodiments of this application.

[0068] The following introduces the communication system involved in the embodiments of the present application.

[0069] The technical solutions provided in the embodiments of the present application can be applied to wireless local area network (WLAN) systems, such as Wi-Fi, etc. The methods provided in the embodiments of the present application can be applied to the Institute of Electrical and Electronics Engineers IEEE 802.11 series protocols, such as the 802.11be protocol, the 802.11bn protocol, or the next generation of the 802.11bn protocol, etc., which are not listed one by one. The technical solutions provided in the embodiments of the present application can also be applied to wireless personal area networks (WPANs) based on millimeter wave (MMW) and ultra wideband (UWB) technologies, etc. The methods provided in the embodiments of the present application can be applied to the IEEE 802.15 series protocols, such as the 802.15.4a protocol, the 802.15.4z protocol, or the 802.15.4ab protocol, or a future generation of UWB WPAN protocols, etc., which are not listed one by one. The technical solutions provided in the embodiments of the present application can also be applied to the following communication systems, for example, the Internet of Things (IoT) system, vehicle-to-everything (V2X, where X can represent anything), device-to-device (D2D), narrowband Internet of Things (NB-IoT) system, long-term evolution (LTE) system, fifth-generation (5G) communication system, and new communication systems that will emerge in future communication developments. For example, the V2X may include vehicle-to-vehicle (V2V), vehicle-to-infrastructure (V2I), vehicle-to-pedestrian (V2P) or vehicle-to-network (V2N) communication.

[0070] WLAN systems can provide high-speed and low-latency transmission. As WLAN application scenarios continue to evolve, WLAN systems will be applied to more scenarios or industries, such as the Internet of Things industry, the Internet of Vehicles industry, the banking industry, corporate offices, sports stadiums and exhibition halls, concert halls, hotel rooms, dormitories, wards, classrooms, supermarkets, squares, streets, production workshops and warehouses, etc. Of course, devices that support WLAN communication or perception (such as access points or stations) can be sensor nodes in smart cities (such as smart water meters, smart electricity meters, and smart air detection nodes), smart devices in smart homes (such as smart cameras, projectors, displays, TVs, speakers, refrigerators, washing machines, etc.), nodes in the Internet of Things, entertainment terminals (such as wearable devices such as augmented reality (AR) and virtual reality (VR)), smart devices in smart offices (such as printers, projectors, loudspeakers, speakers, etc.), Internet of Vehicles devices, infrastructure in daily life scenarios (such as vending machines, self-service navigation counters in supermarkets, self-service checkout equipment, self-service ordering machines, etc.), and equipment in large sports and music venues.

[0071] Although the embodiments of the present application mainly take WLAN as an example, especially the network applied to the IEEE 802.11 series of standards. The embodiments of the present application can also support Wi-Fi 8, which can also be called ultra high reliability (UHR) or ultra high reliability and throughput (UHRT), etc., which are not listed here one by one. The various aspects involved in the embodiments of the present application can be extended to other networks that adopt various standards or protocols. For example, Bluetooth, high performance radio LAN (HIPERLAN) (a wireless standard similar to the IEEE 802.11 standard) and wide area network (WAN) or other networks now known or developed later.

[0072] In one possible implementation, the method provided in the embodiment of the present application may be implemented by a communication device in a communication system. For example, the communication device may be an access point (AP) or a station (STA).

[0073] AP is a device with wireless communication function, supports communication or perception using WLAN protocol, and has the function of communicating or perceiving with other devices in the WLAN network (such as non-access point station (non-AP STA) or other access points). Of course, it can also have the function of communicating or perceiving with other devices. Alternatively, the access point is equivalent to a bridge connecting the wired network and the wireless network. Its main function is to connect various wireless network clients together and then connect the wireless network to the Ethernet. In the WLAN system, the access point can be called an access point station (AP STA). The device with wireless communication function can be a complete device, or it can be a chip, processing system or functional module installed in the complete device. The device installed with these chips or processing systems or functional modules can implement the methods and functions of the embodiments of the present application under the control of the chip or processing system or functional module. The AP in the embodiment of the present application is a device that provides services for non-AP STA, and can support 802.11 series protocols or subsequent protocols. For example, an access point can be an access point for a terminal (such as a mobile phone) to enter a wired (or wireless) network. It is mainly deployed in homes, buildings, and campuses, with a typical coverage radius of tens to hundreds of meters. Of course, it can also be deployed outdoors. For another example, an AP can be a communication entity such as a communication server, router, switch, or bridge; an AP can include various forms of macro base stations, micro base stations, and relay stations. Of course, an AP can also be a chip, processing system, or module in any of the above-mentioned devices, thereby implementing the methods and functions of the embodiments of the present application.

[0074] A STA is a device with wireless communication capabilities that supports communication or perception using the WLAN protocol and has the ability to communicate or perceive other non-AP STAs or access points in the WLAN network. In a WLAN system, a station can be referred to as a non-access point station (non-AP STA). For example, a STA is any user communication device that allows a user to communicate or perceive with an AP and then communicate with a WLAN. The device with wireless communication capabilities can be a complete device, or a chip, processing system, or functional module installed in the complete device. The device installed with these chips, processing systems, or functional modules can implement the methods and functions of the embodiments of the present application under the control of the chip, processing system, or functional module. For example, a STA can be a wireless communication chip, a wireless sensor, or a wireless communication terminal, and can also be referred to as a user. For another example, a STA can be a mobile phone that supports Wi-Fi communication capabilities, a tablet that supports Wi-Fi communication capabilities, a set-top box that supports Wi-Fi communication capabilities, a smart TV that supports Wi-Fi communication capabilities, a smart wearable device that supports Wi-Fi communication capabilities, an in-vehicle communication device that supports Wi-Fi communication capabilities, and a computer that supports Wi-Fi communication capabilities. Of course, STA can also be a chip, processing system, or module in the various forms of devices mentioned above, so as to implement the methods and functions of the embodiments of the present application.

[0075] Exemplarily, the communication system to which the method provided in the embodiment of the present application can be applied may include access points and stations. For example, the embodiment of the present application may be applicable to scenarios of communication or perception between AP and STA, between AP and AP, or between STA and STA in a WLAN, and the embodiment of the present application is not limited to this. Optionally, the AP may communicate or perceive with a single STA, or the AP may communicate or perceive with multiple STAs at the same time. Specifically, the communication or perception between the AP and multiple STAs can be divided into downlink transmission in which the AP sends signals to multiple STAs at the same time, and uplink transmission in which multiple STAs send signals to the AP. Among them, the WLAN communication protocol can be supported between the AP and the STA, between the AP and the AP, and between the STA and the STA. The communication protocol may include a protocol of the IEEE802.11 series, such as the 802.11bn protocol, and of course, it is also applicable to protocols after 802.11bn.

[0076] Figure 2a is a schematic diagram of the architecture of a communication system provided in an embodiment of the present application. The communication system may include one or more APs and one or more STAs. Figure 2a shows two access points such as AP1 and AP2, and three stations such as STA1, STA2 and STA3. As an example, the method provided in an embodiment of the present application may be applicable to data communication or perception between an AP and one or more STAs, such as the communication between AP1 and STA1 as shown in Figure 2a, the communication between the AP and STA as shown in Figure 2b, the communication between AP1 and STA1 and STA2 as shown in Figure 2a, and the communication between the AP and STA1, STA2 and STA3 as shown in Figure 2c. As another example, the method provided in an embodiment of the present application may be applicable to communication between APs, such as the communication between AP1 and AP2 as shown in Figure 2a. As another example, the method provided in an embodiment of the present application may be applicable to communication between STAs, such as the communication between STA2 and STA3 as shown in Figure 2a.

[0077] In Figures 2a through 2c, STAs are mobile phones and APs are routers, respectively, as examples. This does not limit the types of APs and STAs used in the embodiments of this application. Furthermore, the number of APs and STAs shown in Figures 2a through 2c is merely exemplary. In specific implementations, the number of APs or STAs can be greater or lesser, and this is not a limitation in the embodiments of this application.

[0078] From the perspectives of sending and receiving signals, the first communication device described below can be understood as a communication device that sends signals, and the second communication device can be understood as a communication device that receives signals. Alternatively, the first communication device can be referred to as a transmitter, and the second communication device can be referred to as a receiver. In the embodiments of the present application, the signal can be a signal obtained by processing an encoded sequence. From the perspective of different devices, as an example, the first communication device and the second communication device can be Wi-Fi chips, functional modules, or processing systems, etc., provided in different Wi-Fi devices. As another example, the first communication device can be an AP, and the second communication device can be a non-AP STA. As yet another example, the first communication device and the second communication device can both be non-AP STAs or both APs. As yet another example, the first communication device can be a non-AP STA, and the second communication device can be an AP. As yet another example, at least one of the first communication device and the second communication device can be a multi-link device (MLD), etc., which are not listed one by one in the embodiments of the present application. Exemplarily, a multi-link device (MLD) refers to a device that simultaneously has multiple stations (such as APs or non-AP STAs), each operating on different frequency bands or channels. A multi-link device includes multiple subordinate stations, which can be physical stations or logical stations. Each station can operate on a link, a frequency band, or a channel, etc. The above-mentioned subordinate stations can be APs or non-AP STAs. A multi-link device (such as a non-AP MLD or an AP MLD) can be a communication device with wireless communication capabilities. The communication device can be a complete device, or a chip, processing system, or module installed in the complete device. Devices installed with these chips, processing systems, or modules can implement the methods and functions of the embodiments of the present application under the control of these chips, processing systems, or modules. The multi-link device can implement wireless communication in accordance with the 802.11 series of protocols, thereby achieving communication with other devices. The other devices shown here may be multi-link devices or may not be multi-link devices. The frequency bands in which the multi-link device operates may include but are not limited to: sub 1 GHz, 2.4 GHz, 5 GHz, 6 GHz, etc., which are not listed here one by one.

[0079] The embodiment of the present application describes the method provided by the embodiment of the present application based on the first communication device and the second communication device. However, during the process of transmitting signals, the first communication device and the second communication device can also forward the signal through other devices, such as forwarding the signal between the first communication device and the second communication device through a forwarding device. The embodiment of the present application does not limit other devices other than the first communication device and the second communication device.

[0080] The following describes the methods involved in the embodiments of the present application.

[0081] FIG3 is a flow chart of an encoding method and a decoding method provided by an embodiment of the present application. The description of the first communication device and the second communication device, etc., can be referred to above and will not be described in detail here. As shown in FIG3 , the method includes:

[0082] 301. A first communication device obtains an information bit sequence.

[0083] The information bit sequence may be a bit sequence containing information. For example, the length of the information bit sequence is N2, or the number of bits in the information bit sequence is N2. N2 is a positive integer. The N2 bits may include K information bits, or K data bits, or K payload bits. K is a positive integer. N2 may be an integer greater than or equal to K. For example, when N2 is greater than K, the information bit sequence may further include (N2-K) 0s. For the relevant description of the "0" shown here, please refer to the description of the shortening operation in Figure 4 below, which will not be described in detail here.

[0084] The value of N2 can be related to the code length and code rate. If the length of the encoded sequence in step 302 is N1, then N2 = N1 * R, where R is the encoding code rate of the information bit sequence. N1 shown here can also be called the code length corresponding to the check matrix.

[0085] In a possible implementation, the method shown in FIG3 may further include:

[0086] The first communication device obtains the code length N1.

[0087] As an example, N1 may be m times 1296, where m is an integer greater than or equal to 2. For example, N1=1296*2=2592. Another example is N1=1296*3=3888, etc., which are not listed here one by one.

[0088] As another example, N1 may be n times 1944, where n is an integer greater than or equal to 2, such as N1=1944*2=3888, or N1=1944*3=5832, etc., which are not listed here one by one.

[0089] In a possible implementation, the method shown in FIG3 may further include:

[0090] The first communication device obtains a code rate R.

[0091] In a WLAN system, different code lengths and code rates may correspond to different parity check matrices. Therefore, before the first communication device performs LDPC encoding, it may also obtain a code rate R. After obtaining the code rate R, the first communication device may select a parity check matrix based on the code rate R and the code length N1. The code rate R may be determined based on the MCS selected by link adaptation. For example, the code rate R may be determined based on current channel information. The embodiments of the present application do not limit the specific method for determining the code rate R. As an example, the MCS may be issued by the AP. As another example, the MCS may be determined by the first communication device, etc. For example, the first communication device sends an MCS to the second communication device, the second communication device receives the MCS, and obtains the code rate R based on the MCS. For another example, the second communication device sends an MCS to the first communication device, the first communication device receives the MCS, and obtains the code rate R based on the MCS. The embodiments of the present application do not limit the specific interaction process for the MCS.

[0092] For example, R can be any of the following: 1 / 2, 2 / 3, 3 / 4, 5 / 6. Of course, as the standard progresses, the value of R can also have other values, which is not limited in the embodiments of the present application.

[0093] The encoded sequence may include K information bits and E parity bits. Alternatively, the encoded sequence may consist of an information bit sequence and a parity bit sequence, where the length of the information bit sequence may be N2 and the length of the parity bit sequence may be E. N1 = N2 + E. The value of E is related to N1 and R. For example, if N1 = 3888 and R = 1 / 2, then E = 1944. For another example, if N1 = 3888 and R = 2 / 3, then E = 3888 * 1 / 3 = 1296. For another example, if N1 = 3888 and R = 3 / 4, then E = 3888 * 1 / 4 = 972. For another example, if N1 = 3888 and R = 5 / 6, then E = 3888 * 1 / 6 = 648.

[0094] 302. The first communication device performs LDPC encoding on the information bit sequence based on the check matrix to obtain an encoded sequence. The length of the encoded sequence is N1, where N1 is n times 1944, and n is an integer greater than or equal to 2.

[0095] The following introduces the matrix prototype of the check matrix involved in the embodiments of the present application.

[0096] In the matrix prototype of the check matrix shown below, "-1" represents the all-zero matrix of Z1*Z1, "0" represents the unit matrix of Z1*Z1, and non-zero elements represent the CPM of the unit matrix of Z1*Z1. "-1" in the check matrix shown below can also be replaced by "-". For the description of each parameter and the description of CPM, please refer to the above and will not be described in detail here. The "1" in Example 1, "2" in Example 2, or "3" in Example 3 below is to distinguish different examples and to facilitate subsequent references.

[0097] As an example 1, the matrix prototype of the check matrix may be the following matrix:

[0098] As another example 2, the matrix prototype of the check matrix may be the following matrix:

[0099] As another example 3, the matrix prototype of the check matrix may be the following matrix:

[0100] The matrix prototypes of the check matrices shown in Examples 1 to 3 above may correspond to R = 1 / 2. Simultaneously, R corresponding to the check matrices may also correspond to 1 / 2. For example, the matrix prototypes of the check matrices shown in Examples 1 to 3 above may correspond to N1 = 3888. Simultaneously, N1 corresponding to the check matrices may also correspond to 3888.

[0101] Exemplarily, the expansion factor Z1=N1 / 24=3888 / 24=162. The element i in Examples 1 to 3 can be expanded to CPM, which is obtained by expanding the unit matrix by cyclic shifting i positions to the right. For example, the element 0 in Examples 1 to 3 can be expanded to a unit matrix of 162*162, and the element i greater than 0 (such as i greater than 0) can obtain a CPM of 162*162 based on the unit matrix by cyclic shifting i positions to the right. The matrix prototype shown in Examples 1 to 3 includes 12 rows and 24 columns, so the check matrix expanded based on the expansion factor Z1 can include 12*162 rows and 24*162 columns. The relevant explanations about the expansion factor Z1 here also apply to Examples 4 to 12 below and will not be repeated below.

[0102] For ease of description, the following text refers to the first X columns of the matrix prototype of the check matrix as the square matrix corresponding to the information bits, or the information matrix, or the information bit portion of the LDPC codeword, etc., and the last Y columns of the matrix prototype of the check matrix as the matrix corresponding to the check bits, or the check matrix, or the check bit portion of the LDPC codeword, etc. X and Y are both positive integers. For example, X = 24 * R. Y = 24 * (1-R). For the matrix prototypes shown in Examples 1 to 3, X = 12 and Y = 12.

[0103] As an example, K=3888*1 / 2=1944, that is, when the information bit sequence includes 1944 information bits, the encoded sequence may include 1944 information bits and 1944 check bits.

[0104] As another example, when K is less than 1944, that is, when the number of information bits included in the information bit sequence is less than 1944, the encoded sequence may include K information bits and 1944 check bits. Although the encoded sequence includes K information bits and 1944 check bits, the length of the encoded sequence is N1. As shown in Figure 4 above, since the number of information bits is less than 1944, the first communication device can obtain the information bit sequence by filling in a certain number of 0s before performing LDPC encoding, and then delete these 0s after completing LDPC encoding. Exemplarily, the number of 0s can be equal to 1944-K. For relevant instructions on the shortening operation, please refer to Figure 4 above and will not be described in detail here.

[0105] As another example, when the number of information bits to be sent obtained before the first communication device obtains the information bit sequence is greater than 1944, the first communication device may perform codeword processing on the information bits before performing LDPC encoding. For example, after the codeword processing, multiple codewords (or blocks or segments, etc.) can be obtained, and the number of information bits carried by each codeword may be less than or equal to 1944. For the specific description of the codeword processing, reference may be made to relevant standards or protocols, etc., and the embodiments of the present application are not limited thereto. Of course, after the first communication device performs the codeword processing, it may also be combined with a shortening operation, etc. The combination of the above-mentioned shortening operation and the codeword operation will not be described in detail here.

[0106] The relevant explanations here about different values ​​of K are also applicable to Examples 4 to 12 below and will not be repeated below.

[0107] As an example 4, the matrix prototype of the check matrix may be the following matrix:

[0108] As an example 5, the matrix prototype of the check matrix may be the following matrix:

[0109] As an example 6, the matrix prototype of the check matrix may be the following matrix:

[0110] The matrix prototypes of the check matrices shown in Examples 4 to 6 above may correspond to R = 2 / 3. Simultaneously, R = 2 / 3. For example, the matrix prototypes of the check matrices shown in Examples 4 to 6 above may correspond to N1 = 3888. Simultaneously, N1 = 3888.

[0111] For the relevant description of the expansion factor Z1, please refer to the description of Examples 1 to 3 above, which will not be described in detail here.

[0112] For Examples 4 to 6, X = 24*2 / 3 = 16, and Y = 24*1 / 3 = 8. For the relevant description of X and Y, please refer to Examples 1 to 3 above, which will not be described in detail here.

[0113] For the relevant description of the relationship between different values ​​of K and 2592 (3888*2 / 3=2592), please refer to the above Examples 1 to 3, which will not be described in detail here.

[0114] As an example 7, the matrix prototype of the check matrix may be the following matrix:

[0115] As an example 8, the matrix prototype of the check matrix may be the following matrix:

[0116] As an example 9, the matrix prototype of the check matrix may be the following matrix:

[0117] The matrix prototypes of the check matrices shown in Examples 7 to 9 above may correspond to R = 3 / 4. Simultaneously, R = 3 / 4. For example, the matrix prototypes of the check matrices shown in Examples 7 to 9 above may correspond to N1 = 3888. Simultaneously, N1 = 3888.

[0118] For the relevant description of the expansion factor Z1, please refer to the description of Examples 1 to 3 above, which will not be described in detail here.

[0119] For Examples 7 to 9, X = 24*3 / 4 = 18, and Y = 24*1 / 4 = 6. For the relevant descriptions of X and Y, please refer to Examples 1 to 3 above, which will not be described in detail here.

[0120] For the relevant description of the relationship between different values ​​of K and 2916 (3888*3 / 4=2916), please refer to the above Examples 1 to 3, which will not be described in detail here.

[0121] As an example 10, the matrix prototype of the check matrix may be the following matrix:

[0122] As an example 11, the matrix prototype of the check matrix may be the following matrix:

[0123] As an example 12, the matrix prototype of the check matrix may be the following matrix:

[0124] The matrix prototypes of the check matrices shown in Examples 10 to 12 above may correspond to R = 5 / 6. Simultaneously, R = 5 / 6. For example, the matrix prototypes of the check matrices shown in Examples 10 to 12 above may correspond to N1 = 3888. Simultaneously, N1 = 3888.

[0125] For the relevant description of the expansion factor Z1, please refer to the description of Examples 1 to 3 above, which will not be described in detail here.

[0126] For Examples 10 to 12, X = 24*5 / 6 = 20, and Y = 24*1 / 6 = 4. For the relevant descriptions of X and Y, please refer to Examples 1 to 3 above, which will not be described in detail here.

[0127] For the relevant description of the relationship between different values ​​of K and 3240 (3888*5 / 6=3240), please refer to the above Examples 1 to 3, which will not be described in detail here.

[0128] The matrix prototypes of the check matrices shown in Examples 1 to 12 above are merely examples. The matrix prototypes of the check matrices shown in the embodiments of the present application can also be obtained by other matrix prototypes through the determination method shown below, which are not listed here one by one.

[0129] 303. The first communication device outputs the encoded sequence.

[0130] Exemplarily, the first communication device may perform LDPC encoding through an encoding module (e.g., an LDPC encoding module) to obtain an encoded sequence, and output the encoded sequence from the encoding module. For a description of the length of the encoded sequence, reference may be made to step 301 or step 302 above and will not be further described here.

[0131] In a possible implementation, the first communication device may further perform a shortening operation after outputting the encoded sequence, as illustrated below by an example.

[0132] Generally speaking, after being encoded, the information bit sequence needs to be placed into an integer number of orthogonal frequency division multiplexing (OFDM) symbols, and the encoded sequence also needs to be placed into an integer number of LDPC codewords. Therefore, before the first communication device performs LDPC encoding, the first communication device needs to first determine the minimum number of OFDM symbols N required for this transmission. SYM , then based on N SYM and the current coding and modulation scheme (such as the modulation order indicated by MCS, etc.) to calculate the total number of coded bits N that can be stored in all OFDM symbols TCB =N CBPS *N SYM , where N CBPS The number of encoded bits that can be stored in each OFDM symbol. Then, the first communication device can calculate the LDPC code length (i.e., the code length shown in the embodiment of the present application) used in the current transmission and the required number of codewords N based on the above results. CW. Exemplarily, when there are not enough information bits (such as the case where K is less than 1944 as shown in Examples 1 to 3 below) to fill the information bit part in the LDPC codeword, the first communication device can perform a shortening operation before performing LDPC encoding (also known as generating check bits). The shortening operation refers to filling a certain number of zeros in the information bit part before generating the check bits through LDPC encoding, and then deleting these zeros after encoding to generate the check bits. Figure 4 is a partial schematic diagram of a shortening operation in an LDPC encoding provided by an embodiment of the present application. As shown in Figure 4, step 401 indicates that the first communication device can obtain the payload bits (payload bits) to be encoded (such as the K information bits shown in the embodiment of the present application). Step 402 indicates that the first communication device can calculate the LDPC code length and the number of codewords, and Figure 4 exemplarily shows three LDPC codewords. The length of each LDPC codeword (i.e., code length) can be equal to the code length. Step 403 indicates that the first communication device can perform a shortening operation on the information bits, and Figure 4 shows a codeword containing payload bits and shortening zero bits. Step 404 indicates that the first communication device can generate parity bits using the payload bits and shortening bits. FIG4 shows a codeword including payload bits, shortening 0 bits, and parity bits. Step 405 indicates that the first communication device discards these shortening 0 bits. FIG4 shows a codeword including data bits and parity bits. The above descriptions of the shortening operation, etc. are merely examples. For further descriptions of the shortening operation, etc., reference may be made to relevant standards or protocols, etc., and the present application does not limit this.

[0133] 304. The first communication device sends a signal corresponding to the encoded sequence, and the second communication device receives the signal.

[0134] The signal corresponding to the encoded sequence refers to the encoded sequence output from the encoding module. The encoded sequence may also undergo other processing, so that the first communication device transmits the processed signal through the channel. Exemplarily, the first communication device may also perform at least one of the following processing on the encoded sequence: stream parsing, constellation mapping, LDPC subcarrier mapping, stream cyclic shift, space and frequency mapping, inverse discrete Fourier transform (IDFT), insert cyclic prefix and window (insertGI andwindow). Exemplarily, after receiving the signal transmitted through the channel, the second communication device may perform corresponding processing on the signal. For example, before the second communication device obtains the information to be decoded, it may perform at least one of the following processing: remove cyclic prefix, discrete Fourier transform (DFT), space and frequency demapping, deinterleaving, and deconstellation.

[0135] Exemplarily, the first communication device may also perform rate matching on the encoded sequence, and the rate matching method may include puncturing, repetition, and shortening. For example, the first communication device may also perform puncturing on the check bits in the encoded sequence to obtain a higher code rate or a shorter code length, etc. For other processing of the encoded sequence by the first communication device, and the corresponding processing before the second communication device obtains the information to be decoded, reference may be made to relevant standards or protocols, etc., which are not limited in the embodiments of the present application. The length of the information to be decoded may be N1. If the information to be decoded may include bits or real numbers, etc., the embodiments of the present application do not limit the specific content of the information to be decoded. Exemplarily, before obtaining the information to be decoded, the second communication device may also supplement shortening bits, such as supplementing shortening bits in combination with the code length and K, or supplement puncturing bits, etc., which are not limited in the embodiments of the present application.

[0136] 305. The second communication device performs LDPC decoding on the information to be decoded based on the check matrix to obtain an information bit sequence.

[0137] Exemplarily, the decoding method that can be adopted by the second communication device includes but is not limited to a hard decision decoding method, a soft decision decoding method, or a hybrid decoding method. The specific decoding process is not described in detail in the embodiment of the present application.

[0138] Exemplarily, the second communication device may also use a method similar to FIG4 to determine the code length N1, etc. For the relevant description of how the second communication device obtains the code length N1 and the code rate R, please refer to the above description of the first communication device and will not be described in detail here.

[0139] Regarding the method by which the first communication device obtains N1 and R, and the method by which the second communication device obtains N1 and R, reference may be made to relevant standards or protocols, etc., and the embodiments of the present application do not limit this.

[0140] In an embodiment of the present application, the above steps 301 to 303 can be implemented by an encoding module, and the above step 305 can be implemented by a decoding module. In a specific implementation, the method shown in Figure 3 can also be divided into an encoding method or a decoding method. If the encoding method can include steps 301 to 303, the first communication device can include an encoding module. If the decoding method can include step 305, the second communication device can include a decoding module. Optionally, in addition to including the above-mentioned encoding module, the first communication device can also include an acquisition module, which can be used to obtain code length and code rate, etc. Optionally, the first communication device can also include a shortening module or a blocking module, etc. Optionally, in addition to including a decoding module, the second communication device can also include an acquisition module, which can be used to obtain information to be decoded.

[0141] In an embodiment of the present application, the check matrix can be applied to an information bit sequence whose code length is n times 1944, where n is an integer greater than or equal to 2, thereby improving the transmission reliability of the system and improving the decoding performance.

[0142] The following describes a method for determining a check matrix according to an embodiment of the present application.

[0143] The method for determining the check matrix shown in the embodiment of the present application is only an example. In a specific implementation, the determination method shown below can be defined by a standard. Alternatively, in a specific implementation, the communicating parties may not perform the determination method shown below. For example, the communicating parties may save the matrix prototype of the check matrix, or save the cyclic shift value, or save the indication information. Although the matrix prototypes of 12 check matrices are shown above as examples, the matrix prototypes of other check matrices determined according to the determination method shown in the embodiment of the present application also fall within the scope of protection of the embodiment of the present application.

[0144] The determination method described below is illustrated using the example of a reference parity check matrix with a code length of N0 = 1944. As shown in step 301 above, N1 may also be m times 1296. That is, according to the determination method described below, a parity check matrix with a code length greater than 1944 may also be determined based on a parity check matrix corresponding to a code length of 1296. According to the determination method described below, a parity check matrix with a code length greater than 1944 determined using the parity check matrix corresponding to a code length of 1296 as a reference parity check matrix also falls within the scope of protection of the embodiments of the present application.

[0145] The following describes the method for determining the matrix prototype of the check matrix shown in the embodiment of the present application, taking the matrix prototype of the reference check matrix as shown in FIG1a as an example. Of course, the name of the reference check matrix shown in the embodiment of the present application is only an example. For example, the reference check matrix can also be called a benchmark check matrix or an original check matrix.

[0146] Notes on the reference check matrix:

[0147] The code length N0 corresponding to the reference check matrix is ​​1944, and the code rates include 1 / 2, 2 / 3, 3 / 4, and 5 / 6. The expansion factor Z0 of the reference check matrix is ​​1944 / 24=81.

[0148] When R = 1 / 2, the matrix prototype of the reference check matrix is ​​a 12*24 matrix, that is, the matrix prototype of the reference check matrix includes 12 rows and 24 columns. The reference check matrix expanded based on this matrix prototype includes 972 rows and 1944 columns. X = 12, Y = 12.

[0149] When R=2 / 3, the matrix prototype of the reference check matrix is ​​a matrix of size 8*24, that is, the matrix prototype of the reference check matrix includes 8 rows and 24 columns. The reference check matrix expanded based on this matrix prototype includes 648 rows and 1944 columns. X=16, Y=8.

[0150] When R=3 / 4, the matrix prototype of the reference check matrix is ​​a 6*24 matrix, that is, the matrix prototype of the reference check matrix includes 6 rows and 24 columns. The reference check matrix expanded based on this matrix prototype includes 648 rows and 1944 columns. X=18, Y=6.

[0151] When R=5 / 6, the matrix prototype of the reference check matrix is ​​a 4*24 matrix, that is, the matrix prototype of the reference check matrix includes 4 rows and 24 columns. The reference check matrix expanded based on this matrix prototype includes 324 rows and 1944 columns. X=20, Y=4.

[0152] Explanation of the check matrix:

[0153] The code length N1 corresponding to the check matrix is ​​3888, and the code rates include: 1 / 2, 2 / 3, 3 / 4, and 5 / 6. The expansion factor Z1 of the check matrix is ​​3888 / 24=162.

[0154] When R=1 / 2, the matrix prototype of the check matrix is ​​a matrix of size 12*24, that is, the matrix prototype of the check matrix includes 12 rows and 24 columns. The check matrix expanded based on the matrix prototype includes 1944 rows and 3888 columns. X=12, Y=12.

[0155] When R=2 / 3, the matrix prototype of the check matrix is ​​a matrix of size 8*24, that is, the matrix prototype of the check matrix includes 8 rows and 24 columns. The check matrix expanded based on the matrix prototype includes 1296 rows and 3888 columns. X=16, Y=8.

[0156] When R=3 / 4, the matrix prototype of the check matrix is ​​a 6*24 matrix, that is, the matrix prototype of the check matrix includes 6 rows and 24 columns. The check matrix expanded based on the matrix prototype includes 972 rows and 3888 columns. X=18, Y=6.

[0157] When R=5 / 6, the matrix prototype of the check matrix is ​​a 4*24 matrix, that is, the matrix prototype of the check matrix includes 4 rows and 24 columns. The check matrix expanded based on the matrix prototype includes 648 rows and 3888 columns. X=20, Y=4.

[0158] In an embodiment of the present application, for the same code rate, the element Z1(i, j) in the information matrix of the matrix prototype of the check matrix and the element Z0(i, j) in the information matrix of the matrix prototype of the reference check matrix satisfy a modular operation relationship. Exemplarily, the following relationship can be satisfied between Z0(i, j) and Z1(i, j): Z0(i, j) = Z1(i, j)% Z0, or Z0(i, j) = Z1(i, j)% (Z1 / 2). As can be seen from the description of X and Y above, the Z1(i, j) shown here refers to the element in the matrix corresponding to the first X columns in the matrix prototype of the check matrix, and Z0(i, j) refers to the element in the matrix corresponding to the first X columns in the matrix prototype of the reference check matrix.

[0159] Exemplarily, the above-mentioned modular operation relationship includes: Z1(i, j)=Z0(i, j), or Z1(i, j)=Z0(i, j)+Z0.

[0160] For example, Z0(i, j) in the matrix prototype of the reference parity check matrix when N0 = 1944 and R = 1 / 2 (the first matrix shown in FIG1a ) and Z1(i, j) in the matrix prototype of the parity check matrix when N1 = 3888 and R = 1 / 2 (as shown in Examples 1 to 3 above) satisfy a modular operation relationship. Taking i = 1 and j = 1 as an example, Z0(1, 1) = 57. For Example 1 above, Z1(1, 1) = 57, i.e., Z1(1, 1) = Z0(1, 1), satisfying the modular operation relationship. Taking i = 2 and j = 1 as an example, Z0(2, 1) = 3. For Example 1 above, Z1(2, 1) = 84, i.e., Z1(2, 1) = Z0(2, 1) + 81, satisfying the modular operation relationship. For Example 2 above, Z1(2, 1) = 3, i.e., Z1(2, 1) = Z0(2, 1), satisfying the modular operation relationship. Specific examples that satisfy the modular operation relationship are not listed here one by one.

[0161] For another example, Z0(i, j) in the matrix prototype of the reference parity check matrix when N0=1944 and R=2 / 3 (such as the second matrix shown in FIG1a ) and Z1(i, j) in the matrix prototype of the parity check matrix when N1=3888 and R=2 / 3 (such as Examples 4 to 6 above) satisfy a modular relationship.

[0162] For another example, Z0(i, j) in the matrix prototype of the reference parity check matrix when N0=1944 and R=3 / 4 (such as the third matrix shown in FIG1a ) and Z1(i, j) in the matrix prototype of the parity check matrix when N1=3888 and R=3 / 4 (such as Examples 7 to 9 above) satisfy a modular operation relationship.

[0163] For another example, Z0(i, j) in the matrix prototype of the reference parity check matrix when N0=1944 and R=5 / 6 (such as the fourth matrix shown in FIG1a ) and Z1(i, j) in the matrix prototype of the parity check matrix when N1=3888 and R=5 / 6 (such as Examples 10 to 12 above) satisfy a modular relationship.

[0164] In the embodiment of the present application, for the same bit rate, the element Y1(i, j) in the check matrix of the matrix prototype of the check matrix is ​​the same as the element Y0(i, j) in the check matrix of the matrix prototype of the reference check matrix. Here, Y1(i, j) refers to the element in the matrix corresponding to the last Y columns of the matrix prototype of the check matrix, and Y0(i, j) refers to the element in the matrix corresponding to the last Y columns of the matrix prototype of the reference check matrix.

[0165] For example, the matrix corresponding to the last Y columns of the matrix prototype of the parity check matrix when N0 = 3888 and R = 1 / 2 is the same as the matrix corresponding to the last Y columns of the matrix prototype of the reference parity check matrix when N0 = 1944 and R = 1 / 2. That is, the values ​​of each element in the parity check matrix of the matrix prototype (or each CPM coefficient) are the same as the values ​​of the elements at corresponding positions in the parity check matrix of the matrix prototype of the reference parity check matrix.

[0166] For another example, the matrices corresponding to the last Y columns in the matrix prototype of the parity check matrix when N0=3888 and R=2 / 3 are the same as the matrices corresponding to the last Y columns in the matrix prototype of the reference parity check matrix when N0=1944 and R=2 / 3.

[0167] For another example, the matrices corresponding to the last Y columns in the matrix prototype of the parity check matrix when N0=3888 and R=3 / 4 are the same as the matrices corresponding to the last Y columns in the matrix prototype of the reference parity check matrix when N0=1944 and R=3 / 4.

[0168] For another example, the matrices corresponding to the last Y columns in the matrix prototype of the parity check matrix when N0=3888 and R=5 / 6 are the same as the matrices corresponding to the last Y columns in the matrix prototype of the reference parity check matrix when N0=1944 and R=5 / 6.

[0169] In the embodiment of the present application, Z0(i, j) and Z1(i, j) satisfy a nested relationship, i.e., a modular operation relationship between Z0(i, j) and Z1(i, j), and the check matrix of the matrix prototype of the check matrix is ​​identical to the check matrix of the matrix prototype of the reference check matrix. Furthermore, the size of the matrix prototype of the check matrix is ​​identical to the size of the matrix prototype of the reference check matrix. This allows the check matrix with a code length greater than 1944 proposed in the embodiment of the present application to minimize modifications to existing LDPC encoding and decoding modules in Wi-Fi systems, thereby reducing the complexity of encoding and decoding implementation. For example, although the check matrix provided in the embodiment of the present application has a code length n times 1944 (i.e., the code length of the check matrix shown in the embodiment of the present application is greater than the longest code length currently used in Wi-Fi systems), the check matrix is ​​determined based on a reference check matrix with a code length of 1944. Therefore, the first communication device can reuse the existing LDPC encoding module when performing LDPC encoding, and the second communication device can reuse the existing LDPC decoding module when performing LDPC decoding. The embodiments of the present application reduce the changes to the LDPC encoding module and the LDPC decoding module, while also ensuring decoding performance.

[0170] In the embodiment of the present application, since Z0(i, j) and Z1(i, j) satisfy the modular operation relationship. As an example, the communicating parties (such as the first communication device and the second communication device) store the elements in the matrix prototype of the check matrix. For example, by storing the elements in the matrix prototype of the check matrix, when the code length is 3888, the communicating parties can directly obtain the check matrix based on the elements they store. For another example, by storing the elements in the matrix prototype of the check matrix, when the code length is 1944, the communicating parties can obtain a reference check matrix based on the modular operation relationship. In other words, by storing the elements in the matrix prototype of the check matrix (or called the CPM coefficients or cyclic shift values, etc.), the communicating parties can obtain LDPC codes of two code lengths, saving storage space. As another example, the communicating parties can also store the reference check matrix and indication information, which is used to indicate whether each element in the information matrix in the matrix prototype of the check matrix satisfies Z1(i, j) = Z0(i, j) or Z1(i, j) = Z0(i, j) + Z0. Exemplarily, the indication information may be a bitmap, in which each bit may be used to indicate whether a certain element in the information matrix satisfies Z1(i, j)=Z0(i, j) or Z1(i, j)=Z0(i, j)+Z0. For example, if the value of a bit is 0, then the element corresponding to the bit satisfies Z1(i, j)=Z0(i, j). For another example, if the value of a bit is 1, then it indicates that the element corresponding to the bit satisfies Z1(i, j)=Z0(i, j)+Z0. Exemplarily, the indication information may also be in the form of a binary matrix, such as the size of the binary matrix may be the same as the size of the matrix corresponding to the first X columns. If the binary matrix may include element 0 and element 1, element 0 may indicate that the element in the check matrix corresponding to the position of element 0 satisfies Z1(i, j)=Z0(i, j), and element 1 may indicate that the element in the check matrix corresponding to the position of element 1 satisfies Z1(i, j)=Z0(i, j)+Z0.

[0171] Furthermore, based on the fact that the modular operation relationship is satisfied between Z0(i, j) and Z1(i, j) and that the check matrix in the matrix prototype of the check matrix is ​​the same as the check matrix in the matrix prototype of the reference check matrix, an embodiment of the present application also provides a determination method. Based on the determination method shown below, the check matrix with better decoding performance can be effectively screened out to ensure the decoding performance of the check matrix.

[0172] For example, the matrix prototype of the check matrix can also be determined based on a tree structure. To ensure the above modular operation relationship, each non-negative 1 Z0(i, j) has two options: if Z0(i, j) = s, then Z1(i, j) = s (remains unchanged) or Z1(i, j) = s + Z0. The small squares in Figure 5a can represent the value of Z0(i, j). Option A (Opt A) can represent Z1(i, j) = s (remains unchanged), and Option B (Opt B) can represent Z1(i, j) = s + Z0.

[0173] Z1(i, j) specifically selects OptA or OptB to expand Z1(i, j) according to the number, and the one with deeper depth can be selected. The specific tree expansion diagram is shown in Figure 5b, where the circle represents the variable node and the square represents the check node. The deeper the depth of the expanded tree, the fewer short rings the corresponding matrix will contain, and short rings will have a negative impact on decoding performance. For each variable node, if the tree is expanded, the corresponding depth of each Opt A or Opt B in the corresponding matrix may be different, and the ring structure caused by it in the factor graph (tanner graph) corresponding to the overall check matrix will also be different. Therefore, the embodiment of the present application comprehensively considers the local and overall ring structure of the matrix, and designs all non-zero elements according to the tree expansion, so as to ensure that the factor graph corresponding to the check matrix has a good ring structure. Through the above method, it can be effectively guaranteed that the check matrix provided by the embodiment of the present application can maintain the fast and efficient encoding method of the original WLAN LDPC code.

[0174] The factor graph and the check matrix are one-to-one corresponding. The factor graph consists of two types of nodes. The first type of nodes are variable nodes, which represent information bits, and the second type of nodes are check nodes, which represent check constraints. Each check node represents a check constraint. Figure 6a is the check matrix H of the LDPC code. In Figure 6a, {Vi} represents the variable node set, and {Cj} represents the check node set. i = 1, 2,…, 8. j = 1, 2, 3, 4. Each row of the check matrix H corresponds to a check equation, and each column corresponds to an information bit. In Figure 6a, there are 8 variable nodes and 4 check nodes. If an information bit is included in the corresponding check equation, a line is used to connect the variable nodes and check nodes involved to obtain a factor graph. Figure 6b is the factor graph of the check matrix H of the LDPC code. For other descriptions of the factor graph, please refer to relevant standards or protocols, etc., and the embodiments of the present application are not limited to this.

[0175] The following describes the simulation results of the check matrix provided in the embodiments of the present application.

[0176] The following is a performance comparison of the above-mentioned check matrix and the reference check matrix. In Figures 7a to 7d, the horizontal axis represents the signal-to-noise ratio (SNR) in dB, and the vertical axis represents the block error rate (BLER). The decoding method used is a soft decision decoding method, such as the brief propagation (BP) algorithm, and the number of decoding iterations is 8. The serial numbers 1 to 4 in Figures 7a to 7d are set to facilitate the distinction between different curves and should not be understood as limiting the embodiments of the present application.

[0177] FIG7a shows a performance comparison of a parity check matrix with a code length of 3888 and a reference parity check matrix with a code length of 1944. R=1 / 2.

[0178] 7b shows the performance comparison of a parity check matrix with a code length of 3888 and a reference parity check matrix with a code length of 1944. R=2 / 3.

[0179] Figure 7c shows the performance comparison of the parity check matrix with a code length of 3888 and the reference parity check matrix with a code length of 1944.

[0180] 7d shows the performance comparison of a parity check matrix with a code length of 3888 and a reference parity check matrix with a code length of 1944. R=5 / 6.

[0181] From the above, it can be seen that under the same SNR, the BLER corresponding to the check matrix is ​​lower, so the decoding performance of the check matrix is ​​better. Therefore, the various check matrices provided in the embodiments of the present application can achieve significant decoding performance improvements, while achieving a good compromise between decoding performance and complexity.

[0182] The following describes a communication device according to an embodiment of the present application.

[0183] The present application divides the functional modules of the communication device according to the above-mentioned method embodiment. For example, each functional module can be divided according to each function, or two or more functions can be integrated into one processing module. The above-mentioned integrated modules can be implemented in the form of hardware or in the form of software functional modules. It should be noted that the division of modules in this application is schematic and is only a logical functional division. There may be other division methods in actual implementation. The communication device of the embodiment of the present application will be described in detail below with reference to Figures 8 to 10.

[0184] Figure 8 is a schematic diagram of the structure of a communication device provided in an embodiment of the present application. As shown in Figure 8, the communication device includes a processing module 801 and a transceiver module 802. The transceiver module 802 can implement corresponding communication functions, and the processing module 801 is used to implement corresponding processing functions. For example, the transceiver module 802 can also be referred to as an interface, a communication interface, or a communication module.

[0185] In some embodiments of the present application, the communication device may be used to perform the actions performed by the first communication device in the above method embodiments. In this case, the first communication device may be the Wi-Fi device itself, or a chip or functional module configurable in the device. The transceiver module 802 is used to perform the transceiver-related operations of the first communication device in the above method embodiments, and the processing module 801 is used to perform the processing-related operations of the first communication device in the above method embodiments.

[0186] Exemplarily, the processing module 801 may be used to obtain an information bit sequence, and perform LDPC encoding on the information bit sequence based on a check matrix to obtain an encoded sequence; the transceiver module 802 may be used to output the encoded sequence.

[0187] Exemplarily, the processing module 801 may also be used to perform other processing on the encoded sequence; the transceiver module 802 may also be used to send or output the signal after other processing.

[0188] Exemplarily, the processing module 801 may include an encoding module. For example, the processing module 801 may also include an acquisition module, a shortening module, or a blocking module. Exemplarily, the processing module 801 may also include at least one of the following modules: a constellation mapping module, a stream cyclic shift module, a space and frequency mapping module, an IDFT module, a cyclic prefix insertion and windowing module. Exemplarily, the transceiver module 802 may include a radio frequency module, an antenna module, etc. Exemplarily, the transceiver module 802 may include a pin module, etc.

[0189] Referring to Figure 8 , in some other embodiments of the present application, the communication device can be used to perform the actions performed by the second communication device in the above method embodiments. In this case, the communication device can be the Wi-Fi device itself, or a chip or functional module configurable in the device. The transceiver module 802 is used to perform the transceiver-related operations of the second communication device in the above method embodiments, and the processing module 801 is used to perform the processing-related operations of the second communication device in the above method embodiments.

[0190] Exemplarily, the transceiver module 802 may be used to receive or input a signal transmitted through a channel; the processing module 801 may be used to process the signal to obtain information to be decoded.

[0191] Exemplarily, the transceiver module 802 may be used to input information to be decoded; the processing module 801 may perform LDPC decoding on the information to be decoded based on a check matrix to obtain an information bit sequence.

[0192] Exemplarily, the processing module 801 may include a decoding module. For example, the processing module 801 may also include an acquisition module, etc. Exemplarily, the processing module 801 may also include at least one of the following components: a cyclic prefix removal module, a DFT module, a deinterleaving module, a constellation deconstruction module, and a descrambling module. Exemplarily, the transceiver module 802 may include a radio frequency module, an antenna module, etc. Exemplarily, the transceiver module 802 may include a pin module, etc.

[0193] Optionally, in each of the above embodiments, the communication device may further include a storage module, which may be used to store instructions and / or data. The processing unit 801 may read the instructions and / or data in the storage module to enable the communication device to implement the above method embodiments. Exemplarily, the storage module may also store CPM coefficients or indication information in the matrix prototype of the check matrix shown above.

[0194] In the above embodiments, the specific descriptions of terms or steps such as reference check matrix, check matrix, prototype of check matrix, prototype of reference check matrix, CPM, number of cyclic shift bits, expansion factor, code length, code rate, etc. can be referred to the introduction in the above method embodiments, and will not be described in detail here.

[0195] The specific descriptions of the transceiver module and the processing module shown in the above embodiments are only examples. For the specific functions or execution steps of the transceiver module and the processing module, please refer to the above method embodiments and will not be described in detail here.

[0196] The above describes the communication device according to the embodiment of the present application. The following describes possible product forms of the communication device. Any product having the functions of the communication device described in FIG8 falls within the scope of protection of the embodiment of the present application. The following description is for illustrative purposes only and does not limit the product forms of the communication device according to the embodiment of the present application to these examples.

[0197] In one possible implementation, in the communication device shown in Figure 8, processing module 801 may be one or more processors, and transceiver module 802 may be a transceiver. Alternatively, transceiver module 802 may be a transmitting module and a receiving module, where the transmitting module may be a transmitter and the receiving module may be a receiver, with the transmitting module and receiving module being integrated into a single device, such as a transceiver. In embodiments of the present application, the processor and transceiver may be coupled, and the connection method between the processor and transceiver is not limited in embodiments of the present application. During the execution of the above-described method, the process of sending information in the above-described method may be the process of the processor outputting the above-described information. When outputting the above-described information, the processor outputs the above-described information to the transceiver for transmission by the transceiver. After being output by the processor, the above-described information may require further processing before reaching the transceiver. Similarly, the process of receiving information in the above-described method may be the process of the processor receiving the above-described information. When the processor receives the input information, the transceiver receives the above-described information and inputs it into the processor. Furthermore, after the transceiver receives the above-described information, the above-described information may require further processing before being input into the processor.

[0198] As shown in FIG. 9 , the communication device 90 includes one or more processors 920 and a transceiver 910 .

[0199] In some embodiments of the present application, the communication device may be configured to execute the steps, methods, or functions executed by the first communication device or the network management server. For example, the processor 920 may be configured to execute the functions or steps implemented by the processing module 801 shown in FIG8 , and the transceiver 910 may be configured to execute the functions or steps implemented by the transceiver module 802 shown in FIG8 . For a detailed description of the processor 920 and the transceiver 910, reference may be made to FIG8 or the method embodiment shown above and will not be described in detail here.

[0200] In other embodiments of the present application, the communication device is used to execute the steps, methods, or functions performed by the second communication device or terminal device. For example, the processor 920 can be used to execute the functions or steps implemented by the processing module 801 shown in Figure 8, and the transceiver 910 can be used to execute the functions or steps implemented by the transceiver module 802 shown in Figure 8. For detailed descriptions of the processor 920 and the transceiver 910, please refer to Figure 8 or the method embodiment shown above and will not be described in detail here.

[0201] In various implementations of the communication device shown in FIG9 , the transceiver may include a receiver and a transmitter, wherein the receiver is configured to perform a receiving function (or operation) and the transmitter is configured to perform a transmitting function (or operation). The transceiver is configured to communicate with other devices / devices via a transmission medium.

[0202] Optionally, the communication device 90 may further include one or more memories 930 for storing program instructions and / or data. The memory 930 is coupled to the processor 920. The coupling in the embodiment of the present application is an indirect coupling or communication connection between the communication devices, units or modules, which may be electrical, mechanical or other forms, and is used for information exchange between the communication devices, units or modules. The processor 920 may operate in conjunction with the memory 930. The processor 920 may execute program instructions stored in the memory 930. Optionally, at least one of the above-mentioned one or more memories may be included in the processor.

[0203] The specific connection medium between the transceiver 910, processor 920, and memory 930 is not limited in the embodiments of the present application. In Figure 9, the memory 930, processor 920, and transceiver 910 are connected via a bus 940. The bus is represented by a bold line in Figure 9. The connection methods between other components are only for illustrative purposes and are not limiting. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, Figure 9 only uses a single bold line, but this does not mean that there is only one bus or only one type of bus.

[0204] In the embodiments of the present application, the processor may be a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field programmable gate array or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component, etc., and may implement or execute the various methods, steps, and logic block diagrams disclosed in the embodiments of the present application. The general-purpose processor may be a microprocessor or any conventional processor, etc. The steps of the methods disclosed in the embodiments of the present application may be directly implemented as being executed by a hardware processor, or may be executed by a combination of hardware and software modules in the processor, etc.

[0205] In the embodiment of the present application, memory may include but is not limited to non-volatile memories such as hard disk drive (HDD) or solid-state drive (SSD), random access memory (RAM), erasable programmable read-only memory (EPROM), read-only memory (ROM) or portable read-only memory (CD-ROM), etc. Memory is any storage medium that can be used to carry or store program code in the form of instructions or data structures, and can be read and / or written by a computer (such as the communication device shown in the present application), but is not limited thereto. The memory in the embodiment of the present application can also be a circuit or other arbitrarily capable of realizing a storage function, for storing program instructions and / or data.

[0206] The processor 920 is primarily used to process communication protocols and communication data, control the entire communication device, execute software programs, and process software program data. The memory 930 is primarily used to store software programs and data. The transceiver 910 may include control circuitry and an antenna. The control circuitry is primarily used to convert baseband signals into radio frequency signals and process radio frequency signals. The antenna is primarily used to transmit and receive radio frequency signals in the form of electromagnetic waves. Input / output devices, such as a touch screen, display, and keyboard, are primarily used to receive user input and output data to the user.

[0207] When the communication device is powered on, the processor 920 can read the software program in the memory 930, interpret and execute the instructions of the software program, and process the data of the software program. When data needs to be sent wirelessly, the processor 920 performs baseband processing on the data to be sent and outputs the baseband signal to the radio frequency circuit. The radio frequency circuit performs radio frequency processing on the baseband signal and then transmits the radio frequency signal to the outside in the form of electromagnetic waves through the antenna. When data is sent to the communication device, the radio frequency circuit receives the radio frequency signal through the antenna, converts the radio frequency signal into a baseband signal, and outputs the baseband signal to the processor 920. The processor 920 converts the baseband signal into data and processes the data.

[0208] In another implementation, the RF circuit and antenna may be provided independently of the processor performing baseband processing. For example, in a distributed scenario, the RF circuit and antenna may be remotely arranged independent of the communication device.

[0209] The communication device shown in the embodiment of the present application may also have more components than those in Figure 9, and the embodiment of the present application is not limited to this. The method performed by the processor and transceiver shown above is only an example. For the specific steps performed by the processor and transceiver, please refer to the method described above.

[0210] In another possible implementation, in the communication device shown in FIG8 , the processing module 801 may be one or more logic circuits, and the transceiver module 802 may be an input / output interface, or may be called a communication interface, or an interface circuit, or an interface, etc. Alternatively, the transceiver module 802 may be a sending module and a receiving module, the sending module may be an output interface, the receiving module may be an input interface, and the sending module and the receiving module may be integrated into one module, such as an input / output interface. As shown in FIG10 , the communication device shown in FIG10 includes a logic circuit 1001 and an interface 1002. That is, the processing module 801 may be implemented using a logic circuit 1001, and the transceiver module 802 may be implemented using an interface 1002. The logic circuit 1001 may be a chip, a processing circuit, an integrated circuit, or a system-on-chip (SoC) chip, etc., and the interface 1002 may be a communication interface, an input / output interface, a pin, etc. For example, FIG10 is illustrated using the communication device as a chip, and the chip includes a logic circuit 1001 and an interface 1002.

[0211] In the embodiment of the present application, the logic circuit and the interface may also be coupled to each other. The embodiment of the present application does not limit the specific connection method of the logic circuit and the interface. For example, the logic circuit 1001 can be used to perform the functions or steps implemented by the processing module 801 shown in Figure 8, and the interface 1002 can be used to perform the functions or steps implemented by the transceiver module 802 shown in Figure 8. For a specific description of the logic circuit 1001 and the interface 1002, please refer to Figure 8 or the method embodiment shown above, and will not be described in detail here.

[0212] The communication device shown in the embodiment of the present application can implement the method provided in the embodiment of the present application in the form of hardware, or can implement the method provided in the embodiment of the present application in the form of software, etc., and the embodiment of the present application is not limited to this.

[0213] An embodiment of the present application further provides a communication system, which includes a first communication device and a second communication device. The first communication device and the second communication device can be used to execute the method in any of the aforementioned embodiments.

[0214] In addition, the present application also provides a computer program, which is used to implement the operations and / or processing performed by each communication device in the method provided by the present application.

[0215] The present application also provides a computer-readable storage medium having computer code stored therein. When the computer code is run on a computer, the computer executes the operations and / or processing performed by each communication device in the method provided by the present application.

[0216] The present application also provides a computer program product, which includes computer code or computer program. When the computer code or computer program is run on a computer, the operations and / or processes performed by the method provided in the present application are executed.

[0217] In the several embodiments provided in this application, it should be understood that the disclosed systems, communication devices, and methods can be implemented in other ways. For example, the communication device embodiments described above are only schematic. For example, the division of the modules is only a logical function division. In actual implementation, there may be other division methods, such as multiple modules or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, communication devices or modules, or can be electrical, mechanical or other forms of connection.

[0218] The modules described as separate components may or may not be physically separate, and the components shown as modules may or may not be physical modules, that is, they may be located in one place or distributed across multiple network modules. Some or all of the modules may be selected according to actual needs to achieve the technical effects of the solutions provided in the embodiments of the present application.

[0219] In addition, the functional modules in the various embodiments of the present application may be integrated into a processing module, or each module may exist physically separately, or two or more modules may be integrated into a single module. The above-mentioned integrated modules may be implemented in the form of hardware or software functional modules.

[0220] If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a readable storage medium, including a number of instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned readable storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0221] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A coding method, characterized in that: The method comprises: Obtaining an information bit sequence; Performing low-density parity check (LDPC) encoding on the information bit sequence based on a check matrix to obtain an encoded sequence, wherein the length of the encoded sequence is N1, where N1 is n times 1944, and n is an integer greater than or equal to 2; The encoded sequence is output.

2. A decoding method, characterized in that: The method comprises: Obtain information to be decoded, where the length of the information to be decoded is N1, where N1 is n times 1944, and n is an integer greater than or equal to 2; Based on the check matrix, low-density parity check (LDPC) decoding is performed on the information to be decoded to obtain an information bit sequence.

3. The method according to claim 1 or 2, characterized in that: When the code rate of the information bit sequence is R=1 / 2, the matrix prototype of the check matrix includes any one of the following matrices: or, or, Among them, -1 represents the all-zero matrix of Z1*Z1, 0 represents the unit matrix of Z1*Z1, elements greater than 0 represent the cyclic shift matrix CPM of the unit matrix of Z1*Z1, and Z1 is a positive integer determined based on the N1.

4. The method according to claim 1 or 2, characterized in that: When the code rate of the information bit sequence is R=2 / 3, the matrix prototype of the check matrix includes any one of the following matrices: or, or, Among them, -1 represents the all-zero matrix of Z1*Z1, 0 represents the unit matrix of Z1*Z1, elements greater than 0 represent the cyclic shift matrix CPM of the unit matrix of Z1*Z1, and Z1 is a positive integer determined based on the N1.

5. The method according to claim 1 or 2, characterized in that: When the code rate of the information bit sequence is R=3 / 4, the matrix prototype of the check matrix includes any one of the following matrices: or, or, Among them, -1 represents the all-zero matrix of Z1*Z1, 0 represents the unit matrix of Z1*Z1, elements greater than 0 represent the cyclic shift matrix CPM of the unit matrix of Z1*Z1, and Z1 is a positive integer determined based on the N1.

6. The method according to claim 1 or 2, characterized in that: When the code rate of the information bit sequence is R=5 / 6, the matrix prototype of the check matrix includes any one of the following matrices: or, or, Among them, -1 represents the all-zero matrix of Z1*Z1, 0 represents the unit matrix of Z1*Z1, elements greater than 0 represent the cyclic shift matrix CPM of the unit matrix of Z1*Z1, and Z1 is a positive integer determined based on the N1.

7. The method according to any one of claims 1 to 6, characterized in that: The check matrix is ​​determined based on a reference check matrix, the code length N0 corresponding to the reference check matrix is ​​less than or equal to 1944, and the code rate corresponding to the reference check matrix is ​​the same as the code rate corresponding to the check matrix.

8. The method according to any one of claims 1 to 7, characterized in that: The check matrix is ​​determined based on the reference check matrix and includes: Z1(i, j) and Z0(i, j) satisfy the modular operation relationship; Among them, Z1(i, j) represents the element of the i-th row and j-th column in the matrix prototype of the check matrix corresponding to the information bit, and Z0(i, j) represents the element of the i-th row and j-th column in the matrix prototype of the reference check matrix corresponding to the information bit.

9. The method according to any one of claims 1 to 8, characterized in that: The matrix corresponding to the check bits in the matrix prototype of the check matrix is ​​the same as the matrix corresponding to the check bits in the matrix prototype of the reference check matrix.

10. A communication device, characterized in that: The method comprises a module for executing the method according to any one of claims 1 to 9.

11. A communication device, characterized in that: The method comprises a processor configured to execute the method according to any one of claims 1 to 9.

12. A communication device, characterized in that: comprising a logic circuit and an interface, wherein the logic circuit and the interface are coupled; The interface is used to input and / or output information, and the logic circuit is used to execute the method according to any one of claims 1-9.

13. A computer-readable storage medium, characterized in that: The computer-readable storage medium is used to store a computer program. When the computer program is executed, the method according to any one of claims 1 to 9 is executed.

14. A computer program product, characterized in that When the computer program product is executed, the method according to any one of claims 1 to 9 is performed.

15. A communication system, characterized in that: The communication system comprises a first communication device and a second communication device, wherein the first communication device is used to execute the method according to any one of claims 1 and 3-9, and the second communication device is used to execute the method according to any one of claims 2-9.

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