Multilayer substrate, method for manufacturing multilayer substrate, and electronic device

Abstract

Provided are a multilayer substrate that is capable of shortening a manufacturing process and decreasing a resistance value of a conductive paste, a method for manufacturing a multilayer substrate, and an electronic device. As the solution, a plurality of unit laminates (50) are laminated via an adhesive layer (38), each unit laminate (50) comprising: a first insulating layer (14); metal layers (20), (22) that are formed on both surfaces of the first insulating layer (14) and are interlayer-connected by a first via (18) containing a plating or a conductive paste; second insulating layers (24), (28) that are each laminated in a gap of the metal layers (20), (22), respectively; a third insulating layer (32) laminated on the second insulating layer (24) on the upper surface side; a second via (44) that is formed inside the third insulating layer (32), connects the metal layers (20) and other metal layers (22), and contains the conductive paste; and the adhesive layer (38), which is laminated on the third insulating layer (32). The solution also requires a condition, where the metal layers (20), (22) respectively have, in order from the upper surface of the first insulating layer (14): pattern-shaped portions (20c), (22c) formed in pattern shape and step portions (20b), (22b) that are formed at the same height as the pattern-shaped portions and are connected to the first via (18); and protruding portions (20a), (22a) that are formed on the surfaces of the step portions (20b), (22b) and are connected to the second via (44).

Description

Multilayer substrate, manufacturing method of multilayer substrate, and electronic device

[0001] The present invention relates to a multilayer substrate, a method for manufacturing a multilayer substrate, and an electronic device.

[0002] Conventionally, circuit boards such as printed wiring boards have been widely used to incorporate electronic components into electronic devices in a compact manner. A printed wiring board is made by etching copper foil attached to a laminate according to an electronic circuit pattern.

[0003] Meanwhile, with the demand for smaller, higher performance, and lower prices for electronic devices, the electronic circuits on circuit boards have become increasingly miniaturized and multi-layered, and electronic components have become more densely packed, leading to active research into multi-layer boards.

[0004] Therefore, as in Patent Document 1 (Japanese Patent Laid-Open Publication No. 2004-158671), a build-up multilayer substrate has been proposed in which insulating materials on which conductor patterns are formed are laminated in order on both sides of a base core material.

[0005] Furthermore, Patent Document 2 (JP 2015-26689 A) proposes a multilayer substrate in which a plurality of insulating layers having conductive paste connected to metal layers are laminated with adhesive layers.

[0006] JP 2004-158671 A JP 2015-26689 A

[0007] Build-up multilayer boards such as those described in Patent Document 1 require an extremely long manufacturing process, and as the number of layers increases, the yield per layer is multiplied by the number of layers, which is reflected in the overall yield, resulting in problems such as high manufacturing costs.

[0008] Furthermore, the multilayer board disclosed in Patent Document 2 has the advantage of being able to shorten the manufacturing process compared to the build-up type multilayer board described above, but because interlayer connections are made using conductive paste, there is a problem in that the resistance value of the conductive paste increases, resulting in a decrease in the allowable current value of the entire multilayer board.

[0009] Therefore, the present invention has been made to solve the above problems, and its object is to provide a multilayer substrate, a method for manufacturing a multilayer substrate, and an electronic device that improves the allowable current value by shortening the manufacturing process and reducing the resistance value of the conductive paste.

[0010] That is, the disclosed multilayer substrate includes a first insulating layer, metal layers formed on both sides of the first insulating layer and connected to each other by first vias containing plating or conductive paste, a second insulating layer laminated in the gaps between the metal layers, a third insulating layer laminated on one side of the second insulating layer, a second via formed inside the third insulating layer and connecting the metal layer to another metal layer and containing conductive paste, and an adhesive layer laminated on the third insulating layer. Each of the metal layers formed on both sides of the first insulating layer has, in order from the surface of the first insulating layer, a patterned portion formed in a pattern shape, a stepped portion formed at the same height as the patterned portion and connecting to the first via, and a convex portion formed on the surface of the stepped portion and connecting to the second via. This shortens the manufacturing process compared to build-up multilayer substrates. Furthermore, the convex portion in the metal layer allows the height of the conductive paste to be reduced, thereby reducing the resistance of the conductive paste. That is, the allowable current value of the multilayer substrate can be improved.

[0011] Furthermore, in the disclosed multilayer substrate, the surface roughness of the metal layer on the surface and side of the patterned portion, the surface and side of the stepped portion, and the side of the convex portion is preferably, for example, Rz of about 2.0 μm or less in order to satisfy high-speed transmission characteristics. However, if Rz is reduced, adhesion between the copper of the circuit and the insulating resin becomes difficult. Therefore, in the disclosed multilayer substrate, it is preferable that an adhesion-improving coating is formed on the surface and side of the patterned portion, the surface and side of the stepped portion, and the side of the convex portion.

[0012] Furthermore, in the disclosed multilayer substrate, it is preferable that the convex portion be formed so that its diameter decreases with increasing distance from the first insulating layer.

[0013] The disclosed method for manufacturing a multilayer substrate includes a first etching step of etching each of the first insulating layers, the first insulating layers having metal layers on both sides thereof connected to each other by first vias containing plating or conductive paste, to sequentially form a convex portion, a step portion connected to the convex portion, and a pattern portion having the same height as the step portion, from the surface side of the first insulating layer, a first lamination step of laminating a second insulating layer in the gaps between the metal layers, a second lamination step of laminating a third insulating layer on one of the second insulating layers, a third lamination step of laminating an adhesive layer on the third insulating layer, and a via formation step of drilling a plurality of through holes in the adhesive layer and the third insulating layer connected to the convex portion and filling each of the through holes with conductive paste to form second vias, and a second lamination step of laminating a plurality of the unit laminate bodies via the adhesive layer. This shortens the manufacturing process compared to a build-up type multilayer substrate. Furthermore, the height of the conductive paste can be reduced, and the resistance of the conductive paste can be reduced, which means that the allowable current value of the multilayer substrate can be improved.

[0014] Furthermore, in the method for manufacturing a multilayer substrate, it is preferable that the first step further includes a chemical adhesion step of forming an adhesion-improving coating on the metal layer as a step subsequent to the first etching step, a first polishing step of polishing the surface of the second insulating layer and the surface of the convex portion on the side where the third insulating layer is to be laminated to expose the surface of the convex portion and removing the adhesion-improving coating on the surface of the convex portion as a step subsequent to the first lamination step, and a second polishing step of polishing the surface of the second insulating layer and the surface of the convex portion on the side where the third insulating layer is not to be laminated to expose the surface of the convex portion and removing the adhesion-improving coating on the surface of the convex portion as a step subsequent to the second lamination step.

[0015] Furthermore, in the disclosed method for manufacturing a multilayer substrate, it is preferable that in the first lamination step, a second insulating layer is laminated so as to cover the surface of the metal layer, and in the second lamination step, a metal foil is further laminated on the surface of the third insulating layer, and that the first step further includes a second etching step, as a subsequent step to the second lamination step, in which the metal foil is removed by etching.

[0016] The disclosed electronic device is characterized by having the disclosed multilayer substrate and an electronic component.

[0017] According to the present invention, the manufacturing process can be shortened compared to a build-up type multilayer board. Furthermore, according to the present invention, since the metal layer has a convex portion, the height of the conductive paste can be reduced, and the resistance value of the conductive paste can be reduced. In other words, the allowable current value of the multilayer board can be improved.

[0018] FIG. 1 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (Part 1). FIG. 2 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (Part 2). FIG. 3 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (Part 3). FIG. 4 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (Part 4). FIG. 5 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (Part 5). FIG. 6 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (Part 6). FIG. 7 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (Part 7). FIG. 8 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (Part 8). FIG. 9 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (Part 9). FIG. 10 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (Part 10). FIG. 11 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (Part 11). FIG. 12 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (Part 12). FIG. 13 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (Part 13). FIG. 14 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (Part 14). FIG. 15 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (Part 15). FIG. 16 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (No. 16). FIG. 17 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (No. 17). FIG. 18 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (No. 18). FIG. 19 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (No. 19). FIG. 20 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (No. 20). FIG. 21 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (No. 21). FIG. 22 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (No. 22). FIG. 23 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (No. 23). FIG. 24 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (No. 24). FIG. 25 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (No. 25). FIG. 26 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (No. 26). FIG. 27 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (No. 27). FIG. 28 is a schematic cross-sectional view showing an example of a method for manufacturing a multilayer substrate (No. 28). FIG. 29 is a schematic cross-sectional view of a semiconductor package.

[0019] Hereinafter, the multilayer substrate 100, the method for manufacturing the multilayer substrate, and the electronic device 200 according to each embodiment will be described in detail with reference to the drawings. In all the drawings used to explain each embodiment, components having the same functions are denoted by the same reference numerals, and repeated description thereof may be omitted.

[0020] Furthermore, in the multilayer substrate 100, the method for manufacturing a multilayer substrate, and the electronic device 200, the "upper surface" and "lower surface" may be used, but these are expressed based on the up-down direction in the drawings because the stacking direction of the unit laminate body 50 and the unit laminate body 52 described below is illustrated as the up-down direction in each drawing. In other words, the upper surface and lower surface in the multilayer substrate 100, the method for manufacturing a multilayer substrate, and the electronic device 200 may not coincide with the actual up-down direction.

[0021] Meanwhile, in the multilayer substrate 100, the method for manufacturing a multilayer substrate, and the electronic device 200, the term "surface" may be used, but the term "surface" means the above-mentioned "top surface" or "bottom surface." In addition, in the multilayer substrate 100, the method for manufacturing a multilayer substrate, and the electronic device 200, the term "side surface" may be used, but the term "side surface" means the "side surface" in contrast to the above-mentioned "top surface" and "bottom surface."

[0022] <Multilayer Substrate> As shown in FIG. 28, the multilayer substrate 100 in this embodiment has a configuration in which a plurality of unit laminate bodies 50 and a unit laminate body 52 are stacked.

[0023] Moreover, the unit laminate body 50 includes a first insulating layer 14, metal layers 20, 22 formed on both sides of the first insulating layer 14 and connected to each other by first vias 18 containing plating or conductive paste, second insulating layers 24, 28 laminated in the gaps between the metal layers 20, 22, a third insulating layer 32 laminated on one side (the upper surface side in this embodiment), a second via 44 formed inside the third insulating layer 32 and connecting the metal layer 20 and the metal layer 22 or the metal layer 58 and containing conductive paste, and an adhesive layer 38 laminated on the third insulating layer 32. In other words, the multilayer substrate 100 includes the first insulating layer 14 in which the metal layer 20 and the metal layer 22 are connected to each other by the first vias 18 containing plating or conductive paste, and the third insulating layer 32 in which the metal layer 20 and the metal layer 22 or the metal layer 58 are connected to each other by the second vias 44. By stacking a plurality of such unit laminate bodies 50, the manufacturing process can be shortened compared to conventional build-up type multilayer boards.

[0024] The metal layer 20 on the upper surface of the first insulating layer 14 has, in order from the upper surface of the first insulating layer 14, a patterned portion 20c formed in a predetermined pattern, a stepped portion 20b formed at the same height as the patterned portion 20c and connected to the first via 18, and a convex portion 20a formed on the surface (upper surface) of the stepped portion 20b and connected to the second via 44. The metal layer 22 on the lower surface of the first insulating layer 14 has, in order from the lower surface of the first insulating layer 14, a patterned portion 22c formed in a predetermined pattern, a stepped portion 22b formed at the same height as the patterned portion 22c and connected to the first via 18, and a convex portion 22a formed on the surface (lower surface) of the stepped portion 22b and connected to the second via 44.

[0025] The step portion 20b is formed in a flat plate shape (particularly a disk shape) with a thickness of about 18 to 35 μm, and the convex portion 20a is formed in a truncated cone shape with a thickness of about 5 to 20 μm and a smaller diameter than the step portion 20b. Similarly, the step portion 22b is formed in a flat plate shape (particularly a disk shape) with a thickness of about 18 to 35 μm, and the convex portion 22a is formed in a truncated cone shape with a thickness of about 5 to 20 μm and a smaller diameter than the step portion 22b. The convex portion 20a and the step portion 20b are formed integrally, and the convex portion 22a and the step portion 22b are formed integrally.

[0026] By configuring the metal layers 20, 22 as described above, the height of the second via 44 can be lowered, thereby reducing the resistance value of the second via 44 containing conductive paste and improving the allowable current value of the entire multilayer substrate 100.

[0027] Furthermore, it is preferable that the metal layer 20 has adhesion-improving coatings (inorganic or organic coatings formed by a chemical adhesion process) 20d and 20e formed on the surface and side of the patterned portion 20c, the surface and side of the stepped portion 20b, and the side of the convex portion 20a. Similarly, it is preferable that the metal layer 22 has adhesion-improving coatings 22d and 22e formed on the surface and side of the patterned portion 22c, the surface and side of the stepped portion 22b, and the side of the convex portion 22a. This ensures adhesion between the second via 44 and the convex portions 20a and 22a while protecting the high-speed signal lines of the metal layers 20 and 22, thereby improving the reliability of the entire multilayer substrate 100.

[0028] Furthermore, it is preferable that the convex portions 20 a and 22 a are formed so that the diameter thereof decreases as the distance from the first insulating layer 14 increases.

[0029] The multilayer substrate 100 also has a metal layer 58 on the top surface of the unit laminate body 50 of the uppermost layer, which is bonded by the adhesive layer 38 and connected to the second via 44. The metal layer 58 is formed in a pattern.

[0030] Since the unit laminate body 52 becomes the lowermost layer during lamination, it has a different configuration from the unit laminate body 50. That is, the unit laminate body 52 has a metal layer 60, an insulating layer 62, a conductive paste 72, and an adhesive layer 66, and has the same configuration as the upper side of the metal layer 20 of the unit laminate body 50. The metal layer 60 is formed in a pattern.

[0031] <Method for Manufacturing a Multilayer Board> Next, a method for manufacturing a multilayer board according to this embodiment will be described in detail with reference to FIGS.

[0032] The method for manufacturing a multilayer substrate includes a first step of manufacturing a unit laminate body 50 and a second step of laminating a plurality of unit laminate bodies 50 .

[0033] First, as shown in FIGS. 1 and 2, in the method for manufacturing a multilayer substrate, a support 10 is prepared, and a step of drilling one or more through holes 16 in the support 10 is carried out.

[0034] As an example, the support 10 can be a copper clad laminate (CCL) 10 in which copper foil 12 is attached to the upper and lower surfaces of the first insulating layer 14, but is not limited to this and can be selected appropriately depending on the purpose.

[0035] Furthermore, the first insulating layer 14 is not particularly limited as long as it is an insulating layer used in a multilayer substrate, and can be appropriately selected depending on the purpose. For example, the first insulating layer 14 can be an inorganic base material such as an inorganic woven fabric or inorganic nonwoven fabric using glass cloth or the like, or a base material whose hardness is reinforced by an organic base material such as an organic woven fabric or organic nonwoven fabric.

[0036] More specifically, for example, the first insulating layer 14 may be a glass epoxy substrate (a glass woven fabric substrate impregnated with an epoxy resin, a glass nonwoven fabric substrate impregnated with an epoxy resin), a glass woven fabric substrate impregnated with a bismaleimide triazine resin, an aramid nonwoven fabric substrate impregnated with an epoxy resin, a glass woven fabric substrate impregnated with a modified polyphenylene ether resin, etc. The glass epoxy substrate is a substrate obtained by impregnating a glass fiber cloth (woven fabric or nonwoven fabric) with an epoxy resin.

[0037] The insulating layer (first insulating layer) 14 is already cured. "Already cured" refers to a state in which approximately 100% of the total heat generated by curing has been generated, and in which almost no heat generation can be observed when differential scanning calorimetry is performed.

[0038] The insulating layer (first insulating layer) 14 is usually flat. The average thickness of the insulating layer (first insulating layer) 14 may be, for example, 10 μm to 200 μm, or 30 μm to 100 μm, but is not particularly limited and can be appropriately selected depending on the purpose.

[0039] The through holes 16 can be formed by laser processing, for example.２ Examples of the laser include, but are not limited to, a laser and a YAG laser, and can be appropriately selected depending on the purpose.

[0040] Furthermore, the size (opening diameter) of the through hole 16 may be, for example, 50 μm or more and 500 μm or less, or 100 μm or more and 300 μm or less, but is not limited to these and can be selected appropriately depending on the purpose.

[0041] Furthermore, the shape of the through hole 16 in this embodiment is a through hole drilled perpendicular to the first insulating layer 14, but is not limited to this and can be selected appropriately depending on the purpose. When the first via 18 is formed by filling it with a conductive paste described below, the through hole 16 may be formed in a shape (tapered shape) in which the diameter gradually decreases from the first insulating layer 14 on the side where the conductive paste is filled.

[0042] Next, as shown in FIG. 3, the method for manufacturing a multilayer substrate includes a step of forming a first via 18 including plating in the through hole 16, and a step of forming metal layers 20, 22 connected to the first via 18 by plating.

[0043] As an example, plating can be performed by electrolytic copper plating, and in this case, the first via 18 and the metal layers 20 and 22 are formed of copper.

[0044] Furthermore, in the manufacturing method of a multilayer substrate, a step of filling the through hole 16 with a conductive paste to form the first via 18 may be performed instead of forming the first via 18 with plating. The conductive paste may contain a conductive filler and a binder resin, but is not limited thereto and can be selected appropriately depending on the purpose. The conductive filler may be, for example, metal particles of copper, gold, silver, palladium, nickel, tin, bismuth, or the like, and these metal particles may be used alone or in combination of two or more types. The binder resin may be, for example, a thermosetting resin such as epoxy resin or polyimide resin, but is not limited thereto and can be selected appropriately depending on the purpose.

[0045] Next, as shown in Figures 4 to 9, in the manufacturing method of the multilayer substrate, a first etching step is carried out to form a convex portion 20a, a step portion 20b, and a patterned portion 20c on the metal layer 20 on the upper surface side, and to form a convex portion 22a, a step portion 22b, and a patterned portion 22c on the metal layer 22 on the lower surface side.

[0046] First, a film-like dry film resist is applied to each surface of the metal layers 20 and 22. Next, unnecessary portions are removed by exposing the resist to light in a predetermined pattern, forming resist layers RGST in the areas of the metal layer 20 where the convex portions 20a are to be formed and in the areas of the metal layer 22 where the convex portions 22a are to be formed. Next, etching (half etching) is performed to form the convex portions 20a in the metal layer 20 and the convex portions 22a in the metal layer 22. Note that this etching (half etching) leaves portions of the metal layer 20 that will become the stepped portions 20b and the patterned portions 20c, and portions of the metal layer 22 that will become the stepped portions 22b and the patterned portions 22c. The resist layer RGST is then removed.

[0047] Next, a film-like dry film resist is applied to each surface of the convex portions 20a, 22a and to the metal layers 20, 22 remaining after etching (half etching). Next, it is exposed to light in a predetermined pattern to remove unnecessary portions, forming a resist layer RGST in the areas where the convex portions 20a, 22a, the step portions 20b, 22b, and the patterned portions 20c, 22c will be formed. Etching is then performed, and the resist layer RGST is then removed. This allows the step portion 20b and the patterned portion 20c to be formed in the metal layer 20, and the step portion 22b and the patterned portion 22c to be formed in the metal layer 22. The convex portions 20a, 22a are left intact.

[0048] By forming convex portions 20a, 22a and step portions 20b, 22b on the metal layers 20, 22, the height of the second via 44 containing the conductive paste described later can be made lower, thereby reducing the resistance value of the second via 44 and improving the allowable current value of the entire multilayer substrate 100.

[0049] Next, as shown in FIG. 10, in the method for manufacturing a multilayer substrate, a chemical adhesion step is carried out in which adhesion-improving coatings 20d and 20e are formed on the metal layer 20 and adhesion-improving coatings 22d and 22e are formed on the metal layer 22.

[0050] In the multilayer substrate 100, the surface roughness of the metal layers 20, 22 on the surfaces and side surfaces of the patterned portions 20c, 22c, the surfaces and side surfaces of the stepped portions 20b, 22b, and the side surfaces of the convex portions 20a, 22a is preferably, for example, Rz of about 2.0 μm or less in order to satisfy high-speed transmission characteristics. However, if Rz is reduced, adhesion between the metal layers 20, 22 and the insulating resin (second insulating layers 24, 28) becomes difficult. Therefore, in this embodiment, rather than modifying the surface roughness of the metal layers 20, 22, it is preferable to apply an inorganic or organic coating (adhesion-improving coating) to the surfaces and side surfaces of the metal layers 20, 22 by a chemical adhesion process.

[0051] When the adhesion-improving coatings 20d, 20e, 22d, and 22e are inorganic coatings, electroless plating can be used as the chemical adhesion step. More specifically, electroless plating can be used to form adhesion-improving coatings (metal coatings) by depositing metals such as nickel, palladium, gold, and tin on the surfaces of the metal layers 20 and 22. The adhesion-improving coatings (metal coatings) 20d, 20e, 22d, and 22e are formed to a thickness of, for example, about 0.1 μm to 3 μm.

[0052] When the adhesion-improving coatings 20d, 20e, 22d, and 22e are organic coatings, an organic solderability preservative (OSP) treatment or the like can be used as the chemical adhesion process. This allows the adhesion-improving coatings (organic coatings) 20d, 20e, 22d, and 22e made of, for example, an azole compound or an imidazole compound to be formed on the surfaces of the metal layers 20 and 22. The adhesion-improving coatings (organic coatings) 20d, 20e, 22d, and 22e are formed to a thickness of, for example, about 0.1 μm to 3 μm.

[0053] By forming adhesion-improving coatings 20d, 20e, 22d, and 22e on the metal layers 20 and 22, the high-speed signal lines of the metal layers 20 and 22 can be secured.

[0054] If high-speed transmission is required for the multilayer substrate 100 and the electronic device 200, it is preferable to use a chemical adhesion process, but if not, it is preferable to use a general roughening process (copper roughening process).

[0055] Next, as shown in FIG. 11, in the method for manufacturing a multilayer board, a first lamination step is carried out in which second insulating layers 24 and 28 are laminated in the gaps between the metal layers 20 and 22.

[0056] The second insulating layers 24, 28 are not particularly limited as long as they are insulating substrates used in multilayer substrates and can be appropriately selected depending on the purpose. More specifically, thermosetting resins can be used for the second insulating layers 24, 28. Preferred thermosetting resins include fluororesins, polyphenylene ether resins (PPE / PPO resins), polyimide resins (PI resins), and bismaleimide triazine resins (BT resins). These resins have low dielectric constants and low dielectric loss tangents, so using these resins can reduce transmission loss of electrical signals.

[0057] Note that the second insulating layers 24, 28 may be made of an inorganic base material such as an inorganic woven fabric or inorganic nonwoven fabric using glass cloth or the like, or a base material whose hardness is reinforced by an organic base material such as an organic woven fabric or organic nonwoven fabric. More specifically, the second insulating layers 24, 28 may be made of a glass epoxy base material (a glass woven fabric base material impregnated with epoxy resin, a glass nonwoven fabric base material impregnated with epoxy resin), a glass woven fabric base material impregnated with bismaleimide triazine resin, an aramid nonwoven fabric base material impregnated with epoxy resin, a glass woven fabric base material impregnated with modified polyphenylene ether resin, or the like.

[0058] In the first lamination step, the uncured second insulating layer 24 and the resin film 26 are laminated in this order on top of the upper metal layer 20, and the uncured second insulating layer 28 and the resin film 30 are laminated in this order on the lower metal layer 22, followed by thermocompression bonding. After thermocompression bonding, the resin films 26 and 30 are peeled off.

[0059] As an example, the thermocompression bonding can be performed at a temperature of 50°C or higher and 100°C or lower, a pressure of 0.5 MPa or higher and 1.2 MPa or lower, and a time of 60 seconds or higher and 120 seconds or lower, but is not limited thereto and can be appropriately selected depending on the purpose.

[0060] Furthermore, there are no particular restrictions on the resin films 26, 30 as long as they are resin films that do not melt during thermocompression bonding, and they can be selected appropriately depending on the purpose. As examples, polyethylene terephthalate film, polyethylene naphthalate film, polyphenylene sulfite film, polyimide film, etc. can be used.

[0061] The thickness of the resin films 26, 30 may be 10 μm or more and 150 μm or less, or 20 μm or more and 100 μm or less, but is not limited thereto and can be appropriately selected depending on the purpose.

[0062] Furthermore, the method for peeling off the resin films 26, 30 is not particularly limited and can be selected appropriately depending on the purpose. As an example, a method can be adopted in which the ends of the resin films 26, 30 are grasped with a jig and pulled away from the second insulating layers 24, 28.

[0063] Alternatively, the first lamination step may employ a method of laminating the second insulating layers 24, 28 by screen printing.

[0064] Furthermore, in the first lamination step, it is preferable to laminate the second insulating layers 24, 28 so as to cover the surfaces of the metal layers 20, 22. That is, it is preferable that the second insulating layer 24 is formed thicker than the metal layer 20, and the second insulating layer 28 is formed thicker than the metal layer 22. In particular, it is preferable to laminate the second insulating layer 28 so as to cover the surface of the metal layer 22 in the first lamination step. This makes it possible to prevent the metal layer 22 on the lower surface side from being removed by etching when etching the metal foil 34, which will be described later.

[0065] 12, in the method for manufacturing a multilayer substrate, a first polishing step is carried out in which the surface (top surface) of the second insulating layer 24 on the upper surface side and the surface (top surface) of the convex portion 20a of the metal layer 20 on the upper surface side are polished to expose the surface of the convex portion 20a and remove the adhesion-improving coating 20d on the surface of the convex portion 20a. More specifically, polishing is carried out using a polishing machine (not shown) so that the convex portion 20a after removing the adhesion-improving coating 20d is flush with the second insulating layer 24. This protects the high-speed line of the metal layer 20 and can improve adhesion between the convex portion 20a and the second via 44 described below.

[0066] If resin films 26, 30 are attached to the second insulating layers 24, 28, the resin films 26, 30 are peeled off before polishing.

[0067] Next, as shown in FIG. 13, in the method for manufacturing a multilayer board, a second lamination step is carried out in which a third insulating layer 32 is laminated on the second insulating layer 24 on one side (upper surface side).

[0068] The third insulating layer 32 is not particularly limited as long as it is an insulating base material used in a multilayer substrate, and can be appropriately selected depending on the purpose. The third insulating layer 32 is pre-cured. For example, the third insulating layer 32 can be made of an inorganic base material such as an inorganic woven fabric or inorganic nonwoven fabric using glass cloth, or a base material whose hardness is reinforced by an organic base material such as an organic woven fabric or organic nonwoven fabric.

[0069] More specifically, for the third insulating layer 32, for example, a glass epoxy substrate (a glass woven fabric substrate impregnated with epoxy resin, a glass nonwoven fabric substrate impregnated with epoxy resin), a glass woven fabric substrate impregnated with bismaleimide triazine resin, an aramid nonwoven fabric substrate impregnated with epoxy resin, a glass woven fabric substrate impregnated with modified polyphenylene ether resin, or the like can be used.

[0070] It is preferable that the glass epoxy substrate for the third insulating layer 32 and the glass epoxy substrate for the first insulating layer 14 are the same glass epoxy substrate. This results in the same characteristic values ​​(volume contraction / expansion, mechanical rigidity, etc.), which can reduce the occurrence of warpage in the multilayer substrate due to differences in stress. In addition, it is possible to prevent the material components and moisture contained in the substrate from migrating into adjacent substrates, which can affect the hardening and bonding state.

[0071] In the second lamination step, a metal foil (copper foil, for example) 34 may be attached to the upper surface of the third insulating layer 32, and the third insulating layer 32 and the metal foil 34 may be laminated onto the second insulating layer 24 and the convex portion 20a by thermocompression bonding. In the second lamination step, a metal foil (copper foil) 36 may also be attached to the lower surface of the second insulating layer 28, and the thermocompression bonding may be performed. This ensures the flatness of the unit laminate body 50, and improves the reliability of the multilayer substrate 100.

[0072] As an example, the thermocompression bonding can be performed at a temperature of 50°C or higher and 100°C or lower, a pressure of 0.5 MPa or higher and 1.2 MPa or lower, and a time of 60 seconds or higher and 120 seconds or lower, but is not limited thereto and can be appropriately selected depending on the purpose.

[0073] Next, as shown in FIG. 14, in the method for manufacturing a multilayer substrate, a second etching step is carried out to remove the metal foils 34 and 36.

[0074] Even if the metal foil 36 is not attached to the underside of the second insulating layer 28, the second insulating layer 28 covers the metal layer 22 on the underside and functions as a barrier resin, thereby preventing the metal layer 22 from being etched.

[0075] 15, in the method for manufacturing a multilayer substrate, a second polishing step is carried out in which the surface (lower surface) of the second insulating layer 28 on the lower side and the surface (lower surface) of the convex portion 22a of the metal layer 22 on the lower side are polished to expose the surface of the convex portion 22a and the adhesion-improving coating 22d on the surface of the convex portion 22a is removed. More specifically, polishing is carried out using a polishing machine (not shown) so that the convex portion 22a after removing the adhesion-improving coating 22d is flush with the second insulating layer 28. This protects the high-speed line of the metal layer 22 and improves adhesion between the convex portion 22a and the second via 44 in other unit laminate bodies.

[0076] Next, as shown in FIG. 16, the method for manufacturing a multilayer substrate includes a third lamination step of laminating an adhesive layer (particularly, an insulating adhesive layer) 38 on the surface (upper surface) of the third insulating layer 32.

[0077] The adhesive layer 38 is, for example, an insulating adhesive 38, and a bonding sheet with a separator 40 laminated on top can be used.

[0078] 17 to 19 , the method for manufacturing a multilayer substrate includes a via formation process in which a plurality of through holes 42 connected to the convex portion 20a of the upper metal layer 20 are drilled in the separator 40, the adhesive layer 38, and the third insulating layer 32, and a conductive paste 44 is filled into each of the through holes 42 to form second vias 44. More specifically, through holes 42 are drilled from the surfaces (top surfaces) of the separator 40, the adhesive layer 38, and the third insulating layer 32 to the surfaces (top surfaces) of the convex portion 20a. Next, each through hole 42 is filled with conductive paste (particularly uncured conductive paste) 44, and the separator 40 is peeled off.

[0079] The through-holes 42 can be formed by laser processing. Examples of the type of laser include CO ２ Examples of the laser include, but are not limited to, a laser and a YAG laser, and can be appropriately selected depending on the purpose.

[0080] Furthermore, the size (opening diameter) of the through hole 42 may be, for example, 50 μm or more and 500 μm or less, or 100 μm or more and 300 μm or less, but is not limited to this and can be selected appropriately depending on the purpose.

[0081] In addition, the through-hole 42 in this embodiment is preferably formed in a shape (tapered shape) in which the diameter gradually decreases from the surface (upper surface) side of the adhesive layer 38 toward the metal layer 20 .

[0082] The conductive paste 44 to be filled into the through holes 42 may contain a conductive filler and a binder resin, but is not limited to this and can be selected appropriately depending on the purpose. Metal particles such as copper, gold, silver, palladium, nickel, tin, and bismuth may be used as the conductive filler, and one type of these metal particles or a mixture of two or more types may be used. The binder resin may be, for example, a thermosetting resin such as epoxy resin or polyimide resin, but is not limited to this and can be selected appropriately depending on the purpose.

[0083] By carrying out the above steps, the unit laminate body 50 can be manufactured.

[0084] Next, a method for manufacturing the unit laminate body 52 located in the bottom layer of the multilayer substrate 100 will be described in detail with reference to FIGS.

[0085] In the method of manufacturing the unit laminate body 52, as shown in FIGS. 20 and 21, first, a support 80 is prepared, and the metal foil 64 on the surface (upper surface) of the support 80 is removed by etching.

[0086] As an example, the support 80 may be a copper clad laminate (CCL) 80 in which metal foil (copper foil) 56, 64 is attached to the upper and lower surfaces of the insulating layer 62, but is not limited to this and can be selected appropriately depending on the purpose.

[0087] Furthermore, the insulating layer 62 can be made of the same substrate as the first insulating layer 14. Preferably, the glass epoxy substrate used for the insulating layer 62 and the glass epoxy substrate used for the first insulating layer 14 are the same glass epoxy substrate. This results in the same characteristic values ​​(volume contraction / expansion, mechanical rigidity, etc.), which can reduce warpage of the multilayer substrate due to differences in stress. Furthermore, it can prevent material components and moisture contained in the substrate from migrating into adjacent substrates, thereby preventing their effects on hardening, bonding, etc.

[0088] Next, in the manufacturing method of the unit laminate body 52, as shown in FIG. 22, a step of laminating an adhesive layer (particularly, an insulating adhesive layer) 66 on the surface (upper surface) of the support body 80 after etching is carried out.

[0089] The adhesive layer 66 is, for example, an insulating adhesive 66, and a bonding sheet with a separator 68 laminated on top can be used.

[0090] Next, in the manufacturing method of the unit laminate 52, as shown in Figures 23 and 24, one or more through holes 70 connected to the metal foil 56 are drilled in the separator 68, adhesive layer 66, and insulating layer 62, and a conductive paste 72 is filled to form a third via 72.

[0091] The through-holes 70 can be formed by laser processing. Examples of the type of laser include CO ２ Examples of the laser include, but are not limited to, a laser and a YAG laser, and can be appropriately selected depending on the purpose.

[0092] Furthermore, the size (opening diameter) of the through hole 70 may be, for example, 50 μm or more and 500 μm or less, or 100 μm or more and 300 μm or less, but is not limited to these and can be selected appropriately depending on the purpose.

[0093] In addition, the through-holes 70 in this embodiment are preferably formed in a shape (tapered shape) in which the diameter gradually decreases from the surface (upper surface) of the adhesive layer 38 toward the metal foil 56 .

[0094] The conductive paste 72 filled in the through holes 70 may be the same as the conductive paste 44 .

[0095] Next, in the manufacturing method of the unit laminate body 52, a step of peeling off the separator 68 is carried out as shown in FIG.

[0096] In this manner, the unit laminate body 52 located at the bottom layer of the multilayer substrate 100 can be manufactured.

[0097] Next, as shown in Figures 26 and 27, the manufacturing method for a multilayer substrate includes a second step of laminating a plurality of unit laminate bodies 50 and unit laminate bodies 52. A metal foil 54 is laminated on the upper surface of the uppermost unit laminate body 50. More specifically, the second via (uncured second via) 44 of another unit laminate body 50 below, or the third via (uncured third via) 72 of the unit laminate body 52 below, is connected to the convex portion 22a of one unit laminate body 50, and the adhesive layer 38 of the other unit laminate body 50 below, or the adhesive layer 66 of the unit laminate body 52 below, is bonded to the second insulating layer 24 on the lower surface of the one unit laminate body 50, and the entire multilayer substrate 100 is thermocompression bonded. As a result, a multilayer substrate 100 can be obtained in which the metal foil 54 is laminated on the upper surface and the metal foil 56 is laminated on the lower surface, as shown in Figure 27.

[0098] Furthermore, as shown in FIG. 28, in the method for manufacturing a multilayer substrate, metal layers 58 and 60 having a pattern shape can be obtained by performing predetermined etching on the metal foils 54 and 56 .

[0099] The multilayer substrate 100 can be obtained by the above-described method for manufacturing a multilayer substrate.

[0100] In addition, if the number of layers in the multilayer substrate 100 is odd, the above-mentioned unit laminate body 52 can be further laminated with a metal layer, an insulating layer, and a conductive paste, and the resulting laminate can be stacked on the lowest layer of the multilayer substrate 100.

[0101] Electronic Device Next, a description will be given of the electronic device 200 according to the present invention. The electronic device 200 has at least the multilayer substrate 100 and electronic components, and may further have other members as required.

[0102] There are no particular limitations on the electronic device 200 and it can be appropriately selected depending on the purpose, such as a personal computer (notebook computer or desktop computer), a telephone, a mobile phone, a tablet-type mobile terminal, a smartphone, a copy machine, a facsimile machine, various printers, a digital camera, a television, a video, a CD device, a DVD device, an air conditioner, a remote control device, etc.

[0103] Fig. 29 shows a schematic cross-sectional view of a semiconductor package. The semiconductor package of Fig. 29 includes a motherboard 160 having solder balls 155, an interposer 170 connected to the motherboard 160 via bumps 165, and a semiconductor element 180 disposed on the interposer 170. An example of the semiconductor element 180 is an FPGA (Field Programmable Gate Array) chip.

[0104] Here, the multilayer substrate 100 can be used as the motherboard 160 in FIG. 29, as an interposer 170, and further as a multilayer substrate that constitutes a semiconductor element 180.

Claims

1. A multilayer board comprising a first insulating layer, metal layers formed on both sides of the first insulating layer and connected to each other by first vias containing plating or conductive paste, a second insulating layer laminated in the gaps between the metal layers, a third insulating layer laminated on one side of the second insulating layer, a second via formed inside the third insulating layer and connecting the metal layer to another metal layer and containing conductive paste, and an adhesive layer laminated on the third insulating layer, the unit laminate being laminated via the adhesive layer in multiple layers, and each of the metal layers formed on the first insulating layer has, in order from the surface of the first insulating layer, a patterned portion formed in a pattern shape, a stepped portion formed at the same height as the patterned portion and connected to the first via, and a convex portion formed on the surface of the stepped portion and connected to the second via.

2. The multi-layer board according to claim 1, characterized in that the metal layer has an adhesion improving coating formed on the surface and side of the patterned portion, the surface and side of the stepped portion, and the side of the convex portion.

3. The multi-layer board according to claim 2, characterized in that the convex portion is formed so that its diameter becomes smaller the further it is from the first insulating layer.

4. A method for manufacturing a multilayer board, comprising: a first etching step for forming a convex portion, a step portion connected to the convex portion, and a pattern portion having the same height as the step portion from the surface side of the first insulating layer by etching each of the metal layers in a first insulating layer having metal layers on both sides connected to each other by a first via containing plating or conductive paste; a first lamination step for laminating a second insulating layer in the gaps between the metal layers; a second lamination step for laminating a third insulating layer on one side of the second insulating layer; a third lamination step for laminating an adhesive layer on the third insulating layer; and a via formation step for drilling a plurality of through holes connected to the convex portion in the adhesive layer and the third insulating layer and filling each of the through holes with conductive paste to form second vias, comprising: a first step for manufacturing a unit laminate body; and a second step for laminating a plurality of the unit laminate bodies via the adhesive layer.

5. A method for manufacturing a multilayer board as claimed in claim 4, characterized in that the first step further comprises a chemical adhesion step of forming an adhesion improving coating on the metal layer as a step subsequent to the first etching step, a first polishing step of polishing the surface of the second insulating layer and the surface of the convex portion on the side on which the third insulating layer is to be laminated to expose the surface of the convex portion and removing the adhesion improving coating on the surface of the convex portion as a step subsequent to the first lamination step, and a second polishing step of polishing the surface of the second insulating layer and the surface of the convex portion on the side on which the third insulating layer is not to be laminated to expose the surface of the convex portion and removing the adhesion improving coating on the surface of the convex portion as a step subsequent to the second lamination step.

6. A method for manufacturing a multilayer board according to claim 5, characterized in that in the first lamination step, the second insulating layer is laminated so as to cover the surface of the metal layer, and in the second lamination step, a metal foil is further laminated on the surface of the third insulating layer, and the first step further includes a second etching step of removing the metal foil by etching as a step subsequent to the second lamination step.

7. An electronic device having electronic components mounted on the multilayer substrate according to any one of claims 1 to 3.

Images