Bidirectional diamond transistor devices

Abstract

A bidirectional-metal semiconductor field effector transistor (BiD-MESFET) includes an insulating diamond substrate. The BiD-MESFET further includes a p-type diamond drift layer disposed on the insulating diamond substrate and a field oxide layer positioned between a pair of Schottky gate contacts and disposed on the p-type diamond drift layer. A similarly-designed BiD-MOSFET instead employs standard gate contacts and a gate oxide layer disposed on the p-type diamond drift layer on which is disposed the field oxide layer.

Description

BIDIRECTIONAL DIAMOND TRANSISTOR DEVICESTECHNICAL FIELD

[0001] Embodiments of the disclosure relate generally to semiconductor-based power transistors, and more specifically, relate to bidirectional diamond transistor devices.BACKGROUND

[0002] The $200 billion semiconductor industry derives 10% of its revenue from power semiconductor devices and power integrated circuits. It is estimated that over 50% of the electricity in the world is controlled by power devices. Currently, electricity transmission and distribution losses range from 8-15%. The U.S. Energy Information Administration projects that the worldwide energy demand for electricity will increase nearly 50% by 2050.Therefore, engineers seek emerging ultrawide bandgap (UWBG) materials to realize fast, power-efficient, robust, and reliable semiconductor switches to eliminate 90% of the power loss in electricity conversion.BRIEF DESCRIPTION OF THE DRAWINGS

[0003] A more particular description of the disclosure briefly described above will be rendered by reference to the appended drawings. Understanding that these drawings only provide information concerning typical embodiments and are not therefore to be considered limiting of its scope, the disclosure will be described and explained with additional specificity and detail through the use of the accompanying drawings.

[0004] FIG. 1A is a graph illustrating voltage offset and corresponding conduction loss in silicon-based and gallium-arsenide-based bidirectional transistors, according to some embodiments.

[0005] FIG. IB is a graph illustrating no voltage offset or corresponding conduction loss in diamond-based bidirectional transistors according to various embodiments.

[0006] FIGs. 2A-2E are cross-sectional views of manufacturing operations for a diamond-based, bidirectional-metal semiconductor field effect transistor (BiD-MESFET) according to at least some embodiments.

[0007] FIG. 2F is a circuit element symbol of a p-channel depletion mode BiD- MESFET, such as illustrated in FIG. 2E, according to an embodiment.

[0008] FIGs. 3A-3F are cross-sectional views of manufacturing operations for a diamond-based, bidirectional-metal oxide semiconductor field effect transistor (BiD- MOSFET) according to at least some embodiments.

[0009] FIG. 3G is a circuit element symbol of a p-channel depletion mode BiD- MOSFET, such as illustrated in FIG. 3F, according to an embodiment.

[0010] FIG. 4 is a schematic diagram of circuit that employs either the BiD-MESFET or BiD-MOSFET disclosed herein to control current passing in either direction between an alternating current / direct current (AC / DC) bus and an energy storage system.

[0011] FIG. 5 is a graph of simulated forward on-state characteristics of a diamond BiD- MESFET according to some exemplary embodiments.

[0012] FIG. 6 is a graph of simulated off-state characteristics of a diamond BiD- MESFET according to some exemplary embodiments.

[0013] While embodiments of the present disclosure are susceptible to various modifications and alternative forms, exemplary embodiments thereof are shown by way of example in the drawings and are herein described in detail. It should be understood, however, that the description of exemplary embodiments is not intended to limit the disclosure to the particular forms disclosed, but on the contrary, the intention is to cover all modifications, equivalents and alternatives falling within the spirit and scope of the in accordance with one or more embodiments of the present disclosure.DETAILED DESCRIPTION

[0014] The technology now will be described more fully hereinafter with reference to the accompanying drawings, in which some, but not all embodiments are shown. Indeed, the disclosure may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will satisfy applicable legal requirements.

[0015] Likewise, many modifications and other embodiments of the technology described herein will come to mind to one of skill in the art to which the disclosure pertains having the benefit of the teachings presented in the enclosed descriptions and the associated drawings. Therefore, it is to be understood that the disclosure is not to be limited to the specific embodiments disclosed and that modifications and other embodiments are intended to be included within the scope of this disclosure. Although specific terms are employed herein, they are used in a generic and descriptive sense only and not for purposes of limitation.

[0016] Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of skill in the art to which embodiments described herein pertain. Although any methods and materials similar to or equivalent to those described herein can be used in the practice or testing of embodiments of the present disclosure, the preferred methods and materials are described herein.

[0017] For building semiconductor-based power transistor devices, among available materials, diamond has extraordinary material properties including large bandgap and critical field, high mobilities, saturation velocities, thermal conductivity, and the availability of freestanding substrates. Bidirectional switches built with diamond unipolar devices promise significant performance improvements: volume / weight harness, high temperature stability, and fast switching speed.

[0018] Today, renewable energy generates about 20% of all U.S. electricity. Renewable energy, such as wind, hydropower, solar, biomass, geothermal are variable and thus unevenly available during the day, as well as across the country compared to other means of energy generation such as coal. To even out discrepancies in the energy supply, typically, energy is stored in large rotating generators or batteries. Next-generation power grids are expected to rely on renewable, decentralized low-carbon systems that utilize fast dynamic control in power electronic systems and sophisticated controls for integration so that power can flow in two directions rather than always in just one direction. A foundational change in electronic materials (e.g., moving beyond silicon) is sought to create such a smart and resilient electricity grid. Among emerging wide and ultrawide bandgap semiconductors, diamond is the ultimate semiconductor for these applications in high power electronics due to its exceptional properties, which were summarized above and will be discussed in more detail.

[0019] Aspects of the present disclosure address the above and other deficiencies of conventional power transistors through employing bidirectional diamond-based power transistors. Bidirectional diamond switches, due to favorable properties of using diamond substrates and dopant layers, are expected to be involved in innovations needed at the level of system and controls within different industries, particular in high-power scenarios. Further, diamond-based power transistors generate interdependencies across a design hierarchy that may be utilized to enable revolutionary breakthroughs in next-generation power grids.

[0020] Bidirectional switches are commonly used circuit elements in power electronics that require power flow control in both directions. Bidirectional switches are extensively used in applications such as transportation, distributed power systems using regenerated energy orenergy storage components, and solid-state circuit breakers. For example, bidirectional DC- DC converters enable the exchange of power between the high voltage direct-current (HVDC) bus and the energy storage system, allowing power to flow into and from the energy storage. Bidirectional switches are usually implemented using common emitter insulated-gate bipolar transistor (IGBT), IGBT with anti-parallel diodes, and common source anti-parallel metal-oxide-semiconductor field-effect transistor (MOSFETs).

[0021] Silicon IGBTs and MOSFETs have been the dominant devices in commercial power systems due to mature silicon (Si) technology. In typical Si devices, for high-voltage operations that require several kilovolt breakdown voltages, IGBTs are usually favored over MOSFETs because IGBTs are suitable for scaling up the blocking voltage capability. However, the efficiency of IGBTs often drops off as switching frequencies increase (~10 kilohertz (kHz)) due to the bipolar-nature of IGBTs: minority carrier diffusion for both electron and holes limits the switching speed and most power loss is incurred during the switching process. Also, traditional bidirectional switches have a voltage offset in the ON- state due to the diode components, resulting in conduction loss.

[0022] Aspects of the present disclosure address the above and other deficiencies of conventional silicon-based IGBTs and MOSFETS through employing bidirectional transistors devices that are built on diamond-based layers. As summarized in Table 1, properties of diamond are strikingly superior to other semiconductor materials when considered for use in power electronic devices, where these other devices are based in silicon (Si), silicon carbide (e.g., 4H-SiC), and gallium nitride (GaN). Johnson’s figure of merit is a measure of the ultimate performance at high power and high frequency of a transistor, Keye’s figure of merit measures the performance limited by heat generation and removal, and Baliga’s measures performance limited by losses at high-power and high-frequency operation.Table 1

[0023] In various embodiments, with ultrawide bandgap (UWBG) materials, it is possible to achieve high-voltage blocking capability utilizing unipolar devices that offer superior switching speed through majority carrier current conduction. With large bandgaps (e.g., 4 eV and above) and high breakdown electric field strengths (at least 300 MV / m), UWBG materials (e.g., Ga2Os, diamond, AIN, BN) can surpass the performance limits of their wide bandgap counterparts (e.g., SiC, GaN). For instance, compared to silicon (see Table 1), diamond-based devices can have 500 times higher breakdown voltage (allowing smaller devices and higher voltage ratings), three orders of magnitude lower on-state-resistance (allowing reduced conduction losses), almost triple the electron drift velocity (allowing higher switching frequency), and can operate well above 500 °C.

[0024] In some embodiments, a bidirectional-metal semiconductor field effector transistor (BiD-MESFET) includes an insulating diamond substrate, a p-type diamond drift layer disposed on the insulating diamond substrate, and a field oxide layer positioned between a pair of Schottky gate contacts and disposed on the p-type diamond drift layer. In some embodiments, the pair of Schottky gate contacts partially overlap on, and are in physical contact with, the field oxide layer. In some embodiments, the field oxide layer may be aluminum oxide.

[0025] In some embodiments, a bidirectional-metal oxide semiconductor field effect transistor (BiD-MOSFET) includes an insulating diamond substrate, a p-type diamond drift layer disposed on the insulating diamond substrate, a gate oxide layer disposed on the p-type diamond drift layer, and a field oxide layer positioned between a pair of gate contacts and disposed on the gate oxide layer. In some embodiments, the pair of gate contacts partially overlap on, and are in physical contact with, the field oxide layer, andwherein the field oxide layer may be aluminum oxide. In embodiments of either the BiD- MESFET or the BiD-MOSFET, a thickness of the field oxide layer is between hundreds of nanometers and 2-5 micrometers and sized to increase a breakdown voltage between the pair of gate contacts by at least four times compared to a similarly-designed Si-based or GaN- based device, for example.

[0026] Therefore, advantages of the systems and methods implemented in accordance with some embodiments of the present disclosure include, but are not limited to, design of diamond-based power transistor devices that have the best round-trip efficiency and speed, the lowest conduct loss, the lowest cost, the smallest form factor area design, the best thermal budget, and the highest voltage handling capability compared to traditional IBGTs and MOSFETs. For example, diamond-based power transistor devices avoid losses caused by conduction loss or lower bandgap in other materials, there is no forward voltage drop in the ON state, and ON resistance will be much lower than in other materials.

[0027] Diamond is especially useful as a power transistor material because of extreme thermal conductivity of diamond. Today, there is an initial push towards UWBG semiconductor growth, and electronic-grade single crystal materials are now becoming available commercially. Substrates up to 1 (“one”) inch (for diamond and AIN) and up to 4 (“four”) inches (for Ga2Os) are readily available. UWBG substrate costs, once volume expands as expected, are anticipated to be similar to established wide bandgap materials such as silicon carbide. Diamonds are just carbon, a light and simple element, and can be made using low-priced methane and hydrogen. Bidirectional switches built with diamond unipolar devices promise significant performance improvements: volume / weight reduction, radiation harness, high temperature stability, and fast switching speed. Other advantages will be apparent to those skilled in the art of power semiconductor transistor design and fabrication, which will be discussed hereinafter.

[0028] FIG. 1A is a graph illustrating voltage offset and corresponding conduction loss in silicon-based (e.g., Si, SiC) and gallium-arsenide (e.g., GaN)-based bidirectional transistors, according to some embodiments. In Si-based and GaN-based bidirectional switches, there is a voltage offset, which is illustrated, and which causes conduction loss in such conventional power switch circuits. This voltage offset is due to the diodes (e.g., antiparallel diodes discussed earlier) that are required to be placed in series with the transistor (switch), which inserts resistance into the power switch circuit. These diodes are there toblock the current from one direction because the transistor itself can only block the current from one direction, e.g., single-directional blocking.

[0029] FIG. IB is a graph illustrating no voltage offset or corresponding conduction loss in diamond-based bidirectional transistors according to various embodiments. As illustrated, the disclosed bidirectional diamond transistor devices do not need such series diodes in the switching circuitry and thus avoid the conduction loss caused by the voltage offset in the traditional Si-based and GaN-based power switch circuits. For example, as will be discussed, the bidirectional diamond transistor devices may be designed with two gates, which may be variably controlled with fast switching to control the direction of the current through the bidirectional diamond transistor devices.

[0030] FIGs. 2A-2E are cross-sectional views of manufacturing operations for a diamond-based, bidirectional-metal semiconductor field effect transistor (BiD-MESFET) 200 (see FIG. 2E) according to at least some embodiments. Semiconductor processing equipment may be employed, in conjunction with semiconductor control processing devices, to perform the various operations described herein. In some operations, metal and dielectric layers are deposited and etched in forming the disclosed BiD-MESFET, although other formation processes are envisioned. Only by way of example, metal and dielectric layers may be deposited via electron beam deposition, atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), sputtering, or ultrahigh vacuum deposition (UHVD). Further by way of example, the layers may be patterned using lift-off processes with photoresists or etching techniques including chemical wet etching and plasma dry etching. In specific manufacturing steps, the patterns used for the fabrication of the BiD- MESFET may be delineated using lithography techniques. By way of example, the lithography may be executed through optical lithography or electron-beam lithography techniques.

[0031] At operation 2A, illustrated in FIG. 2A, a p-type diamond drift layer 204 is disposed on an insulating diamond substrate 202, e.g., by employing epitaxial growth of a doped diamond layer. In some embodiments, the p-type diamond drift layer 204 includes atomic doping concentrations ranging from IxlO15cm’3to IxlO18cm’3. A lower doping of the p-type diamond drift layer 204 may enable electron transport with a higher breakdown voltage. In various embodiments, the insulating diamond substrate 202 is one of Type Ila or Type lb diamond material that may be polished on a top or both sides thereof.

[0032] At operation 2B, illustrated in FIG. 2B, a selectively-grown, positive p-type diamond layer 206A and 206B is disposed on the p-type diamond drift layer 204. In various embodiments, the growth of the positive-doped p-type diamond layer 206A and 206B is selective such as to support deposition of ohmic contacts thereon (see operation 2C).

[0033] At operation 2C, illustrated in FIG. 2C, a set of ohmic contacts 210A and 210B, to function as source and drain, are disposed (or deposited) on portions of the selectively- grown, positive p-type diamond layer 206A and 206B, respectively. These ohmic contacts 210A and 210B may alternatively function as source / drain or drain / source depending on the direction of current flow. Thus, it is sufficient to refer to the ohmic contacts 210A and 210B as non-gate contact terminals of the BiD-MESFET 200.

[0034] At operation 2D, illustrated in FIG. 2D, a field oxide layer 214 is deposited on the p-type diamond drift layer 204 and positioned between the set of ohmic contacts 210A and 210B. In some embodiments, a thickness of the field oxide layer 214 is between hundreds of nanometers and 2-5 micrometers and is sized to increase a breakdown voltage between a pair of Schottky gate contacts by at least four times compared to a similarly-designed Si-based or GaN-based device. The precise thickness of the field oxide layer 214, however, may depend on doping level of the p-type diamond drift layer 204, and the target breakdown voltage for the BiD-MESFET 200. In some embodiments, the field oxide layer 214 is aluminum oxide (AI2O3), although other oxides are envisioned, such as silicon dioxide (SiCE), silicon nitride (SisN4), hafnium oxide (HfCE), zirconium oxide (ZrCE), titanium dioxide (Ti O2), tantalum pentoxide (Ta2Os), strontium titanate (SrTiCE), yttrium oxide (Y2O3), or nickel oxide (NiO).

[0035] At operation 2E, illustrated in FIG. 2E, a pair of Schottky gate contacts 218A and 218B are deposited (e.g., disposed) on both the field oxide layer 214 and the p-type diamond drift layer 204, e.g., with the field oxide layer 214 extended between and below the Schottky gate contacts 218A and 218B. Thus, the pair of Schottky gate contacts 218A and 218B may partially overlap on, and be in physical contact with, the field oxide layer 214 as well as the p-type diamond drift layer 204.

[0036] Thus, in some embodiments, the BiD-MESFET 200 includes the insulating diamond substrate 202, the p-type diamond drift layer 204 disposed (or deposited) on the insulating diamond substrate 202, and the field oxide layer 214 positioned between the pair of Schottky gate contacts 218A and 218B and disposed on the p-type diamond drift layer 204. In some embodiments, the pair of Schottky gate contacts 218A and 218B partially overlap on, and are in physical contact with, the field oxide layer 214.

[0037] FIG. 2F is a circuit element symbol of a p-channel depletion mode BiD- MESFET, such as the BiD-MESFET 200 illustrated in FIG. 2E, according to an embodiment. As illustrated, the two gates (G1 and G2) may correspond to the Schottky gate contacts 218A and 218, and the two sources (SI and S2) may correspond to the set of ohmic contacts 210A and 21 OB.

[0038] FIGs. 3A-3F are cross-sectional views of manufacturing operations for a diamond-based, bidirectional-metal oxide semiconductor field effect transistor (BiD- MOSFET) 300 according to at least some embodiments. Semiconductor processing equipment may be employed, in conjunction with semiconductor control processing devices, to perform the various operations described herein. In some operations, metal and dielectric layers are deposited and etched in forming the disclosed BiD-MOSFET, although other formation processes are envisioned. Only by way of example, metal and dielectric layers may be deposited via electron beam deposition, atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), sputtering, or ultrahigh vacuum deposition (UHVD). Further by way of example, the layers may be patterned using lift-off processes with photoresists or etching techniques including chemical wet etching and plasma dry etching. In specific manufacturing steps, the patterns used for the fabrication of the BiD- MOSFET may be delineated using lithography techniques. By way of example, the lithography may be executed through optical lithography or electron-beam lithography techniques.

[0039] At operation 3A, illustrated in FIG. 3A, a p-type diamond drift layer 304 is disposed on an insulating diamond substrate 302, e.g., by employing epitaxial growth of a doped diamond layer. In some embodiments, the p-type diamond drift layer 304 includes atomic doping concentrations ranging from IxlO15cm’3to IxlO18cm’3. A more heavily- doped p-type diamond drift layer 304 (e.g., compared to the p-type diamond drift layer 204) may enable higher current density, leading to better performance for high-current applications. Thus, in some embodiments, the BiD-MOSFET 300 can be designed as an enhancement mode device that is normally ON. In various embodiments, the insulating diamond substrate 302 is one of Type Ila or Type lb diamond material that may be polished on a top or both sides thereof.

[0040] At operation 3B, illustrated in FIG. 3B, a selectively-grown, positive p-type diamond layer having a first portion 306A and a second portion 306B is disposed on the p- type diamond drift layer 304. In various embodiments, the growth of the first portion 306Aand second portion 306B of the positive-doped p-type diamond layer is selective such as to support deposition of ohmic contacts thereon (see operation 3C).

[0041] At operation 3C, illustrated in FIG. 3C, a set of ohmic contacts (e.g., a first ohmic contact 310A and a second ohmic contact 310B), to function as source and drain, are disposed (or deposited) on portions of (e.g., on the first portion 306A and the second portion 306B of) the selectively-grown, positive p-type diamond layer, respectively. These ohmic contacts 310A and 31 OB may alternatively function as source / drain or drain / source depending on the direction of current flow. Thus, it is sufficient to refer to the ohmic contacts 310A and 310B as non-gate contact terminals of the BiD-MESFET 300.

[0042] At operation 3D, illustrated in FIG. 3D, a gate oxide layer 312 is disposed (e.g., deposited) on the p-type diamond drift layer 304. In some embodiments, the gate oxide layer 312 is aluminum oxide (AI2O3), although other oxides are envisioned, such as silicon dioxide (SiCE), silicon nitride (SisN^, hafnium oxide (HfCE), zirconium oxide (ZrCE), titanium dioxide (TiCE), tantalum pentoxide (Ta20s), strontium titanate (SrTiCE), yttrium oxide (Y2O3), or nickel oxide (NiO). In some embodiments, the gate oxide layer 312 is no more than 25% as thick as the field oxide layer 314 (see operation 3E). At operation 3E, illustrated in FIG. 3E, a field oxide layer 314 is deposited on the gate oxide layer 312 and located between the set of ohmic contacts 310A and 310B. In some embodiments, a thickness of the field oxide layer 314 is between hundreds of nanometers and 2-5 micrometers and is sized to increase a breakdown voltage between a pair of gate contacts by at least four times (see operation 3F) compared to a similarly-designed Si-based or GaN-based device. The precise thickness of the field oxide layer 314, however, may depend on doping level of the p-type diamond drift layer 304 and the target breakdown voltage for the BiD-MOSFET 300.

[0043] In some embodiments, the field oxide layer 314 is aluminum oxide (AI2O3), although other oxides are envisioned, such as silicon dioxide (SiCE), silicon nitride (SisN^, hafnium oxide (HfCE), zirconium oxide (ZrCE), titanium dioxide (TiCE), tantalum pentoxide (Ta20s), strontium titanate (SrTiCE), yttrium oxide (Y2O3), or nickel oxide (NiO). In some embodiments, the field oxide layer 314 and the gate oxide layer 312 are deposited using different methods, due to their thickness and quality differences. For example, the gate oxide layer 312 may be deposited using ALD, while the field oxide 314 may be deposited using e- beam evaporation or sputtering. The material of the gate oxide layer 312 may also be different from the field oxide layer 314 in order to achieve a low threshold voltage (< 5 V) and longer device lifetime.

[0044] At operation 3F, illustrated in FIG. 3F, a pair of gate contacts 318 A and 318B are deposited (e.g., disposed) on both the field oxide layer 314 and the gate oxide layer 312, e.g., with the field oxide layer 314 extended between and below the gate contacts 318A and 318B. Thus, the pair of gate contacts 318A and 318B may partially overlap on, and be in physical contact with, the field oxide layer 314 as well as with the gate oxide layer 312.

[0045] In some embodiments, the BiD-MOSFET 300 includes the insulating diamond substrate 302, the p-type diamond drift layer 304 disposed on the insulating diamond substrate 302, a gate oxide layer 312 disposed on the p-type diamond drift layer 304, and the field oxide layer 314 positioned between the pair of gate contacts 318A and 318B and disposed on the gate oxide layer 312. In some embodiments, the pair of gate contacts 318A and 318B partially overlap on, and are in physical contact with, the field oxide layer 314.

[0046] FIG. 3G is a circuit element symbol of a p-channel depletion mode BiD- MOSFET, such as the BiD-MOSFET 300 illustrated in FIG. 3F, according to an embodiment. As illustrated, the two gates (G1 and G2) may correspond to the gate contacts 318A and 318, and the two sources (SI and S2) may correspond to the set of ohmic contacts 310A and 310B.

[0047] FIG. 4 is a schematic diagram of a circuit 400 that employs either the BiD- MESFET 200 (FIG. 2E) or BiD-MOSFET 300 (FIG. 3F) disclosed herein to control current passing in either direction between an alternating current / direct current (AC / DC) bus 409 and an energy storage system 429, e.g., a type of battery or other type of energy / power storage. Thus, in some embodiments, the circuit 400 is deployed in an AC / DC charging system.

[0048] In various embodiments, the circuit 400 includes the BiD-MESFET 200 or the BiD-MOSFET 300 coupled between the AC / DC bus 409 and the energy storage system 429. In some embodiments, the BiD-MESFET 200 or BiD-MOSFET is configured to enable current flow in both directions between the AC / DC bus 409 and the energy storage system 429. In some embodiments, the circuit 400 includes a gate control unit 415 coupled to the pair of (Schottky gate) contacts, whether 218A and 218B or 318A and 318B, to selectively control current flow through BiD-MESFET 200 or the BiD-MOSFET 300, e.g., in either direction as discussed previously.

[0049] In some embodiments, the energy storage systems 429 are remote-controlled energy storage like renewable energy source-based storage, including battery storage. In such embodiments, the bidirectional switch (e.g., the BiD-MESFET 200 or BiD-MOSFET 300) is ON with current flowing one direction during energy generation hours to store the energy in the energy storage. In such embodiments, the current direction through the bidirectional switch is then reversed during peak energy usage hours (and / or low-generation hours) to use energy from the energy storage systems 429.

[0050] FIG. 5 is a graph of simulated forward on-state characteristics of a diamond BiD- MESFET according to some exemplary embodiments. The on-state characteristics is symmetric for the positive and negative voltage polarity. Note that VGISI and VG2S2 have approximately the same absolute amplitude at different current density levels.

[0051] FIG. 6 is a graph of simulated off-state characteristics of a diamond BiD- MESFET according to some exemplary embodiments. Note that, in this example embodiment, the designed breakdown voltage of the BiD-MESFET is approximately 9.3 kilovolts for the positive and negative voltage polarity.

[0052] The words “example” or “exemplary” are used herein to mean serving as an example, instance, or illustration. Any aspect or design described herein as “example’ or “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects or designs. Rather, use of the words “example” or “exemplary” is intended to present concepts in a concrete fashion. As used in this application, the term “or” is intended to mean an inclusive “or” rather than an exclusive “or.” That is, unless specified otherwise, or clear from context, “X includes A or B” is intended to mean any of the natural inclusive permutations. That is, if X includes A; X includes B; or X includes both A and B, then “X includes A or B” is satisfied under any of the foregoing instances. In addition, the articles “a” and “an” as used in this application and the appended claims may generally be construed to mean “one or more” unless specified otherwise or clear from context to be directed to a singular form. Moreover, use of the term “an implementation” or “one implementation” or “an embodiment” or “one embodiment” or the like throughout is not intended to mean the same implementation or embodiments unless described as such. One or more implementations or embodiments described herein may be combined in a particular implementation or embodiment. The terms “first,” “second,” “third,” “fourth,” etc. as used herein are meant as labels to distinguish among different elements and may not necessarily have an ordinal meaning according to their numerical designation.

[0053] In the foregoing specification, embodiments of the disclosure have been described with reference to specific example embodiments thereof. It will be evident that various modifications can be made thereto without departing from the broader spirit andscope of embodiments of the disclosure as set forth in the following claims. The specification and drawings are, accordingly, to be regarded in an illustrative sense rather than a restrictive sense.

Claims

CLAIMSWhat is claimed is:

1. A bidirectional-metal semiconductor field effector transistor (BiD-MESFET) comprising: an insulating diamond substrate; a p-type diamond drift layer disposed on the insulating diamond substrate; and a field oxide layer positioned between a pair of Schottky gate contacts and disposed on the p-type diamond drift layer.

2. The BiD-MESFET of claim 1, wherein the pair of Schottky gate contacts partially overlap on, and are in physical contact with, the field oxide layer, and wherein the field oxide layer comprises aluminum oxide.

3. The BiD-MESFET of claim 1, wherein a thickness of the field oxide layer is between hundreds of nanometers and 2-5 micrometers and is sized to increase a breakdown voltage between the pair of Schottky gate contacts by at least four times compared to a similarly-designed Si-based or GaN-based device.

4. The BiD-MESFET of claim 1, wherein the p-type diamond drift layer comprises atomic doping concentrations ranging from IxlO15cm’3to IxlO18cm’3.

5. The BiD-MESFET of claim 1, further comprising: a selectively-grown, positive p-type diamond layer disposed on the p-type diamond drift layer; and a set of ohmic contacts, to function as source and drain, disposed on portions of the selectively-grown, positive p-type diamond layer.

6. The BiD-MESFET of claim 1, wherein the insulating diamond substrate is one of Type Ila or Type lb diamond material that is polished on a top or both sides thereof.

7. A bidirectional-metal oxide semiconductor field effect transistor (BiD-MOSFET) comprising: an insulating diamond substrate; a p-type diamond drift layer disposed on the insulating diamond substrate; a gate oxide layer disposed on the p-type diamond drift layer; and a field oxide layer positioned between a pair of gate contacts and disposed on the gate oxide layer.

8. The BiD-MOSFET of claim 7, wherein the pair of gate contacts partially overlap on, and are in physical contact with, the field oxide layer, and wherein the field oxide layer comprises aluminum oxide.

9. The BiD-MOSFET of claim 7, wherein the gate oxide layer comprises aluminum oxide and is no more than 25% as thick as the field oxide layer.

10. The BiD-MOSFET of claim 7, wherein a thickness of the field oxide layer is between hundreds of nanometers and 2-5 micrometers and is sized to increase a breakdown voltage between the pair of gate contacts by at least four times compared to a similarly-designed Si-based or GaN-based device.

11. The BiD-MOSFET of claim 7, wherein the p-type diamond drift layer comprises atomic doping concentrations ranging from IxlO15cm’3to IxlO18cm’3.

12. The BiD-MOSFET of claim 7, further comprising: a selectively-grown, positive p-type diamond layer disposed on the p-type diamond drift layer with the gate oxide layer located between a first portion and a second portion of the selectively-grown, positive p-type diamond layer; and a first ohmic contact and a second ohmic contact, to function as source and drain, disposed on the first portion and the second portion, respectively, of the selectively- grown, positive p-type diamond layer.

13. The BiD-MOSFET of claim 7, wherein the insulating diamond substrate is one ofType Ila or Type lb diamond material that is polished on a top or both sides thereof.

14. A circuit comprising: a bidirectional-metal semiconductor field effector transistor (BiD-MESFET) coupled between an alternating current / direct current (AC / DC) bus and an energy storage system, the BiD-MESFET configured to enable current flow in both directions between the AC / DC bus and the energy storage system, wherein the BiD-MESFET comprises: an insulating diamond substrate; a p-type diamond drift layer disposed on the insulating diamond substrate; and a field oxide layer positioned between a pair of Schottky gate contacts and disposed on the p-type diamond drift layer; and a gate control unit coupled to the pair of Schottky gate contacts to selectively control current flow through BiD-MESFET.

15. The circuit of claim 14, wherein the pair of Schottky gate contacts partially overlap on, and are in physical contact with, the field oxide layer, and wherein the field oxide layer comprises aluminum oxide.

16. The circuit of claim 14, wherein a thickness of the field oxide layer is between hundreds of nanometers and 2-5 micrometers and is sized to increase a breakdown voltage between the pair of Schottky gate contacts by at least four times compared to a similarly-designed Si-based or GaN-based device.

17. The circuit of claim 14, wherein the p-type diamond drift layer comprises atomic doping concentrations ranging from IxlO15cm'3to IxlO18cm'3.

18. The circuit of claim 14, further comprising: a selectively-grown, positive p-type diamond layer disposed on the p-type diamond drift layer; anda set of ohmic contacts, to function as source and drain, disposed on portions of the selectively-grown, positive p-type diamond layer.

19. A circuit compri sing : a bidirectional-metal oxide semiconductor field effect transistor (BiD-MOSFET) coupled between an alternating current / direct current (AC / DC) bus and an energy storage system, the BiD-MOSFET configured to enable current flow in both directions between the AC / DC bus and the energy storage system, wherein the BiD-MOSFET comprises: an insulating diamond substrate; a p-type diamond drift layer disposed on the insulating diamond substrate; a gate oxide layer disposed on the p-type diamond drift layer; and a field oxide layer positioned between a pair of gate contacts and disposed on the gate oxide layer; and a gate control unit coupled to the pair of gate contacts to selectively control current flow through BiD-MOSFET.

20. The circuit of claim 19, wherein the pair of gate contacts partially overlap on, and are in physical contact with, the field oxide layer, and wherein the field oxide layer comprises aluminum oxide.

21. The circuit of claim 19, wherein the gate oxide layer comprises aluminum oxide and is no more than 25% as thick as the field oxide layer.

22. The circuit of claim 19, wherein a thickness of the field oxide layer is between hundreds of nanometers and 2-5 micrometers and is sized to increase a breakdown voltage between the pair of gate contacts by at least four times compared to a similarly- designed Si-based or GaN-based device.

23. The circuit of claim 19, wherein the p-type diamond drift layer comprises atomic doping concentrations ranging from IxlO15cm'3to IxlO18cm'3.

24. The circuit of claim 19, further comprising: a selectively-grown, positive p-type diamond layer disposed on the p-type diamond drift layer with the gate oxide layer located between a first portion and a second portion of the selectively-grown, positive p-type diamond layer; and a first ohmic contact and a second ohmic contact, to function as source and drain, disposed on the first portion and the second portion, respectively, of the selectively- grown, positive p-type diamond layer.

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