Rfsoi wafer with low substrate leakage and manufacturing method therefor

Abstract

The present invention relates to the technical field of semiconductors, and in particular to an RFSOI wafer with low substrate leakage and a manufacturing method therefor. The RFSOI wafer comprises, successively arranged from top to bottom, a first silicon layer, a first buried oxide layer, a first defect-rich layer, a second buried oxide layer, a second defect-rich layer and a wafer substrate, each of the first defect-rich layer and the second defect-rich layer being any one of a polycrystalline silicon layer and a porous silicon layer. In the present invention, providing the second defect-rich layer can effectively block the interference of a substrate layer with electric signals in a back gate region, and providing the second buried oxide layer can block the leakage of the original TRL / SUB layer. Therefore, compared with existing RFSOI wafers, the RFSOI wafer of the present invention has lower back gate leakage and a capability of isolating the substrate coupling effect.

Description

A low substrate leakage RFSOI wafer and its preparation method Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a low substrate leakage RFSOI wafer and a preparation method thereof. Background Art

[0002] SOI stands for Silicon-On-Insulator, which means silicon on an insulating substrate. This technology introduces a buried oxide layer between the top silicon and the back substrate. It has the characteristics of low power consumption, high speed, anti-latch and excellent RF performance.

[0003] When RF chips are formed on a silicon substrate, the semiconductor properties of silicon cause attenuation of RF signals in the substrate. Simultaneously, the characteristics of silicon-based semiconductor components also lead to the transmission of parasitic interference (crosstalk noise).

[0004] RFSOI, or radio frequency silicon-on-insulator (RFSOI), a new semiconductor material technology, has become a key enabler in 5G RF chip manufacturing. RFSOI offers performance advantages such as higher integration, higher power output, lower noise figure, faster switching speeds, and lower losses. It also provides more accurate, efficient, and comprehensive test data, helping designers better evaluate the performance and stability of RF chips.

[0005] However, the RF circuits made based on RFSOI wafers in the existing technology have the following problems: when a bias voltage is applied to the back gate, there is a large back gate leakage current between the trap rich layer (TRL) on the active area side and the back gate region formed by doping the TRL, which seriously affects the back gate control capability. The existing RFSOI wafer and the device structure made from it are shown in Figure 1-2.

[0006] In view of this, the present invention is proposed.

[0007] Summary of the Invention

[0008] The object of the present invention is to provide a low substrate leakage RFSOI wafer and a preparation method thereof, wherein the wafer has lower back gate leakage and the ability to isolate substrate coupling effect than the existing RFSOI wafer.

[0009] In a first aspect, the present invention provides a low substrate leakage RFSOI wafer, as shown in FIG3 , comprising a first silicon layer, a first buried oxide layer, a first defect-enriched layer, a second buried oxide layer, a second defect-enriched layer, and a wafer substrate, arranged sequentially from top to bottom.

[0010] Wherein, the first defect-rich layer and the second defect-rich layer are any one of a polysilicon layer and a porous silicon layer.

[0011] As a preferred embodiment of the present technical solution, the present invention does not impose strict restrictions on the materials of the first buried oxide layer and the second buried oxide layer, and specifically, the materials may include any one of silicon dioxide, glass and sapphire.

[0012] The first silicon layer of the present invention may be specifically composed of N-type or P-type semiconductor materials.

[0013] In a second aspect, the present invention further provides a method for preparing the above-mentioned RFSOI wafer, which specifically comprises the following steps:

[0014] S1, preparing a second defect-rich layer on the surface of the first wafer substrate and growing SiO2 as a second buried oxide layer;

[0015] S2, preparing a first defect-enriched layer on the surface of the second wafer substrate;

[0016] S3, flipping the second wafer substrate obtained in step S2 upside down and bonding it to the surface of the second buried oxide layer in step S1;

[0017] S4, peeling off the second wafer substrate after the high-temperature hydrogen implantation, leaving the defect-rich layer as the first defect-rich layer;

[0018] S5, growing SiO2 on the surface of the first defect-rich layer as a first buried oxide layer;

[0019] S6, injecting hydrogen at high temperature on the surface of the third wafer substrate;

[0020] S7, flipping the third wafer substrate after high-temperature hydrogen implantation in step S6 on the surface of the first buried oxide layer in step S5 for bonding, and stripping the hydrogen implanted portion of the third wafer substrate under high temperature conditions to obtain an RFSOI wafer;

[0021] There is no restriction on the order of steps S1, S2 and S3.

[0022] When the polysilicon layer is used as the first defect-rich layer, step S2 specifically includes: taking another second wafer substrate, then growing a polysilicon layer on the surface of the second wafer substrate, and implanting hydrogen at high temperature;

[0023] When preparing the polysilicon layer, LPCVD is used to treat it at 600-700°C for 20-60 minutes. Since the growth thickness is positively correlated with the growth time, the growth thickness can be controlled by the growth time.

[0024] After the polysilicon layer is grown, high-temperature hydrogen is injected into the surface of the polysilicon layer. Specifically, the hydrogen injection dosage is 5×10 16 -1×10 17 ions / cm 2The hydrogen injection energy is 10-80kev, the hydrogen injection depth is 0.2μm-0.8μm, and the hydrogen injection energy and depth are approximately linearly related. The control of the injection depth is determined by the thickness of the subsequent stripping.

[0025] When porous silicon is used as the first defect-rich layer, step S2 specifically includes: growing single crystal silicon on the surface of the second wafer substrate, and then converting the single crystal silicon into porous silicon by electrolysis;

[0026] Specifically, when preparing single-crystalline silicon, a CVD epitaxial growth process is used. The epitaxial growth process is as follows: In a high-temperature gas chamber, Si is vaporized with H2 at a temperature of 200-500°C to form gaseous SiH4. The gaseous SiH4 is passed into another chamber where a second wafer substrate is placed. At a high temperature of 600°C, a chemical reaction occurs to form Si and H2 hydrogen, and Si is deposited on the surface of the second wafer.

[0027] During the electrolysis, the electrolyte used was composed of 40% hydrofluoric acid and 40% dimethylformamide in a volume ratio of 1:2. A bias voltage was applied at room temperature without light to make the current density reach 64 mA / cm 2 The longer the corrosion time, the larger the pore diameter and the deeper the depth, the more necessary it is to control as needed during actual operation (Figure 8).

[0028] As a preferred embodiment of the present technical solution, in step S1, when preparing the second defect-rich layer, LPCVD is used at 600-700° C. for 20-60 minutes to grow a polysilicon layer, and the growth thickness can be specifically controlled by the growth time;

[0029] After the growth of the polysilicon layer is completed, the first wafer substrate with the polysilicon layer grown on the surface is placed in an oxygen-rich environment, and the first wafer substrate is exposed to the oxygen-rich environment to thermally oxidize Si at high temperature to generate SiO2, wherein the thermal oxidation treatment temperature is 650-750°C, and preferably 700°C min, to prepare a second buried oxide layer, and the oxygen-rich environment here can preferably be a vertical oxidation furnace. The relationship between the thermal oxidation time and the oxide layer thickness is shown in Figure 6. The thickness of the second buried oxide layer in the present invention is preferably 5-150nm.

[0030] As a preferred embodiment of the present technical solution, in steps S3 and S7, before bonding, the surface of the wafer to be bonded is subjected to a hydrophilic treatment;

[0031] Specifically, during the hydrophilic treatment, the two wafers to be bonded are first immersed in water. After the wafers are taken out of the water, a layer of water film is adsorbed on the surface, which is the hydrophilic treatment.

[0032] The adsorbed water destroys the Si-O-Si bond on the surface of the silicon wafer and forms an OH bond with water. At 110-150°C, the two wafers with OH bonds after hydrophilic treatment can undergo a polymerization reaction to produce water and Si-O bonds. Subsequently, low-temperature bonding can be performed at 140-160°C, and preferably 150°C.

[0033] As a preferred embodiment of the present technical solution, in step S5, when preparing the first buried oxide layer, the first wafer substrate processed in step S4 is placed in an oxygen-rich environment, and Si is thermally oxidized at a high temperature to generate SiO2, wherein the thermal oxidation treatment temperature is 650-750°C, and preferably 700°C min. Specifically, the oxidation thickness can be determined by the oxidation time. The relationship between the thermal oxidation time and the oxide layer thickness is shown in Figure 5. In the present invention, the thickness of the first buried oxide layer is preferably 5-150nm;

[0034] In step S6, during the high temperature hydrogen injection, the hydrogen injection dosage is 5×10 16 -1×10 17 ions / cm 2 The hydrogen injection energy is 10-80kev, the hydrogen injection depth is 0.2-0.8μm, and the thickness of the second hydrogen-injected silicon wafer after peeling is approximately the average value of the hydrogen injection depth during hydrogen injection. When the hydrogen injection dose is consistent, the injection depth can be controlled by the injection distance (Figure 7) to obtain the first silicon layer with the required specific peeling thickness.

[0035] The low substrate leakage RFSOI wafer of the present invention has at least the following beneficial effects:

[0036] The low-substrate-leakage RFSOI wafer of the present invention comprises, arranged from top to bottom, a first silicon layer, a first buried oxide layer, a first defect-enriched layer, a second buried oxide layer, a second defect-enriched layer, and a wafer substrate. The second defect-enriched layer effectively blocks interference from the substrate layer on the electrical signals in the back-gate region, while the second buried oxide layer blocks leakage from the original TRL / SUB layer. Consequently, the RFSOI wafer of the present invention exhibits lower back-gate leakage and the ability to isolate substrate coupling effects compared to existing RFSOI wafers. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the specific embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0038] FIG1 shows the structure of an RFSOI wafer in the prior art;

[0039] FIG2 is a device structure made of RFSOI wafer in the prior art;

[0040] FIG3 shows the structure of the RFSOI wafer with low substrate leakage according to the present invention;

[0041] FIG4 is a first process for preparing a low substrate leakage RFSOI wafer according to the present invention;

[0042] FIG5 is a second process for preparing a low substrate leakage RFSOI wafer according to the present invention;

[0043] FIG6 is a graph showing the relationship between oxidation time and oxidation thickness during thermal oxidation according to the present invention;

[0044] FIG7 is a diagram showing the relationship between the hydrogen injection range and the hydrogen injection energy according to the present invention;

[0045] FIG8 is a schematic diagram showing the principle of preparing porous silicon by the electrolytic method of the present invention.

[0046] Reference numerals: 1: first silicon layer; 2: first buried oxide layer; 3: first defect-enriched layer; 4: second buried oxide layer; 5: second defect-enriched layer; 6: wafer substrate. DETAILED DESCRIPTION

[0047] It should be noted that the following detailed descriptions are illustrative and intended to provide further explanation of the present application. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which the present application belongs.

[0048] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular also includes the plural. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, they indicate the presence of features, steps, operations, devices, components and / or combinations thereof.

[0049] The following will clearly and completely describe the technical solutions of the present invention in conjunction with the embodiments. Obviously, the embodiments described are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0050] Example 1

[0051] S1. LPCVD is used to treat the surface of the first wafer substrate at 700°C for 20 minutes to grow a polysilicon layer as a second defect-enriched layer; then, the first wafer substrate with the polysilicon layer grown on the surface is placed in a vertical oxidation furnace and oxidized at 700°C to grow SiO2 as a second buried oxide layer, wherein the thickness of the second buried oxide layer is 100 nm;

[0052] S2. Take another second wafer substrate, and then use LPCVD to treat the surface of the second wafer substrate at 700°C for 20 minutes to grow a polysilicon layer on the surface of the second wafer substrate. Finally, hydrogen is injected into the surface of the polysilicon layer, wherein the hydrogen injection dose is 5×10 16 ions / cm 2 , the hydrogen injection energy is 50kev, and the hydrogen injection depth is 0.5μm;

[0053] S3, performing a hydrophilic treatment on the surface of the second wafer substrate obtained in step S2 and the surface of the second buried oxide layer in step S1, and then flipping the second wafer substrate obtained in step S2 over the surface of the second buried oxide layer in step S1 and bonding them at 150° C.;

[0054] S4, performing a stripping treatment at 500° C. to cause bubbles to form at the hydrogen ion-enriched areas of the upper hydrogen-implanted silicon wafer, thereby stripping the second wafer substrate after the high-temperature hydrogen implantation, leaving a defect-enriched layer as the first defect-enriched layer;

[0055] S5. Oxidation treatment is performed in a vertical oxidation furnace at 700° C. to grow SiO 2 as a first buried oxide layer on the surface of the first defect-rich layer, wherein the thickness of the first buried oxide layer is 100 nm;

[0056] S6, take another third wafer substrate, and then inject hydrogen at high temperature on the surface of the third wafer substrate, wherein the hydrogen injection dose is 5×10 16 ions / cm 2 , the hydrogen injection energy is 50kev, and the hydrogen injection depth is 0.5μm;

[0057] S7, performing a hydrophilic treatment on the surfaces of the third wafer substrate after the high-temperature hydrogen implantation in step S6 and the first buried oxide layer in step S5, then flipping the third wafer substrate after the high-temperature hydrogen implantation in step S6 on the surface of the first buried oxide layer in step S5 for bonding at 150° C., and performing a stripping treatment at a high temperature of 600° C. to strip off the hydrogen implanted portion of the third wafer substrate, thereby obtaining an RFSOI wafer ( FIG4 );

[0058] There is no restriction on the order of steps S1, S2 and S3.

[0059] Example 2

[0060] S1. Take a first wafer substrate and treat the surface of the first wafer substrate by LPCVD at 700°C for 20 minutes to grow a polysilicon layer as a second defect-enriched layer; then, place the first wafer substrate with the polysilicon layer grown on the surface in a vertical oxidation furnace and perform oxidation treatment at 700°C to grow SiO2 as a second buried oxide layer, wherein the thickness of the second buried oxide layer is 150 nm;

[0061] S2, take another second wafer substrate, firstly inject hydrogen at high temperature on the surface of the second wafer substrate, wherein the hydrogen injection dose is 5×10 16 ions / cm 2 The hydrogen injection energy is 50kev, and the hydrogen injection depth is 0.5μm. Then, in a high-temperature gas chamber, Si is vaporized with H2 at a temperature of 500℃ to become gaseous SiH4. The gaseous SiH4 is passed into another chamber where a second wafer substrate is placed. At a high temperature of 600℃, a chemical reaction occurs to form Si and H2 hydrogen, and Si is deposited on the surface of the second wafer. The single crystal silicon is then converted into porous silicon by electrolysis. The electrolyte used is composed of 40% hydrofluoric acid and 40% dimethylformamide, with a volume ratio of 1:2. A bias voltage is applied at room temperature without the aid of light to achieve a current density of 64mA / cm 2 ;

[0062] S3, performing a hydrophilic treatment on the surface of the second wafer substrate obtained in step S2 and the surface of the second buried oxide layer in step S1, and then flipping the second wafer substrate obtained in step S2 over the surface of the second buried oxide layer in step S1 and bonding them at 150° C.;

[0063] S4, performing a stripping treatment at 500° C. to cause bubbles to form at the hydrogen ion-enriched areas of the upper hydrogen-implanted silicon wafer, thereby stripping the second wafer substrate after the high-temperature hydrogen implantation, leaving a defect-enriched layer as the first defect-enriched layer;

[0064] S5. Oxidation treatment is performed in a vertical oxidation furnace at 700° C. to grow SiO 2 as a first buried oxide layer on the surface of the first defect-rich layer, wherein the thickness of the first buried oxide layer is 150 nm;

[0065] S6, take another third wafer substrate, and then inject hydrogen at high temperature on the surface of the third wafer substrate, wherein the hydrogen injection dose is 5×10 16 ions / cm 2 , the hydrogen injection energy is 50kev, and the hydrogen injection depth is 0.5μm;

[0066] S7, performing a hydrophilic treatment on the surfaces of the third wafer substrate after the high-temperature hydrogen implantation in step S6 and the first buried oxide layer in step S5, then flipping the third wafer substrate after the high-temperature hydrogen implantation in step S6 over the surface of the first buried oxide layer in step S5 for bonding at 150° C., and treating at a high temperature of 400° C. to peel off the hydrogen implanted portion of the third wafer substrate, thereby obtaining an RFSOI wafer ( FIG5 );

[0067] There is no restriction on the order of steps S1, S2 and S3.

[0068] Example 3

[0069] S1. Using LPCVD to treat the surface of a first wafer substrate at 600°C for 60 minutes to grow a polysilicon layer as a second defect-enriched layer; then, placing the first wafer substrate with the polysilicon layer grown on the surface in a vertical oxidation furnace and performing oxidation treatment at 750°C to grow SiO2 as a second buried oxide layer, wherein the thickness of the second buried oxide layer is 150 nm;

[0070] S2. Take another second wafer substrate, and then use LPCVD to treat the surface of the second wafer substrate at 600°C for 60 minutes to grow a polysilicon layer on the surface of the second wafer substrate. Finally, hydrogen is implanted into the surface of the polysilicon layer, wherein the hydrogen implantation dose is 1×10 17 ions / cm 2 , the hydrogen injection energy is 10keV, and the hydrogen injection depth is 0.8μm;

[0071] S3, performing a hydrophilic treatment on the surface of the second wafer substrate obtained in step S2 and the surface of the second buried oxide layer in step S1, and then flipping the second wafer substrate obtained in step S2 over the surface of the second buried oxide layer in step S1 and bonding them at 150° C.;

[0072] S4, performing a stripping treatment at 400-600° C. to cause bubbles to form at the hydrogen ion-enriched areas of the upper hydrogen-implanted silicon wafer, thereby stripping the second wafer substrate after high-temperature hydrogen implantation, leaving a defect-enriched layer as the first defect-enriched layer;

[0073] S5. Oxidation treatment is performed in a vertical oxidation furnace at 650° C. to grow SiO 2 as a first buried oxide layer on the surface of the first defect-rich layer, wherein the thickness of the first buried oxide layer is 150 nm;

[0074] S6, take another third wafer substrate, and then inject hydrogen at high temperature on the surface of the third wafer substrate, wherein the hydrogen injection dose is 1×10 17 ions / cm 2 , the hydrogen injection energy is 20keV, and the hydrogen injection depth is 0.8μm;

[0075] S7, performing a hydrophilic treatment on the surfaces of the third wafer substrate after the high-temperature hydrogen implantation in step S6 and the first buried oxide layer in step S5, then flipping the third wafer substrate after the high-temperature hydrogen implantation in step S6 on the surface of the first buried oxide layer in step S5 for bonding at 150° C., and performing a stripping treatment at a high temperature of 600° C. to strip off the hydrogen implanted portion of the third wafer substrate, thereby obtaining an RFSOI wafer ( FIG4 );

[0076] There is no restriction on the order of steps S1, S2 and S3.

[0077] Example 4

[0078] S1. Take a first wafer substrate and treat the surface of the first wafer substrate by LPCVD at 600°C for 60 minutes to grow a polysilicon layer as a second defect-enriched layer; then, place the first wafer substrate with the polysilicon layer grown on the surface in a vertical oxidation furnace and perform oxidation treatment at 650°C to grow SiO2 as a second buried oxide layer, wherein the thickness of the second buried oxide layer is 100 nm;

[0079] S2, take another second wafer substrate, firstly inject hydrogen at high temperature on the surface of the second wafer substrate, wherein the hydrogen injection dose is 5×10 16 ions / cm 2 The hydrogen injection energy is 50kev, and the hydrogen injection depth is 0.8μm. Then, in a high-temperature gas chamber, Si is vaporized with H2 at a high temperature of 500℃ to become gaseous SiH4. The gaseous SiH4 is passed into another chamber where a second wafer substrate is placed. At a high temperature of 600℃, a chemical reaction occurs to form Si and H2 hydrogen, and Si is deposited on the surface of the second wafer. The single crystal silicon is then converted into porous silicon by electrolysis. The electrolyte used is composed of hydrofluoric acid with a mass concentration of 40% and dimethylformamide with a mass concentration of 40%, with a volume ratio of 1:2. A bias voltage is applied at room temperature without the aid of light to achieve a current density of 64mA / cm 2 ;

[0080] S3, performing a hydrophilic treatment on the surface of the second wafer substrate obtained in step S2 and the surface of the second buried oxide layer in step S1, and then flipping the second wafer substrate obtained in step S2 over the surface of the second buried oxide layer in step S1 and bonding them at 150° C.;

[0081] S4, treating at 600° C. to cause bubbles to form at the hydrogen ion-enriched areas of the upper hydrogen-implanted silicon wafer, so as to peel off the second wafer substrate after the high-temperature hydrogen implantation, leaving a defect-enriched layer as the first defect-enriched layer;

[0082] S5. Oxidation treatment is performed in a vertical oxidation furnace at 650° C. to grow SiO 2 as a first buried oxide layer on the surface of the first defect-rich layer, wherein the thickness of the first buried oxide layer is 100 nm;

[0083] S6, take another third wafer substrate, and then inject hydrogen at high temperature on the surface of the third wafer substrate, wherein the hydrogen injection dose is 5×10 16 ions / cm 2 , the hydrogen injection energy is 20keV, and the hydrogen injection depth is 0.2μm;

[0084] S7, performing a hydrophilic treatment on the surfaces of the third wafer substrate after the high-temperature hydrogen implantation in step S6 and the first buried oxide layer in step S5, then flipping the third wafer substrate after the high-temperature hydrogen implantation in step S6 over the surface of the first buried oxide layer in step S5 for bonding at 150° C., and treating at a high temperature of 600° C. to peel off the hydrogen implanted portion of the third wafer substrate, thereby obtaining an RFSOI wafer ( FIG5 );

[0085] There is no restriction on the order of steps S1, S2 and S3.

[0086] Example 5

[0087] S1. In a high-temperature gas chamber, Si is vaporized with H2 at 500°C to form gaseous SiH4. The gaseous SiH4 is passed into another chamber containing a first wafer substrate, where a chemical reaction occurs at 600°C to form Si and H2 hydrogen. Si is deposited on the surface of the first wafer. The single-crystal silicon is then converted into porous silicon by electrolysis. The electrolyte used is composed of 40% hydrofluoric acid and 40% dimethylformamide in a volume ratio of 1:2. A bias voltage is applied at room temperature without light to achieve a current density of 64 mA / cm 2 Then, the first wafer substrate with porous silicon grown on the surface was placed in a vertical oxidation furnace and oxidized at 650°C to grow SiO2 as a second buried oxide layer, wherein the thickness of the second buried oxide layer was 100 nm;

[0088] S2, take another second wafer substrate, firstly inject hydrogen at high temperature on the surface of the second wafer substrate, wherein the hydrogen injection dose is 5×10 16 ions / cm 2 The hydrogen injection energy is 50kev, and the hydrogen injection depth is 0.8μm. Then, in a high-temperature gas chamber, Si is vaporized with H2 at a high temperature of 500℃ to become gaseous SiH4. The gaseous SiH4 is passed into another chamber where a second wafer substrate is placed. At a high temperature of 600℃, a chemical reaction occurs to form Si and H2 hydrogen, and Si is deposited on the surface of the second wafer. The single crystal silicon is then converted into porous silicon by electrolysis. The electrolyte used is composed of 40% hydrofluoric acid and 40% dimethylformamide, with a volume ratio of 1:2. A bias voltage is applied at room temperature without the aid of light to achieve a current density of 64mA / cm 2 ;

[0089] S3, performing a hydrophilic treatment on the surface of the second wafer substrate obtained in step S2 and the surface of the second buried oxide layer in step S1, and then flipping the second wafer substrate obtained in step S2 over the surface of the second buried oxide layer in step S1 and bonding them at 150° C.;

[0090] S4, treating at 600° C. to cause bubbles to form at the hydrogen ion-enriched areas of the upper hydrogen-implanted silicon wafer, so as to peel off the second wafer substrate after the high-temperature hydrogen implantation, leaving a defect-enriched layer as the first defect-enriched layer;

[0091] S5. Oxidation treatment is performed in a vertical oxidation furnace at 650° C. to grow SiO 2 as a first buried oxide layer on the surface of the first defect-rich layer, wherein the thickness of the first buried oxide layer is 100 nm;

[0092] S6, take another third wafer substrate, and then inject hydrogen at high temperature on the surface of the third wafer substrate, wherein the hydrogen injection dose is 5×10 16 ions / cm 2 , the hydrogen injection energy is 20keV, and the hydrogen injection depth is 0.2μm;

[0093] S7, performing a hydrophilic treatment on the surfaces of the third wafer substrate after the high-temperature hydrogen implantation in step S6 and the first buried oxide layer in step S5, then flipping the third wafer substrate after the high-temperature hydrogen implantation in step S6 over the surface of the first buried oxide layer in step S5 for bonding at 150° C., and treating at a high temperature of 600° C. to peel off the hydrogen implanted portion of the third wafer substrate, thereby obtaining an RFSOI wafer;

[0094] There is no restriction on the order of steps S1, S2 and S3.

[0095] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. An RFSOI wafer with low substrate leakage, characterized in that, It includes a first silicon layer, a first buried oxide layer, a first defect enrichment layer, a second buried oxide layer, a second defect enrichment layer, and a wafer substrate that are sequentially arranged from top to bottom. Among them, both the first defect enrichment layer and the second defect enrichment layer are any one of a polysilicon layer and a porous silicon layer.

2. The RFSOI wafer according to claim 1, wherein The materials of the first buried oxide layer and the second buried oxide layer include any one of silicon dioxide, glass, and sapphire.

3. The RFSOI wafer according to claim 1, wherein The first silicon layer is composed of an N- or P-type semiconductor material.

4. The method for preparing the RFSOI wafer according to any one of claims 1-3, characterized in that, It includes the following steps: S1. Prepare a second defect enrichment layer on the surface of a first wafer substrate, and grow SiO2 as the second buried oxide layer. S2. Prepare a first defect enrichment layer on the surface of a second wafer substrate. S3. Invert the second wafer substrate obtained in step S2 and bond it to the surface of the second buried oxide layer in step S1. S4. Peel off the second wafer substrate after high-temperature hydrogen injection, and leave the defect enrichment layer as the first defect enrichment layer. S5. Grow SiO2 on the surface of the first defect enrichment layer as the first buried oxide layer. S6. Inject hydrogen at high temperature on the surface of a third wafer substrate. S7. Invert the third wafer substrate after high-temperature hydrogen injection in step S6 and bond it to the surface of the first buried oxide layer in step S5, and peel off the hydrogen-injected part in the third wafer substrate under high-temperature conditions to obtain an RFSOI wafer. Among them, steps S1, S2, and S3 have no order limit.

5. The preparation method according to claim 4, characterized in that, Step S2 includes: growing a polysilicon layer on the surface of a second wafer substrate and injecting hydrogen at high temperature. When preparing the polysilicon layer, it is processed at 600 - 700 °C for 20 - 60 min by LPCVD. During the high-temperature hydrogen injection, the hydrogen injection dose is 5×10 16 -1×10 17 ions / cm 2 , the hydrogen injection energy is 10 - 80 kev, and the hydrogen injection depth is 0.2 - 0.8 μm.

6. The preparation method according to claim 4, wherein Step S2 includes: growing single-crystalline silicon on the surface of a second wafer substrate, and then converting the single-crystalline silicon into porous silicon by electrolysis.

7. The preparation method according to claim 4, characterized in that, In step S1, when preparing the second defect enrichment layer, it is processed at 600 - 700 °C for 20 - 60 min by LPCVD to grow a polysilicon layer. When preparing the second buried oxide layer, the first wafer substrate with a polysilicon layer grown on its surface is placed in an oxygen-rich environment, and the thermal oxidation temperature is 650 - 750 °C.

8. The preparation method according to claim 4, wherein In steps S3 and S7, before bonding, the surfaces of the wafers to be bonded are subjected to a hydrophilic treatment, and when bonding, the temperature is controlled at 140 - 160 °C.

9. The preparation method according to claim 4, characterized in that, In steps S4 and S7, when peeling off, the peeling temperature is 400 - 600 °C.

10. The preparation method according to claim 4, characterized in that, In step S5, when preparing the first buried oxide layer, the thermal oxidation temperature is 650 - 750 °C. In step S6, during the high-temperature hydrogen injection, the hydrogen injection dose is 5×10 16 -1×10 17 ions / cm 2 , the hydrogen injection energy is 10 - 80 keV, and the hydrogen injection depth is 0.2 - 0.8 μm.

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