Image sensor

Abstract

An image sensor 1 comprises a plurality of pixels 11 arranged one-dimensionally. Each pixel 11 includes a photoelectric conversion region and a resistive gate 31. The photoelectric conversion region converts incident light into an electric charge. The resistive gate 31 is provided on the photoelectric conversion region, and applies an electric field having a gradient of intensity to the photoelectric conversion region to form a potential gradient, which urges movement of the electric charge, in the photoelectric conversion region. The resistive gate 31 of each pixel 11 is provided partially to the photoelectric conversion region of the pixel 11 in a plane orthogonal to the movement direction of the electric charge.

Description

Image Sensor

[0001] This application claims priority to Japanese Patent Application No. 2023-219795, filed December 26, 2023, and incorporates by reference the entire contents of said Japanese application.

[0002] Patent Document 1 discloses a solid-state imaging device. The solid-state imaging device includes a photoelectric conversion unit and a potential gradient generating unit. The photoelectric conversion unit has a plurality of photosensitive regions. Each photosensitive region generates an electric charge in response to incident light and has a substantially rectangular shape. The plurality of photosensitive regions are arranged side by side in a first direction intersecting the long sides. The potential gradient generating unit has a conductive member arranged opposite the plurality of photosensitive regions. The potential gradient generating unit generates a high potential gradient along a second direction from one short side of the photosensitive region to the other short side. The conductive member has a first region and a second region. The first region extends in the second direction between both ends in the second direction and has a first electrical resistivity. The second region extends in the second direction between both ends and has a second electrical resistivity smaller than the first electrical resistivity.

[0003] JP 2012-146916 A

[0004] Resistive gates are often used in image sensors, such as CCDs. A resistive gate is an electrode with a relatively high resistivity that is placed on a photoelectric conversion region. A resistive gate creates a potential gradient by applying a potential difference across its two ends in the direction of charge transfer, thereby creating a potential gradient within the photoelectric conversion region. Because the potential gradient promotes charge transfer, the residual charge within the photoelectric conversion region is reduced, improving image quality. However, applying a potential difference across the resistive gate causes current to flow within the resistive gate, resulting in problems such as increased power consumption and heat generation.

[0005] An object of the present disclosure is to provide an image sensor that can suppress increases in power consumption and heat generation in a resistive gate.

[0006] [1] An image sensor according to the present disclosure includes a plurality of pixels arranged one-dimensionally or two-dimensionally. Each of the plurality of pixels includes a photoelectric conversion region and a resistive gate. The photoelectric conversion region converts incident light into electric charges. The resistive gate is provided on the photoelectric conversion region and applies an electric field having a strength gradient to the photoelectric conversion region, thereby forming a potential gradient within the photoelectric conversion region that promotes the movement of electric charges. The resistive gate of each of the plurality of pixels is provided partially relative to the photoelectric conversion region of each of the plurality of pixels in at least one plane perpendicular to the direction of charge movement.

[0007] In the image sensor of [1] above, the resistive gate is partially disposed relative to the photoelectric conversion region in at least one plane perpendicular to the charge transfer direction. This reduces the cross-sectional area of ​​the resistive gate in a cross section perpendicular to the charge transfer direction, and increases the resistance of the resistive gate in the charge transfer direction, compared to when the resistive gate is disposed so as to cover the entire photoelectric conversion region. This reduces the amount of current flowing through the resistive gate, thereby minimizing increases in power consumption and heat generation in the resistive gate. Even in this configuration in which the resistive gate is partially disposed relative to the photoelectric conversion region in a plane perpendicular to the charge transfer direction, charges in the photoelectric conversion region gather in the potential gradient portion formed by the resistive gate and are encouraged to move. Therefore, charges in the photoelectric conversion region move smoothly, and residual charges in the photoelectric conversion region can be reduced.

[0008] [2] In the image sensor of [1] above, the photoelectric conversion region of each of the plurality of pixels may have a first region and a second region. The first region has a first impurity concentration and extends along the charge migration direction. The second region has a second impurity concentration lower than the first impurity concentration and sandwiches the first region when viewed in the thickness direction of the photoelectric conversion region. One or both of the width and depth of the first region in a plane perpendicular to the charge migration direction may expand along the charge migration direction. In this case, the first region further promotes charge migration. This makes it possible to further reduce the charge remaining in the photoelectric conversion region.

[0009] [3] In the image sensor of [1] above, the impurity concentration of the photoelectric conversion region may be increased stepwise along the direction of charge migration. In this case, the change in the impurity concentration of the photoelectric conversion region further promotes charge migration. Therefore, the charge remaining in the photoelectric conversion region can be further reduced.

[0010] [4] In any one of the image sensors described in [1] to [3] above, the pixels may be arranged one-dimensionally. Each of the pixels may be rectangular, with its longitudinal direction intersecting the direction in which the pixels are arranged. The longitudinal direction may coincide with the direction in which charges move, and the resistive gate may extend along the longitudinal direction. In this case, in a one-dimensional image sensor (linear image sensor), residual charges in the photoelectric conversion region can be reduced, thereby improving image quality.

[0011] [5] In the image sensor of [4], the width of at least a portion of the resistive gate in a direction perpendicular to the charge transfer direction may be smaller than the width of the photoelectric conversion region in the perpendicular direction. In this case, a configuration in which the resistive gate is partially provided with respect to the photoelectric conversion region in a plane perpendicular to the charge transfer direction can be realized with a simple structure.

[0012] [6] In the image sensor of any one of [1] to [3] above, the pixels are arranged two-dimensionally, and the electric charge may move toward the center or a corner of the photoelectric conversion region of each of the pixels. In this case, the electric charge remaining in the photoelectric conversion region of the two-dimensional image sensor can be reduced, thereby improving image quality.

[0013] [7] In the image sensor of [6] above, the resistive gate may extend radially from the destination of the charge. In this case, the charge distributed in the photoelectric conversion region can be uniformly migrated. This can further reduce the amount of charge remaining in the photoelectric conversion region.

[0014] [8] In the image sensor of [7] above, the resistive gate may be branched along its radial extension. In this case, the gap between the resistive gates becomes smaller. This further reduces the amount of charge remaining in the photoelectric conversion region.

[0015] According to the present disclosure, it is possible to provide an image sensor that can suppress increases in power consumption and heat generation in a resistive gate.

[0016] FIG. 1 is a plan view schematically illustrating an image sensor according to an embodiment of the present disclosure. FIG. 2 is a diagram illustrating a change in potential energy along a second direction in a semiconductor region of each pixel. FIG. 3 is a cross-sectional view taken along line III-III in FIG. 1 , illustrating a cross section of a pixel perpendicular to the charge transfer direction (second direction). FIG. 4 is a plan view schematically illustrating an image sensor according to a comparative example. FIG. 5 is a diagram illustrating a problem with the image sensor according to the comparative example. FIG. 6 is a plan view schematically illustrating the configuration of an image sensor according to a first modified example. FIG. 7 is a diagram illustrating a case where the cutout of the resistive gate is rectangular. FIG. 8 is a plan view schematically illustrating the configuration of an image sensor according to a second modified example. FIG. 9 is a plan view schematically illustrating the configuration of an image sensor according to a third modified example. FIG. 10 is a plan view schematically illustrating the configuration of an image sensor according to a second embodiment of the present disclosure. FIG. 11 is a plan view schematically illustrating each pixel. FIG. 12 is a diagram schematically illustrating wiring connected to multiple pixels. Fig. 13 is a plan view schematically showing a pixel of an image sensor according to a comparative example. Fig. 14 is a plan view schematically showing a configuration of a pixel included in an image sensor according to a fourth modified example. Fig. 15 is a plan view schematically showing a configuration of a pixel included in an image sensor according to a fifth modified example. Fig. 16 is a plan view schematically showing a configuration of a pixel included in an image sensor according to a sixth modified example. Fig. 17 is a plan view schematically showing a pixel having a resistive gate covering the entire semiconductor region.

[0017] Hereinafter, embodiments of an image sensor according to the present disclosure will be described in detail with reference to the accompanying drawings. The present disclosure is not limited to these examples, but is defined by the claims, and is intended to include all modifications within the meaning and scope of the claims. In the following description, identical elements in the description of the drawings will be given the same reference numerals, and duplicate explanations will be omitted.

[0018] [Embodiment] FIG. 1 is a plan view schematically illustrating an image sensor 1 according to an embodiment of the present disclosure. As shown in FIG. 1, the image sensor 1 according to this embodiment is a linear image sensor in which a plurality of pixels 11 are arranged in a single dimension, and includes a photosensitive section 10, a horizontal register 70, and an amplifier 80. The photosensitive section 10 includes a plurality of pixels 11 arranged along a first direction D1. Each of the plurality of pixels 11 generates an amount of charge corresponding to the intensity of incident light. The horizontal register 70 includes a plurality of charge holding sections 71 electrically connected to the plurality of pixels 11. Each of the plurality of charge holding sections 71 receives charge from a corresponding pixel 11 and holds the charge. The horizontal register 70 sequentially transfers and outputs the charges held in the plurality of charge holding sections 71. The amplifier 80 is electrically connected to the horizontal register 70, amplifies the charge transferred from the horizontal register 70 for each pixel 11, converts it into a voltage signal, and outputs the voltage signal.

[0019] Each pixel 11 has a rectangular shape with its longitudinal direction being a second direction D2 that intersects with the first direction D1. The second direction D2 is, for example, perpendicular to the first direction D1. Part (a) of FIG. 2 is a diagram schematically showing a cross section of each pixel 11 along the longitudinal direction. As shown in part (a) of FIG. 2, each pixel 11 has a semiconductor region 21, a resistive gate 31, a storage electrode 32, and transfer electrodes 33 and 34. The semiconductor region 21 has a major surface 21a and a back surface 21b facing away from the major surface 21a. The back surface 21b is parallel to the major surface 21a. The semiconductor region 21 has a p-type semiconductor region 22 and a p ＋ n-type semiconductor region 23, n-type semiconductor region 24, and n －The pixel 11 includes an n-type semiconductor region 25 and an n-type semiconductor region 26. The semiconductor region 21 mainly includes a semiconductor such as silicon (Si). The semiconductor region 21 may be a semiconductor film formed on a semiconductor substrate or a dielectric substrate. The semiconductor region 21 of each pixel 11 is electrically isolated from the semiconductor region 21 of an adjacent pixel 11 by an insulating region (e.g., LOCOS: Local Oxidation of Silicon).

[0020] The p-type semiconductor region 22 is located closer to the back surface 21b in the semiconductor region 21. ＋ The p-type semiconductor region 23 is doped with p-type impurities. ＋ The impurity concentration of the n-type semiconductor region 23 is higher than the impurity concentration of the p-type semiconductor region 22. － The n-type semiconductor region 25 and the n-type semiconductor region 26 are doped with n-type impurities. － The impurity concentration of the p-type semiconductor region 25 is higher than that of the p-type semiconductor region 26. ＋ n-type semiconductor region 23, n-type semiconductor region 24, － The n-type semiconductor region 25 and the n-type semiconductor region 26 are located on the main surface 21a side of the p-type semiconductor region 22, are in contact with the p-type semiconductor region 22, and are arranged in this order on the p-type semiconductor region 22 along the second direction D2. Light enters the interior of the semiconductor region 21 from the back surface 21b of the semiconductor region 21. The light that enters the interior of the semiconductor region 21 is converted into electric charges at the pn junction surface at the boundary between the p-type semiconductor region 22 and the n-type semiconductor region 24. Therefore, the n-type semiconductor region 24 corresponds to the photoelectric conversion region of the present disclosure.

[0021] The resistive gate 31 is provided above the n-type semiconductor region 24 and faces the n-type semiconductor region 24 via an insulating film (not shown). The resistive gate 31 is made of a conductive resistive material such as polysilicon. The resistive gate 31 extends in the second direction D2 in the region above the n-type semiconductor region 24. A wiring 61 is connected to a point P1 near one end of the resistive gate 31 in the second direction D2. The potential of a region 31a (see FIG. 1 ) near the point P1 is determined by the potential of the wiring 61. A wiring 62 is connected to a point P2 near the other end of the resistive gate 31 in the second direction D2. The potential of a region 31b (see FIG. 1 ) near the point P2 is determined by the potential of the wiring 62. The potential of the region 31b is different from the potential of the region 31a, thereby forming a potential gradient between the region 31a (point P1) and the region 31b (point P2) of the resistive gate 31. The resistive gate 31 may be made of a transparent resistive material such as ITO (Indium-Tin Oxide) or a thin film of SiCr, which allows light to enter the semiconductor region 21 from the main surface 21 a.

[0022] The holding electrode 32 is provided above the n-type semiconductor region 24 and faces the n-type semiconductor region 24 via an insulating film (not shown). The holding electrode 32 is aligned with the resistive gate 31 above the n-type semiconductor region 24 in the second direction D2. That is, the holding electrode 32 is disposed near the end of the n-type semiconductor region 24 in the charge transfer direction. The transfer electrode 33 is － The n-type semiconductor region 25 is provided above the n-type semiconductor region 25 via an insulating film (not shown). － The transfer electrode 34 is provided above the n-type semiconductor region 26 and faces the n-type semiconductor region 26 via an insulating film (not shown). The transfer electrodes 33 and 34 are set to the same potential, for example.

[0023] Part (b) of Fig. 2 is a diagram showing the change in potential energy along the second direction D2 in the semiconductor region 21 of each pixel 11. As shown in part (b) of Fig. 2, ＋The potential energy E1 of the n-type semiconductor region 23 is the lowest, and the potential energies E2 and E3 of the n-type semiconductor region 24 are higher. The potential energy E3 of the region of the n-type semiconductor region 24 facing the retention electrode 32 is higher than the potential energy E2 of the region of the n-type semiconductor region 24 facing the resistive gate 31. The potential energy E5 of the n-type semiconductor region 26 is － The potential energy E4 of the semiconductor region 25 is higher than that of the semiconductor region 25.

[0024] Due to the potential gradient between points P1 and P2 of the resistive gate 31, an electric field having a strength gradient is applied to the n-type semiconductor region 24. As a result, a potential gradient that promotes the movement of charges is formed in the potential energy E2 of the n-type semiconductor region 24. That is, the potential energy E2 gradually increases as the distance from point P1 approaches point P2.

[0025] During a certain period during imaging, the potential energy E4 is set lower than the potential energy E3 by controlling the potential of the transfer electrode 33. At this time, the region of potential energy E3 acts as a potential well that holds the charge Q. At this time, the potential gradient of the potential energy E2 encourages the charge Q to move to the potential well within the n-type semiconductor region 24. The direction of movement of the charge Q at this time coincides with the second direction D2. Then, during a subsequent period, the potential of the transfer electrode 33 is controlled to set the potential energy E4 higher than the potential energy E3. As a result, the charge Q held in the potential well moves to the n-type semiconductor region 24. － The charge passes through the n-type semiconductor region 25 and the n-type semiconductor region 26 and is transferred to the charge holding section 71 of the horizontal register 70 shown in FIG.

[0026] FIG. 3 is a cross-sectional view taken along line III-III in FIG. 1 , showing a cross section of the pixel 11 perpendicular to the direction of movement of the charge Q, i.e., the second direction D2. As shown in FIGS. 1 and 3 , the resistive gate 31 of this embodiment is partially provided with respect to the semiconductor region 21 in a plane perpendicular to the direction of movement of the charge Q, i.e., the second direction D2. Here, "partial" is synonymous with the term "partially exposed" meaning that a portion of the semiconductor region 21 is exposed from the resistive gate 31 when viewed in the thickness direction of the semiconductor region 21. In other words, the semiconductor region 21 has a region facing the resistive gate 31 and a region not facing the resistive gate 31. In this embodiment, the width W1 of the resistive gate 31 in the direction perpendicular to the direction of movement of the charge Q, i.e., the first direction D1, is smaller than the width W2 of the semiconductor region 21 in the second direction D2 across the entire resistive gate 31. The width W1 of the resistive gate 31 may be constant across the entire resistive gate 31 in the second direction D2. The above-described potential gradient is formed in a region 241 of the n-type semiconductor region 24 that faces the resistive gate 31. In this example, the resistive gate 31 is provided facing the central portion of the semiconductor region 21 in the first direction D1, and the region 241 is formed in the center of the n-type semiconductor region 24 in the first direction D1.

[0027] The effects obtained by the image sensor 1 of this embodiment having the above configuration will be described along with the problems of an image sensor according to a comparative example. FIG. 4 is a plan view schematically illustrating an image sensor 100 according to the comparative example. The image sensor 100 includes a plurality of pixels 18 arranged along a first direction D1, each of which has a resistive gate 38. The potential of a region 38a at one end of the resistive gate 38 in the second direction D2 is determined by the potential of the wiring 61, and the potential of a region 38b at the other end of the resistive gate 38 in the second direction D2 is determined by the potential of the wiring 62. This image sensor 100 differs from the image sensor 1 of this embodiment in that the width W3 of the resistive gate 38 of each pixel 18 is greater than the width W2 of the semiconductor region 21 (see FIG. 3). In other words, in each pixel 18, the resistive gate 38 is provided to cover the entire semiconductor region 21 in a plane perpendicular to the direction of movement of the charge Q, i.e., the second direction D2.

[0028] Parts (a) and (b) of Figure 5 are diagrams for explaining problems with the image sensor 100 according to the comparative example. Parts (a) and (b) of Figure 5 schematically show a current A2 flowing through the resistive gate 38. When a potential difference is applied across the resistive gate 38, the current A2 flows through the resistive gate 38, causing problems such as increased power consumption and heat generation. As shown in part (a) of Figure 5, this is not a significant problem when the number of pixels 18 is small. However, as shown in part (b) of Figure 5, the power consumption and heat generation increase significantly as the number of pixels 18 increases.

[0029] To address the above-described problem, in the image sensor 1 of this embodiment, the resistive gate 31 is partially provided with respect to the semiconductor region 21 in a plane perpendicular to the direction of movement of the charge Q. This reduces the cross-sectional area of ​​the resistive gate 31 in a cross section perpendicular to the direction of movement of the charge Q compared to when the resistive gate is provided to cover the entire semiconductor region 21, thereby increasing the resistance of the resistive gate 31 in the direction of movement of the charge Q. This reduces the amount of current flowing through the resistive gate 31, thereby minimizing increases in power consumption and heat generation in the resistive gate 31. Even in this configuration in which the resistive gate 31 is partially provided with respect to the semiconductor region 21 in a plane perpendicular to the direction of movement of the charge Q, the charge Q in the semiconductor region 21 gathers in the potential gradient portion formed by the resistive gate 31 and is encouraged to move. Therefore, the charge Q in the semiconductor region 21 moves without any problems, and the amount of charge Q remaining in the semiconductor region 21 can be reduced.

[0030] To solve the above problem, it is conceivable to increase the resistance of the resistive gate 38 shown in FIG. 4 . To achieve this, it is conceivable to thin the resistive gate 38 or to lower the impurity concentration of the resistive gate 38. However, the thinner the resistive gate 38, the more likely the thickness of the resistive gate 38 varies between pixels, and the lower the impurity concentration, the more likely the impurity concentration of the resistive gate 38 varies between pixels, making manufacturing more difficult. It is also conceivable to reduce the magnitude of the voltage applied to the resistive gate 38, but this would reduce the potential gradient, raising concerns about residual charge Q. The image sensor 1 of this embodiment can be easily manufactured and achieves a sufficient potential gradient.

[0031] As in this embodiment, the multiple pixels 11 are arranged one-dimensionally, and each of the multiple pixels 11 has a rectangular shape with its longitudinal direction being a direction (second direction D2) intersecting with the arrangement direction (first direction D1) of the multiple pixels 11. The longitudinal direction coincides with the direction of movement of the charge Q, and the resistive gate 31 may extend along the longitudinal direction. In this case, in a one-dimensional image sensor, i.e., a linear image sensor, it is possible to reduce the charge Q remaining in the semiconductor region 21 and improve image quality.

[0032] As in this embodiment, in at least a part of the resistive gate 31 in the direction of movement of the charge Q, the width W1 of the resistive gate 31 in the direction perpendicular to the direction of movement of the charge Q may be smaller than the width W2 of the semiconductor region 21 in the perpendicular direction. In this case, a configuration in which the resistive gate 31 is partially provided with respect to the semiconductor region 21 in a plane perpendicular to the direction of movement of the charge Q can be realized with a simple structure.

[0033] [First Modification] Fig. 6 is a plan view schematically showing the configuration of an image sensor 1A according to a first modification. As shown in Fig. 6, the image sensor 1A of this modification includes a photosensitive section 10A instead of the photosensitive section 10 of the above embodiment. The configurations of the horizontal register 70 and the amplifier 80 are the same as those of the above embodiment.

[0034] The photosensitive section 10A has a plurality of pixels 19 instead of the plurality of pixels 11 of the above embodiment. The plurality of pixels 19 are arranged one-dimensionally along the first direction D1. Each pixel 19 differs from the pixel 11 of the above embodiment in that it has a resistive gate 31A instead of the resistive gate 31 of the above embodiment. The configuration of each pixel 19 is otherwise the same as that of each pixel 11 of the above embodiment, except for the resistive gate 31A. In FIG. 6, the resistive gate 31A is indicated by dots.

[0035] The resistive gate 31A of this modification is partially provided with respect to the semiconductor region 21 within a plurality of planes F1 perpendicular to the movement direction (second direction D2) of the charge Q. The figure shows the n-type semiconductor region 24 of the semiconductor region 21. Within another plurality of planes F2 perpendicular to the movement direction (second direction D2) of the charge Q, the resistive gate 31A is provided so as to cover the entire semiconductor region 21. In this modification, the planes F1 and F2 are alternately repeated along the movement direction (second direction D2) of the charge Q. That is, in the resistive gate 31A, portions that partially cover the semiconductor region 21 and portions that entirely cover the semiconductor region 21 are alternately repeated along the movement direction (second direction D2) of the charge Q. In this modified example, the width of the resistive gate 31A in a direction perpendicular to the direction of movement of the charge Q (first direction D1) is smaller than the width of the semiconductor region 21 in the same direction in multiple parts of the resistive gate 31 aligned in the second direction D2.

[0036] Specifically, in the example shown in Fig. 6, a semicircular cutout 311 is formed in the resistive gate 31A of each pixel 19. The semicircular cutouts 311 of adjacent resistive gates 31A are joined to form a circular opening. This realizes the above-described configuration of the resistive gate 31A. The shape of the cutout 311 of the resistive gate 31A is not limited to a semicircular shape, and may be rectangular, for example, as shown in Fig. 7.

[0037] In this modification, the cross-sectional area of ​​the resistive gate 31A is reduced at least on the multiple faces F1, and the resistance value of the resistive gate 31A is increased in the direction of movement of the charge Q. This reduces the amount of current flowing through the resistive gate 31A, making it possible to suppress increases in power consumption and heat generation in the resistive gate 31A.

[0038] [Second Modification] Fig. 8 is a plan view schematically showing the configuration of an image sensor 1B according to a second modification. As shown in Fig. 8, the image sensor 1B of this modification includes a photosensitive section 10B instead of the photosensitive section 10 of the above embodiment. The configurations of the horizontal register 70 and the amplifier 80 are the same as those of the above embodiment.

[0039] The photosensitive section 10B has a plurality of pixels 20 instead of the plurality of pixels 11 of the above embodiment. The plurality of pixels 20 are arranged one-dimensionally along the first direction D1. Each pixel 20 differs from the pixel 11 of the above embodiment in that it has a resistive gate 31B instead of the resistive gate 31 of the above embodiment. The configuration of each pixel 20, except for the resistive gate 31B, is the same as that of each pixel 11 of the above embodiment. In FIG. 8, the resistive gate 31B is indicated by dots.

[0040] The resistive gate 31B of this modification is also provided partially with respect to the semiconductor region 21 in a plane F1 perpendicular to the movement direction (second direction D2) of the charge Q. The figure shows the n-type semiconductor region 24 of the semiconductor region 21. In addition, in another plane F2 perpendicular to the movement direction (second direction D2) of the charge Q, the resistive gate 31B is provided so as to cover the entire semiconductor region 21.

[0041] Specifically, the resistive gate 31B of this modification has an opening 312. FIG. 8 shows a rectangular opening 312 whose longitudinal direction is the movement direction of the charge Q (second direction D2). However, the shape of the opening 312 is not limited to this. FIG. 8 illustrates an example in which the resistive gate 31B in each pixel 20 has a single opening 312, but the resistive gate 31B in each pixel 20 may have multiple openings. In this case, the multiple openings may be aligned along the movement direction of the charge Q (second direction D2) or along a direction perpendicular to the movement direction of the charge Q (first direction D1).

[0042] In this modification, the cross-sectional area of ​​the resistive gate 31B is reduced at least on the surface F1, and the resistance value of the resistive gate 31B in the direction of movement of the charge Q is increased. This reduces the amount of current flowing through the resistive gate 31B, making it possible to suppress increases in power consumption and heat generation in the resistive gate 31B. [Third Modification]

[0043] 9 is a plan view schematically illustrating the configuration of an image sensor 2 according to a third modification. As shown in FIG. 9, the image sensor 2 of this modification includes a photosensitive section 10C instead of the photosensitive section 10 of the above embodiment. The configurations of the horizontal register 70 and the amplifier 80 are the same as those of the above embodiment.

[0044] The photosensitive portion 10C has a plurality of pixels 12 instead of the plurality of pixels 11 of the above embodiment. The plurality of pixels 12 are arranged one-dimensionally along the first direction D1. Each pixel 12 differs from the pixel 11 of the above embodiment in that it has an n-type semiconductor region 24A instead of the n-type semiconductor region 24 of the above embodiment. The shape of each pixel 12 and the configuration of the resistive gate 31 are similar to the shape of the pixel 11 of the above embodiment and the configuration of the resistive gate 31.

[0045] The n-type semiconductor region 24A has a first region 24a and a pair of second regions 24b. The first region 24a has a first impurity concentration and extends along the direction of movement of the charge Q (second direction D2). The pair of second regions 24b have a second impurity concentration that is lower than the first impurity concentration. When the n-type semiconductor region 24A is made of silicon (Si) and the impurity is phosphorus (P), the first impurity concentration is, for example, 1×10 １６ cm －３ 1x10 or more １８ cm －３ The second impurity concentration is, for example, 1×10 １４ cm －３ 1x10 or more １６ cm －３The pair of second regions 24b sandwich the first region 24a when viewed in the thickness direction of the n-type semiconductor region 24A. In other words, the first region 24a is located between the pair of second regions 24b in the first direction D1. As shown in the illustrated example, the first region 24a may overlap the resistive gate 31 when viewed in the thickness direction of the n-type semiconductor region 24A. The center line of the first region 24a in the second direction D2 may coincide with the center line of the resistive gate 31 in the second direction D2.

[0046] One or both of the width W4 and depth of the first region 24a in a plane perpendicular to the movement direction (second direction D2) of the charge Q increases along the movement direction (second direction D2) of the charge Q. In other words, the cross-sectional area of ​​the first region 24a in a cross section perpendicular to the movement direction of the charge Q gradually increases along the movement direction of the charge Q. Figure 9 shows an example in which the width W4 of the first region 24a increases in a cusp-like manner along the movement direction of the charge Q.

[0047] In this modification, as described above, one or both of the width W4 and the depth of the first region 24a are expanded along the movement direction (second direction D2) of the charge Q. This creates a potential gradient due to the change in impurity concentration, and the first region 24a further promotes the movement of the charge Q, thereby further reducing the charge Q remaining in the semiconductor region 21.

[0048] Second Embodiment Fig. 10 is a plan view schematically illustrating the configuration of an image sensor 3 according to a second embodiment of the present disclosure. The image sensor 3 according to this embodiment is an image sensor in which a plurality of pixels 13 are two-dimensionally arranged in the row and column directions, and includes a photosensitive section 10D. The photosensitive section 10D includes a plurality of pixels 13. Each of the plurality of pixels 13 generates an amount of charge corresponding to the intensity of incident light and converts the charge into a voltage signal. The image sensor 3 includes a register for each of the plurality of pixels 13 for reading out the voltage signal, but a description of this will be omitted.

[0049] Each pixel 13 has a square shape with sides aligned in the row direction and sides aligned in the column direction. FIG. 11 is a plan view schematically illustrating each pixel 13. Each pixel 13 has a semiconductor region 21, a pair of resistive gates 35, a retention electrode 72, an amplifier 73, and an amplifier 74. The configuration of the semiconductor region 21 is the same as in the first embodiment. However, the retention electrode 72 is disposed at the center of the pixel 13, and the charge Q in the semiconductor region 21 moves toward the center of the semiconductor region 21 in the pixel 13.

[0050] A pair of resistive gates 35 are arranged on either side of a retention electrode 72 located at the center of the pixel 13. Each resistive gate 35 includes multiple (three in the illustrated example) regions 35a located near the periphery of the pixel 13 and one region 35b adjacent to the retention electrode 72. Furthermore, each resistive gate 35 includes multiple connection portions 35c connecting the multiple regions 35a to the regions 35b, respectively. The connection portions 35c extend linearly from the corresponding regions 35a to the regions 35b. As a result, the pair of resistive gates 35 extend radially from the destination of the charge Q, i.e., the center of the pixel 13. Therefore, in this embodiment as well, the resistive gates 35 of each of the multiple pixels 13 are partially provided with respect to the semiconductor region 21 within a curved surface F3 perpendicular to the direction of movement of the charge Q.

[0051] FIG. 12 is a diagram schematically illustrating wiring connected to multiple pixels 13. The image sensor 3 of this embodiment further includes multiple wirings 63 and multiple wirings 64. One end of each wiring 63 is connected to a corresponding bonding pad 65, and the other end of each wiring 63 is connected to a corresponding bonding pad 67. One end of each wiring 64 is connected to a corresponding bonding pad 66, and the other end of each wiring 64 is connected to a corresponding bonding pad 68. The wirings 63 and 64 are provided for each row. The wiring 63 is connected to multiple regions 35a of the resistive gate 35, and the potential of each region 35a is determined by the potential of the wiring 63. The wiring 64 is connected to a region 35b of the resistive gate 35, and the potential of the region 35b is determined by the potential of the wiring 64. The potential of the region 35b is different from the potential of the region 35a, thereby forming a potential gradient at a connection 35c between the region 35a and the region 35b. This potential gradient applies an electric field having a strength gradient to the n-type semiconductor region 24. As a result, a potential gradient that promotes the movement of the charge Q is formed in the n-type semiconductor region 24.

[0052] The amplifiers 73 and 74 amplify the charge Q transferred from the region of the n-type semiconductor region 24 that faces the holding electrode 72 for each pixel 13, convert it into a voltage signal, and output the voltage signal via the bonding pad 69. However, as shown in Fig. 12, the amplifier 73 for each row is part of the amplifier for the pixels 13 in the previous row, and the charge Q of the pixels 13 in each row is amplified and converted into a voltage signal by the amplifier 74 for the pixel 13 and the amplifier 73 for the pixels 13 in the next row.

[0053] The effects obtained by the image sensor 3 of this embodiment having the above configuration will be described along with the problems of an image sensor according to a comparative example. Figure 13 is a plan view schematically showing a pixel 17 of the image sensor according to the comparative example. The pixel 17 has a resistive gate 39. The resistive gate 39 covers the entire semiconductor region 21, and generates a potential gradient due to the potential difference between a region 39a provided on the periphery of the resistive gate 39 and a region 39b provided adjacent to the retention electrode 72 in the center of the pixel. As a result, a potential gradient that promotes the movement of charge Q is generated in the n-type semiconductor region 24.

[0054] However, when a potential difference is applied between the regions 39a and 39b of the resistive gate 39, a current flows through the resistive gate 39, resulting in problems such as increased power consumption and heat generation. To address this problem, in the image sensor 3 of this embodiment, the resistive gate 35 is partially provided with respect to the semiconductor region 21 within the curved surface F3 perpendicular to the direction of movement of the charge Q. This reduces the cross-sectional area of ​​the resistive gate 35 in a cross section perpendicular to the direction of movement of the charge Q, and increases the resistance of the resistive gate 35 in the direction of movement of the charge Q, compared to the configuration of FIG. 13 in which the resistive gate 39 is provided so as to cover the entire semiconductor region 21. This reduces the amount of current flowing through the resistive gate 35, thereby minimizing increases in power consumption and heat generation in the resistive gate 35. Even in this configuration in which the resistive gate 35 is partially provided with respect to the semiconductor region 21 within the plane perpendicular to the direction of movement of the charge Q, the charge Q in the semiconductor region 21 gathers in the potential gradient portion formed by the resistive gate 35 and is encouraged to move. Therefore, the charge Q in the semiconductor region 21 moves without any problem, and it is possible to reduce the charge Q remaining in the semiconductor region 21. As a result, it is possible to improve the image quality.

[0055] As in the present embodiment, the resistive gate 35 may extend radially from the destination of the charge Q, for example, the center of the pixel 13. In this case, the charge Q distributed in a dispersed manner within the semiconductor region 21 can be uniformly promoted to move, and the charge Q remaining within the semiconductor region 21 can be further reduced.

[0056] [Fourth Modification] FIG. 14 is a plan view schematically illustrating the configuration of a pixel 14 included in an image sensor according to a fourth modification. The image sensor of this modification includes a pair of resistive gates 35A for each pixel 14, instead of the pair of resistive gates 35 of the second embodiment. The resistive gate 35A includes the same components as the resistive gate 35 of the second embodiment, but also includes multiple regions 36a and multiple connection portions 36c. The connection portions 36c branch off from both sides of each connection portion 35c as the connection portions 35c extend radially. Each region 36a is located at the tip of the connection portion 36c. The potential of each region 36a is set to the same potential as that of the corresponding region 35a. Alternatively, each region 36a may not be connected to a wiring for defining the potential.

[0057] As in this modification, the resistive gate 35A may branch along the radial extension, which can further reduce the gap between the resistive gates 35A and further reduce the charge Q remaining in the semiconductor region 21.

[0058] Fifth Modification FIG. 15 is a plan view schematically illustrating the configuration of a pixel 15 included in an image sensor according to a fifth modification. In the pixel 15 of the image sensor of this modification, the impurity concentration of the n-type semiconductor region 24 increases stepwise along the direction of charge Q movement toward the destination of the charge Q, e.g., the center of the pixel 15. In the figure, the boundary 242 of the impurity concentration is indicated by a dashed line. In this example, the impurity concentration of the n-type semiconductor region 24 increases stepwise, but the impurity concentration of the n-type semiconductor region 24 may also increase continuously. According to this modification, a potential gradient due to the change in impurity concentration is formed in the semiconductor region 21, further promoting the movement of the charge Q, thereby further reducing the charge Q remaining in the semiconductor region 21. The configuration of this modification, i.e., a configuration in which the impurity concentration of the n-type semiconductor region 24 increases stepwise or continuously, may also be applied to the image sensor 1 of the first embodiment.

[0059] [Sixth Modification] FIG. 16 is a plan view schematically illustrating the configuration of a pixel 16 included in an image sensor according to a sixth modification. In the pixel 16 of this modification, the retention electrode 72 is disposed at one of the four corners of the pixel 16 rather than at the center. The charge Q moves toward one corner of the semiconductor region 21. This image sensor also includes a resistive gate 37 for each pixel 16. The resistive gate 37 includes a region 37a, a region 37b, a connection portion 37c, and one or more slits 37d. The region 37a is provided on the periphery of the pixel 16, and the region 37b is provided adjacent to the retention electrode 72. Applying a potential difference between the regions 37a and 37b generates a potential gradient at the connection portion 37c, which in turn generates a potential gradient in the n-type semiconductor region 24. The slit 37d extends in a straight line from the region 37b to the region 37a. That is, the resistive gate 37 extends radially from the destination of the charge Q, for example, one corner of the pixel 16. Therefore, in this modification as well, the resistive gate 37 of each of the plurality of pixels 16 is partially provided with respect to the semiconductor region 21 within the curved surface F4 that is orthogonal to the direction of movement of the charge Q.

[0060] Even in a configuration in which the charge Q moves toward one corner of the semiconductor region 21, as in this modification, the resistive gate 37 can be provided partially in the semiconductor region 21 within the curved surface F4 that is perpendicular to the direction of movement of the charge Q. This reduces the amount of current flowing through the resistive gate 37, and makes it possible to suppress increases in power consumption and heat generation in the resistive gate 37, compared to a case in which a resistive gate 37A that covers the entire semiconductor region 21 is provided, as shown in FIG.

[0061] While the principles of the present invention have been illustrated and described in preferred embodiments, it will be recognized by those skilled in the art that the present invention can be modified in arrangement and detail without departing from such principles. The present invention is not limited to the particular constructions disclosed herein. We therefore claim all modifications and variations that come within the scope and spirit of the following claims.

[0062] 1, 1A, 1B, 2, 3... image sensor, 10, 10A, 10B, 10C, 10D... photosensitive portion, 11 to 20... pixel, 21... semiconductor region, 22... p-type semiconductor region, 23... p ＋ type semiconductor region, 24, 24A...n type semiconductor region, 24a...first region, 24b...second region, 25...n － type semiconductor region, 26...n type semiconductor region, 31, 31A, 31B, 35, 35A, 37, 37A, 38, 39... resistive gate, 31a, 31b, 35a, 35b, 36a , 37a, 37b, 38a, 38b, 39a, 39b...area, 32...holding electrode, 33, 34...transfer electrode, 35c, 36c, 37c...connection section, 37d...slit, 61-64... Wiring, 65 to 69... bonding pads, 70... horizontal register, 71... charge holding portion, 72... holding electrode, 73, 74, 80... amplifier, 100... image sensor, 311... notch, 312... opening, A2... current, F1, F2... surface, F3, F4... curved surface, D1... first direction, D2... second direction, E1 to E5... potential energy, P1, P2... point, Q... charge.

Claims

1. An image sensor comprising a plurality of pixels arranged in a one-dimensional or two-dimensional manner, each of the plurality of pixels including a photoelectric conversion region that converts incident light into electric charges, and a resistive gate provided on the photoelectric conversion region and applying an electric field having a strength gradient to the photoelectric conversion region to form a potential gradient for promoting the movement of the electric charges within the photoelectric conversion region, wherein the resistive gate of each of the plurality of pixels is partially provided with respect to the photoelectric conversion region of each of the plurality of pixels in at least one plane orthogonal to the movement direction of the electric charges.

2. The photoelectric conversion region of each of the plurality of pixels has a first impurity concentration and includes a first region extending along the movement direction of the electric charges, and a second region having a second impurity concentration smaller than the first impurity concentration and sandwiching the first region when viewed from the thickness direction of the photoelectric conversion region, and one or both of the width and depth of the first region in a plane orthogonal to the movement direction of the electric charges expand along the movement direction of the electric charges. The image sensor according to claim 1.

3. The impurity concentration of the photoelectric conversion region increases stepwise along the movement direction of the electric charges. The image sensor according to claim 1.

4. The plurality of pixels are arranged in a one-dimensional manner, each of the plurality of pixels presenting a rectangle having a longitudinal direction that intersects the arrangement direction of the plurality of pixels, the longitudinal direction coinciding with the movement direction of the electric charges, and the resistive gate extending along the longitudinal direction. The image sensor according to any one of claims 1 to 3.

5. In at least a part of the resistive gate in the movement direction of the electric charges, the width of the resistive gate in a direction orthogonal to the movement direction of the electric charges is smaller than the width of the photoelectric conversion region in the orthogonal direction. The image sensor according to claim 4.

6. The plurality of pixels are arranged in a two-dimensional manner, and the electric charges move toward the center or corners of the photoelectric conversion region of each of the plurality of pixels. The image sensor according to any one of claims 1 to 3.

7. The resistive gate extends radially around the movement destination of the electric charges. The image sensor according to claim 6.

8. The image sensor according to claim 7, wherein the resistive gate branches while extending radially.

Images