MOS group protection method, circuit and device, and charging and distribution system

Abstract

The present application relates to the technical field of charging and distribution, and in particular to an MOS group protection method, circuit and device, and a charging and distribution system. The MOS group protection method comprises: disconnecting a power supply switch to enable a DCDC chip to be in an off state; controlling the input of a target power supply, and determining whether a voltage signal of the target power supply satisfies a preset condition; when it is determined that the voltage signal of the target power supply satisfies the preset condition, closing the power supply switch, and supplying power to the DCDC chip by means of a chip power supply, wherein when the voltage signal of the target power supply satisfies the preset condition, a connection switch is closed, and the DCDC chip is connected to a power supply circuit; and when the DCDC chip is powered on and started, turning on a target MOS group, wherein a direct-current voltage signal outputted by the target power supply is converted into a pulsed electrical signal.

Description

MOS group protection method, circuit, equipment and charging and distribution system

[0001] This invention claims priority to Chinese patent application number 202410008513.0, filed with the State Intellectual Property Office of China on January 3, 2024, entitled “MOS Group Protection Method, Circuit, Device and Charging and Distribution System,” the entire contents of which are incorporated herein by reference. Technical Field

[0002] The present application relates to the field of charging and distribution technology, and specifically to a MOS group protection method, circuit, device and charging and distribution system. Background Art

[0003] New energy vehicles (NEVs) use unconventional automotive fuels as their power source. With societal demands for energy and environmental protection, NEVs are undoubtedly the future of automotive development. Their low-power charging and distribution systems are typically equipped with a full-bridge MOSFET (DC-to-DC converter) stack.

[0004] The DC power output from the target power supply passes through a full-bridge MOS transistor (MOSFET) assembly and a transformer. Two diagonal MOSFETs form a small group, with each group alternating between conducting. The transformer then converts the DC signal into a pulsed electrical signal. Existing DC-DC full-bridge MOS transistors typically use MOSFETs with a withstand voltage of 200V. However, at startup, a voltage exceeding the 200V withstand voltage of the MOSFETs is generated, potentially damaging the full-bridge MOS transistors.

[0005] To prevent damage to the full-bridge MOS group, existing technologies generally use MOS with higher withstand voltage or a startup delay control strategy. Selecting a full-bridge MOS group with a higher withstand voltage means a significant increase in product cost, while using a startup delay control strategy only provides protection during startup. At other times, the full-bridge MOS group may still be damaged by overvoltage or overcurrent.

[0006] Summary of the Invention

[0007] Embodiments of the present invention provide a MOS group protection method, circuit, device, and charging and distribution system, which are used to solve the problem in the prior art that a full-bridge MOS group is easily damaged by overvoltage or overcurrent.

[0008] In a first aspect, an embodiment of the present invention provides a MOS group protection method, including:

[0009] Turn off the power switch to turn off the DCDC chip;

[0010] Controlling the target power input to determine whether the voltage signal of the target power meets a preset condition;

[0011] When it is determined that the voltage signal of the target power source meets the preset condition, the power switch is closed to supply power to the DCDC chip through the chip power supply, wherein when the voltage signal of the target power source meets the preset condition, the connection switch is closed and the DCDC chip is connected to the power supply circuit;

[0012] When the DCDC chip is powered on, the target MOS group is turned on, and the DC voltage signal output by the target power supply is converted into a pulse electrical signal.

[0013] Optionally, when the voltage signal of the target power source meets a preset condition, the connection switch is closed, including:

[0014] When the voltage signal of the target power source is in a non-overvoltage state and a non-undervoltage state at the same time, the voltage signal of the target power source meets a preset condition, and the connection switch is closed.

[0015] Optionally, determining whether the voltage signal of the target power source meets a preset condition includes:

[0016] collecting a voltage signal of the target power supply through a sampling circuit;

[0017] When it is determined that the voltage signal of the target power source is within the operating voltage range, it is determined that the voltage of the target power source meets a preset condition.

[0018] Optionally, after the DCDC chip is powered on, the method further includes:

[0019] When the voltage signal of the target power supply does not meet the preset condition, the power switch and / or the connection switch are disconnected, and the DCDC chip is closed;

[0020] The power switch is disconnected under the control of the MCU, and the connection switch is automatically disconnected based on the circuit structure.

[0021] Optionally, closing the power switch to supply power to the DCDC chip includes:

[0022] When it is determined that the voltage meets a preset condition, after a preset time, the power switch is closed to supply power to the DCDC chip.

[0023] In a second aspect, an embodiment of the present invention provides a MOS group protection circuit, including:

[0024] The MCU is configured to control the power switch to be disconnected before determining whether the voltage signal of the target power source satisfies a preset condition, and to control the power switch to be closed after determining that the voltage signal of the target power source satisfies the preset condition;

[0025] a connecting switch, configured to close when the voltage of the target power supply meets a preset condition, connecting the DCDC chip to a power supply circuit to supply power to the DCDC chip;

[0026] The power switch is used to open or close under the control of the MCU to power the DCDC chip through the chip power supply.

[0027] When the DCDC chip is powered on, the target MOS group is turned on, and the DC voltage signal output by the target power supply is converted into a pulse electrical signal.

[0028] Optionally, the input end of the connection switch is connected to a judgment circuit, and the judgment circuit includes:

[0029] an undervoltage judgment circuit, configured to output a low-level signal to the connection switch when determining that the voltage signal is in a non-undervoltage state, and output a high-level signal to the connection switch when the voltage signal is in an undervoltage state;

[0030] an overvoltage judgment circuit, configured to output a low-level signal to the connection switch when determining that the voltage signal is in a non-overvoltage state, and output a high-level signal to the connection switch when the voltage signal is in an overvoltage state;

[0031] The connecting switch is used to close when the undervoltage judgment circuit and the overvoltage judgment circuit output low-level signals at the same time, and to open otherwise.

[0032] Optionally, the undervoltage judgment circuit includes a first voltage comparator, and the overvoltage judgment circuit includes a second voltage comparator;

[0033] The first input terminal of the first voltage comparator is connected to the target power supply, and the second input terminal is connected to the chip power supply, and is used to compare the voltage signal output by the target power supply with the first reference voltage signal of the chip power supply to determine whether the target power supply is in an undervoltage state;

[0034] The first input terminal of the second voltage comparator is connected to the chip power supply, and the second input terminal is connected to the target power supply, and is used to compare the voltage signal output by the target power supply with the second reference voltage signal of the chip power supply to determine whether the target power supply is in an overvoltage state.

[0035] Optionally, the undervoltage judgment circuit and the overvoltage judgment circuit further include: a hysteresis circuit;

[0036] The hysteresis circuit is used to feed back the reference voltage signal of the chip power input to prevent frequent undervoltage disconnection caused by voltage fluctuations.

[0037] Optionally, the MOS group protection circuit further includes: a sampling circuit;

[0038] The sampling circuit is connected between the target power supply and the MCU, and is used to collect the voltage signal of the target power supply and send the collected voltage signal to the MCU.

[0039] Optionally, the input end of the power supply circuit is a chip power supply, and the output end of the power supply circuit is connected to a power switch, for supplying power to the DCDC chip when the power switch and the connection switch are closed.

[0040] In a third aspect, an embodiment of the present invention provides a MOS group protection device, including:

[0041] at least one processor; and

[0042] at least one memory in communication with the processor, wherein:

[0043] The memory stores program instructions that can be executed by the processor, and the processor calls the program instructions to execute the method as described in any one of the first aspects.

[0044] In a fourth aspect, an embodiment of the present invention provides a charging and distribution system, comprising: a MOS group protection circuit as described in any one of the second aspects.

[0045] By separately providing a power switch and a connection switch, the present invention not only proactively monitors whether the target power supply's output voltage meets preset conditions, but also automatically disconnects the switch when the voltage fails to meet the preset conditions, thereby improving circuit safety and reliability and protecting the target MOS group. Furthermore, the dual-loop detection circuitry switches the DCDC chip to a disabled state in either an undervoltage or overvoltage state, preventing damage to the full-bridge MOS group in these conditions. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0047] FIG1 shows a circuit diagram of a DCDC full-bridge MOS group;

[0048] FIG2 is a schematic diagram of a MOS group protection circuit provided by an embodiment of the present invention;

[0049] FIG3 is a schematic diagram of another MOS group protection circuit provided by an embodiment of the present invention;

[0050] FIG4 is a flow chart of a MOS group protection method provided in an embodiment of the present application;

[0051] FIG5 is a schematic diagram of another MOS group protection circuit provided by an embodiment of the present invention;

[0052] FIG6 is a schematic structural diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0053] In order to better understand the technical solution of the present application, the embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0054] It should be clear that the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0055] Low-power charging and distribution systems for new energy vehicles are usually equipped with a DCDC full-bridge MOS group. The DC power output by the target power supply passes through the full-bridge MOS group and the transformer. The two diagonal MOS tubes in the full-bridge MOS group form a small group, with a total of two groups. Each group is alternately turned on, and then the DC signal is converted into a pulse electrical signal through the transformer. As shown in Figure 1, a circuit diagram of a DCDC full-bridge MOS group is shown. Referring to Figure 1, the DC power of the DCDC+ power supply passes through the full-bridge MOS group and the transformer. MOS1 and MOS4 form a group, and MOS2 and MOS3 form a group that are alternately turned on, and the DC signal is converted into a pulse electrical signal through the transformer. Existing DCDC full-bridge MOS groups generally use MOS with a withstand voltage value equal to 200V. However, at the moment of startup, a voltage higher than the 200V withstand voltage value of the MOS tube is generated, which causes damage to the full-bridge MOS group.

[0056] Figure 2 is a schematic diagram of a MOS group protection circuit provided by an embodiment of the present invention. Referring to Figure 2, the MOS group protection circuit includes a target power supply, a chip power supply, an MCU, a connection switch, a power supply switch, and a DCDC chip.

[0057] The target power supply is used to input a voltage signal to be converted. Specifically, the DC signal input by the target power supply is conducted to the transformer through the target MOS group connected by the DCDC chip pin, and the transformer converts the DC signal into a pulsed electrical signal.

[0058] The chip power supply is used to power the DCDC chip, so that the DCDC chip is in the on state.

[0059] When powered on, the DCDC chip conducts power to the connected target MOS group and the transformer connected to it, allowing the transformer to convert the DC power output from the target power supply into a pulsed electrical signal. When powered off, the DCDC chip cannot conduct the voltage output from the target power supply to the target MOS group and transformer, preventing the MOS group from being damaged by the voltage output from the target power supply.

[0060] The MCU controls the power supply circuit by opening and closing the power switch, further protecting the target MOS group by opening and closing the DCDC chip. Specifically, the MCU determines whether the voltage applied by the target power supply meets preset conditions. Before determining whether the target power supply voltage meets the preset conditions, the MCU controls the power switch to open. After determining that the target power supply voltage meets the preset conditions, the MCU controls the power switch to close, thereby supplying power to the DCDC chip.

[0061] The power switch is used to close or open under the control of the MCU. When closed, the DCDC chip is powered by the chip power supply, the DCDC chip is turned on, and the target MOS group is turned on; when opened, the power supply to the DCDC chip is stopped, the DCDC chip is turned off, and no DC power passes through the target MOS group to prevent the target MOS group from being burned.

[0062] Based on the designed circuit structure, the connection switch automatically closes when the target power supply voltage meets preset conditions and automatically opens when the target power supply voltage does not meet the preset conditions. When the connection switch is closed, the DC power output of the target power supply is transmitted to the DCDC chip. When the connection switch is open, the DCDC chip is disconnected from the chip power supply and shuts down, preventing the target power supply from burning out the target MOS array.

[0063] The embodiment of the present invention provides a power supply switch and a connection switch respectively. While actively monitoring whether the voltage output by the target power supply meets the preset conditions, the circuit structure can also automatically disconnect the switch when the voltage does not meet the preset conditions, thereby improving the reliability of the circuit safety and realizing the protection of the target MOS group.

[0064] Figure 3 shows a schematic diagram of another MOS group protection circuit according to an embodiment of the present invention. Referring to Figure 3, in addition to the target power supply, chip power supply, MCU, connection switch, power supply switch, and DCDC chip, the MOS group protection circuit also includes a judgment circuit, a sampling circuit, and a power supply circuit.

[0065] The output end of the judgment circuit is connected to the input end of the connection switch, and is used to control the opening or closing of the connection switch through the circuit structure. The judgment circuit specifically includes an undervoltage judgment circuit and an overvoltage judgment circuit.

[0066] The undervoltage judgment circuit is used to output a low-level signal to the connection switch when the voltage signal is in a non-undervoltage state; and output a high-level signal to the connection switch when the current signal is in an undervoltage state.

[0067] The overvoltage judgment circuit is used to output a low-level signal to the connection switch when the voltage signal is in a non-overvoltage state; and output a high-level signal to the connection switch when the voltage signal is in an overvoltage state.

[0068] The connection switch is closed and conductive only when both the overvoltage detection circuit and the undervoltage detection circuit output low-level signals. Otherwise, it is open. Specifically, the connection switch is open when either or both the overvoltage detection circuit and the overcurrent detection circuit output high-level signals. Typically, the connection switch is a MOS transistor. When the MOS transistor is open, the connection switch is closed; when the MOS transistor is open, the connection switch is open.

[0069] The undervoltage judgment circuit includes a first voltage comparator. The first input of the first voltage comparator is connected to the target power supply and is used to receive the voltage signal output by the target power supply. The second input of the first voltage comparator is connected to the chip power supply and is used to receive a first reference voltage signal. The first voltage comparator is used to compare the received voltage signal with the first reference voltage signal. When the voltage signal is less than the first reference voltage signal, the circuit is in an undervoltage state and outputs a high level to the connection switch. When the voltage signal is greater than the first reference signal, the circuit is in a non-undervoltage state and outputs a low level to the connection switch. Generally, the first reference voltage signal can be set to 60V.

[0070] The overvoltage judgment circuit includes a second voltage comparator. The first input of the second voltage comparator is connected to the chip power supply and is used to receive a second reference voltage signal. The second input of the voltage comparator is connected to the target power supply and is used to receive the voltage signal output by the target power supply. The second voltage comparator compares the received voltage signal with the second reference voltage signal. When the voltage signal is less than the second reference voltage signal, the circuit is in a non-overvoltage state and outputs a low level to the second switch. When the voltage signal is greater than the second reference voltage signal, the circuit is in an overvoltage state and outputs a high level to the second switch. Generally, the second reference voltage signal can be set to 160V.

[0071] The sampling circuit is used to collect the voltage signal of the target power supply and output the collected voltage signal to the MCU, the first voltage comparator and the second voltage comparator.

[0072] The input end of the power supply circuit is the chip power supply, and the output end is connected to the power supply switch, which is used to power the DCDC chip when the power supply switch and the connection switch are closed.

[0073] Optionally, a hysteresis circuit is further provided on the undervoltage judgment circuit and the overvoltage judgment circuit for providing feedback to the reference voltage signal input by the auxiliary power supply to prevent frequent undervoltage disconnection of the circuit caused by voltage fluctuations.

[0074] As shown in FIG4 , a MOS group protection method provided by an embodiment of the present invention is applied to the MCU shown in FIG2 and FIG3 , combined with the MOS group protection circuit shown in FIG2 and FIG4 . The method specifically includes:

[0075] S401, turning off the power switch to turn off the DCDC chip.

[0076] S402 , controlling the target power input to determine whether the voltage signal of the target power satisfies a preset condition.

[0077] Specifically, the MCU controls the target power input voltage signal, collects the voltage of the target power through a sampling circuit, and compares the collected voltage with a preset voltage operating range to determine whether the voltage of the target power meets the preset conditions.

[0078] S403, when it is determined that the voltage signal of the target power source meets the preset condition, close the power switch and power the DCDC chip through the chip power supply, wherein when the voltage signal of the target power source meets the preset condition, the connection switch is closed and the DCDC chip is connected to the power supply circuit.

[0079] Specifically, when the voltage of the target power supply is within a preset operating voltage range, it is determined that the voltage of the target power supply meets a preset condition, a control instruction is sent to the power switch, the power switch is controlled to be closed, and the chip power supply is controlled to supply DCDC power.

[0080] Optionally, when it is determined that the voltage meets a preset condition, the power switch is closed after a preset time has passed to reduce sensitivity and prevent the target MOS group from being burned. The preset time is generally set to 10ms.

[0081] Among them, when the voltage signal of the target power supply meets the preset conditions, that is, when the voltage signal of the target power supply is in a non-overvoltage state and a non-undervoltage state at the same time, the connection switch is closed based on the low-level signal sent by the undervoltage judgment circuit and the overvoltage judgment circuit, and the DCDC chip is connected to the power supply circuit. The chip power supply supplies power to the DCDC chip after the power supply switch is closed.

[0082] Specifically, only when the power switch and the connection switch are closed simultaneously is the DCDC chip connected to the power supply circuit and the chip power supply begins to supply power to it, turning on the DCDC chip. The voltage signal output by the target power supply is transmitted through the DCDC chip to the target MOS group connected to the DCDC chip pin, and is converted into a pulsed electrical signal by the transformer turned on by the MOS.

[0083] After the DCDC chip is turned on, the MCU continues to collect the target power supply voltage through the voltage sampling circuit and determines in real time whether the target power supply voltage meets the preset standard. If the preset conditions are met, the power switch remains closed, and the DCDC chip is turned on. If the preset conditions are not met, the power switch is opened, power to the DCDC chip is stopped, and the DCDC chip is turned off. The voltage output by the target power supply will no longer be transmitted to the target MOS group, protecting the target MOS group from burning out.

[0084] The undervoltage detection circuit and overvoltage detection circuit respectively determine whether the circuit is in an undervoltage or overvoltage state. When the target power supply voltage is not in an undervoltage state, the first voltage comparator in the undervoltage detection circuit outputs a low level to the connection switch; when the target power supply voltage is in an undervoltage state, the first voltage comparator outputs a high level to the connection switch. When the target power supply voltage is not in an overvoltage state, the second current comparator in the overvoltage detection circuit outputs a low level to the second switch; when the target power supply voltage is in an overvoltage state, the current comparator outputs a high level to the second switch.

[0085] When the connection switch receives low-level signals sent by the overvoltage judgment circuit and the overcurrent judgment circuit at the same time, it remains closed and the DCDC chip is turned on; when it receives a high-level signal sent by either the undervoltage judgment circuit or the overvoltage judgment circuit, or a high-level signal sent by both circuits, it will be disconnected and the DCDC chip is turned off.

[0086] By separately providing a power switch and a connection switch, the present invention not only proactively monitors whether the target power supply's output voltage meets preset conditions, but also automatically disconnects the switch when the voltage fails to meet the preset conditions, thereby improving circuit safety and reliability and protecting the target MOS group. Furthermore, the dual-loop detection circuitry switches the DCDC chip to a disabled state in either an undervoltage or overvoltage state, preventing damage to the full-bridge MOS group in these conditions.

[0087] Figure 5 shows a circuit diagram of a specific MOS group protection circuit provided by an embodiment of the present invention. A specific embodiment of MOS group protection is described below in conjunction with Figure 4. The connection switch is MOS transistor Q25, the power switch is transistor Q24, the target power supply is DCDC+, and the chip power supply is VDD.

[0088] The MCU is powered on to initialize and prepare for operation. The MCU controls the power switch to disconnect, thereby disconnecting the power supply circuit. Specifically, the MCU outputs EN = 1, controlling the power switch, namely transistor Q24, to ground. The voltages at the G terminal (gate) and the S terminal (source) of MOS transistor Q23 are aligned, disconnecting MOS transistor Q23. After disconnection, resistor R106 is disconnected from the circuit, and the voltages at the G terminal and the S terminal of MOS transistor Q17 are aligned. MOS transistor Q17 is disconnected, disconnecting the circuit between the chip power supply VDD and VCC2. VDD cannot supply power to the DCDC chip, and the DCDC chip remains in the off state.

[0089] The MCU controls the target power supply, namely the DCDC+ power input, and determines whether the DCDC+ voltage signal meets preset conditions. Specifically, a sampling circuit is provided in the DCDC+ power circuit to transmit the DCDC+ power voltage signal to the MCU. The MCU determines whether the voltage signal is within the operating voltage range. If so, it delays for 10ms and outputs EN = 0, disconnecting transistor Q24 from ground. A voltage difference appears between the G and S terminals of MOS transistor Q23, turning on MOS transistor Q23. A voltage difference appears between the G and S terminals of MOS transistor Q17, turning on the circuit. The circuit between VDD and VCC2 is connected, and VDD supplies power to the DCDC chip.

[0090] The voltage signal output by the DCDC+ power supply is also output to the judgment circuit for dual-loop comparison. If the judgment result includes an overvoltage state or an undervoltage state, the connection switch MOS tube Q25 is disconnected, so that the enable of the SS / EN pin is pulled low, keeping the DCDC chip in the off state. If it is determined to be neither an overvoltage state nor an undervoltage state, the SS / EN pin is kept connected to the transistor Q24.

[0091] Specifically, the undervoltage judgment circuit in the judgment circuit is provided with a first voltage comparator, namely, voltage comparator U19A. The sampling circuit sends the real-time voltage signal of the DCDC+ power supply circuit to terminal 2 ("-terminal") of voltage comparator U19A. Terminal 3 ("+terminal") of voltage comparator U19A is connected to a first reference voltage signal, and the first reference voltage signal is compared with the real-time voltage signal. When the voltage signal is less than the reference voltage signal, a high level is output, which is considered to be 1, indicating an undervoltage state. The voltage at the G terminal of MOS transistor Q25 is pulled high, creating a voltage difference with the S terminal, turning on MOS transistor Q25, and grounding the SS / EN pin, which is pulled low, turning off the DCDC chip. When the real-time voltage signal is greater than the reference voltage signal, a low level is output, which is considered to be 0, indicating a non-undervoltage state. The voltage at the G terminal of MOS transistor Q25 is pulled low, matching the voltage at the S terminal, maintaining the SS / EN pin connected to transistor Q24. Among them, a hysteresis circuit is set between terminals 1 and 3 of the voltage comparator U19A, namely diode D19, resistor R128, resistor R120 and VDD. The hysteresis circuit has a feedback function to prevent frequent undervoltage disconnection caused by voltage fluctuations.

[0092] The overvoltage detection circuit in the judgment circuit includes a second voltage comparator, namely voltage comparator U19B. The sampling resistor transmits the real-time voltage signal of the DCDC+ power supply circuit to terminal 5 (the "+ terminal") of voltage comparator U19B. Terminal 6 (the "- terminal") of voltage comparator U19B receives a second reference voltage signal, and compares the second reference voltage signal with the real-time voltage signal. When the real-time voltage signal is greater than the second reference voltage signal, a high level is output, which is considered a 1, indicating an overvoltage state. The voltage at the G terminal of MOS transistor Q25 increases, creating a voltage difference with the S terminal, turning on MOS transistor Q25, grounding the SS / EN pin and pulling it low, turning off the DCDC chip. When the real-time voltage signal is less than the second reference voltage signal, a low level is output, which is considered a 0, indicating a non-overvoltage state. The voltage at the G terminal of MOS transistor Q25 decreases, matching the voltage at the S terminal, and maintaining the SS / EN pin connected to transistor Q24. Among them, a hysteresis circuit is set between the 7th terminal and the 5th terminal of the voltage comparator U19B, namely the diode D25, the resistor R141, the resistor R138 and VDD. The hysteresis circuit has a feedback function to prevent frequent overvoltage disconnection caused by voltage fluctuations.

[0093] When the connection switch MOS tube Q25 and the power switch transistor Q24 are all turned on, the DCDC chip is powered on and starts, driving the two groups of the full-bridge MOS group to alternately conduct. Then, after the two groups are alternately conducted, the DC power input by the DCDC+ is connected to the transformer, realizing the function of converting DC into pulses.

[0094] After the DCDC chip is turned on, the above method is still used to determine in real time whether the voltage signal output by DCDC+ meets the preset conditions, and if not, the connection switch and the power switch are disconnected to prevent the full-bridge MOS group from being burned.

[0095] An embodiment of the present invention further provides a charging and distribution system, including a MOS group protection circuit as shown in FIG. 2 or FIG. 3 .

[0096] Figure 6 is a schematic diagram of the structure of an electronic device according to an embodiment of this specification. As shown in Figure 6, the electronic device may include at least one processor and at least one memory in communication with the processing unit. The memory stores program instructions executable by the processing unit, and the processor invokes the program instructions to execute the MOS group protection method provided in this embodiment.

[0097] The electronic device can be a device capable of intelligently communicating with a user, such as a cloud server. The specific form of the electronic device is not limited in this specification. It is understood that the electronic device here is the machine mentioned in the method embodiment.

[0098] Figure 6 shows a block diagram of an exemplary electronic device suitable for implementing the embodiments of this specification. The electronic device shown in Figure 6 is only an example and should not limit the functions and scope of use of the embodiments of this specification.

[0099] As shown in Figure 6, the electronic device is implemented as a general-purpose computing device. Components of the electronic device may include, but are not limited to, one or more processors 610, a communication interface 620, a memory 630, and a communication bus 640 connecting various system components (including the memory 630, the communication interface 620, and the processor 610).

[0100] Communication bus 640 represents one or more of several types of bus structures, including a memory bus or memory controller, a peripheral bus, an accelerated graphics port, a processor, or a local bus using any of a variety of bus architectures. Examples of these architectures include, but are not limited to, the Industry Standard Architecture (ISA) bus, the Micro Channel Architecture (MAC) bus, the Enhanced ISA bus, the Video Electronics Standards Association (VESA) local bus, and the Peripheral Component Interconnection (PCI) bus.

[0101] Electronic devices typically include a variety of computer system readable media. These media can be any available media that can be accessed by the electronic device, including volatile and non-volatile media, removable and non-removable media.

[0102] Memory 630 may include computer-readable media in the form of volatile memory, such as random access memory (RAM) and / or cache memory. The electronic device may further include other removable / non-removable, volatile / non-volatile computer system storage media. Memory 630 may include at least one program product having a set (e.g., at least one) of program modules configured to perform the functions of various embodiments of this specification.

[0103] A program / utility having a set (at least one) of program modules may be stored in memory 630. Such program modules include, but are not limited to, an operating system, one or more application programs, other program modules, and program data. Each or some combination of these examples may include an implementation of a network environment. The program modules generally implement the functions and / or methods of the embodiments described herein.

[0104] The processor 610 executes various functional applications and data processing by running the programs stored in the memory 630, such as implementing the MOS group protection method provided in the embodiments shown in this specification.

[0105] An embodiment of this specification provides a non-transitory computer-readable storage medium, wherein the non-transitory computer-readable storage medium stores computer instructions, and the computer instructions enable the computer to execute the MOS group protection method provided by the embodiment shown in this specification.

[0106] The above-mentioned non-transitory computer-readable storage medium can adopt any combination of one or more computer-readable media. The computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. The computer-readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination thereof. More specific examples (non-exhaustive list) of computer-readable storage media include: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (Read Only Memory; hereinafter referred to as: ROM), an erasable programmable read-only memory (Erasable Programmable Read Only Memory; hereinafter referred to as: EPROM) or flash memory, an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof. In this document, a computer-readable storage medium can be any tangible medium containing or storing a program that can be used by an instruction execution system, device or device or used in combination with it.

[0107] A computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, which carries computer-readable program code. Such a propagated data signal may take a variety of forms, including, but not limited to, electromagnetic signals, optical signals, or any suitable combination thereof. A computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium that can transmit, propagate, or transport a program for use by or in conjunction with an instruction execution system, apparatus, or device.

[0108] Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.

[0109] Computer program code for performing the operations of this specification may be written in one or more programming languages, or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0110] The foregoing description of this specification describes specific embodiments. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims can be performed in an order different from that described in the embodiments and still achieve the desired results. Furthermore, the processes depicted in the accompanying drawings do not necessarily require the specific order shown or the sequential order to achieve the desired results. In certain embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0111] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature specified as "first" or "second" may explicitly or implicitly include at least one such feature. Throughout this specification, "plurality" means at least two, such as two or three, unless otherwise specifically defined.

[0112] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, segment or portion of code comprising one or more executable instructions for implementing the steps of a custom logical function or process, and the scope of the preferred embodiments of this specification includes alternative implementations in which functions may be performed out of the order shown or discussed, including performing functions in a substantially simultaneous manner or in the reverse order depending on the functions involved, which should be understood by those skilled in the art to which the embodiments of this specification belong.

[0113] The word "if," as used herein, may be interpreted as "at the time of" or "when" or "in response to determining" or "in response to detecting," depending on the context. Similarly, the phrases "if it is determined" or "if (stated condition or event) is detected" may be interpreted as "when it is determined" or "in response to the determination" or "when detecting (stated condition or event)" or "in response to detecting (stated condition or event)," depending on the context.

[0114] It should be noted that the terminals involved in the embodiments of this specification may include but are not limited to personal computers (Personal Computer; hereinafter referred to as: PC), personal digital assistants (Personal Digital Assistant; hereinafter referred to as: PDA), wireless handheld devices, tablet computers (Tablet Computer), mobile phones, MP3 players, MP4 players, etc.

[0115] In the embodiments provided in this specification, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed may be through some interface, indirect coupling or communication connection of the device or unit, which may be electrical, mechanical or other forms.

[0116] In addition, the functional units in the various embodiments of this specification may be integrated into a single processing unit, each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or hardware plus software functional units.

[0117] The above-mentioned integrated unit implemented in the form of a software functional unit can be stored in a computer-readable storage medium. The above-mentioned software functional unit stored in a storage medium includes a number of instructions for causing a computer device (which can be a personal computer, server, or network device, etc.) or a processor to perform some steps of the method described in various embodiments of this specification.

[0118] The above description is only a preferred embodiment of this specification and is not intended to limit this specification. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of this specification should be included in the scope of protection of this specification.

Claims

1. A MOS group protection method, characterized in that, Including: Disconnect the power supply switch to turn off the DCDC chip; Control the input of the target power supply to determine whether the voltage signal of the target power supply meets the preset conditions; When it is determined that the voltage signal of the target power supply meets the preset conditions, close the power supply switch to supply power to the DCDC chip through the chip power supply. Among them, when the voltage signal of the target power supply meets the preset conditions, the connection switch closes, and the DCDC chip is connected to the power supply circuit; When the DCDC chip is powered on and starts, the target MOS group conducts, and the DC voltage signal output by the target power supply is converted into a pulsed electrical signal.

2. The method according to claim 1, wherein When the voltage signal of the target power supply meets the preset conditions, the connection switch closes, including: When the voltage signal of the target power supply is in a non-overvoltage state and at the same time in a non-undervoltage state, the voltage signal of the target power supply meets the preset conditions, and the connection switch closes.

3. The method according to claim 1, characterized in that, Determining whether the voltage signal of the target power supply meets the preset conditions includes: Collect the voltage signal of the target power supply through a sampling circuit; When it is determined that the voltage signal of the target power supply is within the operating voltage range, it is determined that the voltage of the target power supply meets the preset conditions.

4. The method according to claim 1, wherein After the DCDC chip is powered on and starts, the method further includes: When the voltage signal of the target power supply does not meet the preset conditions, the power supply switch, and / or, the connection switch disconnects, and the DCDC chip closes; Among them, the power supply switch is disconnected under the control of the MCU, and the connection switch automatically disconnects based on the circuit structure.

5. The method according to claim 1, characterized in that, Closing the power supply switch to supply power to the DCDC chip includes: When it is determined that the voltage meets the preset conditions, after a preset time, close the power supply switch to supply power to the DCDC chip.

6. A MOS group protection circuit, characterized in that, Including: MCU, used to control the power supply switch to disconnect before determining whether the voltage signal of the target power supply meets the preset conditions, and control the power supply switch to close after determining that the voltage of the target power supply meets the preset conditions; Connection switch, used to close when the voltage of the target power supply meets the preset conditions, connect the DCDC chip to the power supply circuit to supply power to the DCDC chip; Power supply switch, used to disconnect or close under the control of the MCU to supply power to the DCDC chip through the chip power supply. Among them, when the DCDC chip is powered on and starts, the target MOS group conducts, and the DC voltage signal output by the target power supply is converted into a pulsed electrical signal.

7. The circuit according to claim 6, wherein The input end of the connection switch is connected to a judgment circuit, and the judgment circuit includes: Undervoltage judgment circuit, used to output a low-level signal to the connection switch when it is determined that the voltage signal is in a non-undervoltage state, and output a high-level signal to the connection switch when the voltage signal is in an undervoltage state; Overvoltage judgment circuit, used to output a low-level signal to the connection switch when it is determined that the voltage signal is in a non-overvoltage state, and output a high-level signal to the connection switch when the voltage signal is in an overvoltage state; Connection switch, used to close when the undervoltage judgment circuit and the overvoltage judgment circuit both output low-level signals, otherwise disconnect.

8. The method according to claim 7, characterized in that The undervoltage judgment circuit includes a first voltage comparator, and the overvoltage judgment circuit includes a second voltage comparator; The first input terminal of the first voltage comparator is connected to the target power supply, and the second input terminal is connected to the chip power supply, and is used for comparing the voltage signal output by the target power supply with the first reference voltage signal of the chip power supply to determine whether the target power supply is in an undervoltage state; The first input terminal of the second voltage comparator is connected to the chip power supply, and the second input terminal is connected to the target power supply, and is used for comparing the voltage signal output by the target power supply with the second reference voltage signal of the chip power supply to determine whether the target power supply is in an overvoltage state.

9. The method according to claim 7, wherein The undervoltage judgment circuit and the overvoltage judgment circuit further include: a hysteresis circuit; The hysteresis circuit is used for feeding back the reference voltage signal input by the chip power supply to prevent frequent undervoltage disconnection of the circuit caused by voltage fluctuations.

10. The circuit according to claim 6, wherein The MOS group protection circuit further includes: a sampling circuit; The sampling circuit is connected between the target power supply and the MCU, and is used for collecting the voltage signal of the target power supply and sending the collected voltage signal to the MCU.

11. The circuit according to claim 6, wherein The input terminal of the power supply circuit is the chip power supply, and the output terminal of the power supply circuit is connected to the power supply switch, and is used for powering the DCDC chip when the power supply switch and the connection switch are closed.

12. A MOS group protection device, characterized in that, including: at least one processor; and at least one memory communicatively connected to the processor, wherein: The memory stores program instructions executable by the processor, and the processor can execute the method according to any one of claims 1 to 5 by invoking the program instructions.

13. A power charging and distribution system, characterized in that, including: The MOS group protection circuit according to any one of claims 6-10.

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