Micro-led and microlens integrated device, preparation method therefor and use thereof

By preparing microlens on the back of the LED substrate and combining the micro LED structure, the collimation and integration of LED emitted light is solved, and the integration of high-resolution optoelectronic devices is achieved. It is suitable for applications such as maskless lithography, single-pixel imaging and patterned ultraviolet light sources, reducing system costs.

WO2025166877A1PCT designated stage Publication Date: 2025-08-14UNIV OF SCI & TECH OF CHINA
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Patent Information

Application Number
PCT/CN2024/081938
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-02-07
Filing Date
2024-03-15
Publication Date
2025-08-14

AI Technical Summary

Technical Problem

Due to the collimation of light emitted on the back of the substrate and the light precipitation rate limitation, existing LED devices are difficult to be used in compact spaces, and have poor compatibility with integrated circuits, high cost, and difficult to achieve high resolution applications.

Method used

By preparing microlens on the back of the LED substrate, combining the microLED structure, forming a microLED and microlens integrated device, and using a high-refractive index material layer and etching technology to prepare a concentric ring grating structure microlens to achieve focus and control of the emitted light.

Benefits of technology

It realizes the integration of high-resolution optoelectronic devices, reduces system costs, improves integration and light energy utilization, and is suitable for high-resolution applications such as maskless lithography, single-pixel imaging and patterned ultraviolet light sources.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present disclosure provides a Micro-LED and microlens integrated device, a preparation method therefor and a use thereof. The preparation method comprises: step S1: growing an epitaxial wafer structure, wherein the epitaxial wafer structure sequentially comprises from bottom to top a substrate, a buffer layer, an N-type semiconductor material layer, a multi-quantum well layer, an electron blocking layer, and a P-type semiconductor material layer; step S2, etching a part of the epitaxial wafer structure to expose the surface of the N-type semiconductor material layer; step S3, preparing a first electrode on the exposed surface of the N-type semiconductor material layer; step S4, preparing a second electrode on the surface of the P-type semiconductor material layer; step S5, preparing an insulating layer on the surface of the epitaxial wafer structure other than the first electrode and the second electrode; step S6, depositing a metal electrode pad corresponding to the first electrode and the second electrode to obtain a Micro-LED structure; and step S7, preparing a microlens on the back surface of the substrate to complete the preparation of a Micro-LED and microlens integrated device.
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Description

Micro LED and micro lens integrated device, preparation method, and application Technical Field

[0001] The present disclosure relates to the field of microelectronics technology, and in particular to a micro-LED and micro-lens integrated device, a preparation method, and applications. Background Art

[0002] Problems with existing technologies include: Currently, LEDs are limited in their collimation and light extraction efficiency due to the backside light emission from the substrate, making them difficult to apply as standalone devices in a wider range of applications. Typically, to better homogenize and focus LED light, secondary optical elements such as lenses, reflectors, and diffractors are added to the LED device to achieve a better focused spot or more uniform and intense light output. Currently, there are two approaches to incorporating optical elements into the LED light output process: the first involves constructing an optical path and designing and arranging optical elements to control the propagation of LED light. This approach requires significant space, which can be prohibitive in compact or space-constrained applications. Furthermore, constructing the optical path requires complex design to properly arrange and align the optical elements, potentially increasing system manufacturing and maintenance costs. Alternatively, optical elements are bonded above the chip within the LED package to control the light output of the entire package. The design complexity and assembly accuracy limitations associated with this approach are significant obstacles, and energy efficiency cannot be guaranteed. Furthermore, given the rapid development of optoelectronic devices, the above two methods are difficult to integrate well with current integrated circuit technology. Furthermore, due to their size, they are limited in future high-resolution applications of optoelectronic devices. Therefore, a new integrated device is urgently needed that can address the issues of high cost, difficulty in achieving high integration and high alignment, and poor compatibility with integrated circuits and high-resolution applications.

[0003] Summary of the Invention

[0004] One aspect of the present disclosure provides a method for fabricating a micro-LED and micro-lens integrated device, comprising operations S1 to S7. Operation S1 comprises growing an epitaxial wafer structure, wherein the epitaxial wafer structure comprises, from bottom to top, a substrate, a buffer layer, an N-type semiconductor material layer, a multi-quantum well layer, an electron blocking layer, and a P-type semiconductor material layer; operation S2 comprises etching a portion of the epitaxial wafer structure to expose the surface of the N-type semiconductor material layer; operation S3 comprises forming a first electrode on the surface of the exposed N-type semiconductor material layer; operation S4 comprises forming a second electrode on the surface of the P-type semiconductor material layer; operation S5 comprises forming an insulating layer on the surface of the epitaxial wafer structure other than the first and second electrodes; operation S6 comprises depositing metal electrode pads corresponding to the first and second electrodes to obtain a micro-LED structure; and operation S7 comprises forming a micro-lens on the back surface of the substrate, thereby completing the fabrication of the micro-LED and micro-lens integrated device.

[0005] According to an embodiment of the present disclosure, operation S7 includes: depositing a high refractive index material layer on the back side of the substrate; and etching a portion of the high refractive index material layer to obtain a microlens that can achieve a focusing effect.

[0006] According to the embodiment of the present disclosure, the preparation material of the substrate is selected from sapphire, Si, SiC, AlN, GaN or quartz glass, and the thickness can be thinned or thickened according to needs; the preparation material of the insulating layer is selected from at least one of silicon oxide, silicon nitride, aluminum nitride, scandium nitride, gallium oxide, or aluminum oxide; the preparation material of the high refractive index material layer is selected from any one of silicon oxide, zinc oxide, magnesium oxide, gallium oxide, silicon nitride, aluminum nitride or scandium nitride; the shape of the epitaxial wafer is polygonal; the shape of the micro LED is any one of a triangle, a quadrilateral, a pentagon, a hexagon, an octagon, and a circle, and the size of the micro LED is 10nm 2 ~1mm 2 .

[0007] According to the embodiment of the present disclosure, the preparation materials of the N-type semiconductor material layer and the P-type semiconductor material layer are selected from Al x Ga y In 1-x-y N, or Al x Ga y In 1-x-y As, or Al x Ga y In 1-x-y P, 0≤x≤1, 0≤y≤1.

[0008] According to an embodiment of the present disclosure, the material for preparing the first electrode is selected from at least one of Ni, Cr, Ti, Al or Au; the material for preparing the second electrode is selected from at least one of Ni, Cr, Ti, Au, or ITO conductive layer; the material for preparing the electrode pad is selected from at least one of Ni, Cr, Ti, or Au.

[0009] According to an embodiment of the present disclosure, the thickness of the buffer layer 2 is 10-5000nm; the thickness of the N-type semiconductor material layer 3 is 1000-2000nm; the thickness of the multi-quantum well layer 4 is 50-100nm; the thickness of the electron blocking layer 5 is 50-100nm; the thickness of the P-type semiconductor material layer 6 is 100-500nm; the thickness of the insulating layer 9 is 100-600nm; the size of the integrated device is 10nm-5000μm; and the thickness of the high refractive index material layer 11 is 5-5000nm.

[0010] Another aspect of the present disclosure provides a micro-LED and microlens integrated device, prepared using any of the preparation methods described above, the integrated device comprising: an epitaxial wafer structure, comprising, from bottom to top, a substrate, a buffer layer, an N-type semiconductor material layer, a multi-quantum well layer, an electron blocking layer, and a P-type semiconductor material layer; a portion of the epitaxial wafer structure is etched to expose the surface of the N-type semiconductor material layer; a first electrode, prepared on the exposed surface of the N-type semiconductor material layer; a second electrode, prepared on the surface of the P-type semiconductor material layer; an insulating layer, prepared on the surface of the epitaxial wafer structure other than the first and second electrodes; metal electrode pads, correspondingly prepared on the first and second electrodes; and a microlens, prepared on the back side of the substrate based on a high-refractive-index material, comprising a plurality of concentric circular grating structures.

[0011] Another aspect of the present disclosure provides an application of a light-emitting array composed of the above-mentioned micro-LED and micro-lens integrated device in maskless lithography.

[0012] Another aspect of the present disclosure provides an application of a light-emitting array composed of the above-mentioned micro-LED and micro-lens integrated device in single-pixel imaging.

[0013] Another aspect of the present disclosure provides an application of a light emitting array composed of the aforementioned micro-LED and micro-lens integrated device in providing a patterned 220-280 nm ultraviolet light source.

[0014] The disclosed integrated micro-LED and micro-lens device, preparation method, and application overcome the defect that traditional LEDs can only adjust the output light by building external optical components. The purpose of output light regulation can be achieved by rationally designing the parameters of the micro-lens. The preparation method is simple and has high integration. In actual systems, it can be operated on a single device, thus avoiding the problems of complex optical component construction and large device size, and can improve the integration and efficiency of the system. Since there is no need to design a special epitaxial wafer structure, the defects of complex process, poor repeatability, and high cost are overcome. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] FIG1 is a flow chart of a method for preparing a micro-LED and micro-lens integrated device according to an embodiment of the present disclosure.

[0016] FIG2 is a schematic diagram of the cross-sectional structure of a micro-LED and micro-lens integrated device according to an embodiment of the present disclosure.

[0017] FIG3 is a schematic diagram of the bottom structure of the micro-LED and micro-lens integrated device according to an embodiment of the present disclosure.

[0018] FIG4 is a comparison simulation diagram of the bottom light emitting cross-section light field of a micro-LED without a bottom micro-lens and the integrated device disclosed in the present invention.

[0019] FIG5 is a schematic diagram of an application of a micro-LED and micro-lens integrated device in a maskless lithography system according to an embodiment of the present disclosure.

[0020] FIG6 is a schematic diagram showing the application effect of a micro-LED and micro-lens integrated device in a maskless lithography system according to an embodiment of the present disclosure.

[0021] FIG7 is a schematic diagram of an application of a micro-LED and micro-lens integrated device in single-pixel imaging according to an embodiment of the present disclosure.

[0022] FIG8 is a schematic diagram of an application of a micro-LED and micro-lens integrated device in providing a patterned ultraviolet light source according to an embodiment of the present disclosure.

[0023] Reference numerals:

[0024] 1: substrate; 2: buffer layer; 3: N-type semiconductor material layer; 4: multi-quantum well layer; 5: electron blocking layer; 6: P-type semiconductor material layer; 7: first electrode; 8: second electrode; 9: insulating layer; 10: electrode pad; 11: high refractive index material layer. DETAILED DESCRIPTION

[0025] The embodiments of the present disclosure will be further described below with reference to the accompanying drawings.

[0026] The present disclosure provides a micro-LED and micro-lens integrated device, preparation method, and application. The integrated chip is constructed by integrating a Micro-LED (micro light-emitting diode) on the front of a sapphire substrate and a Micro-lens (micro lens) on the back of the substrate. Micro-LED is a light-emitting device with a size of less than 100 microns. By applying a forward voltage, electrons and holes are driven to radiate and recombine in the active area to release energy and emit light. Among them, regarding the microlens, a concentric circular grating of a specific size is designed on the back of the sapphire and used as a focusing optical element. Specifically, a DC voltage is applied to the P-type electrode of the Micro-LED on the front to enable it to work normally. The emitted ultraviolet light is emitted from the bottom of the sapphire substrate and passes through the micro-lens integrated on the back. The micro-lens converges the emitted ultraviolet light. Based on the above principles, the light emitted by the Micro-LED can be emitted at a higher resolution (>600ppi) at the micro and nano scales. Based on this highly integrated new light-emitting device array, this patent has further developed multiple new application systems. 1. The present disclosure can replace the light source in traditional contact lithography, thereby achieving the purpose of maskless lithography. 2. The present disclosure can replace the high-cost light source in traditional single-pixel imaging systems, such as lasers and DMD (digital micromirror) systems, and use FPGA control device arrays to achieve the emission of different Hadamard images, which can greatly reduce the difficulty of operation and system costs. 3. The present disclosure can be used as a graphical 220-280nm ultraviolet light source, for example, to replace traditional large-area medical ultraviolet lamps, and the shape of the light-emitting pattern can be adjusted according to the shape of the disinfection area to avoid ultraviolet light overflowing outside the area to be disinfected. Therefore, the integrated device of micro-LED and micro-lens proposed in the present disclosure greatly improves the integration, compatibility and cost advantages of optoelectronic devices, and provides a better solution for many high-resolution applications.

[0027] In order to make the objectives, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0028] In an embodiment of the present disclosure, a method for manufacturing a micro-LED and micro-lens integrated device is provided. As shown in FIG. 1 to FIG. 3 , the method includes operations S1 to S7:

[0029] Operation S1: growing an epitaxial wafer structure, wherein the epitaxial wafer structure includes, from bottom to top, a substrate 1, a buffer layer 2, an N-type semiconductor material layer 3, a multi-quantum well layer 4, an electron blocking layer 5, and a P-type semiconductor material layer 6;

[0030] Operation S2: etching a portion of the epitaxial wafer structure to expose the surface of the N-type semiconductor material layer 3;

[0031] Operation S3: forming a first electrode 7 on the exposed surface of the N-type semiconductor material layer 3;

[0032] Operation S4: forming a second electrode 8 on the surface of the P-type semiconductor material layer 6;

[0033] Operation S5: forming an insulating layer 9 on the surface of the epitaxial wafer structure except the first electrode 7 and the second electrode 8;

[0034] Operation S6: depositing metal electrode pads 10 corresponding to the first electrode 7 and the second electrode 8 to obtain a micro LED structure; and

[0035] Operation S7: preparing a micro lens on the back side of the substrate 1 to complete the preparation of the micro LED and micro lens integrated device.

[0036] According to an embodiment of the present disclosure, operation S7 includes: depositing a high refractive index material layer 11 on the back side of the substrate 1; and etching a portion of the high refractive index material layer 11 to obtain a microlens with a focusing effect. The microlens can be, for example, a plurality of concentric ring grating structures, and the concentric ring spacing of the concentric ring grating structure is 10nm to 5000um. It should be noted that the concentric ring grating structure is only exemplified as a preferred embodiment. The microlens can also be implemented by other structures, such as multiple concentric rectangular ring grating structures, or elliptical ring grating structures and other structures that can achieve a focusing effect. The present disclosure is not limited to this. In high-resolution display applications, a monolithic integrated chip with a Micro-LED light-emitting focusing effect can be directly achieved by integrating a microlens.

[0037] According to an embodiment of the present disclosure, the shape of the epitaxial wafer structure is polygonal; the preparation material of the substrate 1 is selected from sapphire, Si, SiC, AlN, GaN or quartz glass, and the thickness can be thinned or thickened according to needs.

[0038] According to an embodiment of the present disclosure, the size of the integrated device is 10 nm-5000 μm;

[0039] According to an embodiment of the present disclosure, the insulating layer 9 is made of at least one material selected from silicon oxide, silicon nitride, aluminum nitride, scandium nitride, gallium oxide, or aluminum oxide.

[0040] According to an embodiment of the present disclosure, the high refractive index material layer 11 is made of a material selected from silicon oxide, zinc oxide, magnesium oxide, gallium oxide, silicon nitride, aluminum nitride, or scandium nitride. The refractive index of the high refractive index material layer 11 can reach 1.75.

[0041] According to the embodiment of the present disclosure, the preparation materials of the N-type semiconductor material layer 3 and the P-type semiconductor material layer 6 are selected from Al x Ga y In1-x-y N, or Al x Ga y In 1-x-y As, or Al x Ga y In 1-x-y P, 0≤x≤1, 0≤y≤1. The N-type semiconductor material layer 3 serves as an N-type electron injection layer, and the P-type semiconductor material layer 6 serves as a P-type hole injection layer.

[0042] According to an embodiment of the present disclosure, the material of the first electrode 7 (N-type electrode) is selected from at least one of Ni, Cr, Ti, Al or Au;

[0043] According to an embodiment of the present disclosure, the second electrode 8 (P-type electrode) is made of at least one material selected from Ni, Cr, Ti, Au, or ITO conductive layer.

[0044] According to an embodiment of the present disclosure, the electrode pad 10 is made of at least one material selected from Ni, Cr, Ti, or Au.

[0045] In operation S1, conventional epitaxial equipment selected for growing epitaxial wafer structure includes MOCVD, i.e. metal organic chemical vapor deposition equipment, or MBE, i.e. molecular beam epitaxy equipment, on substrate 1, including conventional epitaxial substrates such as sapphire, Si, SiC, AlN, GaN, quartz glass, etc., a buffer layer 2 with a thickness of 10-5000nm is epitaxially grown once, and then an N-type semiconductor material layer 3 with a thickness of 1000-2000nm, a multi-quantum well layer 4 with a thickness of 50-100nm, an electron blocking layer 5 with a thickness of 50-100nm, and a P-type semiconductor material layer 6 with a thickness of 100-500nm are epitaxially grown once on the buffer layer 2. The preparation materials of the N-type semiconductor material layer 3 and the P-type semiconductor material layer 6 can be Al x Ga y In 1-x-y N, 0≤x≤1, 0≤y≤1, for example, it can be GaN, AlN, InN, or a ternary alloy material or a quaternary alloy material, or Al x Ga y In 1-x-y As, 0≤x≤1, 0≤y≤1, for example, it can be GaAs, AlAs, InAs, or a ternary alloy material or a quaternary alloy material, or Al x Ga y In 1-x-y P, 0≤x≤1, 0≤y≤1, for example, can be GaP, AlP, InP, or a ternary alloy material or a quaternary alloy material.

[0046] In operation S2 , the P-type semiconductor material layer 6 , the electron blocking layer 5 , the multi-quantum well layer 4 and a portion of the N-type semiconductor material layer 3 are etched on the obtained epitaxial wafer structure using photolithography and dry etching processes, so that the surface of the N-type semiconductor material layer 3 is exposed.

[0047] In operation S3, a first electrode 7 is formed on the exposed surface of the N-type semiconductor by photolithography, evaporation, and annealing processes. For example, the first electrode 7 is Ti / Al / Ti / Au polymetallic, Ti / Au polymetallic, Ti / Al / Ni / Au polymetallic, Cr / Au polymetallic, or Cr / Al / Ti / Au polymetallic.

[0048] In operation S4 , a second electrode 8 is fabricated on the surface of the P-type semiconductor 5 by photolithography, evaporation, and annealing processes. For example, the second electrode 8 is Ni / Au multimetal, Ti / Au multimetal, ITO conductive layer, or Cr / Au multimetal.

[0049] It should be noted that the design of the two electrode layouts of the first electrode 7 and the second electrode 8 does not affect the functional use. Changes in the electrode shape (block electrode, interdigitated electrode, etc.) and changes in the area ratio of the three electrodes do not affect the functional realization of the device and are all within the protection range.

[0050] In operation S5, an insulating layer 9 having a thickness of 100-600 nm is deposited using an oxide deposition device. For example, the insulating layer 9 may be one or any combination of silicon oxide, silicon nitride, aluminum nitride, scandium nitride, gallium oxide, and aluminum oxide. The insulating layer 9 is then etched using photolithography, dry etching, and wet etching processes to expose the pad windows for the first electrode 7 and the second electrode 8.

[0051] In operation S6, electrode pads 10 are formed in the pad windows of the first electrode, the second electrode, and the third electrode through photolithography and evaporation processes. For example, the electrode pads 10 can be made of any conductive contact layer such as Ni / Au multi-metal, Ti / Au multi-metal, Cr / Au multi-metal, etc., thereby completing the preparation of the micro-LED structure. The shape of the micro-LED is any one of a triangle, a quadrilateral, a pentagon, a hexagon, an octagon, and a circle. The size of the micro-LED is 10nm. 2 ~1mm 2 In operation S7, a high refractive index material layer 11 for preparing microlenses is deposited on the back of the substrate 1 using a deposition device with a thickness of 5-5000 nm. The material of the high refractive index material layer 11 for preparing microlenses can be one of silicon oxide, zinc oxide, magnesium oxide, gallium oxide, silicon nitride, aluminum nitride, and scandium nitride.

[0052] Furthermore, the material is etched through photolithography, dry etching, and wet etching processes to form a concentric ring grating pattern, as shown in Figure 3. This results in a monolithic integrated chip that can directly achieve a focusing effect for Micro-LED light output through integrated micro lenses for high-resolution display applications.

[0053] The present disclosure further provides a micro-LED and micro-lens integrated device, which is prepared using the above-mentioned preparation method. As shown in FIG2 and FIG3 , the integrated device includes:

[0054] An epitaxial wafer structure, comprising, from bottom to top, a substrate 1, a buffer layer 2, an N-type semiconductor material layer 3, a multi-quantum well layer 4, an electron blocking layer 5, and a P-type semiconductor material layer 6; a portion of the epitaxial wafer structure is etched to expose the surface of the N-type semiconductor material layer 3;

[0055] A first electrode is formed on the exposed surface of the N-type semiconductor material layer 3;

[0056] A second electrode 8 is formed on the surface of the P-type semiconductor material layer 6;

[0057] An insulating layer 9 is formed on the surface of the epitaxial wafer structure outside the first electrode 7 and the second electrode 8;

[0058] Metal electrode pads 10, formed on the first electrode 7 and the second electrode 8; and

[0059] The microlens is made of a high refractive index material and is located on the back of the substrate 1 , and includes a plurality of concentric circular grating structures.

[0060] This disclosure conducts simulation tests on the focusing function realization of the proposed novel micro-LED and micro-lens integrated chip.

[0061] According to an embodiment of the present disclosure, as shown in FIG4 , a cross-sectional view of light emitting from the bottom of a conventional LED is shown on the left side of FIG4 . Since the light emitting angle range is very large, the light emitted is scattered light. After the microlens is integrated, a cross-sectional view of light emitting from the bottom of the LED is shown on the right side of FIG4 . Due to the focusing effect of the microlens, a focal point is generated at a certain distance below the substrate.

[0062] According to the embodiment of the present disclosure, the specific structure of the bottom microlens can be designed and modified according to the type of output light to be obtained, so as to be used as an optical element, such as integrating a microlens array at the bottom of an LED, or integrating a single microlens at the bottom of an LED array.

[0063] According to embodiments of the present disclosure, the present disclosure also provides applications for the aforementioned micro-LED and micro-lens integrated devices. As shown in FIG5 , the left side is a schematic diagram of the principle of traditional maskless lithography, and the right side of FIG5 is a schematic diagram of the principle of maskless lithography after the micro-LED and micro-lens integrated devices are formed into an array. By individually controlling whether each array unit pixel emits light, a special image can be displayed. The light-emitting array with high-resolution imaging can be applied to maskless lithography. Due to the improved collimation, high-precision, low-cost maskless lithography can be achieved, and ultimately, it can be applied to a new maskless lithography system. The maskless lithography effect is shown in FIG6 .

[0064] According to an embodiment of the present disclosure, the present disclosure also provides an application of the above-mentioned micro-LED and micro-lens integrated device in single-pixel imaging. As shown in FIG7 , since the integrated device is very small in size, it can display images with higher resolution, so it can replace the traditional DMD system shown in the left dotted box in FIG7 (DMD is a digital micro-mirror, which is composed of a high-speed digital light reflection switch array. The imaging pattern and its characteristics are determined by controlling the rotation of the micro-mirror around a fixed (yoke) and the time domain response (determining the reflection angle and stagnation time of the light)). In the application of the embodiment of the present disclosure, as shown in the dotted box on the right side of FIG7 , an FPGA control device array can be used to emit a Hadamard image, thereby realizing the application of a light-emitting array based on the above-mentioned integrated device in a new single-pixel imaging system.

[0065] According to the embodiments of the present disclosure, the present disclosure also provides the application of the above-mentioned micro-LED and micro-lens integrated devices in providing a patterned 220-280nm ultraviolet light source. As shown on the left side of Figure 8, a traditional ultraviolet disinfection method is shown, and as shown on the right side of Figure 8, a disinfection method using a light-emitting array composed of micro-LED and micro-lens integrated devices based on the embodiments of the present disclosure is shown. It can be seen that because traditional ultraviolet lamps have a large irradiation area, there is a risk of overflow outside the area when treating targets within the area to be disinfected. However, the light-emitting array composed of the integrated devices of the present disclosure has high collimation and high resolution, and can adjust the shape of the light-emitting pattern according to the shape of the disinfection area to prevent ultraviolet light from overflowing outside the area to be disinfected.

[0066] The embodiments of the present disclosure have been described in detail with reference to the accompanying drawings. It should be noted that any implementations not depicted or described in the drawings or the main text of the specification are known to those skilled in the art and are not described in detail. Furthermore, the above definitions of the various elements and methods are not limited to the various specific structures, shapes, or methods described in the embodiments, and can be easily modified or replaced by those skilled in the art.

[0067] Based on the above description, those skilled in the art should have a clear understanding of the micro-LED and micro-lens integrated device, preparation method, and application disclosed herein.

[0068] In summary, this disclosure provides a micro-LED and micro-lens integrated device, its preparation method, and its applications. To address the challenges of high light control, high cost, and integration difficulties associated with LED output, this disclosure designs a micro-LED and micro-lens integrated device for high-resolution applications. This device is economical, reliable, simple, and adaptable to a variety of applications.

[0069] The specific embodiments of the present disclosure described above do not limit the scope of protection of the present disclosure. Any other corresponding changes and modifications made based on the technical concept of the present disclosure should be included in the scope of protection of the claims of the present disclosure.

Claims

1. A method for preparing a micro-LED and micro-lens integrated device, comprising: Operation S1: growing an epitaxial wafer structure, wherein the epitaxial wafer structure comprises, from bottom to top, a substrate (1), a buffer layer (2), an N-type semiconductor material layer (3), a multi-quantum well layer (4), an electron blocking layer (5), and a P-type semiconductor material layer (6); Operation S2: etching a portion of the epitaxial wafer structure to expose the surface of the N-type semiconductor material layer (3); Operation S3: forming a first electrode (7) on the exposed surface of the N-type semiconductor material layer (3); Operation S4: forming a second electrode (8) on the surface of the P-type semiconductor material layer (6); Operation S5: preparing an insulating layer (9) on the surface of the epitaxial wafer structure other than the first electrode (7) and the second electrode (8); Operation S6: depositing metal electrode pads (10) on the first electrode (7) and the second electrode (8) to obtain a micro LED structure; and Operation S7: preparing a micro lens on the back side of the substrate (1) to complete the preparation of the micro LED and micro lens integrated device.

2. The method for manufacturing a micro-LED and micro-lens integrated device according to claim 1, wherein the operation S7 comprises: Depositing a high refractive index material layer (11) on the back side of the substrate (1); as well as A high refractive index material layer (11) in a partial area is etched to obtain a micro lens capable of achieving a focusing effect.

3. The method for preparing a micro-LED and micro-lens integrated device according to claim 1, wherein: The substrate is made of a material selected from sapphire, Si, SiC, AlN, GaN or quartz glass; The insulating layer (9) is made of at least one material selected from silicon oxide, silicon nitride, aluminum nitride, scandium nitride, gallium oxide, or aluminum oxide; The high refractive index material layer (11) is made of a material selected from any one of silicon oxide, zinc oxide, magnesium oxide, gallium oxide, silicon nitride, aluminum nitride or scandium nitride. The shape of the epitaxial wafer is polygonal; The shape of the micro LED is any one of a triangle, a quadrilateral, a pentagon, a hexagon, an octagon, and a circle, and the size of the micro LED is 10nm. 2 ~1mm 2 .

4. The method for preparing a micro-LED and micro-lens integrated device according to claim 1, wherein the preparation materials of the N-type semiconductor material layer (3) and the P-type semiconductor material layer (6) are selected from Al x Ga y In 1-x-y N, or Al x Ga y In 1-x-y As, or Al x Ga y In 1-x-y P, 0≤x≤1, 0≤y≤1.

5. The method for preparing a micro-LED and micro-lens integrated device according to claim 1, wherein: The material for preparing the first electrode (7) is selected from at least one of Ni, Cr, Ti, Al or Au; The second electrode (8) is made of at least one material selected from Ni, Cr, Ti, Au, or an ITO conductive layer; The electrode pad (10) is made of at least one material selected from Ni, Cr, Ti, or Au.

6. The method for preparing a micro-LED and micro-lens integrated device according to any one of claims 1 to 5, wherein: The thickness of the buffer layer (2) is 10-5000 nm; The thickness of the N-type semiconductor material layer (3) is 1000-2000 nm; The thickness of the multi-quantum well layer (4) is 50-100 nm; The thickness of the electron blocking layer (5) is 50-100 nm; The thickness of the P-type semiconductor material layer (6) is 100-500 nm; The thickness of the insulating layer (9) is 100-600 nm; The size of the integrated device is 10nm-5000μm; The thickness of the high refractive index material layer (11) is 5-5000 nm.

7. A micro-LED and micro-lens integrated device, manufactured using the method of any one of claims 1 to 6, the integrated device comprising: An epitaxial wafer structure, the epitaxial wafer structure comprising, from bottom to top, a substrate (1), a buffer layer (2), an N-type semiconductor material layer (3), a multi-quantum well layer (4), an electron blocking layer (5), and a P-type semiconductor material layer (6); a portion of the epitaxial wafer structure is etched to expose the surface of the N-type semiconductor material layer (3); A first electrode is formed on the surface of the exposed N-type semiconductor material layer (3); A second electrode (8) is formed on the surface of the P-type semiconductor material layer (6); an insulating layer (9) formed on the surface of the epitaxial wafer structure outside the first electrode (7) and the second electrode (8); Metal electrode pads (10), correspondingly formed on the first electrode (7) and the second electrode (8); as well as A microlens is prepared on the back side of a substrate (1) based on a high refractive index material, and the microlens has a focusing effect.

8. Application of a light emitting array composed of the micro-LED and micro-lens integrated device as claimed in claim 7 in maskless lithography.

9. An application of a light emitting array composed of a micro-LED and micro-lens integrated device as claimed in claim 7 in single-pixel imaging.

10. Use of a light emitting array composed of the micro-LED and micro-lens integrated device according to claim 7 in providing a patterned 220-280 nm ultraviolet light source.

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