Driving power supply architecture of motor controller, motor controller, and control method

Abstract

The present invention relates to the technical field of motor control. Provided is a driving power supply architecture of a motor controller. The driving power supply architecture comprises a power supply end, an upper bridge circuit, and a lower bridge circuit. The power supply end is separately connected to the upper bridge circuit and the lower bridge circuit by means of a buck / boost chip. The driving power supply architecture further comprises: an emergency power supply end, which is connected to the lower bridge circuit; a protection circuit, which is connected between the buck / boost chip and the lower bridge circuit; and a control circuit, which is connected to an input end of the buck / boost chip, so as to, on the basis the lower bridge circuit turning on and off, control the start up of the buck / boost chip. When the lower bridge circuit fails, the control circuit outputs an enable signal to the buck / boost chip and disconnects the protection circuit, then the buck / boost chip restarts to cause an output of the buck / boost chip to recover power supply to the upper bridge circuit. The present invention addresses the problem in existing electrical control driving systems that, when using a chip having a protection mode, a fuse cannot be normally melted to provide protection, and safety risks are high.

Description

Motor controller drive power supply architecture, motor controller and control method Technical Field

[0001] The present invention relates to the field of motor control technology, and in particular to a drive power supply architecture of a motor controller, a motor controller, and a control method. Background Art

[0002] With the development and widespread adoption of new energy vehicles, safety requirements for these vehicles, such as electric vehicles, are becoming increasingly stringent. During normal operation, a sudden power failure in an electric vehicle can cause the system to abruptly shut down, leading to uncontrolled motor torque and speed, resulting in a sudden loss of power and a serious safety hazard.

[0003] In new energy electric control systems with functional safety requirements, when the drive power load is abnormal (such as a serious load short circuit), fault diagnosis or ASC action needs to be performed. In existing drive control systems, an emergency power supply solution can be used to deal with abnormal low-voltage power supply and upper bridge drive load conditions, allowing the lower bridge to enter ASC to protect the vehicle's power battery system. However, if the lower bridge drive load is abnormally short-circuited, the fuse of the faulty branch must be disconnected before the upper bridge can enter ASC.

[0004] The Buck Boost chips currently used in most electronically controlled drive systems have a hiccup protection function that prevents the fuse from blowing normally in the event of a short circuit. Therefore, protection cannot be implemented when the lower bridge drive load is abnormally short-circuited, posing a high safety hazard. Summary of the Invention

[0005] In order to overcome the above-mentioned technical defects, the purpose of the present invention is to provide a driving power supply architecture, a motor controller and a control method for a motor controller, so as to solve the problem that the existing electronic control drive system uses a chip with a protection mode, the fuse cannot be blown normally, the protection cannot be performed, and the safety hazard is high.

[0006] The present invention discloses a driving power supply architecture of a motor controller.

[0007] It includes a power supply terminal, an upper bridge circuit and a lower bridge circuit;

[0008] The power supply end is connected to the upper bridge circuit and the lower bridge circuit respectively through the Buck Boost chip;

[0009] Also includes:

[0010] Emergency power supply terminal, connected to the lower bridge circuit;

[0011] A protection circuit connected between the Buck Boost chip and the lower bridge circuit;

[0012] A control circuit connected to the input terminal of the Buck Boost chip to control the startup of the Buck Boost chip according to the on / off state of the lower bridge circuit;

[0013] When the lower bridge circuit fails, the control circuit outputs an enable signal to the Buck Boost chip to disconnect the protection circuit and then restart the Buck Boost chip so that the Buck Boost chip output resumes power supply to the upper bridge circuit.

[0014] Preferably, the protection circuit includes a fuse;

[0015] When the lower bridge circuit fails, the control circuit injects an enable signal into the Buck Boost chip, so that the protection circuit remains connected until the fuse blows, and then the Buck Boost chip is started.

[0016] Preferably, the control circuit comprises an NMOS control switch;

[0017] The NMOS control switch flips to generate an enable signal with a high level of 1ms and a low level of 20ms as a cycle.

[0018] Preferably, the protection circuit includes a PMOS control switch or an overload / short circuit protection integrated chip; the control circuit includes an NMOS control switch.

[0019] Preferably, when the lower bridge circuit fails, the PMOS control switch or the overload / short-circuit protection integrated chip is controlled to be disconnected, and an enable signal is injected into the Buck Boost chip through the control circuit to start the Buck Boost chip;

[0020] The NMOS control switch flips and maintains a high level for 1ms to generate the enable signal.

[0021] Preferably, the output of the driving power architecture is monitored to autonomously control the control circuit to inject an enable signal.

[0022] The present invention also provides a motor controller, which uses any of the above-mentioned drive power supply architectures of the motor controller.

[0023] The present invention further provides a method for controlling a driving power supply of a motor controller, which uses any of the above-mentioned driving power supply architectures of the motor controller, and includes the following steps:

[0024] The power supply end supplies power to the upper bridge circuit and the lower bridge circuit respectively through the Buck Boost chip;

[0025] The main control chip is used to sample the output of the upper bridge circuit and the lower bridge circuit respectively in real time;

[0026] When the main control chip determines that the upper bridge circuit is faulty, the Buck Boost chip triggers the protection mode, and the emergency power supply output supplies power to the lower bridge circuit;

[0027] When the main control chip determines that the lower bridge is faulty, the control circuit outputs an enable signal to the Buck Boost chip, so that after the protection circuit is disconnected, the Buck Boost chip restarts and the Buck Boost chip output resumes power supply to the upper bridge circuit.

[0028] Preferably, the protection circuit is arranged to include a fuse, and the control circuit includes an NMOS control switch;

[0029] If the lower bridge fails, the control circuit injects an enable signal into the Buck Boost chip, so that the protection circuit remains connected until the fuse blows. The enable signal is flipped through the NMOS control switch and outputted periodically with a high level of 1ms and a low level of 20ms.

[0030] Preferably, the protection circuit is arranged to include a PMOS control switch or an overload / short circuit protection integrated chip, and the control circuit includes an NMOS control switch;

[0031] If the lower bridge fails, the PMOS control switch or the overload / short-circuit protection integrated chip is controlled to be disconnected, and an enable signal is injected into the Buck Boost chip through the control circuit, wherein the enable signal is flipped through the NMOS control switch and maintained at a high level output for 1ms.

[0032] Compared with the existing technology, the above technical solution has the following beneficial effects:

[0033] The driving power supply architecture, motor controller and control method of the motor controller provided in this application adopt an emergency power supply solution to deal with abnormal conditions of the upper bridge driving load. When the lower bridge driving load is abnormally short-circuited, an enable signal is input to the Buck Boost chip through a newly added control circuit, so that the protection circuit is disconnected (the fuse is blown, the PMOS control switch is cut off, or the overload / short-circuit protection integrated chip controls the shutdown). At the same time, the circuit network except for the lower bridge driving power failure quickly restores normal power supply, solving the problem that the chip with protection mode used in the existing electronic control drive system cannot normally blow the fuse and cannot perform protection, which poses a high safety hazard. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] FIG1 is a schematic diagram of a circuit structure of a driving power supply structure of a motor controller, a motor controller, and a control method according to a first embodiment of the present invention;

[0035] FIG2 is a schematic diagram of a circuit structure of a drive power supply structure of a motor controller, a motor controller, and a control method according to a second embodiment of the present invention;

[0036] FIG3 is a schematic diagram of a circuit structure of a driving power supply structure of a motor controller, a motor controller, and a control method according to a third embodiment of the present invention. DETAILED DESCRIPTION

[0037] The advantages of the present invention are further described below with reference to the accompanying drawings and specific embodiments.

[0038] Exemplary embodiments will be described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numerals in different figures represent identical or similar elements, unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all possible embodiments consistent with the present disclosure. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present disclosure, as detailed in the appended claims.

[0039] The terms used in this disclosure are for the purpose of describing specific embodiments only and are not intended to limit the disclosure. As used in this disclosure and the appended claims, the singular forms "a," "an," "the," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and / or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

[0040] It should be understood that although the terms first, second, third, etc. may be used in this disclosure to describe various information, such information should not be limited to these terms. These terms are only used to distinguish information of the same type from each other. For example, without departing from the scope of this disclosure, first information may also be referred to as second information, and similarly, second information may also be referred to as first information. Depending on the context, the word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining."

[0041] In the description of the present invention, it should be understood that the terms "longitudinal", "transverse", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention.

[0042] In the description of the present invention, unless otherwise specified and limited, it should be noted that the terms "installed", "connected" and "connected" should be understood in a broad sense. For example, it can be a mechanical connection or an electrical connection, or it can be the internal communication between two components. It can be a direct connection or an indirect connection through an intermediate medium. For ordinary technicians in this field, the specific meanings of the above terms can be understood according to the specific circumstances.

[0043] In the following description, the suffixes such as "module", "component" or "unit" used to represent elements are only used to facilitate the description of the present invention and have no specific meaning. Therefore, "module" and "component" can be used interchangeably.

[0044] Example 1: This embodiment discloses a drive power supply architecture for a motor controller. This drive power supply architecture utilizes a Buck Boost chip with a hiccup protection function to overcome the problem of failure response caused by the use of such a chip. It should be noted that in the drive power supply architecture provided by this embodiment, an emergency power supply is connected to the lower bridge circuit to cope with the situation of upper bridge circuit failure. At the same time, a protection circuit is connected between the lower bridge circuit and the Buck Boost chip. When the lower bridge circuit fails, the protection circuit is disconnected, so that the Buck Boost chip controls the upper bridge circuit to maintain power supply. This achieves the ability to cope with different drive load failures and provides higher safety.

[0045] Based on the above, referring to FIG1 , specifically, the driver power architecture includes a power supply terminal VIN, an upper bridge circuit, and a lower bridge circuit; the power supply terminal VIN is connected to the upper bridge circuit and the lower bridge circuit respectively through a Buck Boost chip; it can be understood that the upper bridge circuit and the lower bridge circuit are universal circuits, and other components can be connected thereto, but are not limited to, to meet the needs of different scenarios.

[0046] As mentioned above, in order to cope with different driving load failure situations, it also includes: an emergency power supply end, connected to the lower bridge circuit; a protection circuit, connected between the Buck Boost chip and the lower bridge circuit; a control circuit, connected to the input end of the Buck Boost chip to control the startup of the Buck Boost chip according to the on-off of the lower bridge circuit; when the lower bridge circuit fails, the control circuit outputs an enable signal EN to the Buck Boost chip to disconnect the protection circuit and restart the Buck Boost chip so that the Buck Boost chip output VOUT resumes power supply to the upper bridge circuit.

[0047] Furthermore, in the driving power supply architecture, a unidirectional diode can be set between the emergency power supply end and the lower bridge circuit connection and in the protection circuit to prevent current backflow, thereby further improving the safety of the driving power supply architecture when in use. Unidirectional diodes can also be set at other circuit connections, or other components that can achieve circuit protection can also replace the diode setting, which is not limited here.

[0048] As an illustration, a control circuit acting on the Buck Boost chip is added to the driving power supply architecture provided in this embodiment. When a lower bridge fails, the control circuit outputs an enable signal EN to the Buck Boost chip, so that the Buck Boost chip output can control the protection circuit to disconnect, and after disconnection, the Buck Boost chip is restarted to restore power to the upper bridge circuit, providing a response measure when a lower bridge fails.

[0049] In this embodiment, the control circuit can adopt but is not limited to a MOS switch. For example, an NMOS control switch can be used to form the control circuit. The NMOS control switch is output to the enable pin of the Buck Boost chip, and the Buck Boost chip is controlled according to the injection of a preset enable signal. The NMOS control switch is synchronously controlled to flip the state according to the operating state of the lower bridge circuit (such as short circuit fault, normal, etc.), and the corresponding enable signal is output. When the lower bridge circuit operates normally, the NMOS control switch is controlled to be at a low level, and the Buck Boost chip receives the power supply end signal output. When the lower bridge circuit fails, the NMOS control switch can be flipped to a high level to restart the Buck Boost chip, or a periodic enable output can be performed to control the output of the Buck Boost chip, thereby controlling the protection circuit to disconnect and maintaining power supply to the upper bridge circuit.

[0050] As previously mentioned, in this embodiment, the protection circuit may include, but is not limited to, a fuse (FUSE). When the lower bridge fails, the fuse can be blown to disconnect the lower bridge circuit from the entire drive power architecture, thereby protecting the drive power architecture. However, since the Buck Boost chip enters protection mode, it is no longer possible to continue to power the protection circuit and the lower bridge circuit, and the fuse commonly used in the protection circuit requires a certain amount of time to be energized before it can be blown. Therefore, in this embodiment, the control circuit injects an enable signal EN to restart the Buck Boost chip and maintains it for a certain period of time so that the fuse blows. That is, when the lower bridge circuit fails, the control circuit injects an enable signal EN into the Buck Boost chip so that the protection circuit remains connected until the fuse blows, and then the Buck Boost chip is started. Specifically, the NMOS control switch flips to generate the enable signal EN with a period of 1ms high and 20ms low.

[0051] As a supplementary explanation, the enable signal EN generated by the above-mentioned NMOS control switch, the high level and low level flipping time can control the NMOS control switch to be implemented. In this implementation, a 1ms high level and 20ms low level are set to restart the Buck Boost chip. During the restart process, the chip does not have the hiccup short-circuit protection capability, and can provide sufficient heat to make the fuse blow. Specifically, different parameters can also be configured to generate corresponding enable signals to adapt to the usage requirements of different scenarios (requiring different heat to blow the fuse).

[0052] This embodiment uses a Buck Boost chip. When a fault occurs in the upper bridge circuit, the Buck Boost chip directly enters protection mode and simultaneously enables the backup power supply terminal to power the lower bridge circuit, and the lower bridge executes ASC mode. When a fault occurs in the lower bridge circuit, the Buck Boost chip enters protection mode and can no longer power the protection circuit and the lower bridge circuit. The fuse in the protection circuit requires a certain amount of power to melt, so the short-circuit protection cannot be triggered. At this time, the NMOS control switch flips the enable signal with a periodic 1ms high level and 20ms low level, thereby initializing the Buck Boost chip and waiting for power to be restored. The fuse then blows, and then the Buck Boost chip resumes powering the upper bridge circuit until the fault in the lower bridge circuit is eliminated.

[0053] It should also be noted that, in this embodiment, the output of the driving power supply architecture is monitored to autonomously control the control circuit to inject the enable signal EN, that is, the short-circuit fault occurring at a certain node in the driving power supply architecture is identified and cut off through autonomous monitoring by software, thereby reducing the situation where a single point failure causes the entire driving power supply architecture to be "paralyzed", that is, the driving power supply undervoltage is autonomously monitored and the enable signal injection action of the control circuit is autonomously started, the fuse between the power supply output and the faulty load is blown, and the path between the power supply and the faulty load is cut off to ensure that the circuit network except for the lower bridge driving power supply fault returns to normal, so that safe operation can be performed.

[0054] This embodiment further provides a method for controlling a driving power supply of a motor controller, based on the aforementioned driving power supply architecture of the motor controller, including the following:

[0055] First, the power supply end supplies power to the upper bridge circuit and the lower bridge circuit respectively through the Buck Boost chip; at this time, the driving power supply architecture is in normal operation, and there is no fault in the upper bridge circuit and the lower bridge circuit, and power is supplied normally.

[0056] During the operation of the above-mentioned driving power supply, the main control chip is used in real time to sample the outputs of the upper bridge circuit and the lower bridge circuit respectively; it should be noted that the main control chip is arranged in the motor controller and can perform output sampling detection on multiple output points in the driving power supply architecture to determine the location of the faulty load and determine whether the upper bridge circuit or the lower bridge circuit is faulty. Specifically, when the upper bridge circuit or the lower bridge circuit fails, the Buck Boost chip will enter the protection mode, and the main control chip will continue to detect VOUT (lower bridge circuit) undervoltage, sampling VOUT for 10 times within 10ms. If the sampling result shows that the number of undervoltages exceeds 7 times or more, it is judged as a short circuit in the subsequent stage (that is, it is confirmed to be a lower bridge short circuit).

[0057] When the main control chip determines that the upper bridge circuit is faulty, the Buck Boost chip triggers the protection mode, and the emergency power supply output supplies power to the lower bridge circuit. At this time, the lower bridge performs ASC (active short circuit) to perform safe operation.

[0058] When the main control chip determines that the lower bridge has failed, the control circuit outputs an enable signal EN to the Buck Boost chip. This disconnects the protection circuit, and the Buck Boost chip then restarts, restoring power to the upper bridge circuit through the Buck Boost chip output. The control circuit injects the enable signal EN into the Buck Boost chip, keeping the protection circuit connected until the fuse blows. The enable signal EN is switched by the NMOS control switch, cyclically outputting a high level for 1ms and a low level for 20ms.

[0059] In this embodiment, the above-mentioned power supply architecture uses a fuse for low-side short-circuit protection. The control circuit injects an enable signal EN to the Buck Boost chip to restart the Buck Boost chip. During this process, the chip does not have the hiccup short-circuit protection capability. To ensure that the fuse can be blown after detecting a load fault, the enable signal is injected with a high level of 1ms and a low level of 20ms as a cycle (initializing the Buck Boost chip and waiting for power recovery). When VOUT is detected to have recovered, the NMOS control switch stops flipping.

[0060] Based on the driving power supply architecture of the motor controller and the control method of the driving power supply of the motor controller provided in the above-mentioned embodiment, an emergency power supply solution is adopted to deal with abnormal conditions of the upper bridge driving load, which can ensure that the lower bridge enters ASC to protect the power battery system of the entire vehicle. If the lower bridge driving load is abnormally short-circuited, an enable signal (periodically output with a high level of 1ms and a low level of 20ms) is input to the Buck Boost chip through the control circuit, so that the Buck Boost chip is restarted until the fuse blows, thereby allowing the upper bridge to enter ASC, solving the problem that the load abnormality measures cannot be triggered due to the Buck Boost chip entering the protection mode, and improving the safety of the driving power supply of the motor controller.

[0061] Example 2: This embodiment provides a driving power supply architecture for a motor controller. Refer to Figure 2. The difference from the above-mentioned Example 1 is that the protection circuit in the driving power supply architecture in this embodiment includes but is not limited to a PMOS control switch. The PMOS control switch includes three pins G, D, and S. When a control signal is added between G and S, the conduction and cutoff between D and S can be changed.

[0062] When a PMOS control switch is placed between the Buck Boost chip and the lower bridge circuit as a protection element, pins D and S are connected to the Buck Boost chip and the lower bridge circuit respectively. When the lower bridge circuit operates normally, the PMOS control switch turns on pins D and S, and the PMOS control switch outputs a high level. When the lower bridge circuit fails, the output is flipped low to cut off the PMOS control switch, eliminating the possibility of a short circuit in the lower bridge load. At the same time, the NMOS control switch is pulled high and flipped to quickly restart the Buck Boost chip.

[0063] In this embodiment, a PMOS control switch is used instead of a fuse. This eliminates the need for a fuse. If the lower bridge shorts, the PMOS control switch can be directly turned off. This eliminates the possibility of the lower bridge circuit being unable to be disconnected due to the Buck Boost chip entering protection mode, thus reducing safety risks.

[0064] This embodiment uses a PMOS control switch to cut off. The Buck Boost chip can restart autonomously after a period of time (mostly about 3 seconds). During this time, the lower bridge circuit is cut off. The Buck Boost chip can still restart autonomously to power the upper bridge circuit for safe processing.

[0065] As a further optional embodiment, in this embodiment, after the PMOS control switch or the overload / short-circuit protection integrated chip is controlled to be disconnected, an enable signal EN is injected into the Buck Boost chip via the control circuit to start the Buck Boost chip. It should be emphasized that this is different from the first embodiment, in which the fuse takes a period of time to blow. Therefore, there is no need to keep the protection circuit connected for a period of time. Here, the Buck Boost chip can be directly restarted via the enable signal EN without waiting for the chip to start up autonomously, effectively shortening the startup time and allowing other circuit networks other than the lower bridge circuit fault to quickly return to normal, thereby improving control efficiency and safety.

[0066] Based on the above, since the enable signal EN only needs to restart the Buck Boost chip, the NMOS control switch is flipped and maintained at a high level for 1ms to generate the enable signal EN. This shortens the existing general restart time from 3S to less than 20ms, thereby improving control efficiency. Specifically, the control parameters of the NMOS control switch can also be set to adjust the chip startup time to meet the needs of different implementation scenarios.

[0067] This embodiment also provides a method for controlling the driving power supply of a motor controller. Based on the above-mentioned driving power supply architecture of the motor controller, the method differs from the control method shown in the above-mentioned embodiment 1 in that: when the main control chip determines that a lower bridge fault occurs, the PMOS control switch or the overload / short-circuit protection integrated chip is controlled to be disconnected, and an enable signal EN is injected into the Buck Boost chip through the control circuit, wherein the enable signal EN is flipped by the NMOS control switch and maintains a high-level output for 1ms.

[0068] The drive power architecture provided in this embodiment includes a protection circuit including a PMOS control switch. Software detects undervoltage in the drive power supply and shuts off the PMOS control switch between the power output and the lower bridge load. By controlling the Buck Boost chip enable pin, the power supply to the upper bridge circuit is quickly restarted. Specifically, consistent with Example 1, if a short circuit occurs in the upper bridge, the Buck Boost chip enters hiccup protection mode, with the emergency power supply voltage supplied to the lower bridge, which then executes ASC. If a short circuit occurs in the lower bridge, the Buck Boost chip first enters hiccup protection mode, with the main control chip detecting VOUT undervoltage and sampling VOUT 10 times within 10ms. If the sampling result indicates undervoltage occurrences of more than 7 times, a short circuit is determined in the lower stage. Unlike Example 1, LOAD_EN is pulled low (i.e., the PMOS is turned off, eliminating the possibility of a short circuit in the lower bridge load) and the enable signal EN is simultaneously pulled high for 1ms (initializing the Buck Boost chip). The Buck Boost circuit can return to normal within a set time (i.e., shorter than the 3s required for the Buck Boost chip to autonomously start).

[0069] Example 3: This embodiment provides a driving power supply architecture for a motor controller, see Figure 3. The difference from the above-mentioned Examples 1 and 2 is that the protection circuit in the driving power supply architecture in this embodiment includes but is not limited to an overload / short-circuit protection integrated chip. The overload / short-circuit protection integrated chip can be automatically cut off when a lower bridge circuit fails. That is, the advantage over the above-mentioned Example 2 is that it does not need to autonomously trigger the shutdown of the PMOS control switch.

[0070] It should be noted that this embodiment is similar to the second embodiment. When the lower bridge circuit fails, the overload / short-circuit protection integrated chip is automatically cut off, and at the same time, the enable signal EN is injected into the Buck Boost chip through the control circuit. The enable signal EN is flipped through the NMOS control switch and maintains a high-level output for 1ms, so that the Buck Boost chip restarts quickly and the upper bridge circuit operates normally.

[0071] This embodiment also provides a method for controlling the drive power supply of a motor controller. Based on the aforementioned drive power supply architecture, the specific control method is similar to that described in Example 2. Specifically, if a lower bridge circuit fails, the Buck Boost chip first enters hiccup protection mode. The overload / short-circuit protection integrated chip detects overcurrent in the downstream load and shuts off the path to the faulty load. The Buck Boost circuit returns to normal operation within a set soft-start time. The integrated NMOS power FET allows for adjustable power supply current limiting without software control, enhancing overload and short-circuit protection, simplifying cutting-edge power supply design.

[0072] Example 4: This embodiment also provides a motor controller, which applies the driving power supply architecture of the motor controller described in any one of the above-mentioned examples 1, 2 or 3, and executes a corresponding control method of the driving power supply. Specifically, different architecture arrangements can be selected according to actual scenarios.

[0073] In this embodiment, other devices or components including but not limited to those used to enable the normal operation of the motor controller may also be set / connected, which will not be elaborated here. The motor controller implemented through this architecture can quickly cut off the path between the power supply and the faulty load to ensure that the power supply network except for the drive power failure returns to normal, ensuring that the software can perform safe operations, with higher security and higher control efficiency.

[0074] It should be noted that the embodiments of the present invention have better practicability and do not impose any form of limitation on the present invention. Any technician familiar with the field may use the technical content disclosed above to change or modify it into an equivalent effective embodiment. However, any modification or equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention are still within the scope of the technical solution of the present invention.

Claims

1. A drive power supply architecture for a motor controller, characterized by: It includes a power supply terminal, an upper bridge circuit and a lower bridge circuit; The power supply end is connected to the upper bridge circuit and the lower bridge circuit respectively through the Buck Boost chip; Also includes: Emergency power supply terminal, connected to the lower bridge circuit; A protection circuit connected between the Buck Boost chip and the lower bridge circuit; A control circuit connected to the input terminal of the Buck Boost chip to control the startup of the Buck Boost chip according to the on / off state of the lower bridge circuit; When the lower bridge circuit fails, the control circuit outputs an enable signal to the Buck Boost chip to disconnect the protection circuit and then restart the Buck Boost chip so that the Buck Boost chip output resumes power supply to the upper bridge circuit.

2. The driving power supply architecture according to claim 1, wherein: The protection circuit includes a fuse; When the lower bridge circuit fails, the control circuit injects an enable signal into the Buck Boost chip, so that the protection circuit remains connected until the fuse blows, and then the Buck Boost chip is started.

3. The driving power supply architecture according to claim 2, wherein: The control circuit includes an NMOS control switch; The NMOS control switch flips to generate the enable signal with a high level of 1ms and a low level of 20ms as a cycle.

4. The driving power supply architecture according to claim 1, wherein: The protection circuit includes a PMOS control switch or an overload / short circuit protection integrated chip, and the control circuit includes an NMOS control switch.

5. The driving power supply architecture according to claim 4, wherein: When the lower bridge circuit fails, the PMOS control switch or the overload / short-circuit protection integrated chip is controlled to be disconnected, and an enable signal is injected into the Buck Boost chip through the control circuit to start the Buck Boost chip; The NMOS control switch flips and maintains a high level for 1ms to generate the enable signal.

6. The driving power supply architecture according to claim 2 or 4, characterized in that: The output of the driving power structure is monitored to autonomously control the control circuit to inject the enable signal.

7. A motor controller, characterized in that: A drive power supply architecture using the motor controller according to any one of claims 1 to 6.

8. A method for controlling a driving power supply of a motor controller, characterized in that: The drive power supply architecture of the motor controller according to any one of claims 1 to 6 includes the following: The power supply end supplies power to the upper bridge circuit and the lower bridge circuit respectively through the Buck Boost chip; The main control chip is used to sample the output of the upper bridge circuit and the lower bridge circuit respectively in real time; When the main control chip determines that the upper bridge circuit is faulty, the Buck Boost chip triggers the protection mode, and the emergency power supply output supplies power to the lower bridge circuit; When the main control chip determines that the lower bridge is faulty, the control circuit outputs an enable signal to the Buck Boost chip, so that after the protection circuit is disconnected, the Buck Boost chip restarts and the Buck Boost chip output resumes power supply to the upper bridge circuit.

9. The control method according to claim 8, characterized in that: Arranging the protection circuit to include a fuse, and the control circuit to include an NMOS control switch; If the lower bridge fails, the control circuit injects an enable signal into the Buck Boost chip, so that the protection circuit remains connected until the fuse blows. The enable signal is flipped through the NMOS control switch and outputted periodically with a high level of 1ms and a low level of 20ms.

10. The control method according to claim 8, characterized in that: Arrange the protection circuit to include a PMOS control switch or an overload / short circuit protection integrated chip, and the control circuit to include an NMOS control switch; If the lower bridge fails, the PMOS control switch or the overload / short-circuit protection integrated chip is controlled to be disconnected, and an enable signal is injected into the Buck Boost chip through the control circuit, wherein the enable signal is flipped through the NMOS control switch and maintained at a high level output for 1ms.

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