Semiconductor light-emitting element and method for manufacturing semiconductor light-emitting element

Abstract

A semiconductor light-emitting element (10) comprises: a semiconductor laminate (10S); and a contact electrode (40) that is in contact with the semiconductor laminate (10S) and contains Ag as a main component. The contact electrode (40) has one or more recesses (D1) formed in the surface of the contact electrode (40), and on a straight line extending in a direction along the surface of the contact electrode (40), an average inter-recess distance defined by the average of the distances between two adjacent recesses (D1) among the one or more recesses (D1) is 0.11 μm or greater.

Description

Semiconductor light emitting device and method for manufacturing the same

[0001] The present disclosure relates to a semiconductor light emitting device and a method for manufacturing the semiconductor light emitting device.

[0002] 2. Description of the Related Art Conventionally, in semiconductor light emitting devices such as light emitting diodes, a technique has been known in which an electrode made of Ag is used as an electrode in contact with a semiconductor layer (see, for example, Patent Document 1).

[0003] International Publication No. 2023 / 153330

[0004] However, because the cohesive energy of Ag is small, Ag electrodes formed by conventional electrode formation techniques for semiconductor light-emitting devices, such as electron beam evaporation and RF (Radio Frequency) sputtering, are unable to suppress Ag migration during heating, which can cause variations in the optical and electrical properties of the electrodes.

[0005] The present disclosure is intended to solve such problems, and has an object to provide a semiconductor light emitting device and the like that can suppress Ag migration when an electrode containing Ag as a main component is heated.

[0006] In order to solve the above problems, one aspect of the semiconductor light-emitting device according to the present disclosure comprises a semiconductor laminate and a contact electrode that is in contact with the semiconductor laminate and contains Ag as a main component, the contact electrode having one or more recesses formed on a surface of the contact electrode, and an average recess-to-recess distance, defined as the average distance between two adjacent recesses among the one or more recesses on a straight line extending in a direction along the surface of the contact electrode, is 0.11 μm or more.

[0007] In order to solve the above problem, another aspect of the semiconductor light-emitting element according to the present disclosure comprises a semiconductor laminate and a contact electrode that is in contact with the semiconductor laminate and is mainly composed of Ag, the contact electrode having one or more recesses formed on a surface of the contact electrode, the one or more recesses including a plurality of recesses, and in a planar view of the surface of the contact electrode, the plurality of recesses extend in a curved shape and are spaced apart from one another.

[0008] In order to solve the above problems, one aspect of the method for manufacturing a semiconductor light-emitting element according to the present disclosure includes a lamination step of forming a semiconductor laminate, a contact electrode formation step of forming a contact electrode in contact with the semiconductor laminate and containing Ag as a main component, and a heat treatment step of heating the contact electrode, wherein the contact electrode is formed by ECR sputtering in the contact electrode formation step.

[0009] According to the present disclosure, it is possible to provide a semiconductor light emitting device or the like that can suppress Ag migration when an electrode containing Ag as a main component is heated.

[0010] 1 is a schematic cross-sectional view showing an overall configuration of a semiconductor light-emitting device according to a first embodiment. FIG. 2 is a schematic cross-sectional view showing a stacking step in a method for manufacturing a semiconductor light-emitting device according to a first embodiment. FIG. 3 is a schematic cross-sectional view showing a processing step in a method for manufacturing a semiconductor light-emitting device according to a first embodiment. FIG. 4 is a schematic cross-sectional view showing an insulating film forming step in a method for manufacturing a semiconductor light-emitting device according to a first embodiment. FIG. 5 is a schematic cross-sectional view showing an opening forming step in a method for manufacturing a semiconductor light-emitting device according to a first embodiment. FIG. 6 is a schematic cross-sectional view showing a contact electrode forming step in a method for manufacturing a semiconductor light-emitting device according to a first embodiment. FIG. 7 is a schematic cross-sectional view showing a heat treatment step in a method for manufacturing a semiconductor light-emitting device according to a first embodiment. FIG. 8 is a schematic cross-sectional view showing a p-side electrode forming step in a method for manufacturing a semiconductor light-emitting device according to a first embodiment. FIG. 9 is a schematic cross-sectional view showing a substrate polishing step in a method for manufacturing a semiconductor light-emitting device according to a first embodiment. FIG. 10 is a diagram illustrating an overview of an ECR sputtering apparatus. FIG. 11 is a scanning electron microscope (SEM) image showing the surface structure of a contact electrode of a comparative example before and after heat treatment. FIG. 12 is a SEM image showing the surface structure of a contact electrode according to a first embodiment before and after heat treatment. FIG. 13 is a SEM image showing the cross-sectional structure of a contact electrode according to a first embodiment. FIG. 14 is a graph showing current-voltage characteristics of a contact electrode and a semiconductor laminate before and after heat treatment according to a first embodiment. 1 is a graph showing the refractive index characteristics with respect to wavelength before and after heat treatment of each contact electrode of the first embodiment and the comparative example. FIG. 2 is a schematic cross-sectional view showing the overall configuration of a semiconductor light-emitting device according to a first modification of the embodiment. FIG. 3 is a schematic cross-sectional view showing the overall configuration of a semiconductor light-emitting device according to a second modification of the embodiment. FIG. 4 is a schematic cross-sectional view showing the overall configuration of a semiconductor light-emitting device according to a third modification of the embodiment. FIG. 5 is a schematic cross-sectional view showing the configuration of a contact electrode of a semiconductor light-emitting device according to a third modification of the first embodiment. FIG. 6 is a graph showing the current-voltage characteristics of a contact electrode and a semiconductor laminate before and after heat treatment according to a second modification of the first embodiment. FIG. 7 is a graph showing the current-voltage characteristics of a contact electrode and a semiconductor laminate before and after heat treatment according to a third modification of the first embodiment. FIG. 8 is a diagram relating to SEM images and recesses on the surfaces of each contact electrode according to the first embodiment and modifications 1 to 3. FIG. 9 is a schematic cross-sectional view showing the overall configuration of a semiconductor light-emitting device according to a fourth modification of the first embodiment.10 is a diagram showing an SEM image of the surface of a contact electrode according to a fourth modification of the first embodiment. FIG. 11 is a diagram relating to SEM images and recesses of the surfaces of each contact electrode according to the first embodiment and the fourth modification. FIG. 12 is a diagram for explaining a method for measuring the average distance between recesses. FIG. 13 is a diagram showing measurement positions in an SEM image of a contact electrode according to the fourth modification of the first embodiment. FIG. 14 is a diagram showing measurement results of the average distance between recesses of contact electrodes according to the fourth modification of the first embodiment. FIG. 15 is a diagram showing measurement positions in an SEM image of a contact electrode according to the first embodiment. FIG. 16 is a diagram showing measurement results of the average distance between recesses of contact electrodes according to the first embodiment. FIG. 17 is a diagram showing measurement positions in an SEM image of a contact electrode after heat treatment according to the fourth modification of the first embodiment. FIG. 18 is a diagram showing measurement results of the average distance between recesses of contact electrodes after heat treatment according to the fourth modification of the first embodiment.

[0011] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. Note that each of the embodiments described below represents a specific example of the present disclosure. Therefore, the numerical values, shapes, materials, components, and the arrangement and connection of the components shown in the following embodiments are merely examples and are not intended to limit the present disclosure.

[0012] Furthermore, each figure is a schematic diagram and is not necessarily an exact representation. Therefore, the scales and the like do not necessarily match in each figure. In each figure, the same reference numerals are used to denote substantially the same components, and redundant explanations will be omitted or simplified.

[0013] In this specification, the terms "above" and "below" do not refer to vertically above and below in absolute spatial recognition, but are used as terms defined by a relative positional relationship based on the stacking order in a stacked configuration. The terms "above" and "below" are used not only when two components are arranged with a gap between them and another component is present between them, but also when two components are arranged in contact with each other.

[0014] First Embodiment A semiconductor light emitting device according to a first embodiment and a method for manufacturing the same will be described.

[0015] [1-1. Overall Configuration of Semiconductor Light Emitting Device] First, the overall configuration of a semiconductor light emitting device according to this embodiment will be described with reference to Fig. 1. Fig. 1 is a schematic cross-sectional view showing the overall configuration of a semiconductor light emitting device 10 according to this embodiment.

[0016] The semiconductor light-emitting element 10 is a semiconductor element that emits light. In this embodiment, the semiconductor light-emitting element 10 is a semiconductor laser element that emits laser light. FIG. 1 shows a cross section perpendicular to the propagation direction of the laser light emitted by the semiconductor light-emitting element 10. The wavelength of the light (laser light) emitted by the semiconductor light-emitting element 10 is not particularly limited. In this embodiment, the semiconductor light-emitting element 10 emits, for example, blue light having a peak wavelength in the 445 nm band.

[0017] 1 , the semiconductor light emitting device 10 includes a semiconductor stack 10S and a contact electrode 40. In the present embodiment, the semiconductor light emitting device 10 further includes a substrate 21, an insulating film 30, a barrier metal layer 50, a pad electrode 60, and an n-side electrode 70.

[0018] The substrate 21 is a plate-like member that serves as a base for the semiconductor light-emitting device 10. In this embodiment, the substrate 21 is an n-type GaN substrate.

[0019] The semiconductor stack 10S is a stack including semiconductor layers. The semiconductor stack 10S has a plurality of semiconductor layers stacked in a stacking direction. In the present embodiment, the semiconductor stack 10S includes a nitride semiconductor layer. The semiconductor stack 10S has an n-side semiconductor layer 22, an active layer 23, and a p-side semiconductor layer 24. An element isolation trench 10T is formed at an end in the horizontal direction of the semiconductor stack 10S shown in FIG. 1 . In the present embodiment, the element isolation trench 10T reaches from the top surface of the semiconductor stack 10S to the inside of the n-side semiconductor layer 22.

[0020] The n-side semiconductor layer 22 is an example of a first semiconductor layer of a first conductivity type that is arranged above the substrate 21 and below the active layer 23. In the present embodiment, the first conductivity type is n-type. The n-side semiconductor layer 22 includes a nitride semiconductor. The n-side semiconductor layer 22 also includes an n-type clad layer that has a lower refractive index than the active layer 23. The n-side semiconductor layer 22 is, for example, an n-type AlGaN layer. Note that the n-side semiconductor layer 22 may include a layer other than the n-type clad layer. The n-side semiconductor layer 22 may include, for example, a buffer layer, an optical guide layer, etc.

[0021] The active layer 23 is a light-emitting layer disposed above the n-side semiconductor layer 22. In this embodiment, the active layer 23 includes a nitride semiconductor and has a quantum well structure. The active layer 23 may have a single quantum well or multiple quantum wells. In this embodiment, the active layer 23 has multiple barrier layers made of InGaN and multiple well layers made of InGaN.

[0022] The p-side semiconductor layer 24 is disposed above the active layer 23 and is an example of a second semiconductor layer of a second conductivity type different from the first conductivity type. In the present embodiment, the second conductivity type is p-type. The p-side semiconductor layer 24 includes a nitride semiconductor. In the present embodiment, the p-side semiconductor layer 24 includes a p-type cladding layer having a refractive index lower than that of the active layer 23. The p-side semiconductor layer 24 is, for example, a p-type AlGaN layer. The p-side semiconductor layer 24 may include a layer other than the p-type cladding layer. The p-side semiconductor layer 24 may include, for example, an optical guide layer, an electron barrier layer, a contact layer, etc. The p-side semiconductor layer 24 may also have a superlattice structure.

[0023] In this embodiment, the p-side semiconductor layer 24 has a ridge 24R extending in the propagation direction of the laser light. The ridge 24R is a portion of the p-side semiconductor layer 24 that protrudes away from the substrate 21. In this embodiment, two grooves 24T are formed in the p-side semiconductor layer 24, arranged along the ridge 24R and extending in the propagation direction of the laser light. In this embodiment, the ridge width (i.e., the horizontal dimension of the ridge 24R in FIG. 1 ) is approximately 45 μm. Furthermore, protruding portions 24P made of the p-side semiconductor layer are formed on both sides of the grooves 24T. The protruding portions 24P are portions of the p-side semiconductor layer 24 that protrude away from the substrate 21 and extend in the propagation direction of the laser light.

[0024] The insulating film 30 is a layer disposed above the p-side semiconductor layer 24 (i.e., the second semiconductor layer). In the present embodiment, the insulating film 30 is disposed between the semiconductor stack 10S and the barrier metal layer 50 and is an electrically insulating layer. The insulating film 30 has an opening 30a disposed at a position corresponding to the upper surface 24Ru of the ridge 24R. In the present embodiment, the insulating film 30 is disposed in a region of the upper surface of the p-side semiconductor layer 24 other than the central portion of the upper surface 24Ru of the ridge 24R. Specifically, the insulating film 30 continuously covers a portion of the upper surface 24Ru of the ridge 24R, the side surface of the ridge 24R, the bottom surface of the groove 24T, the side surface of the protrusion 24P, the upper surface of the protrusion 24P, and the element isolation groove 10T (i.e., the side surface of the p-side semiconductor layer 24 (the end surface located at the end in the horizontal direction in FIG. 1 ), the side surface of the active layer 23, and a portion of the side surface of the n-side semiconductor layer 22). This ensures electrical insulation between the barrier metal layer 50 disposed on the insulating film 30 and the pad electrode 60 disposed above the barrier metal layer 50, and regions other than the region corresponding to the opening 30a of the p-side semiconductor layer 24. This makes it possible to suppress current flowing from the barrier metal layer 50 and the pad electrode 60 to the vicinity of the side surface of the ridge 24R, etc., via the insulating film 30.

[0025] There are no particular limitations on the material that can be used to form the insulating film 30, as long as it is an insulating material. In this embodiment, the insulating film 30 is a silicon oxide film with a thickness of 300 nm.

[0026] The contact electrode 40 is an electrode that is in contact with the semiconductor laminate 10S and contains Ag as a main component. The Ag content in the contact electrode 40 is, for example, 90 at % (atomic percent) or more. In this embodiment, the contact electrode 40 is disposed above the p-side semiconductor layer 24 and in contact with the p-side semiconductor layer 24. The contact electrode 40 is disposed on the upper surface 24Ru of the ridge 24R of the p-side semiconductor layer 24. The contact electrode 40 is disposed in the opening 30a of the insulating film 30. The contact electrode 40 and the insulating film 30 are spaced apart.

[0027] The contact electrode 40 may contain at least one of Cu, Pd, Ir, Mg, Ni, Sn, Ti, Pt, Cr, Au, Ga, O, Ar, and Si. The total concentration of these impurities is less than 10 at%. The total concentration of these impurities may be 5 at% or less, or 1 at% or less. In this embodiment, the contact electrode 40 is an Ag film with an average film thickness of approximately 60 nm. The contact electrode 40 is formed by ECR (Electron Cyclotron Resonance) sputtering. The detailed structure of the contact electrode 40 according to this embodiment will be described later.

[0028] The barrier metal layer 50 is a metal layer disposed above the contact electrode 40. The barrier metal layer 50 has a function of suppressing the diffusion of impurities into the contact electrode 40. Examples of impurities include oxygen atoms. Furthermore, for example, when the semiconductor light emitting element 10 is junction-down (flip-chip) mounted (i.e., when the pad electrode 60 is joined to a mounting substrate, etc.), Sn elements contained in the solder used as a joining material can become impurities that diffuse into the contact electrode 40.

[0029] The barrier metal layer 50 covers the entire upper surface of the contact electrode 40 and continuously covers from the upper surface of the contact electrode 40 to the upper surface of the insulating film 30. In this embodiment, the barrier metal layer 50 continuously covers from the upper surface of the contact electrode 40 to the upper surface of the insulating film 30 arranged outside the ridge 24R. More specifically, as shown in FIG. 1 , the barrier metal layer 50 continuously covers the upper surface of the insulating film 30 arranged continuously above the left protrusion 24P and above the left trench 24T and part of the upper surface of the ridge 24R, the upper surface 24Ru of the ridge 24R located between the left insulating film 30 and the contact electrode 40, the upper surface of the contact electrode 40, the upper surface 24Ru of the ridge 24R located between the contact electrode 40 and the right insulating film 30, and the upper surface of the insulating film 30 arranged continuously above part of the upper surface 24Ru of the ridge 24R and above the right trench 24T and right protrusion 24P.

[0030] The barrier metal layer 50 also functions to enhance adhesion between the pad electrode 60 and the insulating film 30. The barrier metal layer 50 is formed of, for example, Ti or Cr. When the barrier metal layer 50 contains Ti or Cr and the insulating film 30 is an oxide, the adhesion between the insulating film 30 and the barrier metal layer 50 can be further enhanced. This is because when the insulating film 30 is an oxide, if the barrier metal layer 50 is made of a material that easily forms an oxide, the insulating film 30 and the barrier metal layer 50 are strongly bonded to each other. In this embodiment, the barrier metal layer 50 is a Ti layer with a thickness of 100 nm. For example, the thickness of the barrier metal layer 50 may be 200 nm or less. Note that, to enhance the barrier properties of the barrier metal layer 50, the barrier metal layer 50 may be formed of Pt, TiW, Mo, or the like.

[0031] In this embodiment, the average film thickness of the contact electrode 40 is smaller than the average film thickness of the barrier metal layer 50 .

[0032] The pad electrode 60 is a conductive layer disposed above the insulating film 30 and the contact electrode 40 and electrically connected to the contact electrode 40. The pad electrode 60 is formed on the upper surface of the barrier metal layer 50 using the same mask as that used in forming the barrier metal layer 50, and has the same planar shape as the barrier metal layer 50. The pad electrode 60 contains Au. In this embodiment, the pad electrode 60 is an Au layer with a film thickness of approximately 2000 nm.

[0033] The n-side electrode 70 is a conductive layer disposed on the lower surface of the substrate 21 (i.e., the main surface of the substrate 21 opposite to the main surface on which the semiconductor laminate 10S is disposed). The n-side electrode 70 may be, for example, a single-layer film or a multilayer film formed of at least one of Cr, Ti, Ni, Pd, and Pt. In this embodiment, the n-side electrode 70 has a 10-nm-thick Ti layer in contact with the substrate 21, a 35-nm-thick Pt layer in contact with the Ti layer, and a 300-nm-thick Au layer in contact with the Pt layer.

[0034] [1-2. Manufacturing Method of Semiconductor Light Emitting Device] A manufacturing method of the semiconductor light emitting device 10 according to this embodiment will be described with reference to Fig. 2 to Fig. 9. Fig. 2 to Fig. 9 are schematic cross-sectional views showing each step of the manufacturing method of the semiconductor light emitting device 10 according to this embodiment. Like Fig. 1, Fig. 2 to Fig. 9 show cross sections perpendicular to the propagation direction of laser light emitted by the semiconductor light emitting device 10.

[0035] First, as shown in FIG. 2 , a semiconductor laminate 10S is produced (lamination process). In this embodiment, in the lamination process, an n-side semiconductor layer 22 is formed above a substrate 21 as a first semiconductor layer of a first conductivity type, an active layer 23 is formed above the n-side semiconductor layer 22, and a p-side semiconductor layer 24 is formed above the active layer 23 as a second semiconductor layer. More specifically, first, a substrate 21 is prepared. In this embodiment, a wafer (GaN substrate) made of n-type GaN is prepared as the substrate 21. Next, the n-side semiconductor layer 22, the active layer 23, and the p-side semiconductor layer 24 are sequentially laminated on the substrate 21 by epitaxial growth technology using a metal organic chemical vapor deposition (MOCVD) method. This allows the semiconductor laminate 10S to be formed.

[0036] Subsequently, as shown in FIG. 3, the ridge 24R, the protrusion 24P, and the groove 24T, as well as the element isolation groove 10T for separating the semiconductor light emitting element 10 into individual pieces, are formed (processing step).

[0037] The element isolation trenches 10T are formed at positions corresponding to both horizontal end portions of the semiconductor light emitting element 10 shown in Fig. 3. In this embodiment, the element isolation trenches 10T extend from the upper surface of the semiconductor stacked body 10S to the inside of the n-side semiconductor layer 22.

[0038] In this embodiment, the ridge 24R and the protrusion 24P are formed by forming two grooves 24T. The two grooves 24T are formed in the p-side semiconductor layer 24 and do not reach the active layer 23.

[0039] There are no particular limitations on the method for forming the element isolation trench 10T, the ridge 24R, the protrusion 24P, and the trench 24T. The element isolation trench 10T, the ridge 24R, the protrusion 24P, and the trench 24T may be formed using, for example, photolithography and etching, or may be formed by laser processing.

[0040] 4, an insulating film 30 is formed above the p-side semiconductor layer 24 (insulating film formation step). In this embodiment, a silicon oxide film is formed as the insulating film 30 by low-pressure CVD or the like. The silicon oxide film may also be formed by atmospheric pressure CVD, for example.

[0041] 5, an opening 30a is formed at a position corresponding to the upper surface 24Ru of the ridge 24R (opening forming step). Specifically, a resist 80 is formed in the insulating film 30 in a region other than the region corresponding to the opening 30a, and the region of the insulating film 30 corresponding to the opening 30a is removed by etching. The etching method is not particularly limited. Dry etching or wet etching can be used as the etching method.

[0042] Next, a contact electrode 40 containing Ag as a main component is formed in contact with the semiconductor laminate 10S (contact electrode forming step). In this embodiment, the contact electrode 40 is formed in the opening 30a of the insulating film 30 so as to be in contact with the p-side semiconductor layer 24. An Ag layer is formed as the contact electrode 40. After the contact electrode 40 is formed, the resist is removed as shown in FIG. 6. In this embodiment, the contact electrode 40 is formed by ECR sputtering in the contact electrode forming step.

[0043] A method for forming a contact electrode 40 by ECR sputtering will be described with reference to FIG. 10 . FIG. 10 is a diagram illustrating an outline of an ECR sputtering apparatus. As shown in FIG. 10 , the ECR sputtering apparatus includes a plasma chamber and a film formation chamber. By supplying microwaves to the plasma chamber, gas in the plasma chamber is ionized. This generates plasma in the plasma chamber. The generated plasma is confined within the plasma chamber by a magnetic field generated by a magnetic coil. A target containing a film formation material and a substrate 21 on which a semiconductor laminate 10S is stacked are placed in the film formation chamber. In this embodiment, the target contains Ag. By applying RF to the target, an electric field is formed around the target. This attracts ions in the plasma chamber toward the target, causing the ions to collide with the target. Ag particles, which constitute part of the target and are released from the target at this time, are stacked on the substrate 21. This results in the formation of a contact electrode 40 primarily composed of Ag. ECR sputtering can form a contact electrode 40 with highly uniform particle size. Furthermore, ECR sputtering allows the plasma chamber in which the plasma is confined to be separated from the film formation chamber, thereby reducing physical damage to the semiconductor laminate 10S due to collision of the plasma. In this embodiment, the film formation rate of the contact electrode 40 by ECR sputtering is 10 nm / min or less.

[0044] Subsequently, as shown in FIG. ２The semiconductor stack 10S and the contact electrode 40 are heated in an atmosphere containing O (heat treatment step). In this embodiment, the substrate 21, the semiconductor stack 10S, the insulating film 30, and the contact electrode 40 are heated by a hot plate at 350° C. for 1 minute in an atmospheric atmosphere. In other words, atmospheric annealing of the contact electrode 40 is performed. This promotes interdiffusion near the interface between the semiconductor stack 10S and the contact electrode 40, thereby reducing the contact resistance between the semiconductor stack 10S and the contact electrode 40. The atmosphere during heating is O ３ , N ２ O, CO, CO ２ The atmosphere may be a gas containing O, such as

[0045] 8 , a barrier metal layer 50 and a pad electrode 60 are formed above the contact electrode 40 (p-side electrode formation process). In this embodiment, the barrier metal layer 50 is formed continuously from above the contact electrode 40 to above the insulating film 30, and the pad electrode 60 is formed on the barrier metal layer 50.

[0046] 9, the lower surface of the substrate 21 is polished and etched to reduce the thickness of the substrate 21 (substrate polishing step). Next, as shown in Fig. 1, an n-side electrode 70 is formed on the lower surface of the substrate 21 (n-side electrode formation step). Specifically, the n-side electrode 70 is formed by sequentially forming a Ti film, a Pt film, and an Au film using photolithography and vapor deposition.

[0047] By the manufacturing method described above, the semiconductor light emitting device 10 according to this embodiment can be manufactured.

[0048] [1-3. Effects, etc.] The effects, etc. of the semiconductor light emitting device 10 according to this embodiment will be described.

[0049] First, the characteristics of the contact electrode 40 according to the present embodiment will be described with reference to FIGS. 11 to 15 , comparing it with a contact electrode according to a comparative example. FIG. 11 is a scanning electron microscope (SEM) image showing the surface structure of the contact electrode according to the comparative example before and after heat treatment. FIG. 12 is a SEM image showing the surface structure of the contact electrode 40 according to the present embodiment before and after heat treatment. SEM image (a) shown in FIGS. 11 and 12 shows the surface of the contact electrode before heat treatment, and SEM image (b) shows the surface of the contact electrode after heat treatment. FIG. 13 is a SEM image showing the cross-sectional structure of the contact electrode 40 according to the present embodiment. FIG. 13 shows the contact electrode 40 in a cross section similar to that shown in FIG. 1 . FIG. 14 is a graph showing the current-voltage characteristics of the contact electrode 40 and the semiconductor stack 10S before and after heat treatment according to the present embodiment. The horizontal axis of FIG. 14 represents the current flowing through the contact electrode 40, and the vertical axis represents the voltage applied between the contact electrode 40 and the semiconductor stack 10S. FIG. 15 is a graph showing the refractive index versus wavelength characteristics of the contact electrodes of the present embodiment and the comparative example before and after heat treatment.

[0050] First, the contact electrode of the comparative example will be described. The contact electrode of the comparative example is an electrode containing Ag as a main component, like the contact electrode 40 of the present embodiment, but differs from the contact electrode 40 of the present embodiment in that it is formed by RF sputtering instead of ECR ​​sputtering.

[0051] As shown in FIG. 11 , crystal grain boundaries are visible in the contact electrode of the comparative example. In one continuous contact electrode, the crystal grain boundaries have no edges. In other words, the entire crystal grain boundaries are connected. Furthermore, in the contact electrode of the comparative example, as shown in the SEM images (a) and (b) of FIG. 11 , migration occurs due to heat treatment (i.e., atmospheric annealing), resulting in aggregation (i.e., crystal grain growth) and the formation of voids V1. Accordingly, as shown in FIG. 15 , the refractive index of the contact electrode of the comparative example changes significantly before and after heat treatment. Thus, in the contact electrode of the comparative example, migration occurs due to heat treatment, and therefore stability of characteristics against heat treatment cannot be ensured. Furthermore, for example, when the contact electrode 40 is formed on the upper surface 24Ru of the narrow ridge 24R as shown in FIG. 1 , the effect of narrowing the width of the contact electrode 40 due to migration becomes significant. Furthermore, such migration can occur not only during the manufacturing of the semiconductor light emitting device 10, but also due to heat applied to the semiconductor light emitting device 10 when mounting the semiconductor light emitting device 10 on a mounting substrate or the like, or heat generated during operation of the semiconductor light emitting device 10. Furthermore, the contact electrodes of the comparative example are formed by RF sputtering. In an RF sputtering apparatus, the plasma chamber and the film formation chamber are not separated, so RF sputtering cannot suppress physical damage caused by collision of plasma with the semiconductor laminate 10S during the formation of the contact electrodes.

[0052] In contrast, the contact electrode 40 according to the present embodiment has one or more recesses D1 formed on the surface of the contact electrode 40, as shown in FIGS. 12 and 13 . Here, the recesses D1 are steep recesses deeper than the grain boundaries. The recesses D1 are recesses with a depth of, for example, 30 nm or more. As shown in the SEM image (a) of FIG. 12 , the surface of the contact electrode 40 has a brain-like appearance in a planar view, with multiple recesses D1 extending in a curved shape and spaced apart from one another. Each of these multiple recesses D1 is an example of a curved recess having a curved shape in a planar view of the surface of the contact electrode 40. As shown in FIG. 12 , one recess D1 may branch into two or more curved portions. Note that the one or more recesses D1 do not necessarily have to include multiple recesses D1. In other words, the number of one or more recesses D1 may be one.

[0053] As shown in the SEM images (a) and (b) of FIG. 12 , the appearance of the contact electrode 40 according to this embodiment does not change significantly before and after the heat treatment (i.e., atmospheric annealing). In other words, migration is suppressed. While migration is suppressed in this manner, the contact resistance of the contact electrode 40 can be significantly reduced by the heat treatment, as shown in FIG. 14 . In this embodiment, the contact state between the contact electrode 40 and the semiconductor stack 10S is a Schottky contact before the heat treatment, but changes to an ohmic contact after the heat treatment. Furthermore, as shown in FIG. 15 , the contact electrode 40 according to this embodiment can suppress migration, thereby suppressing changes in its characteristics (refractive index) before and after the heat treatment. Furthermore, as described above, the contact electrode 40 according to this embodiment is formed by ECR sputtering, which reduces damage to the semiconductor stack 10S caused by plasma during formation.

[0054] Next, the configuration of the contact electrode 40 according to this embodiment will be described in detail with reference to FIGS. 16 to 25 , comparing it with the configuration of contact electrodes according to modifications. FIGS. 16 , 17 , and 18 are schematic cross-sectional views showing the overall configuration of a semiconductor light-emitting device 10 a according to Modification 1 of this embodiment, a semiconductor light-emitting device 10 b according to Modification 2, and a semiconductor light-emitting device 10 c according to Modification 3, respectively. FIG. 19 is a schematic cross-sectional view showing the configuration of a contact electrode 40 c of a semiconductor light-emitting device 10 c according to Modification 3 of this embodiment. Similar to FIG. 1 , FIGS. 16 to 19 show cross sections perpendicular to the propagation direction of laser light. FIGS. 20 and 21 are graphs showing the current-voltage characteristics of each contact electrode and the semiconductor stack 10S before and after heat treatment according to Modifications 2 and 3 of this embodiment, respectively. The horizontal axis of FIGS. 20 and 21 indicates the current flowing through each contact electrode, and the vertical axis indicates the voltage applied between each contact electrode and the semiconductor stack 10S. FIG. 22 is a diagram showing SEM images of the surfaces of each contact electrode according to this embodiment and Modifications 1 to 3, along with recesses. FIG. 22 shows, together with the SEM image, the RF power input when forming each contact electrode by ECR sputtering, the average film thickness of each contact electrode, the area ratio of the recessed portion D1, and the thickness of the contact electrode 1 μm ２ FIG. 23 is a schematic cross-sectional view showing the overall configuration of a semiconductor light emitting device 10d according to Modification 4 of this embodiment. FIG. 24 is a diagram showing an SEM image of the surface of a contact electrode 40d according to Modification 4 of this embodiment. FIG. 25 is a diagram showing SEM images and recesses on the surface of each contact electrode according to this embodiment and Modification 4. In FIG. 25, along with the SEM image, the RF power input when forming each contact electrode by ECR sputtering, the film formation rate of each contact electrode, the average film thickness of each contact electrode, the area ratio of the recesses D1, and the area ratio of the recesses D1 per 1 μm ２ The area of ​​the depressions D1 per square meter and the average inter-depression distance are shown.

[0055] As shown in FIGS. 16 to 18, the semiconductor light emitting devices according to Modifications 1 to 3 differ from the semiconductor light emitting device 10 according to this embodiment in the configuration of the contact electrodes, but are the same in other respects.

[0056] As shown in FIG. 16 , the semiconductor light emitting device 10 a according to Modification 1 includes a contact electrode 40 a. The contact electrode 40 a according to Modification 1 differs from the contact electrode 40 according to the present embodiment in average film thickness, but is otherwise identical. As shown in FIG. 22 , the average film thickness of the contact electrode 40 according to the present embodiment is 60 nm, while the average film thickness of the contact electrode 40 a according to Modification 1 is 200 nm. Furthermore, both the contact electrode 40 according to the present embodiment and the contact electrode 40 a according to Modification 1 are formed by ECR sputtering using low RF power input to the target. For example, the input RF power is approximately 30 W, and the deposition rate of the contact electrode 40 a is 10 nm / min or less.

[0057] As shown in FIG. 17 , the semiconductor light emitting device 10 b according to Modification 2 includes a contact electrode 40 b. As shown in FIG. 22 , the contact electrode 40 b according to Modification 2 differs from the contact electrode 40 according to the present embodiment in the RF power input to the target when formed by ECR sputtering and the average film thickness, but is identical in other respects. As shown in FIG. 22 , the RF power input to the target when forming the contact electrode 40 b according to Modification 2 is high, e.g., 700 W, and the film formation rate of the contact electrode 40 b is greater than 10 nm / min. The average film thickness of the contact electrode 40 b according to Modification 2 is 200 nm.

[0058] As shown in FIG. 18 , the semiconductor light-emitting device 10 c according to Modification 3 includes a contact electrode 40 c. As shown in FIG. 22 , the contact electrode 40 c according to Modification 3 differs from the contact electrode 40 according to the present embodiment in the RF power input to the target and the average film thickness when formed by ECR sputtering, but is otherwise identical. As shown in FIG. 19 , the contact electrode 40 c according to Modification 3 includes a first layer 41 and a second layer 42 disposed above the first layer 41. As shown in FIG. 22 , the RF power input to the target when forming the contact electrode 40 c according to Modification 3 differs between when forming the first layer 41 and when forming the second layer 42. The RF power input to the target when forming the first layer 41 by ECR sputtering is lower than the RF power input to the target when forming the second layer 42. For example, the RF power input to the target when forming the first layer 41 by ECR sputtering is 30 W and when forming the second layer 42. The deposition rate when the first layer 41 is formed is 10 nm / min or less, and the deposition rate when the second layer 42 is formed is greater than 10 nm / min. For example, the average thickness of the first layer 41 is 50 nm, and the average thickness of the second layer 42 is 150 nm.

[0059] The contact electrodes according to Modifications 1 to 3 are also subjected to heat treatment in the same manner as the contact electrode 40 according to the present embodiment 1. Specifically, the contact electrodes according to Modifications 1 to 3 are also heated in an air atmosphere at 350° C. for 1 minute.

[0060] In the contact electrode 40a according to Modification 1, which differs from the contact electrode 40 according to the present embodiment only in average film thickness, the contact resistance with the semiconductor laminate 10S is reduced by heat treatment, similar to the contact electrode 40 according to the present embodiment. In the contact electrodes according to Modifications 2 and 3, the contact resistance is also reduced by heat treatment, as shown in FIGS. 20 and 21 . The contact between the contact electrode 40c according to Modification 3 and the semiconductor laminate 10S was a Schottky contact before the heat treatment, but changed to an ohmic contact after the heat treatment. The contact between the contact electrode 40b according to Modification 2 and the semiconductor laminate 10S was a Schottky contact both before and after the heat treatment, but the contact resistance was reduced after the heat treatment. Like the contact electrode 40b according to Modification 2, the contact with the semiconductor laminate 10S may be a Schottky contact.

[0061] As shown in Fig. 23, the semiconductor light emitting device 10d according to Modification 4 differs from the semiconductor light emitting device 10 according to the present embodiment in the configuration of the contact electrode 40d, but is the same in other respects. As shown in Fig. 25, the contact electrode 40d according to Modification 4 differs from the contact electrode 40 according to the first embodiment in the film formation rate when formed by ECR sputtering, but is the same in other respects. As shown in Fig. 25, the film formation rate of the contact electrode 40 according to the present embodiment is 3.0 nm / min, while the film formation rate of the contact electrode 40d according to Modification 4 is 9.0 nm / min.

[0062] The contact electrode 40d according to the fourth modification has one or more recesses D1 formed on the surface of the contact electrode 40d. The contact electrode 40d includes a curved recess D11 having a curved shape in a plan view of the surface of the contact electrode 40d, and a plurality of isolated recesses D12 that are recessed deeper than the curved recess D11 and are spaced apart from one another. The depths of the curved recess D11 and the isolated recesses D12 are, for example, 30 nm or more, and the depth of the curved recess D11 is shallower than the depth of the isolated recesses D12.

[0063] 24, each of the plurality of isolated recesses D12 is connected to a curved recess. In this manner, all of the curved recesses D11 and the isolated recesses D12 are integrated. In other words, in the example shown in FIG. 24, the number of the one or more recesses D1 is one. The SEM images of the contact electrode 40d according to the fourth modification shown in FIGS. 24 and 25 are SEM images of the contact electrode 40d before heat treatment.

[0064] The contact electrodes according to this embodiment and Modifications 1 to 3 are formed by ECR sputtering, resulting in a characteristic structure as shown in the SEM images of Fig. 22. That is, each contact electrode has one or more recesses D1 formed in the surface of the contact electrode, and the one or more recesses D1 include a plurality of recesses D1. In a plan view of the surface of each contact electrode, the recesses D1 extend in a curved line and are spaced apart from one another.

[0065] Furthermore, by forming each contact electrode according to Modification 4 by ECR sputtering, a characteristic structure like the SEM images shown in Fig. 24 and Fig. 25 is formed. As shown in Fig. 25, the average inter-depression distance, which is defined as the average distance between two adjacent depressions D1 among one or more depressions D1 on a line extending in a direction along the surface of contact electrode 40d, is 0.11 µm or more.

[0066] Here, a method for measuring the average distance between recesses will be described with reference to FIGS. 26 to 28. FIG. 26 is a diagram for explaining the method for measuring the average distance between recesses. FIG. 27 is a diagram showing measurement positions in an SEM image of contact electrode 40d according to Modification 4 of this embodiment. FIG. 28 is a diagram showing the measurement results of the average distance between recesses of contact electrode 40d according to Modification 4 of this embodiment.

[0067] In this embodiment and each of the modifications, the crystal grain size is measured by applying the intercept method to an observation area obtained by observing the surface of each contact electrode using an SEM image.

[0068] Figure 26 is a diagram simulating an SEM image of the surface of each contact electrode. As shown in Figure 26, a square observation area with a side length of L is prepared. The recesses within the square shown in Figure 26 are indicated by solid lines. The electrode material, primarily composed of Ag, present between the recesses forms crystal grains. It is assumed that the distance between the recesses roughly corresponds to the grain size of the crystal grains.

[0069] Based on this assumption, if there are Nd crystal grains per side in a square observation area with an average inter-depression distance d, the area of ​​the square is L ２ The area of ​​one crystal grain is π(d / 2) ２ The crystal grains are arranged in a square shape. ２ Since there are 100 crystal grains, the area occupied by all the grains is Nd ２ ×π(d / 2) ２ When the observation area is relatively large compared to the crystal grain, the area of ​​the square is equal to the area occupied by all the crystal grains, so L ２ = Nd ２ ×π(d / 2) ２ Therefore, the average distance between the recesses d is d = 2L / Nd / (π) １／２ This is expressed by the following relational expression. Using this relational expression, a straight line (the dashed line in FIG. 26) was drawn in the observation area L×L, and the number Nd of recesses intersecting this line was taken as the number of crystal grains to determine the average distance between recesses. In FIG. 26, the dashed line intersects six recesses, so Nd=6.

[0070] In measuring the average inter-depression distance of the contact electrode 40d according to Modification 4, as shown in FIG. 27 , the number Nd of recesses intersecting a straight line was measured at measurement positions 1 to 3. As shown in FIG. 28 , the length L of one side of the observation area was 2.5 μm. The numbers Nd of recesses intersecting a straight line at positions 1, 2, and 3 were measured to be 26, 24, and 24, respectively. As a result, the average inter-depression distances d at positions 1, 2, and 3 were measured to be 0.11 μm, 0.12 μm, and 0.12 μm, respectively. By calculating the average value of these average inter-depression distances d, the average inter-depression distance d of the contact electrode 40d according to Modification 4 was measured to be 0.11 μm.

[0071] Note that the average inter-concave distance d can be measured in a similar manner in examples other than Modification 4. As an example, measurement results of the average inter-concave distance d of contact electrode 40 according to this embodiment will be described with reference to Figs. 29 and 30. Fig. 29 is a diagram showing measurement positions in an SEM image of contact electrode 40 according to this embodiment. Fig. 30 is a diagram showing measurement results of the average inter-concave distance d of contact electrode 40 according to this embodiment.

[0072] In measuring the average inter-concave distance of the contact electrode 40 according to this embodiment, as shown in FIG. 29 , the number Nd of concaves intersecting a line was measured at measurement positions 1 to 3. As shown in FIG. 30 , the length L of one side of the observation area was 2.5 μm. The numbers Nd of concaves intersecting a line at positions 1, 2, and 3 were measured to be 10, 9, and 10, respectively. As a result, the average inter-concave distances d at positions 1, 2, and 3 were measured to be 0.28 μm, 0.31 μm, and 0.28 μm, respectively. By calculating the average of these average inter-concave distances d, the average inter-concave distance d of the contact electrode 40 according to this embodiment was measured to be 0.29 μm. In this way, even when the contact electrode 40 has a plurality of concaves D1 spaced apart from one another, the average inter-concave distance d can be measured in the same way as in the case of the contact electrode 40d according to Modification 4.

[0073] 27 and 28 show measurements of the average inter-concave distance d on the surface of the contact electrode 40d before the heat treatment according to the fourth modification, but the average inter-concave distance d on the surface after the heat treatment can be measured in a similar manner. The measurement results of the average inter-concave distance d on the contact electrode 40d after the heat treatment according to the fourth modification will be described with reference to FIGS. 31 and 32 . FIG. 31 shows measurement positions in an SEM image of the contact electrode 40d after the heat treatment according to the fourth modification of the present embodiment. The heat treatment on the contact electrode 40d according to the fourth modification involves heating at 350° C. for 1 minute in an air atmosphere, similar to the contact electrode 40 according to the present embodiment. FIG. 32 shows measurements of the average inter-concave distance d on the contact electrode 40d after the heat treatment according to the fourth modification of the present embodiment.

[0074] In measuring the average inter-concave distance of the contact electrode 40d according to the fourth modification, as shown in FIG. 31 , the number Nd of concaves intersecting a straight line was measured at measurement positions 1 to 3. As shown in FIG. 32 , the length L of one side of the observation area was 2.5 μm. The numbers Nd of concaves intersecting a straight line at positions 1, 2, and 3 were measured to be 22, 21, and 24, respectively. As a result, the average inter-concave distances d at positions 1, 2, and 3 were measured to be 0.13 μm, 0.14 μm, and 0.12 μm, respectively. By calculating the average value of these average inter-concave distances d, the average inter-concave distance d of the contact electrode 40d according to the present embodiment after the heat treatment was measured to be 0.13 μm. Thus, it was confirmed that the change in the average inter-concave distance d of the contact electrodes 40d after the heat treatment was small compared to the average inter-concave distance d of the contact electrodes 40d before the heat treatment, and that Ag migration was successfully suppressed. Note that the positions of the lines used to measure the average inter-concave distance are not limited to positions 1 to 3 above. For example, when three lines are used, the positions of the three lines may be any three different positions. Furthermore, the number of lines is not limited to three.

[0075] In this way, by forming each contact electrode according to this embodiment and each modification by ECR sputtering, a characteristic structure like the SEM images shown in Fig. 25 is formed. That is, each contact electrode has one or more recesses D1 formed in its surface, and the average recess-to-recess distance d, which is defined as the average distance between two adjacent recesses among the one or more recesses on a line extending in a direction along the surface of each contact electrode, is 0.11 µm or more. Note that the average recess-to-recess distance d may be 0.50 µm or less, or may be 0.40 µm or less.

[0076] Furthermore, the ratio of the area of ​​the one or more recesses D1 to the area of ​​the surface of each contact electrode is 10% or more and 30% or less, as shown in FIGS.

[0077] Each contact electrode having such a structure can be formed by ECR sputtering as described above, and therefore damage to the semiconductor laminate 10S during the formation of each contact electrode can be reduced.

[0078] Furthermore, the heat treatment of each contact electrode can reduce the contact resistance between the contact electrode and the semiconductor laminate 10S and suppress migration during the heat treatment, thereby suppressing changes in the characteristics of each contact electrode due to heating during the heat treatment when forming the contact electrodes and heating when mounting each semiconductor light-emitting element on a mounting substrate or the like.

[0079] The reason why migration can be suppressed in the contact electrode 40 according to this embodiment is presumed to be as follows. Specifically, since the contact electrode 40 according to this embodiment is formed by, for example, ECR sputtering, direct irradiation of the contact electrode 40 with high-energy plasma is reduced during its formation. However, high-density plasma supplied from a plasma chamber is irradiated onto the contact electrode 40. At this time, the acceleration energy of ions colliding with the device surface is small. It is presumed that the irradiation of the contact electrode 40 with such high-density plasma supplies the contact electrode 40 with thermal energy to an extent that does not cause significant agglomeration in the contact electrode 40, thereby growing crystal grains to a certain extent. Here, the smaller the crystal grains, the more crystal grain boundaries there are per unit area. Since strains such as lattice defects are concentrated at the crystal grain boundaries, strain energy is accumulated at the crystal grain boundaries. The application of thermal energy to such grain boundaries triggers crystal grain growth (i.e., agglomeration) driven by the strain energy. In this embodiment, in the contact electrode formation process by ECR sputtering, the crystal grains grow to a certain extent, thereby reducing the crystal grain boundaries, and the distortion is alleviated by the recesses D1, so it is thought that the crystal grain growth and migration in the heat treatment process are suppressed (i.e., migration resistance is increased).

[0080] The ratio of the area of ​​the one or more recesses D1 to the surface area of ​​each contact electrode may be 10% or more and 20% or less. As shown in FIG. 22 , when the RF power is high, as in Modifications 2 and 3, the ratio of the area of ​​the one or more recesses D1 to the surface area of ​​each contact electrode is larger, while when the RF power is low, as in Modification 1, the ratio is smaller. Contact electrodes with this ratio of 10% or more and 20% or less are formed, for example, when the RF power input during formation by ECR sputtering is low, as in the contact electrode 40 according to the present embodiment and the contact electrode 40a according to Modification 1, in other words, when the film formation rate by ECR sputtering is 10 nm / min or less. Such contact electrodes can further suppress migration and further reduce the contact resistance between the contact electrode and the semiconductor stack 10S.

[0081] In addition, when the RF power is small, as in the case of the contact electrode 40 of this embodiment and the contact electrode 40a of variant example 1 shown in Figure 22, the length of each recess D1 becomes shorter as the average film thickness increases, and the number of one or more recesses D1 increases.

[0082] In each of the semiconductor light emitting devices according to the present embodiment, the semiconductor stack 10S may include a nitride semiconductor layer, thereby realizing a semiconductor light emitting device that emits light such as blue light.

[0083] Furthermore, in each semiconductor light emitting element according to this embodiment, each contact electrode may contain at least one of Cu, Pd, Ir, Mg, Ni, Sn, Ti, Pt, Cr, Au, Ga, O, Ar, and Si.

[0084] By including such impurities in each contact electrode, at least one of the heat resistance, ion migration resistance, and corrosion resistance of each contact electrode can be improved. Therefore, the operation of each semiconductor light-emitting device can be stabilized. Specifically, the operational stability of each semiconductor light-emitting device against temperature fluctuations can be improved. Furthermore, each semiconductor light-emitting device can maintain stable operation over a long period of time. In particular, when each contact electrode includes at least one of Cu, Au, Mg, Ir, Pd, and Ni, a decrease in the reflectivity of each contact electrode can be suppressed. Furthermore, when each contact electrode includes Sn, which is resistant to sulfur-based gases, sulfurization of each contact electrode can be suppressed. Furthermore, oxidation of each contact electrode can be suppressed when annealing in an O-containing atmosphere during the formation of each contact electrode.

[0085] Furthermore, like the semiconductor light emitting device 10c according to Modification 3, the contact electrode 40c may have a first layer 41 and a second layer 42 disposed above the first layer 41. The first layer 41 may have a plurality of first recesses formed in the surface of the first layer 41, and the plurality of first recesses may extend in a curved line and be spaced apart from one another in a plan view of the surface of the first layer 41. Here, the first recesses of the first layer 41 have a configuration similar to the recesses of the contact electrode 40 according to the present embodiment. The ratio of the area of ​​the plurality of first recesses to the area of ​​the surface of the first layer 41 may be smaller than the ratio of the area of ​​the plurality of recesses D1 to the area of ​​the surface of the contact electrode 40c.

[0086] Such a first layer 41 can be formed by ECR sputtering under the same conditions as the contact electrode 40 according to the present embodiment, and therefore can reduce the contact resistance between the first layer 41 and the semiconductor laminate 10S, similar to the contact electrode 40. Furthermore, similar to the contact electrode 40b according to Modification 2, the second layer 42 can be formed by ECR sputtering at a film formation rate of more than 10 nm / min, and therefore the time required for film formation can be shorter than that of the contact electrode 40 according to the present embodiment.

[0087] Furthermore, the manufacturing method of the semiconductor light-emitting element 10 according to this embodiment includes a lamination process for forming a semiconductor laminate 10S, a contact electrode formation process for forming a contact electrode 40 that is in contact with the semiconductor laminate 10S and contains Ag as its main component, and a heat treatment process for heating the contact electrode 40, and in the contact electrode formation process, the contact electrode 40 is formed by ECR sputtering.

[0088] By forming the contact electrode 40 by ECR sputtering in this manner, damage to the semiconductor laminate 10S during the formation of the contact electrode 40 can be reduced.

[0089] Furthermore, in the contact electrodes 40 according to this embodiment, the heat treatment process can reduce the contact resistance between the contact electrodes 40 and the semiconductor laminate 10S and suppress migration during the heat treatment, thereby suppressing changes in the characteristics of the contact electrodes due to heating during the heat treatment when forming the contact electrodes and heating when mounting the semiconductor light-emitting elements on a mounting substrate or the like.

[0090] In the heat treatment step of the method for manufacturing the semiconductor light emitting element 10 according to the present embodiment, O ２ The semiconductor stack 10S and the contact electrode 40 may be heated in an atmosphere containing the above.

[0091] This reduces the contact resistance between the contact electrode 40 and the semiconductor laminate 10S.

[0092] Furthermore, in the contact electrode formation step of the method for manufacturing the semiconductor light emitting element 10 according to this embodiment, the film formation rate of the contact electrode 40 may be 10 nm / min or less.

[0093] This further reduces the contact resistance between the contact electrode 40 and the semiconductor laminate 10S. Furthermore, reducing the film formation rate increases the time required for film formation. Here, in ECR sputtering, the thermal energy of the plasma supplied to the contact electrode 40 per unit time is almost independent of the film formation rate. Therefore, reducing the film formation rate increases the total amount of thermal energy supplied to the contact electrode 40 in the contact electrode formation process. Therefore, the increased heating effect in the contact electrode formation process further increases the growth of crystal grains in the contact electrode 40, thereby further improving migration resistance in the heat treatment process.

[0094] Furthermore, as in the manufacturing method of the semiconductor light emitting element 10c according to the third modification of this embodiment, the contact electrode 40c may have a first layer 41 and a second layer 42, and the deposition rate of the first layer 41 may be slower than the deposition rate of the second layer 42. For example, the contact electrode formation process may include a first step of forming the first layer 41 at a deposition rate of 10 nm / min or less, and a second step of forming the second layer 42 at a deposition rate greater than 10 nm / min after the first step.

[0095] In the first layer 41, the contact resistance with the semiconductor laminate 10S can be reduced, similarly to the contact electrode 40 according to the present embodiment. In addition, in forming the second layer 42, the film formation rate by ECR sputtering is set to be greater than 10 nm / min, so that the time required for film formation can be shortened.

[0096] (Embodiment 2) A semiconductor light emitting device and a manufacturing method thereof according to embodiment 2 will be described. The semiconductor light emitting device according to this embodiment differs from the semiconductor light emitting device 10 according to embodiment 1 in the structure near the interface between the contact electrode and the semiconductor laminate 10S. The semiconductor light emitting device according to this embodiment and a manufacturing method thereof will be described below, focusing on the differences from the semiconductor light emitting device 10 according to embodiment 1 and a manufacturing method thereof.

[0097] First, the semiconductor light emitting device according to the present embodiment will be described with reference to Fig. 33 and Fig. 34. Fig. 33 is a schematic cross-sectional view showing the overall configuration of a semiconductor light emitting device 110 according to the present embodiment. Fig. 34 is a schematic cross-sectional view showing the configuration of a contact electrode 140 of the semiconductor light emitting device 110 according to the present embodiment. Similar to Fig. 1, Figs. 33 and 34 show cross sections perpendicular to the propagation direction of laser light emitted by the semiconductor light emitting device 110.

[0098] 33 , the semiconductor light emitting device 110 according to the present embodiment includes a semiconductor stack 10S and a contact electrode 140. In the present embodiment, the semiconductor light emitting device 110 further includes a substrate 21, an insulating film 30, a barrier metal layer 50, a pad electrode 60, and an n-side electrode 70, similar to the semiconductor light emitting device 10 according to the first embodiment.

[0099] The contact electrode 140 according to the present embodiment is an electrode that is in contact with the semiconductor laminate 10S and contains Ag as a main component. Similar to the contact electrode 40 according to the first embodiment, the contact electrode 140 has one or more recesses D1 formed on the surface of the contact electrode 140, and the one or more recesses D1 include a plurality of recesses D1. In a plan view of the surface of the contact electrode 140, the plurality of recesses D1 may extend in a curved shape and be spaced apart from one another. The average distance between the one or more recesses D1 may be 0.11 μm or more. The ratio of the area of ​​the one or more recesses D1 to the area of ​​the surface of the contact electrode 140 is 10% or more and 30% or less.

[0100] As shown in FIG. 34 , the contact electrode 140 according to the present embodiment includes a conductive oxide film layer 141 and a conductive layer 142. The conductive oxide film layer 141 is in contact with the semiconductor stack 10S and is a conductive oxide film containing Ga. The average film thickness of the conductive oxide film layer 141 is 0.3 nm or more and 5 nm or less. The conductive layer 142 is an electrode similar to the contact electrode 40 according to the first embodiment.

[0101] A method for manufacturing a semiconductor light emitting device 110 according to this embodiment will be described with reference to Fig. 35. Fig. 35 is a schematic cross-sectional view showing a cleaning step in the method for manufacturing a semiconductor light emitting device according to this embodiment. Fig. 35 shows a cross section similar to that shown in Fig. 33.

[0102] The manufacturing method for the semiconductor light emitting device 110 according to this embodiment differs from the manufacturing method for the semiconductor light emitting device 10 according to the first embodiment in that it further includes a cleaning step of cleaning the surface of the semiconductor laminate 10S with plasma containing O (oxygen atoms) after the lamination step and before the contact electrode formation step. For example, as shown in FIG. 35 , the cleaning step is performed after forming the opening 30a in the insulating film 30 and before the contact electrode formation step. As shown in FIG. 35 , the region of the semiconductor laminate 10S where the contact electrode 140 is to be formed, i.e., the region of the semiconductor laminate 10S corresponding to the opening 30a in the insulating film 30, is cleaned with plasma. This increases the work function of Ag, the main component of the contact electrode 140, in that region, thereby reducing the Schottky barrier. Therefore, the contact resistance between Ag and the semiconductor laminate 10S can be reduced. Furthermore, cleaning the semiconductor laminate 10S with plasma containing O can extract H (hydrogen atoms) bonded to Mg, which is added as a p-type impurity to the semiconductor laminate 10S. Therefore, the p-type impurity Mg can be activated, and the contact resistance can be further reduced.

[0103] Furthermore, when the cleaning process is performed, Ag contained in the contact electrode 140 and Ga contained in the semiconductor laminate 10S interdiffuse during the heat treatment process, forming a conductive oxide film layer 141, which is an oxide containing Ag and Ga, near the interface between the contact electrode 140 and the semiconductor laminate 10S. This conductive oxide film layer 141 is optically transparent, and therefore can reduce light reflection loss at the interface between the contact electrode 140 and the semiconductor laminate 10S. When the average film thickness of the conductive oxide film layer 141 is 0.3 nm or more and 5 nm or less, the electrical resistance of the conductive oxide film layer 141 can be particularly reduced. Note that a conductive oxide film similar to the conductive oxide film layer 141 may also be formed on the semiconductor laminate 10S side.

[0104] (Modifications, etc.) The semiconductor light emitting device and the like according to the present disclosure have been described above based on the embodiments and modifications, but the present disclosure is not limited to the above-described embodiments and modifications.

[0105] For example, although the above-described embodiments and modifications show examples in which the semiconductor light-emitting element is a semiconductor laser element, the semiconductor light-emitting element according to the present disclosure is not limited to an edge-emitting semiconductor laser element. The semiconductor light-emitting element may be, for example, a surface-emitting laser (VCCEL) or a light-emitting diode.

[0106] In the above-described embodiments and modifications, the semiconductor stack 10S includes a nitride semiconductor layer, but it does not have to include a nitride semiconductor layer. For example, the semiconductor stack 10S may include a GaAs layer or the like.

[0107] In the above-described embodiments and modifications, the p-side semiconductor layer 24 of the semiconductor laminate 10S has the protruding portion 24P, but the p-side semiconductor layer 24 does not necessarily have to have the protruding portion 24P.

[0108] In the above-described embodiments and modifications, the contact electrodes are separated from the insulating film 30, but they may be in contact with the insulating film 30. Furthermore, the contact electrodes are arranged only in the openings 30a of the insulating film 30, but they may be arranged continuously from the openings 30a onto the insulating film 30 (i.e., between the insulating film 30 and the barrier metal layer 50).

[0109] This disclosure also includes forms obtained by applying various modifications to the above-mentioned embodiments that a person skilled in the art would conceive, and forms realized by arbitrarily combining the components and functions of the above-mentioned embodiments within the scope of the present disclosure.

[0110] The semiconductor light emitting device and the like according to the present disclosure can be applied to light sources for various purposes as, for example, a highly efficient light source.

[0111] 10, 10a, 10b, 10c, 10d, 110 Semiconductor light emitting device 10S Semiconductor laminate 10T Element isolation groove 21 Substrate 22 N-side semiconductor layer 23 Active layer 24 P-side semiconductor layer 24P Protrusion 24R Ridge 24Ru Upper surface 24T Groove 30 Insulating film 30a Opening 40, 40a, 40b, 40c, 40d, 140 Contact electrode 41 First layer 42 Second layer 50 Barrier metal layer 60 Pad electrode 70 N-side electrode 80 Resist 141 Conductive oxide film layer 142 Conductive layer D1 Recess D11 Curved recess D12 Isolated recess V1 Void

Claims

1. A semiconductor light-emitting device comprising: a semiconductor laminate; and a contact electrode made primarily of Ag and in contact with the semiconductor laminate, wherein the contact electrode has one or more recesses formed on the surface of the contact electrode, and an average inter-recess distance, defined as the average distance between two adjacent recesses on a straight line extending in a direction along the surface of the contact electrode, is 0.11 μm or greater.

2. The semiconductor light-emitting element according to claim 1, wherein the one or more recesses include a curved recess that has a curved shape in a plan view of the surface of the contact electrode, and a plurality of isolated recesses that are recessed deeper than the curved recess and are isolated from one another.

3. A semiconductor light-emitting element comprising: a semiconductor laminate; and a contact electrode made mainly of Ag and in contact with the semiconductor laminate, wherein the contact electrode has one or more recesses formed on a surface of the contact electrode, the one or more recesses including a plurality of recesses, and wherein, in a plan view of the surface of the contact electrode, the plurality of recesses extend in a curved shape and are spaced apart from one another.

4. The semiconductor light-emitting element according to any one of claims 1 to 3, wherein the ratio of the area of ​​the one or more recesses to the area of ​​the surface of the contact electrode is 10% or more and 30% or less.

5. The semiconductor light-emitting element according to any one of claims 1 to 4, wherein the contact electrode has a conductive oxide film layer in contact with the semiconductor laminate.

6. The semiconductor light-emitting element according to claim 5, wherein the conductive oxide film layer contains Ga.

7. The semiconductor light-emitting device according to any one of claims 1 to 6, wherein the semiconductor laminate includes a nitride semiconductor layer.

8. The semiconductor light-emitting element according to any one of claims 1 to 7, wherein the contact electrode is formed by ECR sputtering.

9. The semiconductor light-emitting element according to any one of claims 1 to 8, wherein the contact electrode contains at least one of Cu, Pd, Ir, Mg, Ni, Sn, Ti, Pt, Cr, Au, Ga, O, Ar, and Si.

10. A semiconductor light-emitting element according to any one of claims 1 to 9, wherein the contact electrode comprises a first layer and a second layer disposed above the first layer, the first layer having a plurality of first recesses formed in a surface of the first layer, the plurality of first recesses extending in a curved line and spaced apart from one another in a plan view of the surface of the first layer, and the ratio of the area of ​​the plurality of first recesses to the area of ​​the surface of the first layer is smaller than the ratio of the area of ​​the one or more recesses to the area of ​​the surface of the contact electrode.

11. A method for manufacturing a semiconductor light-emitting element, comprising: a lamination step of forming a semiconductor laminate; a contact electrode formation step of forming a contact electrode that is in contact with the semiconductor laminate and contains Ag as a main component; and a heat treatment step of heating the contact electrode, wherein in the contact electrode formation step, the contact electrode is formed by ECR sputtering.

12. The method for manufacturing a semiconductor light-emitting element according to claim 11, wherein the semiconductor laminate and the contact electrode are heated in an atmosphere containing O in the heat treatment step.

13. The method for manufacturing a semiconductor light-emitting element according to claim 11 or 12, wherein the contact electrode is formed at a film formation rate of 10 nm / min or less in the contact electrode formation step.

14. The method for manufacturing a semiconductor light-emitting element according to claim 11 or 12, wherein the contact electrode has a first layer and a second layer, and the deposition rate of the first layer is slower than the deposition rate of the second layer.

15. The method for manufacturing a semiconductor light-emitting element according to any one of claims 11 to 14, further comprising a cleaning step of cleaning the surface of the semiconductor laminate with plasma after the lamination step and before the contact electrode formation step.

16. The method for manufacturing a semiconductor light-emitting element according to claim 15, wherein the plasma gas contains O.

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