Semiconductor device and power conversion device
Patent Information
- Application Number
- PCT/JP2024/008285
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-03-05
- Publication Date
- 2025-10-02
Smart Images

Figure JP2024008285_02102025_PF_FP_ABST
Abstract
Description
Semiconductor device and power conversion device
[0001] The present disclosure relates to a semiconductor device and a power conversion device.
[0002] Japanese Patent Application Laid-Open No. 2003-144992 proposes a semiconductor device configuration in which a semiconductor element sealed with a resin sealant is mounted on a heat spreader via a bonding material in order to improve the heat dissipation of the semiconductor element.
[0003] Japanese Patent Application Laid-Open No. 2021-111765
[0004] Power modules containing semiconductor elements are mounted on coolers via solder or other bonding materials to improve heat dissipation. During the mounting process, the power module is heated and cooled, but warping can occur due to differences in the linear expansion coefficients of the components that make up the power module. The linear expansion coefficient of the encapsulant that encapsulates the semiconductor elements changes significantly at the glass transition temperature. Therefore, the warping behavior of the power module tends to become unstable near the glass transition temperature of the encapsulant. If warping occurs due to the encapsulant during the mounting process of the power module and cooler, a gap will form between the power module and the solder. Such a gap will hinder heat dissipation from the semiconductor elements to the cooler.
[0005] In order to solve the above-mentioned problems, an object of the present disclosure is to provide a semiconductor device that improves heat dissipation from a power module to a cooler.
[0006] The semiconductor device according to the present disclosure includes a power module, a cooler, and a bonding material. The cooler cools the power module. The bonding material bonds the power module and the cooler. The power module includes a semiconductor element and a sealing material. The sealing material seals the semiconductor element. The glass transition temperature of the sealing material is lower than the solidus point of the bonding material or higher than the liquidus point of the bonding material.
[0007] According to the present disclosure, a semiconductor device is provided in which heat dissipation from a power module to a cooler is improved.
[0008] The objects, features, aspects, and advantages of the present disclosure will become more apparent from the following detailed description and the accompanying drawings.
[0009] Fig. 1 is a cross-sectional view showing the configuration of a semiconductor device in embodiment 1. Fig. 2 is a cross-sectional view showing the configuration of a semiconductor device in embodiment 3. Fig. 3 is a cross-sectional view showing the configuration of a semiconductor device in embodiment 4. Fig. 4 is a side view showing the configuration of a cooler in embodiment 5. Fig. 5 is a bottom view showing the configuration of a cooler. Fig. 6 is a cross-sectional view showing the configuration of a semiconductor device in embodiment 6. Fig. 7 is a functional block diagram showing the configuration of a power conversion system in embodiment 6.
[0010] First Preferred Embodiment FIG. 1 is a cross-sectional view showing the configuration of a semiconductor device 101 according to a first preferred embodiment.
[0011] The semiconductor device 101 includes a power module 10, a cooler 20, and a bonding material 30. The power module 10 includes an insulating substrate 11, a semiconductor element 12, a wiring board 13, metal wires 14, and a sealing material 15.
[0012] The insulating substrate 11 includes an insulating layer 11A, a first circuit pattern 11B, and a second circuit pattern 11C. The insulating layer 11A is made of ceramic. The first circuit pattern 11B is provided on the front surface of the insulating layer 11A. The second circuit pattern 11C is provided on the back surface of the insulating layer 11A. The first circuit pattern 11B and the second circuit pattern 11C are made of a conductive material such as metal.
[0013] The semiconductor element 12 is held by the insulating substrate 11. The semiconductor element 12 is bonded to the first circuit pattern 11B of the insulating substrate 11 via a bonding material 16. The bonding material 16 is a conductive material such as solder or silver. The semiconductor element 12 is electrically connected to the first circuit pattern 11B by the bonding material 16.
[0014] The wiring board 13 is a conductor formed by processing a metal plate, such as copper, into a predetermined shape. The wiring board 13 is connected to the semiconductor element 12 inside the encapsulant 15 by metal wires 14 or bonding material 17. Although not shown, the wiring board 13 may also be connected to the first circuit pattern 11B of the insulating substrate 11 inside the encapsulant 15 by metal wires 14 or bonding material 17. The bonding material 17 is a conductive material such as solder or silver. In this manner, the wiring board 13 is electrically connected to the semiconductor element 12 or the first circuit pattern 11B inside the encapsulant 15. The surface of the wiring board 13 may be plated with a metal such as Ni or Sn. An end of the wiring board 13 protrudes from the encapsulant 15. The end of the wiring board 13 functions as a terminal configured to be connectable to an external circuit provided outside the semiconductor device 101.
[0015] Metal wire 14 is provided inside sealing material 15 and connects wiring board 13 and semiconductor element 12. Although not shown, metal wire 14 may also connect wiring board 13 and first circuit pattern 11B. Metal wire 14 is, for example, an aluminum wire.
[0016] Sealant 15 is made of a resin material such as epoxy, and seals the surface of insulating substrate 11, semiconductor element 12, part of wiring board 13, and metal wires 14. The back side of insulating substrate 11, i.e., second circuit pattern 11C, is exposed from sealant 15.
[0017] The cooler 20 cools the power module 10. The cooler 20 is made of a metal such as aluminum or copper.
[0018] The bonding material 30 bonds the power module 10 and the cooler 20. The bonding material 30 in the first embodiment bonds the second circuit pattern 11C and the cooler 20. In this manner, the power module 10 is mounted on the cooler 20 via the bonding material 30. The bonding material 30 is solder.
[0019] The glass transition temperature Tg of the sealing material 15 is lower than the solidus point of the bonding material 30 or higher than the liquidus point of the bonding material 30. In other words, the glass transition temperature Tg of the sealing material 15 is not included in the temperature range between the solidus point and the liquidus point of the bonding material 30.
[0020] In the manufacturing process of the semiconductor device 101, the power module 10 is mounted on the cooler 20 via the bonding material 30. The mounting process includes a heating process for melting the bonding material 30 and a cooling process for solidifying the bonding material 30. In the cooling process, the temperature of the bonding material 30 passes through a temperature range between the solidus point and liquidus point of the bonding material 30. Between the solidus point and the liquidus point, the state of the bonding material 30 is a semi-solidified state.
[0021] In order to reduce the size and density of the semiconductor device 101, it is necessary to reduce the amount of change in warpage of the second circuit pattern 11C provided below the insulating layer 11A while the bonding material 30 is in a semi-solidified state, i.e., the amount of change in warpage of the power module 10. Here, the amount of change in warpage refers to either the amount of change in warpage over time or the amount of change in warpage due to position, such as waviness.
[0022] For example, when the temperature of the bonding material 30 is higher than the liquidus point, the bonding material 30 is liquid. The bonding material 30 deforms in response to changes in the warpage of the power module 10, so the bonded state is maintained. When the temperature of the bonding material 30 is lower than the solidus point, the bonding material 30 is solid. The bonding material 30 firmly bonds the power module 10 and the cooler 20, so the bonded state is maintained. However, when the temperature of the bonding material 30 is within the temperature range between the solidus point and the liquidus point, that is, when the bonding material 30 is in a semi-solidified state, the bonding material 30 cannot follow changes in the warpage of the power module 10. Because the bonding material 30 is not completely solidified, it peels off from the power module 10 or the cooler 20. As a result, a gap is generated between the power module 10 and the bonding material 30. Such a gap deteriorates heat dissipation from the semiconductor element 12 to the cooler 20, hindering miniaturization and high density of the semiconductor device 101. For the above reasons, it is necessary to reduce the amount of change in warpage of the power module 10 in the temperature range between the solidus point and liquidus point of the bonding material 30, as described above.
[0023] During the cooling process of the bonding material 30, warpage of the power module 10 is mainly caused by the contraction of the sealing material 15. The linear expansion coefficient of the sealing material 15 changes significantly at the glass transition temperature Tg. Therefore, the deformation behavior of the sealing material 15 becomes unstable near the glass transition temperature Tg. If the bonding material 30 is liquid at the glass transition temperature Tg, the bonding material 30 follows the deformation of the sealing material 15 and maintains the bonded state. If the bonding material 30 is solid at the glass transition temperature Tg, the bonding material 30 is firmly bonded to the power module 10 and the cooler 20, so that the bonded state is maintained even if the deformation of the sealing material 15 becomes unstable. If the bonding material 30 is in a semi-solidified state at the glass transition temperature Tg, peeling of the bonding material 30 occurs as described above. Therefore, it is required that the glass transition temperature Tg of the sealing material 15 is not included in the temperature range between the solidus point and liquidus point of the bonding material 30.
[0024] As described above, the glass transition temperature Tg of the sealing material 15 in the first embodiment is lower than the solidus point of the bonding material 30 or higher than the liquidus point of the bonding material 30. Therefore, in the solid-liquid coexistence region between the solidus point and the liquidus point, the amount of change in warpage of the power module 10 caused by the sealing material 15 is reduced, and the solder bonding state is stabilized. Since the gap that can occur between the power module 10 and the bonding material 30 is reduced, heat dissipation is ensured, and it becomes possible to realize a semiconductor device 101 that is smaller and more dense.
[0025] In summary, the semiconductor device 101 in the first embodiment includes a power module 10, a cooler 20, and a bonding material 30. The cooler 20 cools the power module 10. The bonding material 30 bonds the power module 10 and the cooler 20 together. The power module 10 includes a semiconductor element 12 and a sealing material 15. The sealing material 15 seals the semiconductor element 12. The glass transition temperature Tg of the sealing material 15 is lower than the solidus point of the bonding material 30 or higher than the liquidus point of the bonding material 30.
[0026] In such a semiconductor device 101, the heat dissipation from the power module 10 to the cooler 20 is improved, and the semiconductor device 101 can be made smaller and more dense.
[0027] The insulating layer 11A of the insulating substrate 11 in the first embodiment is formed of ceramic. Therefore, the thermal conductivity of the insulating substrate 11 is improved compared to that of an insulating substrate having an insulating layer made of resin. On the other hand, the linear expansion coefficient of the ceramic insulating layer 11A is smaller than that of the other components of the power module 10. Therefore, warpage changes easily when the power module 10 is bonded to the cooler 20. However, in the first embodiment, the glass transition temperature Tg of the sealing material 15 is not included in the temperature range between the solidus point and liquidus point of the bonding material 30. Therefore, even if the linear expansion coefficient of the ceramic insulating layer 11A is small, warpage changes of the power module 10 during the mounting process are reduced.
[0028] The temperature difference between the solidus point and liquidus point of the bonding material 30 is preferably 20° C. or less. The temperature difference between the solidus point of the bonding material 30 and the glass transition temperature Tg of the sealing material 15, or the temperature difference between the liquidus point of the bonding material 30 and the glass transition temperature Tg of the sealing material 15, is preferably 3° C. or more. Although the linear expansion coefficient of the resin of the sealing material 15 changes slightly even at temperatures above and below the glass transition temperature Tg, a temperature difference of 3° C. or more reduces the change in warpage.
[0029] Second Embodiment The bonding material 30 contains Bi or In. This configuration reduces the melting point of the bonding material 30. This reduces the peak temperature during the heating process during mounting, thereby reducing deterioration and plastic deformation of the components of the power module 10. Furthermore, this also reduces changes in warpage of the power module 10 during the cooling process, improving the bonding between the power module 10 and the cooler 20. This improves heat dissipation from the power module 10 to the cooler 20, making it possible to achieve a smaller, more dense semiconductor device 101.
[0030] Third Embodiment The linear expansion coefficient of sealing material 15 is smaller than that of wiring board 13. Wiring board 13 also shrinks during the cooling process during mounting, but the configuration of the third embodiment reduces the shrinkage of wiring board 13. As a result, the amount of warpage deformation of power module 10 is also reduced. Heat dissipation from power module 10 to cooler 20 is improved, making it possible to achieve a smaller size and higher density of semiconductor device 101.
[0031] The value obtained by dividing the elastic modulus of sealing material 15 by the elastic modulus of wiring board 13 is preferably 0.05 or more. This configuration also reduces the shrinkage of wiring board 13.
[0032] 2 is a cross-sectional view showing the configuration of semiconductor device 103 according to embodiment 3. It is preferable that thickness T1 from the top surface of wiring board 13 to the top surface of sealing material 15 is thicker than thickness T2 of wiring board 13. This configuration also reduces shrinkage of wiring board 13.
[0033] By applying the configuration of the third embodiment to the configuration of the first or second embodiment, the heat dissipation from the power module 10 to the cooler 20 is further improved.
[0034] 3 is a cross-sectional view showing the configuration of a semiconductor device 104 according to a fourth embodiment. The sealing material 15 has a recess 15A on the upper surface of the sealing material 15. In other words, the recess 15A is provided on the upper surface of the sealing material 15 so that the thickness of a portion of the sealing material 15 is reduced. The sealing material 15 having the recess 15A reduces the volume of the sealing material 15, thereby reducing the shrinkage of the sealing material 15 during the mounting process.
[0035] The depressions 15A of the sealing material 15 are preferably provided in an area other than the positions of the vertices 14A of the metal wires 14 in a plan view. The metal wires 14 for controlling the semiconductor elements 12 need to be sealed by the sealing material 15. Therefore, the thickness of the sealing material 15 cannot be made uniformly thin. Therefore, the depressions 15A of the sealing material 15 are provided so as not to overlap the positions of the vertices 14A of the metal wires 14 in a plan view.
[0036] This configuration reduces the volume of the sealing material 15 without impairing the functionality of the semiconductor device 104. The shrinkage of the sealing material 15 is reduced, enhancing the effect of suppressing the shrinkage of the sealing material 15. As a result, the amount of warpage deformation of the power module 10 is also reduced. The heat dissipation from the power module 10 to the cooler 20 is improved, making it possible to realize a more compact and denser semiconductor device 104.
[0037] By applying the configuration of the fourth embodiment to any of the configurations of the first to third embodiments, the heat dissipation from the power module 10 to the cooler 20 is further improved.
[0038] <Fifth Embodiment> Fig. 4 is a side view showing the configuration of a cooler 20 according to a fifth embodiment. Fig. 5 is a bottom view showing the configuration of the cooler 20.
[0039] The cooler 20 includes a plurality of pins 21. The cross-sectional shape of each of the plurality of pins 21 is polygonal. The polygonal pins 21 include corners.
[0040] This configuration improves the heat exchange efficiency of the cooling water flowing between the multiple pins 21, thereby improving heat dissipation. As a result, the semiconductor device 101 can be made smaller and more dense. The cooler 20 is formed by, for example, forging. The corners of the polygon may be rounded.
[0041] The polygonal cross section is preferably a hexagon. The pins 21 are preferably arranged in a honeycomb pattern as shown in Figure 5. This configuration improves cooling efficiency.
[0042] The value obtained by dividing the sum of the areas of the pins 21 in a plan view by the area of the cooling portion 22 is preferably 0.2 or more. The cooling portion 22 includes an area in which the pins 21 are provided. In Fig. 5, the area of the cooling portion 22 is expressed as a x b. This configuration ensures good heat dissipation, and enables the miniaturization and high density of the semiconductor device 101 to be realized.
[0043] By applying the configuration of the fifth embodiment to any of the configurations of the first to fourth embodiments, the heat dissipation from the power module 10 to the cooler 20 is further improved.
[0044] Sixth Embodiment FIG. 6 is a cross-sectional view showing the configuration of a semiconductor device 106 according to a sixth embodiment. The thickness of the bonding material 30 at the ends is greater than the thickness of the central portion of the bonding material 30. Cracks are likely to occur at the ends of the bonding material 30 due to thermal loads when the semiconductor device 106 is in an operating state. However, because the thickness of the ends of the bonding material 30 is greater than the thickness of the central portion of the bonding material 30, the shear force applied to the ends of the bonding material 30 is reduced. As a result, the progression of cracks at the ends of the bonding material 30 is reduced. Furthermore, because the thickness of the central portion of the bonding material 30 is thinner than the thickness of the ends, good heat dissipation is ensured, making it possible to achieve a smaller, more dense semiconductor device 106.
[0045] The sealing material 15 preferably includes a protrusion 15B on the lower surface of the sealing material 15 that protrudes toward the cooler 20. By providing such a protrusion 15B, the thickness of the end portion of the bonding material 30 is ensured.
[0046] By applying the configuration of the sixth embodiment to any of the configurations of the first to fifth embodiments, the heat dissipation from the power module 10 to the cooler 20 is further improved.
[0047] Seventh Embodiment The semiconductor element 12 is a power semiconductor element, a control IC (Integrated Circuit) for controlling the power semiconductor element, etc. The semiconductor element 12 includes, for example, an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), a Schottky barrier diode, etc. Alternatively, the semiconductor element 12 may include an RC-IGBT (Reverse-Conducting IGBT) in which an IGBT and a freewheeling diode are formed within a single semiconductor substrate.
[0048] If the semiconductor element 12 is a reverse-conducting IGBT (RC-IGBT), the number of semiconductor chips can be reduced, allowing the semiconductor device 101 to be further miniaturized.
[0049] The semiconductor element 12 is preferably formed of a wide bandgap semiconductor such as SiC. When the semiconductor element 12 is formed of SiC, low-loss switching operation is possible, and the semiconductor device 101 can be made smaller and more dense.
[0050] By applying the configuration of the seventh embodiment in combination with any of the configurations of the first to sixth embodiments, the heat dissipation from the power module 10 to the cooler 20 is further improved.
[0051] Eighth Embodiment FIG. 7 is a functional block diagram showing the configuration of a power conversion system according to an eighth embodiment.
[0052] The power conversion system includes a power source 100 , a power conversion device 200 , and a load 300 .
[0053] The power supply 100 is a DC power supply. The power supply 100 supplies DC power to the power conversion device 200. The power supply 100 is, for example, a DC system, a solar cell, a storage battery, or the like. The power supply 100 may be a DC / DC converter that converts DC power output from a DC system into predetermined power. The power supply 100 may also be a rectifier circuit connected to an AC system, an AC / DC converter, or the like.
[0054] The power conversion device 200 is connected between the power supply 100 and the load 300. The power conversion device 200 in the eighth embodiment is a three-phase inverter. The power conversion device 200 converts DC power supplied from the power supply 100 into AC power. The power conversion device 200 supplies the AC power to the load 300.
[0055] The load 300 is driven by AC power supplied from the power conversion device 200. The load 300 in the eighth embodiment is a three-phase motor. The three-phase motor is not limited to a specific application. The three-phase motor is mounted in various electrical devices. For example, the three-phase motor is mounted in hybrid vehicles, electric vehicles, railroad cars, elevators, air conditioning equipment, etc.
[0056] The following describes in detail the power conversion device 200. The power conversion device 200 includes a main conversion circuit 201 and a control circuit 203.
[0057] The main conversion circuit 201 includes at least one semiconductor device 202 and a driver circuit (not shown). The semiconductor device 202 corresponds to the semiconductor device shown in any one of the first to seventh embodiments.
[0058] The semiconductor device 202 configures a two-level three-phase full-bridge circuit (not shown). The three-phase full-bridge circuit includes six switching elements (not shown) and six freewheeling diodes (not shown). At least one of the switching elements and freewheeling diodes corresponds to the semiconductor element 12 included in the semiconductor device shown in any one of the first to seventh embodiments.
[0059] The three-phase full-bridge circuit includes three upper arms and three lower arms. Each of the upper arms and lower arms includes one switching element and one freewheeling diode connected in anti-parallel to the switching element. The switching element included in one upper arm is connected in series to the switching element included in one lower arm, forming a pair of upper and lower arms. In other words, the three-phase full-bridge circuit includes three pairs of upper and lower arms. The three pairs of upper and lower arms correspond to the U phase, V phase, and W phase of the three-phase full-bridge circuit, respectively. The output terminals of the three pairs of upper and lower arms, i.e., the three output terminals of the main conversion circuit 201, are connected to the load 300.
[0060] The main conversion circuit 201 converts DC power supplied from the power supply 100 into AC power by the switching operation of the switching elements. The main conversion circuit 201 supplies the AC power to the load 300 via the output terminals.
[0061] The drive circuit may be built into the semiconductor device 202 or may be provided separately from the semiconductor device 202. The drive circuit generates a drive signal for driving the switching element of the main conversion circuit 201 in accordance with a control signal output from the control circuit 203. The drive circuit supplies the drive signal to the control electrode of the switching element of the semiconductor device 202.
[0062] The drive signal is a signal for turning on a switching element or a signal for turning off a switching element. More specifically, when a switching element is maintained in an on state, the drive signal is a voltage signal (on signal) that is equal to or greater than the threshold voltage of the switching element. When a switching element is maintained in an off state, the drive signal is a voltage signal (off signal) that is smaller than the threshold voltage of the switching element.
[0063] The control circuit 203 outputs a control signal to the drive circuit for controlling the drive circuit. The control circuit 203 calculates the time (on time) that each switching element of the main conversion circuit 201 should be in the on state based on the power to be supplied to the load 300, and generates the control signal. In other words, the control circuit 203 generates a control signal so that the main conversion circuit 201 is PWM-controlled. The control circuit 203 outputs a control signal to the drive circuit so that the drive circuit outputs an on signal to a switching element that should be in the on state, and an off signal to a switching element that should be in the off state. In this way, the control circuit 203 controls the switching elements of the main conversion circuit 201 so that a predetermined power is supplied to the load 300.
[0064] In such a power conversion device 200, the semiconductor device shown in any one of the first to seventh embodiments is applied to the main conversion circuit 201, thereby achieving improved reliability.
[0065] In the eighth embodiment, an example has been shown in which the power conversion device 200 is a two-level three-phase inverter, but the configuration of the power conversion device 200 is not limited thereto. For example, the power conversion device 200 may be a multi-level power conversion device, such as a three-level power conversion device. Alternatively, the power conversion device 200 may be a single-phase inverter for supplying power to a single-phase load. When the load 300 is a DC load, the power conversion device 200 may be a DC / DC converter or an AC / DC converter. When the load 300 is a solar power generation system, a power storage system, or the like, the power conversion device 200 may be a power conditioner.
[0066] Although the eighth embodiment shows an example in which the load 300 is a three-phase motor, the configuration of the load 300 is not limited to this. For example, the load 300 may be an electric discharge machine, a laser processing machine, an induction heating cooker, or a non-contact power supply system.
[0067] Although this disclosure has been described in detail, the above description is illustrative in all respects and is not restrictive. It is understood that countless variations not illustrated can be envisioned.
[0068] It is possible to freely combine the embodiments, and to modify or omit the embodiments as appropriate.
[0069] 10 Power module, 11 Insulating substrate, 11A Insulating layer, 11B First circuit pattern, 11C Second circuit pattern, 12 Semiconductor element, 13 Wiring board, 14 Metal wire, 14A Apex, 15 Sealing material, 15A Recess, 15B Protrusion, 16 Bonding material, 17 Bonding material, 20 Cooler, 21 Pin, 22 Cooling portion, 30 Bonding material, 100 Power supply, 101 Semiconductor device, 103 Semiconductor device, 104 Semiconductor device, 106 Semiconductor device, 200 Power conversion device, 201 Main conversion circuit, 202 Semiconductor device, 203 Control circuit, 300 Load, T1 Thickness, T2 Thickness, Tg Glass transition temperature.
Claims
1. A semiconductor device comprising: a power module; a cooler for cooling the power module; and a bonding material bonding the power module and the cooler, wherein the power module includes a semiconductor element and a sealing material for sealing the semiconductor element, and the glass transition temperature of the sealing material is lower than the solidus point of the bonding material or higher than the liquidus point of the bonding material.
2. The semiconductor device according to claim 1, further comprising an insulating substrate including an insulating layer, a first circuit pattern provided on the front surface of the insulating layer, and a second circuit pattern provided on the back surface of the insulating layer, wherein the semiconductor element is bonded to the first circuit pattern, and the bonding material bonds the second circuit pattern and the cooler.
3. The semiconductor device according to claim 1 or 2, wherein the temperature difference between the solidus point and the liquidus point of the bonding material is 20° C. or less.
4. A semiconductor device according to any one of claims 1 to 3, wherein the temperature difference between the solidus point of the bonding material and the glass transition temperature of the sealing material, or the temperature difference between the liquidus point of the bonding material and the glass transition temperature of the sealing material, is 3°C or more.
5. The semiconductor device according to any one of claims 1 to 4, wherein the bonding material contains Bi or In.
6. The semiconductor device according to any one of claims 1 to 5, wherein the power module further includes a wiring board electrically connected to the semiconductor element inside the encapsulant, and the encapsulant has a linear expansion coefficient smaller than that of the wiring board.
7. The semiconductor device according to claim 6, wherein the value obtained by dividing the elastic modulus of said sealing material by the elastic modulus of said wiring board is 0.05 or more.
8. The semiconductor device according to claim 6 or 7, wherein the thickness from the upper surface of said wiring board to the upper surface of said sealing material is greater than the thickness of said wiring board.
9. The semiconductor device according to any one of claims 1 to 8, wherein the sealing material has a recess in an upper surface of the sealing material.
10. The semiconductor device according to claim 9, wherein the power module further includes a metal wire provided inside the sealing material and electrically connected to the semiconductor element, and the recess in the sealing material is provided in an area other than the position of the apex of the metal wire in a planar view.
11. The semiconductor device according to any one of claims 1 to 10, wherein the cooler includes a plurality of pins, and each of the plurality of pins has a polygonal cross-sectional shape.
12. The semiconductor device according to claim 11, wherein the polygon is a hexagon.
13. A semiconductor device according to claim 11 or 12, wherein the sum of the areas of the plurality of pins in a plan view divided by the area of the cooling section including the region in which the plurality of pins are arranged is 0.2 or greater.
14. The semiconductor device according to any one of claims 1 to 13, wherein the thickness of the end portion of the bonding material is greater than the thickness of the central portion of the bonding material.
15. The semiconductor device according to any one of claims 1 to 14, wherein the sealing material includes a protrusion on the lower surface of the sealing material that protrudes toward the cooler.
16. The semiconductor device according to any one of claims 1 to 15, wherein the semiconductor element includes an RC-IGBT.
17. The semiconductor device according to any one of claims 1 to 16, wherein the semiconductor element is formed of SiC.
18. A power conversion device comprising: a main conversion circuit that includes a semiconductor device according to any one of claims 1 to 17 and converts and outputs power input from a power source; and a control circuit that outputs a control signal to the main conversion circuit for controlling the main conversion circuit.