Elevator control device and control method for elevator control device

Abstract

The present invention provides a technology that can reduce design man-hours for adding options to existing functions or modifying existing functions in an elevator control device. The elevator control device is configured to have a memory command processing unit and a memory command storage unit in an overall control unit of a cage / door control unit, and to have an R / W check unit and an R / W setting storage unit in a shared memory control unit. This allows the R / W check unit to detect access to a shared memory unit that is different from the R / W authority according to the R / W setting storage unit. A configuration is adopted such that when access to the shared memory unit is different from the R / W authority of the shared memory unit, the memory command processing unit and the memory command storage unit can be used to enable access to an A port Ap side and a B port Bp side of the shared memory unit from a device with authority (the overall control unit of the cage / door control unit).

Description

Elevator control device and control method for elevator control device

[0001] The present disclosure relates to an elevator control device and a control method for an elevator control device.

[0002] Japanese Patent Application Laid-Open Publication No. 2009-277007 discloses the following technology: "A processor device that is about to start the execution of an application program that requires exclusive use of a shared resource transmits an exclusive operation request signal, and other processor devices that receive the exclusive operation request signal stop accessing the shared resource. This allows the processor device that is executing the application program that requires exclusive use of the shared resource to use the shared resource exclusively, thereby improving the execution performance of the application program."

[0003] Japanese Patent Application Laid-Open No. 2009-277007

[0004] On the system board of an elevator control device, a shared memory is sometimes used to exchange data between the central processing units (CPUs) that make up each control unit. In this case, the read (R) / write (W) areas (hereinafter also referred to as R / W areas) of the shared memory are sometimes separated by address to avoid contention in the shared memory. In this case, because the R / W areas of the shared memory are separated during the design stage of the elevator control device, adding options to existing functions or modifying existing functions can require major changes to the elevator control device system, as the R / W permissions for the R / W areas of the shared memory cannot be changed, which increases the design man-hours.

[0005] In JP 2009-277007 A, in order to avoid conflicts, priority is set using interrupts, so there is no consideration of R / W authority when both processors use a shared resource, and the processors can access areas where they should not write. This requires consideration of sequences regarding R / W authority for the shared resource, which increases the number of design steps.

[0006] The present disclosure aims to provide a technology that can reduce design man-hours for adding options to existing functions or modifying existing functions in an elevator control device.

[0007] Other objects and novel features will become apparent from the description of this specification and the accompanying drawings.

[0008] A brief summary of representative aspects of this disclosure is as follows.

[0009] An elevator control device according to the present disclosure includes a car control unit and a car / door control unit connected to a car control unit and a door control unit, wherein the car / door control unit includes a shared memory unit, a read / write setting storage unit that sets read or write authority for the shared memory unit, a read / write check unit that checks whether access to the shared memory unit matches the authority, a memory command storage unit that stores the memory command and a processing flag indicating that the processing is incomplete when the read / write check unit detects that a memory command for the shared memory unit does not match the authority, and a memory command processing unit that issues a memory command with access authority to the shared memory unit when data related to the memory command is stored in the memory command storage unit and the processing flag indicates incomplete.

[0010] Further, a control method for an elevator control device according to the present disclosure includes a car control unit and a car / door control unit connected to the car control unit, a car control unit, and a door control unit, the car / door control unit including a shared memory unit, a read / write setting storage unit that sets authority to read or write to the shared memory unit, a read / write check unit, a memory command storage unit, and a memory command processing unit, the control method including the steps of: a step by the read / write check unit checking whether access to the shared memory unit matches the authority; a step by the read / write check unit, when the read / write check unit detects that a memory command for the shared memory unit does not match the authority, storing the memory command and a processing flag indicating that processing is incomplete in the memory command storage unit; and a step by the memory command processing unit, when data related to the memory command is stored in the memory command storage unit and the processing flag indicates incomplete, issuing a memory command with access authority to the shared memory unit.

[0011] According to the elevator control device and control method of the above embodiment, when a function is added as an option or modified, the elevator control unit can access and write to the shared memory unit without changing the read / write (R / W) authority of the shared memory unit, thereby providing a technology that can reduce the design man-hours required for adding an option or modifying a function.

[0012] FIG. 1 is a schematic diagram showing the overall configuration of an elevator control device according to an embodiment. FIG. 2 is a diagram illustrating an example of the configuration of the setting contents of the shared memory unit in FIG. 1. FIG. 3 is a diagram illustrating the setting contents of the R / W setting storage unit in FIG. 1. FIG. 4 is a diagram illustrating a memory command area stored in the memory command storage unit in FIG. 1. FIG. 5 is a diagram illustrating an example of a process for accessing the shared memory unit according to a comparative example. FIG. 6 is a diagram illustrating an example of a process for accessing the shared memory unit according to an embodiment. FIG. 7 is a flow chart showing a process sequence for accessing the shared memory unit by the car control unit. FIG. 8 is a flow chart showing a process sequence for accessing the shared memory unit by the car / door control unit.

[0013] Hereinafter, embodiments will be described with reference to the drawings. However, in the following description, the same components will be assigned the same reference numerals, and repeated description may be omitted. Note that the drawings may be more schematic than the actual embodiment to clarify the description, but they are merely examples and do not limit the interpretation of the present disclosure.

[0014] (Embodiment) Fig. 1 is a schematic diagram showing the overall configuration of an elevator control device according to an embodiment.

[0015] 1, elevator control device 100 includes car control unit 101, car unit 102 for carrying passengers or baggage, and hoisting control unit 103 that controls motor unit 107 that moves car unit 102 up and down based on the control of car control unit 101. Elevator control device 100 also includes rope 104 installed between car unit 102 and motor unit 107, car / door control unit 105 installed on each floor where car unit 102 moves up and down, and hall button unit 106 installed in the hall of each floor. Car / door control unit 105 is connected to car control unit 108 and door control unit 109.

[0016] The car control unit 101 includes a car overall processing unit 200, a display unit 201 connected to the car overall processing unit 200, and a plurality of communication processing units 202, 203, 204 connected to the car overall processing unit 200.

[0017] The overall unit processing unit 200 allocates the car units 102 based on information from the hall button units 106 on each floor, information from the car units 102 input via the communication processing unit 203, and information from the car / door control unit 105, and controls the output of operation commands to the hoisting control unit 103 to the car allocation floor via the communication processing unit 202.

[0018] The car / door control unit 105 performs processing to transmit data transmitted from the car overall processing unit 200 to a display or the like installed in the hall via the communication processing unit 203. The door control unit 109 controls the opening and closing operations of the doors installed on each floor and the doors installed in the car unit 102.

[0019] The car control unit 108 performs processing to transmit data from devices such as destination floor buttons and open / close buttons installed in the car unit 102 that carries users or luggage to the car overall processing unit 200 via the car / door control unit 105 and the communication processing unit 203. The car control unit 108 also receives data transmitted from the car overall processing unit 200 via the communication processing unit 203 and the car / door control unit 105, and performs processing to transmit the data to devices such as floor display units installed in the car unit 102.

[0020] The hall button unit 106 is installed in the hall that is the elevator landing area on each floor, and is an up and down button that a user presses to call the car unit 102 from the elevator hall. Data from the hall button unit 106 is transmitted to the elevator overall processing unit 200 via the communication processing unit 204.

[0021] The car / door control unit 105 includes an overall control unit 20 and a shared memory control unit 21. The overall control unit 20 includes a car overall processing unit 22, a memory command processing unit 23, and a memory command storage unit 24. The shared memory control unit 21 includes a read / write check unit (R / W check unit) 25, a shared memory unit 26, and a read / write setting storage unit (R / W setting storage unit) 27.

[0022] The car overall processing unit 22 is connected to the car overall processing unit 200 via the communication processing unit 203, and is also connected to the car control unit 108 and the door control unit 109, and is configured to control the car control unit 108 and the door control unit 109.

[0023] The shared memory unit 26 is used for data exchange between the first processor constituting the car overall processing unit 200 of the car control unit 101 and the second processor constituting the car overall processing unit 22. The shared memory unit 26 is configured to separate read / write areas (R / W areas) for each address in order to avoid conflicts between the first and second processors when accessing the shared memory unit 26. For this reason, the shared memory unit 26 is divided into a plurality of R / W areas based on the settings in the R / W setting storage unit 27, and permissions such as read and write are set for each area.

[0024] The R / W check unit 25 detects whether or not access to the shared memory unit 26 matches the settings in the R / W setting storage unit 27. If the access to the shared memory unit 26 from the first and second processors matches the settings in the R / W setting storage unit 27, the access to the shared memory unit 26 is permitted. On the other hand, if the access to the shared memory unit 26 from the first and second processors does not match the settings in the R / W setting storage unit 27, the access to the shared memory unit 26 can be prohibited.

[0025] Figure 2 is a diagram illustrating an example of the configuration of the settings of the shared memory unit in Figure 1. As shown in Figure 2, the shared memory unit 26 is configured as a multiport memory (also called a dual-port memory) having two ports: an A port Ap as a first port and a B port Bp as a second port. The A port Ap is defined as the port accessed by the first processor constituting the car overall processing unit 200 of the car control unit 101, and the B port Bp is defined as the port accessed by the second processor constituting the car overall processing unit 22.

[0026] 2, in this example, the shared memory unit 26 is divided into a first area RE1 in which parameters are set, a second area RE2 in which function A (FUCA) is set, and a third area RE3 in which function B (FUCB) is set. The number of divisions into the areas of the shared memory unit 26 may be 1, 2, or 4 or more. The number of divisions can be determined as desired.

[0027] The first region RE1 is assigned to addresses 1-4 of the address ADD, and parameters PA1, PA2, ..., PAX are stored as data (DAT) at addresses 1-4. As shown in the R / W setting (SETTING_R / W), the A port Ap of the first region RE1 is set as read (R) only, and the B port Bp of the first region RE1 is set as write (W) only.

[0028] The second region RE2 is allocated to addresses 5-8 of the address ADD, and data DA11, DA12, ..., DA1X for setting function A are stored as data (DAT) at addresses 5-8. As shown in the R / W setting (SETTING_R / W), the A port Ap of the second region RE2 is set as write (W) only, and the B port Bp of the second region RE2 is set as read (R) only.

[0029] The third area RE3 is allocated to addresses 9-12 of the address ADD, and data DA21, DA22, ..., DA2X for setting function B are stored as data (DAT) at addresses 9-12. As shown in the R / W setting (SETTING_R / W), the A port Ap of the third area RE32 is set as read (R) only, and the B port Bp of the third area RE32 is set as read (R) and write (W) (R / W).

[0030] Fig. 3 is a diagram illustrating the setting contents of the R / W setting storage unit in Fig. 1. The setting contents of the shared memory unit 26 described in Fig. 2 are defined by the setting contents (also referred to as a setting table) of the R / W setting storage unit 27. As shown in Fig. 3, the setting table of the R / W setting storage unit 27 in this example has a read / write setting area 1 (RE1_R / W) for setting the first area RE1, a read / write setting area 2 (RE2_R / W) for setting the second area RE2, and a read / write setting area 3 (RE3_R / W) for setting the third area RE3.

[0031] The read / write setting area 1 (RE1_R / W) is the part that defines the settings of the first area RE1, and is allocated to addresses 1-6 of the address ADD. In address 1, the start address ADD_ST1 of the first area RE1 is set as data DA. In address 2, the end address ADD_ED1 of the first area RE1 is set as data DA. In address 3, the R / W authority of the A port Ap of the first area RE1 is set as data DA. In address 4, the R / W authority of the B port Bp of the first area RE1 is set as data DA. In addresses 5 and 6, the number of abnormality detections Nad1 and the address history Had1 are set as data DA.

[0032] The read / write setting area 2 (RE2_R / W) is a portion that defines the settings of the second area RE2, and is allocated to addresses 7-12 of the address ADD. At address 7, the start address ADD_ST2 of the second area RE2 is set as data DA. At address 8, the end address ADD_ED2 of the second area RE2 is set as data DA. At address 9, the R / W authority of the A port Ap of the second area RE2 is set as data DA. At address 10, the R / W authority of the B port Bp of the second area RE2 is set as data DA. At addresses 11 and 12, the number of abnormality detections Nad2 and the address history Had2 are set as data DA.

[0033] The read / write setting area 3 (RE3_R / W) is a portion that defines the settings of the third area RE3, and is allocated to addresses 13-18 of the address ADD. In address 13, the start address ADD_ST3 of the third area RE3 is set as data DA. In address 14, the end address ADD_ED3 of the third area RE3 is set as data DA. In address 15, the R / W authority of the A port Ap of the third area RE3 is set as data DA. In address 16, the R / W authority of the B port Bp of the third area RE3 is set as data DA. In addresses 17 and 18, the number of abnormality detections Nad3 and the address history Had3 are set as data DA.

[0034] When defining the settings of the first region RE1 in read / write setting region 1 (RE1_R / W), for example, the start address (1) of the first region RE1 is set to address 1, the final address (4) of the first region RE1 is set to address 2, read (R) of the A port Ap of the first region RE1 is set to address 3, and write (W) of the B port Bp of the first region RE1 is set to address 4. In the same way, the settings of the second region RE2 can be defined in read / write setting region 2 (RE2_R / W), and the settings of the third region RE3 can be defined in read / write setting region 3 (RE3_R / W).

[0035] Returning to FIG. 1, the memory command processing unit 23 and memory command storage unit 24 provided in the overall control unit 20 will be described.

[0036] The R / W check unit 25 detects whether or not an access to the shared memory unit 26 matches the R / W authority set in the R / W setting storage unit 27. For example, when a write access is issued to the A port Ap of the shared memory unit 26 of the car overall processing unit 200 of the car control unit 101, the R / W check unit 25 detects an access to the shared memory that does not match the R / W authority set in the R / W setting storage unit 27 (due to a violation). Based on this detection, the overall control unit 20 issues a memory command command to the memory command storage unit 24 of the car / door control unit 105 using the communication control unit 203. As a result, the overall control unit 20 stores the write access to the A port Ap of the shared memory unit 26 of the car overall processing unit 200 in the memory command storage unit 24 as a memory command. When storing this memory command, the overall control unit 20 simultaneously stores data related to the execution task of the memory command and data related to the processing completion flag (here, data of "0" indicating incomplete) in the memory command storage unit 24.

[0037] The memory command processing unit 23 checks whether data exists in the memory command storage unit 24 (whether data related to the memory command is stored) and whether the processing end flag is "0." If data exists in the memory command storage unit 24 (whether data related to the memory command is stored) and the processing end flag is "0," the memory command processing unit 23 issues a memory command related to a write access to the B port Bp of the shared memory unit 26 in accordance with the contents stored in the memory command storage unit 24. In other words, when the overall control unit 20 of the car / door control unit 105 executes an execution task of the memory command stored in the memory command storage unit 24, it writes (writes) the write data related to the memory command stored in the memory command storage unit 24 using the B port Bp of the shared memory unit 26. This results in the data being written to the shared memory unit 26. Thereafter, the memory command processing unit 23 writes "1," indicating completion, to the processing end flag of the memory command storage unit 24, thereby rewriting the data of the processing end flag from "0" to "1."

[0038] In this way, "write access to the A port Ap of the shared memory unit 26 of the car overall processing unit 200," which does not match the R / W authority, is converted into "write access to the B port Bp of the shared memory unit 26 of the car / door control unit 105," which matches the R / W authority. In other words, the memory command processing unit 23 issues a memory command for which access authority is granted to the shared memory unit 26. As a result, when adding an option to an existing function or modifying an existing function, the shared memory unit 26 can be accessed without changing the R / W authority of the R / W area of ​​the shared memory unit 26, which is set in the R / W setting storage unit 27. This makes it possible to reduce the number of design steps required for adding options or modifying functions.

[0039] In the above explanation, the A port Ap is defined as the port accessed by the first processor constituting the car overall processing unit 200 of the car control unit 101, and the B port Bp is defined as the port accessed by the second processor constituting the car overall processing unit 22, but this is not limiting. The A port Ap may be defined as the port accessed by the second processor constituting the car overall processing unit 22, and the B port Bp may be defined as the port accessed by the first processor constituting the car overall processing unit 200 of the car control unit 101. When defining the setting of the first area RE1 in the read / write setting area 1 (RE1_R / W), for example, the start address (1) of the first area RE1 may be set to address 1, the end address (4) of the first area RE1 may be set to address 2, the write (W) of the A port Ap of the first area RE1 may be set to address 3, and the read (R) of the B port Bp of the first area RE1 may be set to address 4.

[0040] Fig. 4 is a diagram illustrating memory command areas stored in the memory command storage unit 24 of Fig. 1. Two memory command areas (RE1_WC, RE2_WC) are shown as an example in Fig. 4. The first memory command area RE1_WC is a storage area for write memory commands for the A port Ap. The second memory command area RE2_WC is a storage area for write memory commands for the B port Bp.

[0041] The first memory command area RE1_WC has, for example, addresses 1 to 7 as addresses AD. Addresses 1 to 7 are configured to store, in order as data DA, a write start address AD_Stw1, the number of data to be written NUM1, the type of initial process It1 (ALL 1 or 0), execution task PT1, write data WDAT11, WDAT1x, and a process completion flag PCF1.

[0042] The second memory command area RE2_WC has, for example, addresses 8-14 as addresses AD. Addresses 8-14 are configured to store, in order, the write start address AD_Stw2, the number of data to be written NUM2, the type of initial process It2 (ALL 1 or 0), execution task PT2, write data WDAT21, write data WDAT2x, and process completion flag PCF2 as data DA. The process completion flags PCF1 and PCF2 can be referred to as process end flags.

[0043] 5 is a diagram illustrating an example of a process for accessing a shared memory unit according to a comparative example. FIG. 6 is a diagram illustrating an example of a process for accessing a shared memory unit according to an embodiment. Here, it is assumed that the R / W setting storage unit 27 defines the A port Ap as a port for read access by the first processor constituting the car overall processing unit 200 of the car control unit 101, and the B port Bp as a port for write access by the second processor constituting the car overall processing unit 22 of the car / door control unit 105. For example, consider a case where the car overall processing unit 200 of the car control unit 101 changes or updates parameters in the first area RE1, or modifies or adds data for function B (FUNB) in the third area RE3.

[0044] As shown in FIG. 1 , the elevator control device 100 according to the embodiment includes a memory command processing unit 23 and a memory command storage unit 24 in the overall control unit 20 of the car / door control unit 105, and an R / W check unit 25 and an R / W setting storage unit 27 in the shared memory control unit 21. This allows the R / W check unit 25 to detect access to the shared memory unit 26 that is not authorized by the R / W setting storage unit 27. Furthermore, if an authorized device (here, the overall control unit 20 of the car / door control unit 105) does not have R / W authorization for the shared memory unit 26, the memory command processing unit 23 and the memory command storage unit 24 can be used to access the A port Ap or B port Bp of the shared memory unit 26. In other words, when data related to a memory command is stored in the memory command storage unit 24 and the processing completion flag indicates "0," indicating incomplete, the memory command processing unit 23 issues a memory command with access authorization to the shared memory unit 26.

[0045] 5, in this case, the R / W authority of the R / W setting storage unit 27 is set to read for the car control unit 101 and write for the car / door control unit 105, so the shared memory unit 26 cannot be written to by the car control unit 101. Therefore, because the R / W area of ​​the shared memory unit 26 is defined by the shared memory R / W setting storage unit 27, when adding an option to an existing function or modifying an existing function, the R / W authority of the R / W area of ​​the shared memory unit 26 set in the shared memory R / W setting storage unit 27 cannot be changed. This requires major changes to the elevator control device 100 system, which increases the number of design steps.

[0046] As shown in FIG. 6 , when the car control unit 101 writes to the shared memory unit 26, the memory command storage unit 24 is used. That is, the write command (CN_W) and the value (data) to be written for the shared memory unit 26 of the car control unit 101 are temporarily stored in the memory command storage unit 24. Then, when the write command and the value (data) to be written for the shared memory unit 26 of the car control unit 101 are stored in the memory command storage unit 24, the car / door control unit 105 reads the write command and the value (data) to be written by command read (CM_R). Thereafter, the car / door control unit 105 writes to the shared memory unit 26 as a special write (W_CM) based on the read write command and the value (data) to be written. As a result, the shared memory unit 26 rewrites the data based on the read write command and the value (data) to be written, changing, correcting, or adding the data. That is, in this example, if the write command (CN_W) is regarded as a memory command for which access authority is not granted, then the special write (W_CM) is a memory command for which access authority is granted.

[0047] In other words, the value written to the shared memory unit 26 by the car control unit 101 can be written to the car / door control unit 105. In other words, it is possible to virtually write from the car control unit 101 to the shared memory unit 26 by using the car / door control unit 105. Therefore, there is no need to change the processing of the car / door control unit 105, so when adding an option to an existing function or modifying an existing function, the shared memory unit 26 can be accessed without changing the R / W authority of the R / W area of ​​the shared memory unit 26 set in the R / W setting storage unit 27. This makes it possible to reduce the number of design steps required for supporting options and modifications to functions.

[0048] Next, the control method of the elevator control device 100 will be described in order of steps (processes) using Figures 7 and 8. Figure 7 is a flow chart showing the processing sequence of the elevator control unit's access to the shared memory unit. Figure 8 is a flow chart showing the processing sequence of the car / door control unit's access to the shared memory unit.

[0049] The processing sequence of the car control unit 101 for accessing the shared memory unit 26 is made up of steps S10 to S17 as shown in FIG.

[0050] In step S10, the car overall processing unit 200 of the car control unit 101 reads the authority (the setting contents in FIG. 3) of the R / W setting storage unit 27 of the car / door control unit 105 using the communication control unit 203.

[0051] Next, in step S11, the car control unit 101 or the car overall processing unit 200 determines whether or not there is access to the shared memory unit 26. If it is determined that there is access to the shared memory unit 26 (yes), the process proceeds to step S12. If it is determined that there is no access to the shared memory unit 26 (no), the process proceeds to step S11 again.

[0052] In step S12, the machine overall processing unit 200 uses the communication control unit 203 to check whether the access to the shared memory unit 26 is in accordance with the authority of the R / W setting storage unit 27. If the access to the shared memory unit 26 is in accordance with the authority of the R / W setting storage unit 27 (yes), the process proceeds to step S13. If the access to the shared memory unit 26 is not in accordance with the authority of the R / W setting storage unit 27 (no), the process proceeds to step S14.

[0053] In step S13, the car overall processing unit 200 issues a normal memory access command to the shared memory unit 26 using the communication control unit 203, and then the process proceeds to step S15.

[0054] In step S14, the car overall processing unit 200 issues a memory command command to the memory command storage unit 24 of the car / door control unit 105 using the communication control unit 203. As a result, the memory command is stored in the memory command storage unit 24. Thereafter, the process proceeds to step S15.

[0055] In step S15, the machine overall processing unit 200 uses the communication control unit 203 to read the number of abnormality detections (number of abnormality detections Nad1, 2, 3 in Figure 3) and address history (address history Had1, 2, 3 in Figure 3) from the R / W setting storage unit 27, and proceeds to step S16.

[0056] In step S16, the machine overall processing unit 200 determines whether or not there is an abnormality. If there is no abnormality (yes), the process proceeds to step S11, where the machine overall processing unit 200 waits for the next access to the shared memory unit 26. On the other hand, if there is an abnormality (no), the process proceeds to step S17, where the machine control unit 101 displays the number of abnormality detections and the address history on the display unit 201, and then proceeds to step S11.

[0057] The processing sequence for accessing the shared memory unit 26 by the car / door control unit 105 is made up of steps S20 to S29 as shown in FIG.

[0058] In step S20, the car overall processing unit 22 in the overall control unit 20 of the car / door control unit 105 reads the authority (the setting contents in FIG. 3) of the R / W setting storage unit 27.

[0059] Next, in step S21, the car overall processing unit 22 sets in the R / W check unit 25 the authority of the R / W setting storage unit 27 read in step S20.

[0060] Next, in step S22, the overall control unit 20 or the car overall processing unit 22 determines whether there is a memory access to the shared memory unit 26. If there is a memory access to the shared memory unit 26 (yes), the process proceeds to step S23. If there is no memory access to the shared memory unit 26 (no), the process proceeds to step S24.

[0061] In step S23, the R / W check unit 25 checks the read / write authority in memory access to the shared memory unit 26, and the process proceeds to step S25.

[0062] In step S25, it is determined whether there is a violation of read / write authority in memory access to the shared memory unit 26. If there is no violation of read / write authority in memory access to the shared memory unit 26 (yes), the process proceeds to step S26. On the other hand, if there is a violation of read / write authority in memory access to the shared memory unit 26 (no), the process proceeds to step S27.

[0063] In step S26, memory access is made to the shared memory unit 26, and data is read from or written to the shared memory unit 26. Thereafter, the process moves to step S22, where the process waits for the next access to the shared memory unit 26.

[0064] In step S27, the R / W check unit 25 performs processing to update the number of abnormality detections and the address history in the R / W setting storage unit 27. After that, the process proceeds to step S22.

[0065] In step S24, the memory command processing unit 23 checks whether data exists in the memory command storage unit 24 and whether the processing end flag is 0 (zero). If data exists in the memory command storage unit 24 and the processing end flag is 0 (zero) (yes), the process proceeds to step S28. If data exists in the memory command storage unit 24 and the processing end flag is not 0 (zero) (no), the process proceeds to step S28.

[0066] In step S28, the memory command processing unit 23 issues a memory command instruction with access authority to the shared memory unit 26 in accordance with the contents stored in the memory command storage unit 24, and executes memory access to the shared memory unit 26. Thereafter, the process proceeds to step S29.

[0067] In step S29, the memory command processing unit 23 records the end of the memory access process by writing the process end flag of the memory command storage unit 24 from 0 (zero) to 1. Then, the process proceeds to step S22.

[0068] The above description has been given of a case where the unit control unit 101 wants to perform a write process on the shared memory unit 26, but the unit control unit 101's write authority for the shared memory unit 26 is not set in the read / write setting storage unit 27. However, the present disclosure can also be used in a case where the unit control unit 101 wants to perform a read process on the shared memory unit 26, but the unit control unit 101's read authority for the shared memory unit 26 is not set in the read / write setting storage unit 27.

[0069] That is, in the shared memory unit 26 having a first port and a second port, the authority of the first port is set in the read / write setting storage unit 27 as the write-only authority of the car control unit 101, and the authority of the second port is set as the read authority of the car / door control unit 105. Here, it is assumed that the car control unit 101 issues a memory command for read access to the first port. At this time, the read / write check unit 25 checks whether the memory command for the read access of the car control unit 101 to the first port matches the authority set in the read / write setting storage unit 27 for access to the shared memory unit 25. When the read / write check unit 25 detects that the memory command for the read access of the car control unit 101 to the first port of the shared memory unit 26 does not match the authority set in the read / write setting storage unit 27, the memory command storage unit 24 stores the memory command for the read by the car control unit 101 and a processing completion flag indicating incompleteness "0."

[0070] Then, when a memory command related to a read is stored in the memory command storage unit 24 and the processing end flag is incomplete "0", the memory command processing unit 23 issues a memory command for which it has access authority to the shared memory unit 26. That is, the memory command processing unit 23 issues a memory command related to a read access for which it has access authority to the second port of the shared memory unit 26 in accordance with the contents stored in the memory command storage unit 24, and reads data from the second port of the shared memory unit 26.

[0071] The control method of the elevator control device is as follows. Here, in the shared memory unit 26 having the first port and the second port, the authority of the first port is set in the read / write setting storage unit 27 as the write authority of the car control unit 101 only, and the authority of the second port is set as the read authority of the car / door control unit 105. Here, it is assumed that the car control unit 101 issues a memory command related to read access to the first port.

[0072] The control method for the elevator control device includes the following steps: 1) a step in which the read / write check unit 25 checks whether access to the shared memory unit 26 is authorized; 2) a step in which, when the read / write check unit 25 detects that the memory command issued by the elevator control unit 101 to the first port of the shared memory unit 26 does not match the authorized access, the read access memory command issued by the elevator control unit 101 and a processing end flag indicating incompleteness are stored in the memory command storage unit 24; 3) a step in which the memory command processing unit 23 checks whether the memory command issued by the read access memory is stored in the memory command storage unit 24 and whether the processing end flag indicates incompleteness; 4) a step in which, when the memory command issued by the memory command processing unit 23 is stored in the memory command storage unit 24 and the processing end flag indicates incompleteness, the memory command processing unit 23 issues a memory command issued by the memory command storage unit 24 to the second port of the shared memory unit 26 for which the memory command has access authorization, and reads data from the second port of the shared memory unit 26.

[0073] The present disclosure made by the present inventor has been specifically described above based on examples, but it goes without saying that the present disclosure is not limited to the above-described embodiments and examples, and various modifications are possible.

[0074] 100: elevator control device, 101: car control unit, 102: car, 105: car / door control unit, 108: car control unit, 109: door control unit, 200: car overall processing unit, 20: overall control unit, 21: shared memory control unit, 22: car overall processing unit, 23: memory command processing unit, 24: memory command storage unit, 25: read / write check unit, 26: shared memory unit, 27: read / write setting storage unit.

Claims

1. An elevator control device comprising: a car / door control unit connected to a car control unit and a door control unit, wherein the car / door control unit comprises: a shared memory unit; a read / write setting storage unit that sets read or write authority for the shared memory unit; a read / write check unit that checks whether access to the shared memory unit matches the authority; a memory command storage unit that stores, when the read / write check unit detects that a memory command for the shared memory unit does not match the authority, the memory command and a processing flag indicating that the processing is incomplete; and a memory command processing unit that issues a memory command with access authority to the shared memory unit when data related to the memory command is stored in the memory command storage unit and the processing flag indicates incomplete.

2. A control method for an elevator control device including a car control unit and a car / door control unit connected to the car control unit, car control unit, and door control unit, the car / door control unit including a shared memory unit, a read / write setting storage unit that sets authority to read or write to the shared memory unit, a read / write check unit, a memory command storage unit, and a memory command processing unit, the control method comprising the steps of: a step in which the read / write check unit checks whether access to the shared memory unit matches the authority; a step in which, when the read / write check unit detects that a memory command for the shared memory unit does not match the authority, the memory command and a processing flag indicating that the processing is incomplete are stored in the memory command storage unit; and a step in which, when data related to the memory command is stored in the memory command storage unit and the processing flag indicates incomplete, the memory command processing unit issues a memory command with access authority to the shared memory unit.

3. A car / door control unit including: a car control unit; and a car / door control unit connected to a car control unit and a door control unit, wherein the car / door control unit includes: a shared memory unit having a first port and a second port; a read / write setting storage unit that sets the authority of the first port as read-only authority for the car control unit and sets the authority of the second port as write authority for the car / door control unit; a read / write check unit that checks whether access to the shared memory unit matches the authority; a memory command storage unit in which, when the read / write check unit detects that a memory command of the car control unit for the first port of the shared memory unit does not match the authority, the memory command of the car control unit and a processing completion flag indicating incompletion are stored; and a memory command processing unit in which data related to the memory command is stored in the memory command storage unit and that checks whether the processing completion flag indicates incompletion. and when data related to the memory command is stored in the memory command storage unit and the processing end flag is incomplete, the memory command processing unit issues a memory command related to write access to the second port of the shared memory unit in accordance with the stored content of the memory command storage unit, and writes the data related to the memory command stored in the memory command storage unit using the second port of the shared memory unit.

4. An elevator control device according to claim 3, wherein the memory command processing unit rewrites the processing end flag to "completed" after the write data related to the memory command is written using the second port of the shared memory unit.

5. An elevator control device according to claim 3, wherein the shared memory unit includes a first area in which the authority of the first port is set as read-only authority for the car control unit and the authority of the second port is set as write authority for the car / door control unit, and a second area different from the first area; the read / write setting storage unit sets the authority of the first port in the second area as write authority for the car control unit and sets the authority of the second port in the second area as read authority for the car / door control unit; and the memory command storage unit is used when the car control unit writes to the first area.

6. A control method for an elevator control device including a car control unit and a car / door control unit connected to said car control unit, a car control unit, and a door control unit, said car / door control unit including a shared memory unit having a first port and a second port, a read / write setting storage unit that sets the authority of said first port as read-only authority for said car control unit and the authority of said second port as write authority for said car / door control unit, a read / write check unit, a memory command storage unit, and a memory command processing unit, comprising: a step in which said read / write check unit checks whether access to said shared memory unit matches said authority; a step in which, when said read / write check unit detects that the memory command of said car control unit for said first port of said shared memory unit does not match said authority, said memory command of said car control unit and a processing completion flag indicating incompletion are stored in said memory command storage unit; and a step in which said memory command processing unit checks whether data related to said memory command is stored in said memory command storage unit and whether the processing completion flag indicates incompletion. and when data related to the memory command is stored in the memory command storage unit and the processing end flag is incomplete, the memory command processing unit issues a memory command related to write access to the second port of the shared memory unit in accordance with the stored contents of the memory command storage unit, and writes the data related to the memory command stored in the memory command storage unit using the second port of the shared memory unit.

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