Conductive structure and preparation method therefor, and integrated device and preparation method therefor

Abstract

A conductive structure and a preparation method therefor, and an integrated device and a preparation method therefor, which relate to the technical field of semiconductors. The conductive structure comprises: a glass substrate body (1), wherein the glass substrate body (1) has a first surface and a second surface arranged opposite each other, the glass substrate body (1) has a through hole structure that brings the first surface into communication with the second surface, and the through hole structure comprises a first hole structure (3) which extends from the first surface into the glass substrate body and is gradually reduced in terms of size, and a second hole structure (4) which extends from the second surface into the glass substrate body and is gradually reduced in terms of size, with the depth-to-width ratio of either one of the first hole structure (3) and the second hole structure (4) being less than 5; and a conductive connector (2), which is located in the through hole structure and extends from the first surface to the second surface. The conductive structure can prevent a glass substrate from breaking and failing during the manufacturing process.

Description

Conductive structure and preparation method thereof, integrated device and preparation method thereof Technical Field

[0001] The present disclosure relates to the field of semiconductor technology, and in particular to a conductive structure and a manufacturing method thereof, an integrated device and a manufacturing method thereof. Background Art

[0002] Copper-filled TGVs (Through Glass Vias) (TGV-Cu) in glass-based integrated circuits are key components for connecting the front and back surfaces of chips or interposers and for constructing three-dimensional circuit structures. However, parameters such as elastic modulus and thermal expansion coefficient differ significantly between glass and Cu, with the thermal expansion coefficient of Cu being almost seven times that of glass. When blind vias are prepared on a glass substrate, the restricted expansion of one side of the glass increases the stress on it, potentially causing cracks on the surface and within the glass, leading to glass failure and failure, which in turn affects device performance and reliability.

[0003] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute prior art known to ordinary technicians in the field.

[0004] Summary of the Invention

[0005] The purpose of the present disclosure is to overcome the above-mentioned deficiencies of the prior art, provide a conductive structure and a manufacturing method thereof, an integrated device and a manufacturing method thereof, and avoid damage and failure of the glass substrate during the manufacturing process.

[0006] According to one aspect of the present disclosure, a conductive structure is provided, comprising:

[0007] A glass substrate body; the glass substrate body having a first surface and a second surface disposed opposite to each other, the glass substrate body having a through-hole structure connecting the first surface and the second surface; the through-hole structure including a first hole structure extending from the first surface into the interior of the glass substrate body and gradually decreasing in size, and a second hole structure extending from the second surface into the interior of the glass substrate body and gradually decreasing in size; an aspect ratio of either the first hole structure or the second hole structure being less than 5;

[0008] The conductive connecting member is located in the through-hole structure and extends from the first surface to the second surface.

[0009] In an example of the present disclosure, the aspect ratio of any one of the first hole structure and the second hole structure is not greater than 4.

[0010] In an example of the present disclosure, the aspect ratio of at least one of the first hole structure and the second hole structure is not less than 2.5.

[0011] In an example of the present disclosure, the aspect ratios of the first hole structure and the second hole structure are equal; or, the aspect ratio of the first hole structure is greater than the aspect ratio of the second hole structure.

[0012] In an example of the present disclosure, the orthographic projection of the first port of the first hole structure on the glass substrate body is larger than the orthographic projection of the second port of the first hole structure on the glass substrate body;

[0013] The orthographic projection of the first port of the second hole structure on the glass substrate body is larger than the orthographic projection of the second port of the second hole structure on the glass substrate body;

[0014] The second port of the first hole structure coincides with the second port of the second hole structure.

[0015] In an example of the present disclosure, the first hole structure and the second hole structure are coaxial.

[0016] In an example of the present disclosure, the conductive connector includes a first conductive layer attached to the inner wall of the through-hole structure and passing through the through-hole structure, and a second conductive layer attached to the inner wall of the first conductive layer and passing through the through-hole structure.

[0017] In an example of the present disclosure, the material of the first conductive layer includes titanium, and the material of the second conductive layer includes copper.

[0018] In an example of the present disclosure, the conductive connector further includes a conductive filling structure filled in the middle of the second conductive layer.

[0019] In an example of the present disclosure, the conductive filling structure completely fills the cavity surrounded by the second conductive layer, and the material of the conductive filling structure is copper.

[0020] In an example of the present disclosure, the conductive filling structure includes a copper filling layer formed on the inner wall of the second conductive layer, and a resin located in a cavity surrounded by the copper filling layer.

[0021] According to one aspect of the present disclosure, a conductive structure is provided, comprising:

[0022] A glass substrate body; the glass substrate body having a first surface and a second surface disposed opposite to each other, the glass substrate body having a through-hole structure communicating with the first surface and the second surface; the through-hole structure comprising a first hole structure extending from the first surface into the interior of the glass substrate body and gradually decreasing in size, and a second hole structure extending from the second surface into the interior of the glass substrate body and gradually decreasing in size; at least one of the first hole structure and the second hole structure having an aspect ratio not less than half of the aspect ratio of the through-hole structure;

[0023] The conductive connecting member is located in the through-hole structure and extends from the first surface to the second surface.

[0024] In an example of the present disclosure, the aspect ratio of the first hole structure or the second hole structure is greater than half of the aspect ratio of the through hole structure.

[0025] According to one aspect of the present disclosure, an integrated device is provided, comprising:

[0026] The above-mentioned conductive structure;

[0027] an upper functional layer, disposed on the first surface of the glass substrate body of the conductive structure, and the upper functional layer is electrically connected to the conductive connecting member of the conductive structure;

[0028] The lower functional layer is disposed on the second surface of the glass substrate body, and the lower functional layer is electrically connected to the conductive connecting member.

[0029] In one example of the present disclosure, the upper functional layer comprises a first insulating layer, a first metal layer, a second insulating layer, a second metal layer, a third insulating layer, a third metal layer, a fourth insulating layer, and a plurality of solder balls stacked sequentially on the first surface of the glass substrate body;

[0030] The first insulating layer has a first via hole exposing at least a portion of the conductive connection member, and the first metal layer is electrically connected to the conductive connection member through the first via hole;

[0031] The second metal layer partially overlaps the first metal layer and is insulated from each other by the second insulating layer to form a capacitor structure;

[0032] The third insulating layer has a second via hole exposing at least a portion of the second metal layer, and the third metal layer is electrically connected to the second metal layer through the second via hole;

[0033] The third insulating layer has a third via hole exposing at least a portion of the first metal layer, and the third metal layer is electrically connected to the first metal layer through the third via hole;

[0034] The fourth insulating layer has a fourth via hole exposing at least a portion of the third metal layer, and the solder ball is electrically connected to the third metal layer through the fourth via hole.

[0035] In one example of the present disclosure, the lower functional layer has a fourth metal layer and a fifth insulating layer;

[0036] The fourth metal layer is disposed on the second surface of the glass substrate body and is electrically connected to the conductive connecting member;

[0037] The fifth insulating layer is disposed on a side of the fourth metal layer away from the glass substrate body and covers the fourth metal layer.

[0038] According to another aspect of the present disclosure, a method for preparing the conductive structure is provided, comprising:

[0039] A glass substrate body is provided; the glass substrate body has a first surface and a second surface disposed opposite to each other, and the glass substrate body has a through-hole structure connecting the first surface and the second surface; the through-hole structure includes a first hole structure extending from the first surface into the interior of the glass substrate body and gradually decreasing in size, and a second hole structure extending from the second surface into the interior of the glass substrate body and gradually decreasing in size; and an aspect ratio of either the first hole structure or the second hole structure is less than 5;

[0040] A conductive connector is formed in the via structure, the conductive connector extending from the first surface to the second surface.

[0041] In an example of the present disclosure, the first pore structure and the second pore structure are formed by laser induction and wet etching.

[0042] According to another aspect of the present disclosure, a method for preparing the above-mentioned integrated device is provided, comprising:

[0043] A conductive structure is provided; the conductive structure comprises:

[0044] A glass substrate body; the glass substrate body having a first surface and a second surface disposed opposite to each other, the glass substrate body having a through-hole structure connecting the first surface and the second surface; the through-hole structure including a first hole structure extending from the first surface into the interior of the glass substrate body and gradually decreasing in size, and a second hole structure extending from the second surface into the interior of the glass substrate body and gradually decreasing in size; an aspect ratio of either the first hole structure or the second hole structure being less than 5;

[0045] a conductive connecting member, located in the through-hole structure and extending from the first surface to the second surface;

[0046] preparing an upper functional layer on the first surface of the glass substrate body, wherein the upper functional layer is electrically connected to the conductive connecting member;

[0047] A lower functional layer is prepared on the second surface of the glass substrate body, and the lower functional layer is electrically connected to the conductive connecting member.

[0048] According to another aspect of the present disclosure, a method for preparing the above-mentioned integrated device is provided, characterized by comprising:

[0049] Prepare a first blind hole on the first surface of the glass substrate body;

[0050] preparing a first conductive portion in the first blind hole;

[0051] preparing an upper functional layer on the first surface of the glass substrate body;

[0052] preparing a second blind hole on the second surface of the glass substrate body until the first conductive portion is exposed, wherein the first blind hole and the second blind hole are connected to form a through-hole structure;

[0053] preparing a second conductive portion in the second blind hole, wherein the second conductive portion is electrically connected to the first conductive portion to form a conductive connector;

[0054] A lower functional layer is prepared on the second surface of the glass substrate body.

[0055] In one example of the present disclosure, before forming the second blind hole on the second surface of the glass substrate body, the method further includes:

[0056] The glass substrate body is thinned.

[0057] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0058] The accompanying drawings are incorporated into and constitute a part of the specification, illustrate embodiments consistent with the present disclosure, and together with the specification, are used to explain the principles of the present disclosure. Obviously, the drawings described below are only some embodiments of the present disclosure, and those skilled in the art can derive other drawings based on these drawings without inventive effort.

[0059] FIG1 is a schematic structural diagram of an integrated device embodiment of the present disclosure.

[0060] FIG2 is a schematic structural diagram of an embodiment of the integrated device fabrication process disclosed herein.

[0061] FIG3 is a schematic structural diagram of an embodiment of a process for preparing an integrated device disclosed herein.

[0062] FIG4 is a schematic structural diagram of an embodiment of a process for preparing an integrated device disclosed herein.

[0063] FIG5 is a schematic structural diagram of an embodiment of a process for preparing an integrated device disclosed herein.

[0064] FIG6 is a schematic structural diagram of an embodiment of the integrated device fabrication process disclosed herein.

[0065] FIG7 is a schematic structural diagram of an embodiment of the integrated device fabrication process disclosed herein.

[0066] FIG8 is a schematic structural diagram of an embodiment of the integrated device fabrication process disclosed herein.

[0067] FIG9 is a schematic structural diagram of an embodiment of the integrated device fabrication process disclosed herein.

[0068] FIG10 is a schematic structural diagram of an embodiment of the integrated device fabrication process disclosed herein.

[0069] FIG11 is a schematic structural diagram of an embodiment of the integrated device fabrication process disclosed herein.

[0070] FIG12 is a schematic structural diagram of an embodiment of the integrated device fabrication process disclosed herein.

[0071] FIG13 is a schematic structural diagram of an embodiment of the integrated device fabrication process disclosed herein.

[0072] FIG14 is a schematic structural diagram of an embodiment of the integrated device fabrication process disclosed herein.

[0073] FIG15 is a schematic structural diagram of an embodiment of the integrated device fabrication process disclosed herein.

[0074] FIG16 is a flow chart of the method for preparing a conductive structure disclosed herein.

[0075] FIG17 is a flow chart of the integrated device fabrication method disclosed herein.

[0076] FIG18 is a schematic structural diagram of an embodiment of a conductive structure disclosed herein.

[0077] FIG19 is a schematic structural diagram of an embodiment of a conductive structure disclosed herein.

[0078] Explanation of the accompanying drawings: 1. Glass substrate body; 2. Conductive connector; 21. First conductive part; 22. Second conductive part; 3. First hole structure; 4. Second hole structure; 5. Upper functional layer; 51. First insulating layer; 52. First metal layer; 53. Second insulating layer; 54. Second metal layer; 55. Third insulating layer; 56. Third metal layer; 57. Fourth insulating layer; 58. Solder ball; 6. Lower functional layer; 61. Fourth metal layer; 62. Fifth insulating layer; 7. Resin. DETAILED DESCRIPTION

[0079] Example embodiments will now be described more fully with reference to the accompanying drawings. However, the example embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the concepts of the example embodiments to those skilled in the art. Like reference numerals in the figures represent identical or similar structures, and thus their detailed descriptions will be omitted. Furthermore, the figures are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale.

[0080] Although relative terms such as "upper" and "lower" are used in this specification to describe the relationship of one illustrated component to another, these terms are used herein for convenience only, such as in accordance with the orientation of the illustrations in the accompanying drawings. It will be understood that if the illustrated device were flipped upside down, the component described as "upper" would become the component "lower." When a structure is referred to as "on" another structure, this may mean that the structure is integrally formed with the other structure, that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure via the other structure.

[0081] The terms "a", "an", "the", "said" and "at least one" are used to indicate the presence of one or more elements / components / etc.; the terms "including" and "having" are used to express open-ended inclusion and mean that additional elements / components / etc. may be present in addition to the listed elements / components / etc.; the terms "first", "second" and "third" etc. are used only as labels and are not intended to limit the quantity of their objects.

[0082] Structural layer A is located on the side of structural layer B facing away from the glass substrate. This means that structural layer A is formed on the side of structural layer B facing away from the glass substrate. When structural layer B is a patterned structure, part of structural layer A may be located at the same physical height as structural layer B or lower than the physical height of structural layer B, with the glass substrate serving as a height reference.

[0083] In the present disclosure, when describing the overlapping arrangement of structure C and structure D, it means that structure C and structure D are respectively in different film layers, but the orthographic projection of structure C on the substrate and the orthographic projection of structure D on the substrate at least partially overlap.

[0084] The current market demand for miniaturized electronic products is placing increasing demands on the miniaturization of passive components in end products such as mobile phones, tablets, and wearable devices. Currently, passive components such as capacitors, inductors, and resistors account for approximately 70% of PCB area. Integrated passive device (IPD) technology can reduce the area of ​​passive components by over 80%, offering a promising market.

[0085] Based on the different substrates, integrated passive device technology can be divided into silicon-based, low-temperature co-fired ceramic (LTCC)-based, glass-based and other technical routes.

[0086] With the advancement of communication technology, mobile communication frequencies are increasing, from hundreds of megahertz in 2G technology to 3.5 GHz and millimeter waves in 5G technology. As the main energy-consuming component in electronic products, the RF front-end device requires significantly reduced electromagnetic losses. Due to the inherent material advantages of glass-based materials, glass-based integrated passive devices have gradually become the mainstream approach.

[0087] Based on existing structural differences, glass-based integrated passive devices (IPDs) can be divided into 2D-IPD and 3D-IPD. 2D-IPD mainly involves fabricating a redistribution layer (RDL) (metal layer) and corresponding dielectric layers on one side of the glass, thereby forming a capacitor and inductor structure. 3D-IPD, on the other hand, involves fabricating a redistribution layer (RDL) (metal layer) and corresponding dielectric layers on both sides of the glass. To connect the redistribution layers on both sides, holes need to be opened in the glass and filled with conductive metal to achieve interconnection of the double-sided RDLs, thereby forming capacitor and inductor structures.

[0088] Since 3D-IPD must use the opening process to interconnect double-sided RDL, glass opening becomes a key process for this structure.

[0089] Due to the differences in the TGV process, there are mainly two device manufacturing schemes: blind hole scheme and through hole scheme. Taking the final glass substrate thickness of 300μm as an example, if the blind hole scheme is adopted, the main steps are: opening a blind hole on the first surface of the glass substrate with a thickness greater than 300μm, with a hole depth greater than 300μm, and then filling the hole with copper and making the first surface single-sided film layer wiring in sequence. After completing one side structure, the second surface of the glass substrate is thinned until the glass substrate thickness is 300μm. Since the hole depth is greater than 300μm, after thinning the glass substrate, the copper at the bottom of the filled hole will be exposed, and then the second surface unit film layer wiring will be made. If the through hole scheme is adopted, the main steps are: opening a through hole on a glass substrate with a thickness equal to 300μm, with a hole depth equal to 300μm, and then filling the hole with copper and making double-sided film layer wiring. However, the through-hole solution is more suitable for preparing holes in thin glass substrates and cannot meet the requirements of the wafer transfer process for large-size substrates. Therefore, the blind hole solution is often used to prepare glass through-holes.

[0090] In related technologies, when preparing blind holes on a glass substrate, the stress on one side of the glass increases due to the limited expansion, which may cause cracks on the surface and inside of the glass, causing the glass to break and fail, thereby affecting the performance and reliability of the device. Taking the final through-hole aspect ratio (the ratio of the through-hole depth to the maximum aperture on the surface of the glass substrate) of 5:1 and a through-hole with an aperture of 50μm on the glass substrate as an example, in order to achieve the same function, the prepared blind hole's aspect ratio needs to be greater than 5:1. At the same time, the maximum stress of copper on the glass substrate can reach about 590MPa at 300°C. However, due to the limited expansion on one side of the blind hole, the maximum stress on the glass is about 740MPa. As the stress increases, cracks occur on the surface and inside of the glass, and the glass is damaged, affecting the performance and reliability of the device.

[0091] In order to solve at least one of the above-mentioned problems, the present disclosure proposes a first conductive structure, referring to FIG1 , which includes a glass substrate body 1 having a through-hole structure and a conductive connector 2 filled in the through-hole structure and continuous.

[0092] In one embodiment of the present disclosure, referring to FIG1 , a glass substrate body 1 has a first surface and a second surface disposed opposite each other, and the glass substrate body 1 has a through-hole structure connecting the first surface and the second surface; referring to FIG18 , the through-hole structure has a first hole structure 3 and a second hole structure 4 connected to each other (in FIG1 , the first hole structure 3 is above the dotted line, and the second hole structure 4 is below the dotted line), wherein the first end of the first hole structure 3 is located on the first surface of the glass substrate body 1, the first end of the second hole structure 4 is located on the second surface of the glass substrate body 1, and the second end of the first hole structure 3 is connected to the second end of the second hole structure 4. The maximum dimension of the second end of the first hole structure 3 is smaller than the maximum dimension of the first end of the first hole structure 3, that is, the dimension of the first hole structure 3 gradually decreases from the first end to the second end. It can be understood that the maximum dimension of the second end of the second hole structure 4 is smaller than the maximum dimension of the first end of the second hole structure 4, that is, the dimension of the second hole structure 4 gradually decreases from the first end to the second end, thereby having a smaller size in the middle of the through-hole structure and a larger size at both ends, and the through-hole structure is filled with a continuous conductive connector 2.

[0093] In one embodiment of the present disclosure, referring to FIG1 , the middle portion of the through-hole structure is smaller than the ends. It is understood that the orthographic projection of the first end of the first hole structure 3 on the glass substrate body 1 is larger than the orthographic projection of the second end of the first hole structure 3 on the glass substrate body 1, and the orthographic projection of the first end of the second hole structure 4 on the glass substrate body 1 is larger than the orthographic projection of the second end of the second hole structure 4 on the glass substrate body 1.

[0094] In one embodiment of the present disclosure, referring to FIG1 , the first hole structure 3 and the second hole structure 4 are connected to form a through-hole structure, that is, the second end of the first hole structure 3 is connected to the second end of the second hole structure 4. For example, the first hole structure 3 and the second hole structure 4 can be coaxial, and the second end of the first hole structure 3 can completely overlap with the second end of the second hole structure 4. For another example, the first hole structure 3 and the second hole structure 4 can be coaxial, and the second end of the first hole structure 3 can partially overlap and connect with the second end of the second hole structure 4, that is, the first hole structure 3 and the second hole structure 4 can be staggered.

[0095] In one embodiment of the present disclosure, as shown in FIG1 , the through-hole structure may be hourglass-shaped, with the middle dimension smaller than the ends. That is, the first hole structure 3 and the second hole structure 4 are coaxial, and the second end of the first hole structure 3 may overlap the second end of the second hole structure 4.

[0096] In one embodiment of the present disclosure, referring to FIG1 , the aspect ratio of any one of the first hole structure 3 and the second hole structure 4 is less than 5. The aspect ratio of the first hole structure 3 and the second hole structure 4 refers to the ratio of the distance between the first port and the second port to the maximum aperture of the first port, and the aspect ratio of the through-hole structure refers to the ratio of the distance between the first port of the first hole structure 3 and the first port of the second hole structure 4 to the maximum aperture of the first port of the first hole structure 3 (or the maximum aperture of the first port of the second hole structure 4, generally, the size of the first port of the second hole structure 4 is the same as the size of the first port of the first hole structure 3). In this way, the through-hole structure on the glass substrate body 1 can be manufactured in two steps, reducing the aspect ratio during the manufacturing process, reducing the manufacturing pressure of the through-hole structure and the pressure of preparing the conductive connector 2 in the hole. In this example, the aspect ratio of any one of the first hole structure 3 and the second hole structure 4 can be 4.9, 4.8, 4.7, 4.6, 4.5, 4.4, 4.3, 4.2, 4, 3.5, 3, 2.5, etc.

[0097] In one embodiment of the present disclosure, the aspect ratio of any one of the first hole structure 3 and the second hole structure 4 is not greater than 4. In this way, when the aspect ratio of the first hole structure 3 is not greater than 4, in the process of preparing the conductive connector 2 in the first hole structure 3, the problem of excessive stress caused by the excessive volume of copper filled in the blind hole can be effectively improved. At the same time, by reducing the aspect ratio of the blind hole, the difficulty of subsequent deep hole electroplating and filling copper is reduced. At the same time, the reduction in stress can avoid the glass substrate body 1 from breaking and failing during the process (when the aspect ratio of the first hole structure 3 is not greater than 4, when copper is filled in the first hole structure 3, the stress on the glass substrate body 1 is not greater than the stress on the glass substrate body 1 filled with copper in the through-hole structure). And the present disclosure can adopt a thicker glass substrate body 1 to avoid the warping problem in the process of making the glass substrate body 1 in one hole. The aspect ratio of the second hole structure 4 is not greater than 4 for the same reason.

[0098] In one embodiment of the present disclosure, the aspect ratio of at least one of the first hole structure 3 and the second hole structure 4 is not less than 2.5. This ensures that the apertures of the first hole structure 3 and the second hole structure 4 are within a certain range, does not interfere with the fabrication of other functional layers on the conductive structure, and ensures the performance and reliability of the device.

[0099] In one disclosed embodiment of the present disclosure, the first hole structure 3 and the second hole structure 4 have the same aspect ratio. In this way, when preparing the conductive connector 2, the stresses exerted on the first surface and the second surface of the glass substrate body 1 can be basically equal, thereby ensuring the performance and reliability of the device.

[0100] In one embodiment of the present disclosure, referring to FIG19 , the aspect ratio of the first hole structure 3 can be greater than the aspect ratio of the second hole structure 4. It is understood that when the aspect ratio of the first hole structure 3 is greater than the aspect ratio of the second hole structure 4, firstly, the maximum pore diameters of the first hole structure 3 and the second hole structure 4 are equal, and the depth of the first hole structure 3 is greater than the depth of the second hole structure 4; secondly, the depths of the first hole structure 3 and the second hole structure 4 are equal, and the maximum pore diameter of the first hole structure 3 is smaller than the maximum pore diameter of the second hole structure 4. In this way, the aspect ratio of the second hole structure 4 can be further reduced by appropriately adjusting the maximum pore diameter of the second hole structure 4; and thirdly, the maximum pore diameters and depths of the first hole structure 3 and the second hole structure 4 are not equal.

[0101] In one embodiment of the present disclosure, referring to FIG1 , the depth of the first hole structure 3 is less than the depth of the second hole structure 4. A relatively complex wiring structure can be provided on the first surface of the glass substrate body 1. In this case, the maximum aperture of the first hole structure 3 is significantly limited by the wiring structure on the first surface. In this case, the depth of the first hole structure 3 can be reduced to lower the aspect ratio. A relatively simple wiring structure can be provided on the second surface of the glass substrate body 1. In this case, the maximum aperture of the second hole structure 4 is less limited by the wiring structure on the second surface. In this case, the maximum aperture of the second hole structure 4 can be increased to lower the aspect ratio.

[0102] In one embodiment of the present disclosure, referring to FIG1 , a conductive connector 2 electrically connects the structure on the first surface and the structure on the second surface of the glass substrate body 1. In this example, the conductive connector 2 may include a first conductive layer and a second conductive layer. The first conductive layer is attached to the inner wall of the through-hole structure and extends through the entire through-hole structure along the extension direction of the through-hole structure. The second conductive layer is attached to the inner wall of the first conductive layer and extends through the entire through-hole structure along the extension direction of the through-hole structure. In this way, electrical conduction between the first and second surfaces of the glass substrate body 1 is ensured.

[0103] In one embodiment of the present disclosure, the material of the first conductive layer includes titanium. For example, the material of the first conductive layer may be titanium, wherein the thickness of Ti (titanium) may be 50 to 150 nm.

[0104] In one embodiment of the present disclosure, the material of the second conductive layer includes copper. For example, the material of the second conductive layer may be copper, wherein the thickness of Cu (copper) may be 200 to 500 nm.

[0105] In one disclosed embodiment of the present disclosure, the second conductive layer may surround a cavity of the through-via structure, wherein the cavity is filled with a conductive filling structure, which may further ensure the performance and reliability of the device.

[0106] In one embodiment of the present disclosure, the conductive filling structure completely fills the cavity surrounded by the second conductive layer, thereby making the conductive performance of the device more stable. In this example, the conductive filling structure can be made of copper. In other examples, the conductive filling structure can also be made of other metal materials.

[0107] In one disclosed embodiment of the present disclosure, referring to FIG18 , the conductive filling structure includes a copper filling layer formed on the inner wall of the second conductive layer, and resin 7 located within a cavity surrounded by the copper filling layer. The cavity extends through the entire through-hole structure, with both ends of the resin exposed to the first and second surfaces of the glass substrate body 1, respectively. This ensures stable conductive performance while reducing costs. In FIG18 , a first conductive layer, a second conductive layer, and a copper filling layer are sequentially disposed between the resin 7 and the inner wall of the through-hole structure, with the first conductive layer attached to the inner wall of the through-hole structure.

[0108] In one embodiment of the present disclosure, referring to FIG1 , the first hole structure 3 of the through-hole structure can be an inverted truncated cone, and the second hole structure 4 can be an upright truncated cone. In other embodiments, the first hole structure 3 and the second hole structure 4 of the through-hole structure can also be other structures, as long as the maximum dimension of the second port is smaller than the maximum dimension of the first port.

[0109] In one embodiment of the present disclosure, referring to FIG. 1 , the glass substrate body 1 may have multiple through-hole structures, and the shapes of the multiple through-hole structures may be the same or different. In this example, there are two through-hole structures.

[0110] In one disclosed embodiment of the present disclosure, the aperture of the second surface of the glass substrate body 1 can be larger than the aperture of the first surface of the glass substrate body 1. Because the film layer located on the second surface generally has relatively fewer metal traces, the size of the opening on the second surface can be relatively enlarged, which can further reduce the corresponding aspect ratio and reduce the difficulty of the manufacturing process.

[0111] In one embodiment of the present disclosure, the method for preparing the conductive structure may include the following steps:

[0112] S01. Preliminary preparation;

[0113] S02, preparing a first blind hole on the first surface of the glass substrate body 1;

[0114] S03, preparing a second blind hole on the second surface of the glass substrate body 1 until the first blind hole and the second blind hole are connected to form a through-hole structure;

[0115] S04. Forming a conductive connecting member 2 in the through-hole structure.

[0116] In the present disclosure, the specific structure and preparation steps of the conductive structure are changed. While the aperture size on the surface of the glass substrate body 1 remains unchanged, the original single-shot hole making process can be changed to a double-shot hole making process, thereby changing the aspect ratio of the single-shot hole making process. In this way, a through-hole structure on the glass substrate body 1 is produced by the double-shot hole making process, which reduces the aspect ratio of each hole opening, reduces the process difficulty, improves the coverage rate of the conductive connector 2 in the hole, and reduces the pressure of preparing the copper filling in the hole.

[0117] In one embodiment of the present disclosure, S01 preliminary preparation specifically includes the following steps:

[0118] S001 , cleaning the glass substrate body 1 ; for example, using cleaning agents such as acetone, isopropyl alcohol (IPA), and deionized water, and adopting methods such as ultrasonic cleaning and QDR (quick drain rinse) to clean the glass substrate body 1 .

[0119] S002, drying the glass substrate body 1; for example, an oven or other equipment may be used for baking to ensure that the glass substrate body 1 is clean and dry before being put into the process.

[0120] In one embodiment of the present disclosure, the first blind hole and the second blind hole can be prepared by laser modification and wet etching. Specifically, first, a laser modification device is used to set certain relevant parameters to modify the first surface or the second surface of the glass substrate body 1; secondly, the modified glass substrate body 1 is placed in hydrofluoric acid (HF) for etching, and the glass substrate body 1 is etched to a predetermined depth and size by utilizing the difference in etching rate after modification, thereby preparing the first blind hole on the first surface of the glass substrate body 1 or the second blind hole on the second surface of the glass substrate body 1. It is understandable that in other embodiments, other methods can also be used to prepare the first blind hole and the second blind hole. The present disclosure uses laser to modify the corresponding position of the glass substrate body 1, and then etches the glass substrate body 1 by acid. Since the etching rate of the modified glass substrate body 1 is faster, a cavity can be opened in the glass substrate body 1, which facilitates the subsequent interconnection process. At the same time, the maximum aperture of the first hole structure 3 and the second hole structure 4 can be more accurately controlled, thereby obtaining a through-hole structure with higher precision. In other examples, the glass substrate body 1 may also be etched by alkali.

[0121] In one disclosed embodiment of the present disclosure, when a laser modification device is used to modify the first surface and the second surface of the glass substrate body 1, the laser focus of the two modifications is staggered along the direction of the through-hole structure, that is, when preparing the second hole structure 4, the laser focus is located above the bottom end of the first hole structure 3.

[0122] In one embodiment of the present disclosure, a deep-hole physical vapor deposition (PVD) process can be used to sputter the first conductive layer (Ti) and the second conductive layer (Cu) of the conductive connector 2 on the inner wall of the through-hole structure and the first surface of the glass substrate body 1 / the second surface of the glass substrate body 1, thereby forming a continuous metal layer. Thereafter, an electroplating process is used to fill the cavity surrounded by the second conductive layer with metal Cu. After electroplating, surface Cu is formed on the first surface of the glass substrate body 1 / the second surface of the glass substrate body 1, and the surface Cu can be removed using a chemical-mechanical polishing (CMP) process.

[0123] In one embodiment of the present disclosure, the conductive structure can also be prepared by the following method, as shown in FIG16 , including the following steps:

[0124] S01. Preliminary preparation;

[0125] S02, preparing a first blind hole on the first surface of the glass substrate body 1;

[0126] S03, preparing a first conductive portion 21 in the first blind hole;

[0127] S04, preparing a second blind hole on the second surface of the glass substrate body 1 until the first conductive portion 21 is exposed, wherein the first blind hole is connected to the second blind hole to form a through-hole structure;

[0128] S05. Prepare a second conductive portion 22 in the second blind hole, wherein the second conductive portion 22 is electrically connected to the first conductive portion 21 to form a conductive connector.

[0129] In one embodiment of the present disclosure, S01 preliminary preparation specifically includes the following steps:

[0130] S001 , cleaning the glass substrate body 1 ; for example, using cleaning agents such as acetone, isopropyl alcohol (IPA), and deionized water, and adopting methods such as ultrasonic cleaning and QDR (quick drain rinse) to clean the glass substrate body 1 .

[0131] S002, drying the glass substrate body 1; for example, an oven or other equipment may be used for baking to ensure that the glass substrate body 1 is clean and dry before being put into the process.

[0132] In one embodiment of the present disclosure, the first blind hole and the second blind hole can be prepared by laser modification and wet etching. Specifically, first, a laser modification device is used to set certain relevant parameters to modify the first surface or the second surface of the glass substrate body 1; secondly, the modified glass substrate body 1 is placed in hydrofluoric acid (HF) for etching, and the glass substrate body 1 is etched to a predetermined depth and size by utilizing the difference in etching rate after modification, thereby preparing the first blind hole on the first surface of the glass substrate body 1 or the second blind hole on the second surface of the glass substrate body 1. It is understandable that in other embodiments, other methods can also be used to prepare the first blind hole and the second blind hole. The present disclosure uses laser to modify the corresponding position of the glass substrate body 1, and then etches the glass substrate body 1 by acid. Since the etching rate of the modified glass substrate body 1 is faster, a cavity can be opened in the glass substrate body 1, which facilitates the subsequent interconnection process. At the same time, the maximum aperture of the first hole structure 3 and the second hole structure 4 can be more accurately controlled, thereby obtaining a through-hole structure with higher precision. In other examples, the glass substrate body 1 may also be etched by alkali.

[0133] In one disclosed embodiment of the present disclosure, when a laser modification device is used to modify the first surface and the second surface of the glass substrate body 1, the laser focus of the two modifications is staggered along the direction of the through-hole structure, that is, when preparing the second hole structure 4, the laser focus is located above the bottom end of the first hole structure 3.

[0134] In one embodiment of the present disclosure, a deep-hole physical vapor deposition (PVD) process can be used to sputter the first conductive layer (Ti) and the second conductive layer (Cu) of the conductive connector 2 on the inner wall of the through-hole structure and the first surface of the glass substrate body 1 / the second surface of the glass substrate body 1, thereby forming a continuous metal layer. Thereafter, an electroplating process is used to fill the cavity surrounded by the second conductive layer with metal Cu. After electroplating, surface Cu is formed on the first surface of the glass substrate body 1 / the second surface of the glass substrate body 1, and the surface Cu can be removed using a chemical-mechanical polishing (CMP) process.

[0135] In one embodiment of the present disclosure, the conductive connector 2 is formed in two steps. During the preparation, the continuity of the conductive connector 2 needs to be ensured.

[0136] The preparation method disclosed herein first changes the structure and preparation steps of the conductive structure. While the aperture size on the surface of the glass substrate body 1 remains unchanged, the original single-shot hole making is changed to a double-shot hole making process, and the aspect ratio of the single-shot hole making is changed. In this way, a through-hole structure on the glass substrate body 1 is produced by the double-shot hole making process, which reduces the aspect ratio of each hole opening, reduces the TGV production pressure, increases the coverage rate of the conductive connector 2 in the hole, and reduces the pressure of preparing the conductive connector 2 in the hole (electroplating copper filling).

[0137] Secondly, by changing the process sequence of hole making and preparing the conductive connector 2, the influence of process temperature changes experienced when preparing the conductive connector 2 can be reduced, thereby reducing the strain of the conductive connector 2 caused by thermal shock and avoiding the glass substrate body 1 from being broken and failing during the process.

[0138] Third, this preparation method can be said to be that blind holes are prepared on the first surface of the glass substrate body 1. After the conductive connector 2 is prepared first, blind holes are also prepared on the second surface of the glass substrate body 1. Based on this idea, the first blind hole and the first conductive portion 21 can be first prepared on the first surface of the thicker glass substrate body 1. Then, after the glass substrate body 1 is thinned, the second blind hole and the second conductive portion 22 can be prepared on the second surface. In this way, the problem of warping of the glass substrate body 1 caused by the one-time hole-making process can be avoided.

[0139] Fourth, the coverage rate of the conductive connector 2 in the through-hole structure can be improved. The process of filling the conductive connector 2 in the through-hole structure requires the production of the first conductive layer and the second conductive layer on the inner surface of the through-hole structure to achieve conductivity. However, the seed layer (the first conductive layer and the second conductive layer) at the smallest position of the through-hole structure in the related technology has a low coverage rate. The present disclosure uses the method of opening two blind holes, so that a higher coverage rate can be achieved each time the seed layer is produced. At the same time, it can reduce the pressure of the subsequent process of filling the conductive filling structure (copper) in the hole and reduce the risk of bubbles generated by filling copper in the hole during the electroplating process.

[0140] In general, the present invention reduces the aspect ratio of each hole opening process through two modifications and glass etching processes, which not only reduces the difficulty of laser modification, but also reduces the difficulty of PVD sputtering process, increases the coverage of the first conductive layer and the second conductive layer, and the reduction of hole depth can also reduce the difficulty of electroplating process.

[0141] It should be noted that although the steps of the conductive structure fabrication method disclosed herein are depicted in a specific order in the accompanying drawings, this does not require or imply that the steps must be performed in this specific order, or that all steps must be performed to achieve the desired results. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into a single step, and / or a single step may be broken down into multiple steps.

[0142] The present disclosure also proposes a second conductive structure, which includes a glass substrate body 1; wherein the glass substrate body 1 has a first surface and a second surface arranged opposite to each other, and the glass substrate body 1 has a through-hole structure connecting the first surface and the second surface; the through-hole structure includes a first hole structure 3 extending from the first surface to the interior of the glass substrate body 1 and gradually decreasing in size, and a second hole structure 4 extending from the second surface to the interior of the glass substrate body 1 and gradually decreasing in size; at least one of the first hole structure 3 and the second hole structure 4 has an aspect ratio that is not less than half of the aspect ratio of the through-hole structure; and the through-hole structure has a conductive connector 2 inside, which runs through the entire through-hole structure. In this way, the original one-time hole making is changed to two-time hole making, and the aspect ratio of the one-time hole making is changed. In this way, the through-hole structure on the glass substrate body 1 is made by the two-time hole making method, the aspect ratio of each hole opening is reduced, the TGV production pressure is reduced, the coverage rate of the conductive connector 2 in the hole is increased, and the pressure of preparing the conductive connector 2 in the hole (electroplating copper filling) is reduced.

[0143] In one disclosed embodiment of the present disclosure, the structure of the conductive connector 2 of the second conductive structure is the same as the structure of the conductive connector 2 of the first conductive structure.

[0144] In one disclosed embodiment of the present disclosure, the preparation method of the second conductive structure is the same as the preparation method of the first conductive structure.

[0145] In one embodiment of the present disclosure, the aspect ratio of the first hole structure 3 or the second hole structure 4 is greater than half of the aspect ratio of the through-hole structure. In this way, the first hole structure 3 and the second hole structure 4 can form a larger aspect ratio and a smaller aspect ratio. For example, the first surface of the glass substrate body 1 can be provided with a more complex wiring structure, and the second surface of the glass substrate body 1 can be provided with a simpler wiring structure. In this way, the aspect ratio of the first hole structure 3 and the second hole structure 4 can be appropriately adjusted according to the specific characteristics of the wiring structure (adjusting the maximum aperture of the first hole structure 3 and the maximum aperture of the second hole structure 4), thereby further controlling the aspect ratio.

[0146] The present disclosure also proposes an integrated device, see Figure 1, which includes the above-mentioned conductive structure, an upper functional layer 5 provided on the first surface of the glass substrate body 1 of the conductive structure, and a lower functional layer 6 provided on the second surface of the glass substrate body 1 of the conductive structure.

[0147] In one embodiment of the present disclosure, an integrated device and a preparation method thereof are introduced by taking an example in which a conductive structure is applied to a filter and a glass substrate body 1 has two through-hole structures.

[0148] The two through-hole structures are defined as a first through-hole structure and a second through-hole structure, and the conductive connecting members 2 in the through-hole structures are defined as a first conductive connecting member 2 and a second conductive connecting member 2 .

[0149] In one embodiment of the present disclosure, referring to FIG1 , the upper functional layer 5 may include a first insulating layer 51 , a first metal layer 52 , a second insulating layer 53 , a second metal layer 54 , a third insulating layer 55 , a third metal layer 56 , a fourth insulating layer 57 and two solder balls 58 . Specifically:

[0150] The first insulating layer 51 is provided on the first surface of the glass substrate body 1, and the first insulating layer 51 has two independent first vias exposing the first conductive connector 2 and the second conductive connector 2. The first metal layer 52 is provided on the first surface of the glass substrate body 1, and the first metal layer 52 has two first metal connection parts. The two first metal connection parts are electrically connected to the first conductive connector 2 and the second conductive connector 2 through two first vias respectively. In this example, the two metal connection parts can be respectively provided at the two first via hole areas.

[0151] The second insulating layer 53 is disposed on the side of the first insulating layer 51 facing away from the glass substrate body 1 and overlaps at least partially with the first metal connection portion connected to the second conductive connector 2. The second metal layer 54 is disposed on the side of the second insulating layer 53 facing away from the first metal layer 52. The second metal layer 54 has a second metal connection portion, at least partially overlapping with the first metal connection portion connected to the second conductive connector 2 to form a capacitor. The second insulating layer 53 completely isolates the first metal layer 52 from the second metal layer 54. In this example, the second insulating layer 53 may cover only the area of ​​the second metal layer 54 that requires insulation, or the second insulating layer 53 may cover the entire first insulating layer 51.

[0152] The third insulating layer 55 is arranged on the side of the second metal layer 54 away from the first metal layer 52. The third insulating layer 55 may have a second via exposing the second metal connection part, and may also have a third via exposing the first metal connection part connected to the first conductive connection 2. The third insulating layer 55 covers the second metal layer 54 outside the second via and the first metal layer 52 outside the third via.

[0153] The third metal layer 56 is arranged on the side of the third insulating layer 55 away from the second insulating layer 53. The third metal layer 56 has two isolated third metal connection parts, one of which is electrically connected to the first metal connection part and the first conductive connection part 2 in sequence through a third via to form an inductor, and the other third metal connection part is electrically connected to the second metal layer 54 through a second via.

[0154] The fourth insulating layer 57 is arranged on the side of the third metal layer 56 away from the first metal layer 52, and has two fourth vias exposing two third metal connection parts, one of the solder balls 58 is electrically connected to the third metal connection part, the first metal connection part and the first conductive connection part 2 in sequence through the fourth via, and the other solder ball 58 is electrically connected to the third metal connection part and the second metal connection part in sequence through the fourth via.

[0155] In one embodiment of the present disclosure, referring to FIG1 , the lower functional layer 6 may include a fourth metal layer 61 and a fifth insulating layer 62. The fourth metal layer 61 is disposed on the second surface of the glass substrate body 1, covers the two through-hole structures, and is electrically connected to the first conductive connector 2 and the second conductive connector 2. The fifth insulating layer 62 is disposed on a side of the fourth metal layer 61 facing away from the glass substrate body 1 and covers the fourth metal layer 61.

[0156] In one embodiment of the present disclosure, taking the filter thickness of 250 μm and the maximum aperture of the through-hole structure of 50 μm as an example, the preparation method of the integrated device (filter) can be to first make a hole on the first surface of the glass substrate body 1 without punching through the glass substrate body 1, and then make a portion of the upper functional layer 5 on the first surface, and then use an acid-proof film or the like to protect the first surface, and make a hole again on the second surface of the glass substrate body 1 so that the two holes are connected, and finally make the lower functional layer 6 on the second surface. In this way, by making the through-hole structure on the glass substrate body 1 by two glass etchings, the aspect ratio of each hole can be reduced, the process difficulty can be reduced, and the stress on the single-side surface of the glass substrate body 1 can be reduced. Referring to Figure 17, the preparation method specifically includes the following steps:

[0157] S01. Preliminary preparation;

[0158] S001, cleaning the glass substrate body 1; for example, selecting a glass substrate body 1 with a thickness of 0.5 to 0.7 mm, and using a cleaning agent such as acetone, isopropyl alcohol (IPA), and deionized water, and using ultrasonic cleaning, QDR (quick drain rinse), and other methods to clean the glass substrate body 1;

[0159] S002, drying the glass substrate body 1; for example, an oven or other equipment may be used for baking to ensure that the glass substrate body 1 is clean and dry before being put into the process;

[0160] S02, preparing a first blind hole and a first conductive portion 21 on the first surface of the glass substrate body 1;

[0161] S021. Modifying the first surface of the glass substrate body 1. For example, referring to FIG1 , a laser modification device can be used to modify the first surface of the glass substrate body 1 by setting certain relevant parameters. The relevant parameters are set to meet the requirements of a maximum hole size of 50 μm, a depth-to-width ratio greater than 2.5:1, and a depth-to-width ratio less than 4:1, that is, a drilling depth greater than 125 μm and less than 200 μm.

[0162] S022. Prepare a first blind hole on the first surface of the glass substrate body 1. For example, the modified glass substrate body 1 can be placed in hydrofluoric acid (HF) for etching. By utilizing the difference in etching rate after modification, the glass substrate body 1 is etched to a predetermined depth and size to form a first blind hole, as shown in FIG2 .

[0163] S023, preparing the first conductive portion 21, and filling the first blind hole of the glass substrate body 1 with the first conductive portion 21 to form the structure shown in FIG3;

[0164] In this example, the first conductive portion 21 (the layer structure of the first conductive portion 21 is the same as the layer structure of the conductive connector) in the first blind hole can be filled by electroplating metal, filling with conductive materials, etc., and can be filled entirely with metal copper, or can be filled with metal copper and resin 7, that is, after filling with metal copper, the middle part of the metal copper is filled with resin 7. In this example, the solution is described using the method of filling entirely with metal copper as an example:

[0165] The first conductive layer (Ti) and the second conductive layer (Cu) of the conductive connector 2 can be sputtered on the inner wall of the first blind hole and the first surface of the glass substrate body 1 using a deep hole physical vapor deposition (PVD) process, thereby forming a continuous metal layer. Then, the cavity surrounded by the second conductive layer is filled with metal Cu using an electroplating process to form the first conductive portion 21, wherein the thickness of Ti (titanium) is 50 to 150 nm and the thickness of Cu is 200 to 500 nm.

[0166] After electroplating, surface Cu is formed on the first surface of the glass substrate body 1, which can be removed by using a CMP (Chemical-Mechanical Planarization) process;

[0167] S03, referring to FIG. 4 to FIG. 10 , a functional layer 5 is partially formed on the first surface of the glass substrate body 1;

[0168] A patterned structure is completed on the first surface of the glass substrate body 1, that is, an upper functional layer 5 is prepared on the first surface of the glass substrate body 1. The upper functional layer 5 includes a first insulating layer 51, a first metal layer 52, a second insulating layer 53, a second metal layer 54, a third insulating layer 55, a third metal layer 56, and a fourth insulating layer 57. The thickness of the first metal layer 52 and the third metal layer 56 is 5 to 10 μm, and the material is electroplated Cu; the thickness of the second metal layer 54 is 0.3 μm, and the material can be Cu, Ti, Al, etc.; the thickness of the second insulating layer 53 is 0.1 to 2 μm, and the material can be SiOx, SiNx, etc.; the thickness of the first insulating layer 51, the third insulating layer 55, and the fourth insulating layer 57 are all greater than 2 μm, and the material is an organic resin 7, which can be polyimide, acrylic, etc.;

[0169] Specifically, a PI photoresist is spin-coated, exposed, and developed on the first surface of the glass substrate body 1 to pattern the PI photoresist to form a first insulating layer 51 having a first via hole. PVD sputtering is then performed, followed by electroplating to form a first metal layer 52. Finally, a CMP process is used to remove the metal protruding from the first insulating layer 51, leaving only the first metal layer 52 within the first via hole.

[0170] The second insulating layer 53 is formed by plasma-enhanced chemical vapor deposition (PECVD) or low-pressure chemical vapor deposition (LPCVD). Here, the second insulating layer 53 can also be SiOx, Al2O3, TaOx, etc., and is patterned by dry etching equipment. Then, Ti / Cu / Ti metal is sputtered by PVD as the second metal layer 54, which is the upper electrode of the capacitor, and the upper electrode is patterned by wet etching.

[0171] The third insulating layer 55 is formed by coating, exposing, developing, and curing, covering the lower film layer while exposing and opening holes to leave a channel for connection with the upper film layer. Then, the third metal layer 56 is formed by additive electroplating, using PVD to sputter a metal seed layer, followed by spin coating of photoresist, exposing, developing, electroplating, stripping, and wet etching.

[0172] The fourth insulating layer 57 is formed by steps such as coating, exposure, development, and curing, while leaving openings for subsequent preparation of solder balls 58;

[0173] S04, thinning;

[0174] The film layer on the first surface is protected by using an acid-proof film or bonding, and the second surface of the glass substrate body 1 is thinned;

[0175] The glass substrate body 1 is ground to the required thickness, while exposing the first conductive portion 21 in the first blind hole. In this example, the second surface of the glass substrate body 1 is thinned to 250 μm.

[0176] S05, referring to FIG11-FIG12, a second blind hole and a second conductive portion 22 are prepared on the second surface of the glass substrate body 1;

[0177] S051. Modifying the second surface of the glass substrate body 1. For example, a laser modification device may be used to modify the second surface of the glass substrate body 1 by setting certain relevant parameters. The relevant parameters must be set to ensure that the maximum hole size is 50 μm and the aspect ratio is sufficient to expose the first conductive portion 21. That is, during the modification, the laser focus area when making holes on the first surface and the laser focus area when making holes on the second surface partially overlap.

[0178] S052. Prepare a second blind hole on the second surface of the glass substrate body 1. For example, the modified glass substrate body 1 can be placed in hydrofluoric acid (HF) for etching. By utilizing the difference in etching rate after modification, the glass substrate body 1 is etched to a predetermined depth and size until the first conductive portion 21 is exposed, thereby forming a second blind hole. The first blind hole and the second blind hole are connected to form a through-hole structure.

[0179] S053, preparing the second conductive portion 22, and filling the second blind hole of the glass substrate body 1 with the second conductive portion 22;

[0180] The second conductive portion 22 can be filled in the second blind hole by electroplating metal or filling with conductive materials. The method for filling the second conductive portion 22 can be the same as the method for filling the first conductive portion 21. It can be filled entirely with copper metal, or it can be filled with copper metal and resin 7, that is, after filling with copper metal, the middle part of the copper metal is filled with resin 7. In this example, the solution is described by taking the method of filling entirely with metal materials as an example:

[0181] The first conductive layer (Ti) and the second conductive layer (Cu) of the conductive connector 2 can be sputtered on the inner wall of the second blind hole and the second surface of the glass substrate body 1 using a deep hole physical vapor deposition (PVD) process to form a continuous metal layer. Then, the cavity surrounded by the second conductive layer is filled with metal Cu using an electroplating process to form the second conductive portion 22, wherein the thickness of Ti (titanium) is 50 to 150 nm and the thickness of Cu is 200 to 500 nm. The first conductive portion 21 and the second conductive portion 22 are electrically connected to form a conductive connector.

[0182] After electroplating, surface Cu will be formed on the second surface of the glass substrate body 1, which can be removed by using a CMP (Chemical-Mechanical Planarization) process;

[0183] S06, referring to FIG13-FIG14, preparing a lower functional layer 6 on the second surface of the glass substrate body 1;

[0184] A patterned structure is formed on the second surface of the glass substrate body 1, i.e., a lower functional layer 6 is formed. The lower functional layer 6 includes a fourth metal layer 61 and a fifth insulating layer 62. The fourth metal layer 61 is 5 to 10 μm thick and is made of electroplated Cu. The fifth insulating layer 62 is greater than 2 μm thick and is made of an organic resin 7, such as polyimide or acrylic.

[0185] Specifically, the fourth metal layer 61 is formed by an additive electroplating process. A metal seed layer is first prepared using a PVD process. A patterned optically visible pattern is produced through steps such as resist coating, exposure, and development. Subsequently, electroplating, resist stripping, and wet etching are performed to form the fourth metal layer 61. The fifth insulating layer 62 is formed by the same method. The dielectric layer is patterned through processes such as resist coating, exposure, and development. The fifth insulating layer 62 is then cured using a high-temperature process.

[0186] S07 , referring to FIG15 , prepare the remaining upper functional layer 5 , debond the first surface of the glass substrate body 1 , and perform a bonding process on the second surface of the glass substrate body 1 , and prepare solder balls 58 at the via holes of the fourth insulating layer 57 .

[0187] The first surface of the device is debonded, and the second surface is bonded. A seed layer is formed on the first surface of the fourth insulating layer 57 through a PVD process. Then, a bump photoresist is spin-coated, exposed, and developed. After that, Cu / Ni / SnAg (or Sn) metal plating is performed. Finally, the photoresist is removed through a stripping process, and a solder ball 58 is formed through a thermal reflow process.

[0188] The method for manufacturing the three-dimensional glass-based integrated LC filter proposed in this disclosure utilizes a two-step blind hole drilling method to change the device manufacturing sequence, particularly the TGV drilling and copper filling sequence. During the preparation of the upper functional layer 5, the copper volume within the hole is small (the volume of the metal in the upper half of the air is small), resulting in lower stress caused by thermal expansion, reducing the impact of process temperature changes experienced by the TGV-Cu, thereby reducing the strain of the TGV-Cu caused by thermal shock and preventing the glass substrate from breaking and failing during the process. At the same time, the blind holes can use thicker glass wafers to avoid warping problems in the single-step through-hole substrate process. Furthermore, the present disclosure reduces the aspect ratio of a single blind hole, lowers the single etching depth and electroplating depth, and reduces the difficulty of hole filling.

[0189] It should be noted that although the steps of the integrated device fabrication method disclosed herein are described in a specific order in the accompanying drawings, this does not require or imply that the steps must be performed in this specific order, or that all steps must be performed to achieve the desired result. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into one step, and / or a single step may be broken down into multiple steps.

[0190] The present disclosure also proposes another method for preparing an integrated device, which is to directly prepare an upper functional layer 5 and a lower functional layer 6 on a prepared conductive structure, wherein the conductive structure can adopt the above two methods.

[0191] In other embodiments of the present disclosure, the conductive structure may also be applied to other LC devices.

[0192] In other embodiments of the present disclosure, the integrated device may be an integrated passive device, or in other examples, an integrated active device.

[0193] In other embodiments of the present disclosure, thinning of the glass substrate body 1 may not be performed.

[0194] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art not disclosed herein. The description and examples are to be considered as exemplary only, with the true scope and spirit of the present disclosure being indicated by the appended claims.

Claims

1. A conductive structure, wherein: include: Glass substrate body; The glass substrate body has a first surface and a second surface disposed opposite to each other, and the glass substrate body has a through-hole structure connecting the first surface and the second surface; the through-hole structure includes a first hole structure extending from the first surface into the interior of the glass substrate body and gradually decreasing in size, and a second hole structure extending from the second surface into the interior of the glass substrate body and gradually decreasing in size; and an aspect ratio of either the first hole structure or the second hole structure is less than 5; The conductive connecting member is located in the through-hole structure and extends from the first surface to the second surface.

2. The conductive structure according to claim 1, wherein The aspect ratio of any one of the first hole structure and the second hole structure is not greater than 4.

3. The conductive structure according to claim 1 or 2, wherein: An aspect ratio of at least one of the first hole structure and the second hole structure is not less than 2.

5. The conductive structure according to claim 1 , wherein: The aspect ratios of the first hole structure and the second hole structure are equal; or, the aspect ratio of the first hole structure is greater than the aspect ratio of the second hole structure. The conductive structure according to claim 1 , wherein: The orthographic projection of the first port of the first hole structure on the glass substrate body is larger than the orthographic projection of the second port of the first hole structure on the glass substrate body; The orthographic projection of the first port of the second hole structure on the glass substrate body is larger than the orthographic projection of the second port of the second hole structure on the glass substrate body; The second port of the first hole structure coincides with the second port of the second hole structure. The conductive structure according to claim 1 , wherein: The first hole structure and the second hole structure are coaxial.

7. The conductive structure according to claim 1, wherein: The conductive connecting member includes a first conductive layer attached to the inner wall of the through-hole structure and passing through the through-hole structure, and a second conductive layer attached to the inner wall of the first conductive layer and passing through the through-hole structure.

8. The conductive structure according to claim 7, wherein: The material of the first conductive layer includes titanium, and the material of the second conductive layer includes copper.

9. The conductive structure according to claim 7, wherein: The conductive connecting member further includes a conductive filling structure filled in the middle of the second conductive layer.

10. The conductive structure according to claim 9, wherein: The conductive filling structure completely fills the cavity surrounded by the second conductive layer, and the conductive filling structure is made of copper.

11. The conductive structure according to claim 9, wherein: The conductive filling structure includes a copper filling layer formed on the inner wall of the second conductive layer, and a resin located in a cavity surrounded by the copper filling layer.

12. A conductive structure, wherein: include: Glass substrate body; The glass substrate body has a first surface and a second surface disposed opposite to each other, and the glass substrate body has a through-hole structure communicating with the first surface and the second surface; the through-hole structure includes a first hole structure extending from the first surface into the interior of the glass substrate body and gradually decreasing in size, and a second hole structure extending from the second surface into the interior of the glass substrate body and gradually decreasing in size; an aspect ratio of at least one of the first hole structure and the second hole structure is not less than half of the aspect ratio of the through-hole structure; The conductive connecting member is located in the through-hole structure and extends from the first surface to the second surface.

13. The conductive structure according to claim 12, wherein: The aspect ratio of the first hole structure or the second hole structure is greater than half of the aspect ratio of the through hole structure.

14. An integrated device, wherein: include: The conductive structure according to any one of claims 1 to 11; an upper functional layer, disposed on the first surface of the glass substrate body of the conductive structure, and the upper functional layer is electrically connected to the conductive connecting member of the conductive structure; The lower functional layer is disposed on the second surface of the glass substrate body, and the lower functional layer is electrically connected to the conductive connecting member.

15. The integrated device according to claim 14, wherein: The upper functional layer comprises a first insulating layer, a first metal layer, a second insulating layer, a second metal layer, a third insulating layer, a third metal layer, a fourth insulating layer and a plurality of solder balls stacked in sequence on the first surface of the glass substrate body; The first insulating layer has a first via hole exposing at least a portion of the conductive connection member, and the first metal layer is electrically connected to the conductive connection member through the first via hole; The second metal layer partially overlaps the first metal layer and is passed through the second insulating layer Insulated from each other to form a capacitive structure; The third insulating layer has a second via hole exposing at least a portion of the second metal layer, and the third metal layer is electrically connected to the second metal layer through the second via hole; The third insulating layer has a third via hole exposing at least a portion of the first metal layer, and the third metal layer is electrically connected to the first metal layer through the third via hole; The fourth insulating layer has a fourth via hole exposing at least a portion of the third metal layer, and the solder ball is electrically connected to the third metal layer through the fourth via hole.

16. The integrated device according to claim 14, wherein: The lower functional layer has a fourth metal layer and a fifth insulating layer; The fourth metal layer is disposed on the second surface of the glass substrate body and is electrically connected to the conductive connecting member; The fifth insulating layer is disposed on a side of the fourth metal layer away from the glass substrate body and covers the fourth metal layer.

17. A method for preparing the conductive structure according to any one of claims 1 to 11, wherein: include: Providing a glass substrate body; The glass substrate body has a first surface and a second surface disposed opposite to each other, and the glass substrate body has a through-hole structure connecting the first surface and the second surface; the through-hole structure includes a first hole structure extending from the first surface into the interior of the glass substrate body and gradually decreasing in size, and a second hole structure extending from the second surface into the interior of the glass substrate body and gradually decreasing in size; and an aspect ratio of either the first hole structure or the second hole structure is less than 5; A conductive connector is formed in the via structure, the conductive connector extending from the first surface to the second surface.

18. The method for preparing a conductive structure according to claim 17, wherein: The first pore structure and the second pore structure are formed by laser induction and wet etching.

19. A method for preparing the integrated device according to any one of claims 14 to 16, wherein: include: providing a conductive structure; The conductive structure includes: A glass substrate body; the glass substrate body has a first surface and a second surface arranged opposite to each other, and the glass substrate body has a through-hole structure connecting the first surface and the second surface; the through-hole structure includes a hole extending from the first surface to the interior of the glass substrate body a first hole structure having a gradually decreasing size, and a second hole structure extending from the second surface to the interior of the glass substrate body and having a gradually decreasing size; wherein the aspect ratio of either the first hole structure or the second hole structure is less than 5; a conductive connecting member, located in the through-hole structure and extending from the first surface to the second surface; preparing an upper functional layer on the first surface of the glass substrate body, wherein the upper functional layer is electrically connected to the conductive connecting member; A lower functional layer is prepared on the second surface of the glass substrate body, and the lower functional layer is electrically connected to the conductive connecting member.

20. A method for preparing the integrated device according to any one of claims 14 to 16, wherein: include: Prepare a first blind hole on the first surface of the glass substrate body; preparing a first conductive portion in the first blind hole; preparing an upper functional layer on the first surface of the glass substrate body; preparing a second blind hole on the second surface of the glass substrate body until the first conductive portion is exposed, wherein the first blind hole and the second blind hole are connected to form a through-hole structure; preparing a second conductive portion in the second blind hole, wherein the second conductive portion is electrically connected to the first conductive portion to form a conductive connector; A lower functional layer is prepared on the second surface of the glass substrate body.

21. The method for preparing an integrated device according to claim 20, wherein: Before forming the second blind hole on the second surface of the glass substrate body, the method further includes: The glass substrate body is thinned.

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