Multilayer ceramic capacitor
The multilayer ceramic capacitor achieves a high dielectric constant and improved life characteristics by controlling grain sizes and rare earth element content, addressing the trade-off in existing capacitors.
Patent Information
- Application Number
- PCT/JP2025/004953
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-03-28
- Filing Date
- 2025-02-14
- Publication Date
- 2025-10-02
AI Technical Summary
Existing multilayer ceramic capacitors face a trade-off between high relative permittivity and deteriorated life characteristics, where increasing the proportion of large grains reduces life characteristics, while increasing small grains lowers permittivity.
The multilayer ceramic capacitor is designed with dielectric layers containing barium titanate, having grain sizes within specific ranges (D1: 50-80 nm, D99: 190-250 nm) and a CV value of 40% or less, with rare earth elements in controlled amounts, to balance high dielectric constant and improved life characteristics.
The solution effectively suppresses deterioration in life characteristics and maintains a high relative dielectric constant, even with thin dielectric layers, by optimizing grain size distribution and rare earth element content.
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Figure JP2025004953_02102025_PF_FP_ABST
Abstract
Description
Multilayer ceramic capacitors
[0001] The present disclosure relates to multilayer ceramic capacitors.
[0002] In Japanese Patent Laid-Open No. 2010-52964 (Patent Document 1), the main component for a multilayer ceramic capacitor is BaTiO 3 The present invention discloses a dielectric ceramic having a grain size whose average value and standard deviation are within a specific range, with the aim of improving the life characteristics of a multilayer ceramic capacitor when the dielectric ceramic layers are thinned.
[0003] JP 2010-52964 A
[0004] In the dielectric ceramic described in Patent Document 1, if the proportion of large grains is high, the life characteristics of the multilayer ceramic capacitor may be reduced. On the other hand, if the proportion of small grains is increased in the dielectric ceramic, the relative permittivity of the dielectric tends to be reduced.
[0005] An object of the present disclosure is to provide a multilayer ceramic capacitor in which deterioration in life characteristics is suppressed and the relative dielectric constant of the dielectric is high.
[0006] A multilayer ceramic capacitor according to the present disclosure includes a plurality of dielectric layers and a plurality of internal electrode layers alternately stacked. The dielectric layers contain barium titanate as a main component. The dielectric layers have a thickness of 0.5 μm or less. The dielectric layers include a plurality of grains. In a particle size distribution of area-equivalent circle diameters measured from an SEM observation image of a cross section of the dielectric layer, the plurality of grains have a particle size D1 of 50 nm or more and less than 80 nm, and a particle size D99 of 190 nm or more and less than 250 nm, where D1 is the particle size corresponding to 1% of the total volume and D99 is the particle size corresponding to 99% of the total volume.
[0007] According to the present disclosure, it is possible to provide a multilayer ceramic capacitor in which the deterioration of life characteristics is suppressed and the relative dielectric constant of the dielectric is high.
[0008] 1 is a cross-sectional view illustrating an example of a multilayer ceramic capacitor as an embodiment of a multilayer electronic component according to the present disclosure, and is a cross-sectional view illustrating grains in a dielectric layer of the multilayer ceramic capacitor.
[0009] A multilayer ceramic capacitor according to the present disclosure will be described with reference to the drawings.
[0010] 1 is a cross-sectional view of a multilayer ceramic capacitor 100. The multilayer ceramic capacitor 100 includes a laminate 10. The laminate 10 includes a plurality of dielectric layers 11 and a plurality of internal electrode layers 12 stacked alternately.
[0011] The laminate 10 has a first main surface and a second main surface that face each other in the stacking direction, a first side surface and a second side surface that face each other in the width direction perpendicular to the stacking direction, and a first end face 13a and a second end face 13b that face each other in the length direction perpendicular to the stacking direction and the width direction.
[0012] The plurality of dielectric layers 11 have outer layer portions and inner layer portions. The outer layer portions are arranged between the first main surface of the laminate 10 and the internal electrode layer 12 closest to the first main surface, and between the second main surface and the internal electrode layer 12 closest to the second main surface. The inner layer portions are arranged in the region sandwiched between the two outer layer portions.
[0013] The thickness of the dielectric layer 11 is 0.5 μm or less. The thickness of the dielectric layer 11 may be, for example, 0.4 μm or less, 0.3 μm or less, or 0.2 μm or less. The thickness of the dielectric layer 11 may be, for example, 0.01 μm or more. The thickness of the dielectric layer 11 is the thickness of a single dielectric layer in the inner layer portion. The thickness of the dielectric layer 11 is measured in an image observed with a scanning electron microscope (hereinafter sometimes abbreviated as SEM) of a cross section of the laminate 10 in the stacking direction.
[0014] The dielectric layer 11 is made of barium titanate (BaTiO 3 The main component is the component that is contained in the largest amount by mass among the constituent components. 3 The content of may be, for example, 90 mass % or more, 95 mass % or more, or 99 mass % or more based on the total mass of the dielectric layer 11.
[0015] The dielectric layer 11 includes a plurality of grains. Grains are particles surrounded by grain boundaries and are also called crystal grains. Fig. 2 is a schematic diagram of an SEM observation image clearly showing the grain boundaries GB of grains G in a cross section in the lamination direction of the dielectric layer 11 disposed between two internal electrode layers 12. In Fig. 2, other dielectric layers and internal electrode layers stacked on the dielectric layer 11, as well as the external electrode side, are omitted from the illustration.
[0016] The plurality of grains are BaTiO 3 Perovskite-type compounds of the BaTiO series are included. 3 Examples of perovskite compounds in this system include BaTiO 3 , and BaTiO 3 Ba 2+ and Ti 4+ At least one of the following is Ca 2+ and Zr 4+ and those substituted with other ions such as:
[0017] In the particle size distribution of the area-equivalent circle diameter measured from an SEM image of the cross section of the dielectric layer, when the particle size at 1% cumulative volume is defined as D1 (hereinafter also referred to as the minimum grain diameter D1) and the particle size at 99% cumulative volume is defined as D99 (hereinafter also referred to as the maximum grain diameter D99), D1 is 50 nm or more and less than 80 nm, and D99 is 190 nm or more and less than 250 nm. In this specification, the particle size of a single grain refers to the diameter of a circle (hereinafter also referred to as the area-equivalent circle diameter) having an area equal to the cross section of the grain in an SEM image of the cross section of the dielectric layer 11 in the stacking direction. The SEM image of the cross section of the dielectric layer 11 in the stacking direction may be, for example, an image observed by an SEM at 30,000 magnifications. The cumulative particle size distribution of the multiple grains is determined from the particle sizes of 200 or more grains.
[0018] The dielectric constant of a dielectric tends to increase as the minimum grain diameter D1 increases. On the other hand, it has been found that the life characteristics of a multilayer ceramic capacitor tend to improve as the maximum grain diameter D99 decreases. A smaller maximum grain diameter D99 reduces the frequency of a state in which only one or two grains are sandwiched between adjacent internal electrodes in the thickness direction of the laminate, reducing the number of locations with extremely few grain boundaries, and thus improving the life characteristics of the multilayer ceramic capacitor. In the present invention, by ensuring that the minimum grain diameter D1 and the maximum grain diameter D99 are within the above ranges, deterioration in life characteristics is suppressed and a high dielectric constant tends to be exhibited, even when the dielectric layer 11 is a thin layer, such as 0.5 μm or less. D1 is preferably 70 nm or more. D99 is preferably 230 nm or less.
[0019] The grains may have a grain diameter D50 of 125 nm or more and less than 150 nm, where D50 is the particle size at 50% cumulative volumetric concentration in a particle size distribution of area-equivalent diameters measured from an SEM image of the cross section of the dielectric layer. The SEM image of the cross section of the dielectric layer may be, for example, an image obtained by observing the dielectric layer at a magnification of 30,000 times using an SEM. The dielectric constant of a dielectric tends to increase as the grain diameter D50 increases. On the other hand, it has been found that the life characteristics of a multilayer ceramic capacitor tend to improve as the grain diameter D50 decreases. It is presumed that a smaller grain diameter D50 increases the average number of grain boundaries per element thickness (thickness of the dielectric layer), and the increased number of grain boundaries inhibits the migration of oxygen vacancies, thereby delaying the decrease in insulation resistance IR. By ensuring that the grain diameter D50 is within the above range, the deterioration of the life characteristics of the multilayer ceramic capacitor is suppressed, and a high relative dielectric constant tends to be easily exhibited.
[0020] The CV value of the particle size of the plurality of grains is 40% or less. The CV value is calculated by the following formula: CV [%] = (σ / D) × 100, where D is the average particle size of the plurality of grains and σ is the standard deviation. The average particle size D and standard deviation σ of the plurality of grains are calculated from the particle sizes of 200 or more grains. When the CV value of the particle size of the plurality of grains is within the above range, deterioration in the life characteristics of the multilayer ceramic capacitor is suppressed, and a high dielectric constant tends to be easily exhibited.
[0021] The minimum grain diameter D1, the grain diameter D50, and the maximum grain diameter D99 are determined based on the starting material (e.g., BaTiO 3 The above range can be achieved by selecting the particle size of the powder, adjusting the rare earth content, and adjusting the firing temperature and temperature rise rate in the firing step of the method for producing a multilayer ceramic capacitor, which will be described later.
[0022] The minimum grain diameter D1 tends to be easily affected by the variation in particle size (particle size distribution) of the starting material. The smaller the variation in particle size of the starting material (the sharper the particle size distribution), the larger the minimum grain diameter D1 tends to be.
[0023] When the dielectric layer 11 further contains a rare earth element as described below, the grain diameter D50 tends to be easily affected by the average particle size of the starting material, the firing temperature, and the content of the rare earth element in the dielectric layer as described below. The grain diameter D50 tends to be larger as the starting average particle size increases, as the firing temperature increases, and as the rare earth content decreases. Furthermore, the grain diameter D50 tends to be smaller as the starting average particle size decreases, as the firing temperature decreases, and as the rare earth content increases.
[0024] The maximum grain diameter D99 tends to be easily affected by the variation in particle size (particle size distribution) of the starting material. The smaller the variation in particle size of the starting material (the sharper the particle size distribution), the smaller the maximum grain diameter D99 tends to be.
[0025] The dielectric layer 11 may further contain a rare earth element. The content of the rare earth element in the dielectric layer 11 is BaTiO 3 When the content of rare earth elements in the dielectric layer 11 is taken as 100 mol %, the content of the rare earth elements in the dielectric layer 11 is 0.5 mol % or more and 3.0 mol % or less. The content of the rare earth elements in the dielectric layer 11 can be determined from the compounding ratio of the starting materials. The content of the rare earth elements in the dielectric layer 11 can be quantified, for example, by X-ray fluorescence analysis (XRF) or inductively coupled plasma atomic emission spectroscopy (ICP-AES). The dielectric layer 11 may further contain at least one element selected from the group consisting of Si, Al, Mg, Mn, Ni, Fe, Cu, and V.
[0026] The dielectric constant tends to increase as the content of rare earth elements in the dielectric layer 11 decreases. This is thought to be because, when the content of rare earth elements in the dielectric layer 11 increases, the rare earth elements that are not dissolved in the particles are present in large amounts at the grain boundaries, inhibiting grain growth and facilitating the formation of low-dielectric-constant phases. On the other hand, the average life tends to improve as the amount of rare earth increases. This is thought to be because the rare earth elements in the dielectric layer 11 are dissolved in the particles, inhibiting the migration of oxygen vacancies and delaying the decrease in IR. When the content of rare earth elements in the dielectric layer 11 is within the above range, the decrease in the life characteristics of the multilayer ceramic capacitor is suppressed, and a high dielectric constant tends to be easily exhibited.
[0027] The plurality of grains may include a rare earth element. 3 When a perovskite-type compound of the system is included, BaTiO 3 The perovskite-type compound in this system is BaTiO 3 Ba in the crystal lattice of 2+ A part of the rare earth element ions Re 3+ The compound may be a perovskite-type compound substituted by
[0028] The rare earth element may include at least one selected from the group consisting of scandium (Sc), yttrium (Y), lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), promethium (Pm), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), and lutetium (Lu). The rare earth element preferably includes at least one selected from the group consisting of Dy, Y, Gd, Tb, Ho, and Er, and more preferably includes Dy.
[0029] The multiple internal electrode layers 12 include a first internal electrode layer 12a and a second internal electrode layer 12b. The first internal electrode layer 12a has a counter electrode portion facing the second internal electrode layer 12b with the dielectric layer 11 interposed therebetween, and a lead electrode portion extending from the counter electrode portion to the first end face 13a of the laminate 10. The second internal electrode layer 12b has a counter electrode portion facing the first internal electrode layer 12a with the dielectric layer 11 interposed therebetween, and a lead electrode portion extending from the counter electrode portion to the second end face 13b of the laminate 10.
[0030] A single capacitor is formed by the first internal electrode layer 12a and the second internal electrode layer 12b facing each other via the dielectric layer 11. The multilayer ceramic capacitor 100 can be said to be a plurality of capacitors connected in parallel via first external electrodes 14a and second external electrodes 14b, which will be described later.
[0031] The internal electrode layers 12 contain a conductive material. Examples of the conductive material constituting the internal electrode layers 12 include at least one metal selected from Ni, Cu, Ag, Pd, etc., or an alloy containing such a metal. The internal electrode layers 12 may further contain Sn.
[0032] The thickness of the internal electrode layer 12 may be, for example, 0.4 μm or less. The thickness of the internal electrode layer 12 may be, for example, 0.01 μm or more. The thickness of the internal electrode layer 12 is the thickness of a single internal electrode layer. The thickness of the internal electrode layer 12 is measured in an SEM observation image of a cross section of the laminate 10 in the stacking direction.
[0033] The multilayer ceramic capacitor 100 further includes a first external electrode 14a and a second external electrode 14b. The first external electrode 14a is formed on a first end face 13a of the laminate 10 so as to be electrically connected to the first internal electrode layer 12a. The first external electrode 14a extends from the first end face 13a to the first and second main faces and the first and second side faces. The second external electrode 14b is formed on a second end face 13b of the laminate 10 so as to be electrically connected to the second internal electrode layer 12b. The second external electrode 14b extends from the second end face 13b to the first and second main faces and the first and second side faces.
[0034] The first external electrode 14 a and the second external electrode 14 b each have, for example, a base electrode layer and a plating layer disposed on the base electrode layer. The base electrode layer includes, for example, at least one selected from a sintered body layer, a conductive resin layer, and a metal thin film layer.
[0035] The sintered body layer is formed by baking a paste containing glass powder and metal powder, and includes a glass portion and a metal portion. 2 O 3 -SiO 2 Examples of the metal portion include BaO-based glasses. Examples of the metal constituting the metal portion include at least one selected from Ni, Cu, and Ag, or alloys containing such metals. The sintered body layer may be formed of multiple layers made of different components. In addition, in the manufacturing method described below, the sintered body layer may be fired simultaneously with the laminate 10, or may be baked after the laminate 10 has been fired.
[0036] The conductive resin layer includes conductive particles, such as metal fine particles, and a resin portion. The metal fine particles may include at least one selected from Ni, Cu, Ag, etc., or an alloy containing such a metal. The resin portion may include an epoxy-based thermosetting resin. The conductive resin layer may be formed of multiple layers made of different components.
[0037] The metal thin film layer is a layer of metal fine particles deposited to a thickness of 1 μm or less, formed by a thin film formation method such as sputtering or vapor deposition. The metal constituting the metal thin film layer may be at least one selected from Ni, Cu, Ag, Au, etc., or an alloy containing such a metal. The metal thin film layer may be formed of multiple layers made of different components.
[0038] The metal constituting the plating layer may be at least one selected from the group consisting of Ni, Cu, Ag, Au, Sn, etc., or an alloy containing such a metal. The plating layer may be formed of a plurality of layers made of different components.
[0039] The first external electrode 14a and the second external electrode 14b may each be a plated layer that is provided directly on the laminate 10 and directly connected to the corresponding internal electrode layer described above.
[0040] The multilayer ceramic capacitor of the present disclosure may be a two-terminal capacitor as shown in Fig. 1. Alternatively, the multilayer ceramic capacitor of the present disclosure may be a three-terminal capacitor. While the two-terminal capacitor has a configuration in which the first internal electrode layer 12a is exposed at the first end face 13a and the second internal electrode layer 12b is exposed at the second end face 13b, the three-terminal capacitor has a configuration in which the first internal electrode layer 12a is exposed at the first end face 13a and the second end face 13b and the second internal electrode layer 12b is exposed at the first side face and the second side face, and further has a third external electrode and a fourth external electrode attached to the side faces of the laminate.
[0041] <Method for manufacturing multilayer ceramic capacitor> The method for manufacturing the multilayer ceramic capacitor 100 includes a step of stacking a plurality of pre-fired dielectric sheets, including a pre-fired dielectric sheet on which an internal electrode pattern is formed, to obtain a pre-fired laminate (hereinafter also referred to as a lamination step), and a step of sintering the pre-fired laminate to obtain a laminate in which a plurality of dielectric layers 11 and a plurality of internal electrode layers 12 are alternately stacked (hereinafter also referred to as a firing step).
[0042] The pre-fired dielectric sheet used in the lamination process is produced as follows: First, a slurry for forming the dielectric layer is prepared. Specifically, BaTiO 3The powder containing the additive, the binder, the solvent, etc. are mixed in a predetermined ratio to form a slurry for forming the dielectric layer. As described above, the starting material can be one having a small variation in particle size (a sharp particle size distribution). The starting material (BaTiO 3 The powder (powder mixed with the additive) may have an average particle size of, for example, 120 nm and a particle size CV value of, for example, 15%.
[0043] Next, the dielectric layer forming slurry is formed into a sheet on a carrier film using a die coater, gravure coater, microgravure coater, or the like, to form a pre-fired dielectric sheet.
[0044] Next, a mother sheet is formed. Specifically, a conductive paste is printed in a predetermined pattern on the pre-fired dielectric sheet using a screen printing method, a gravure printing method, or the like, to form a mother sheet having the predetermined conductive pattern on the pre-fired dielectric sheet.
[0045] As the mother sheet, in addition to the mother sheet having the conductive pattern, a pre-fired dielectric sheet having no conductive pattern formed thereon is also prepared.
[0046] Next, the mother sheets are stacked. Specifically, a predetermined number of mother sheets that do not have a conductive pattern and that constitute the outer layer portion are stacked, and then a plurality of mother sheets that have a conductive pattern and that constitute the inner layer portion are stacked in order on top of these, and then a predetermined number of mother sheets that do not have a conductive pattern and that constitute the outer layer portion are stacked on top of these, thereby forming a mother sheet group.
[0047] Next, the mother sheets are pressed together by a hydrostatic press or a rigid press in the stacking direction to form a mother laminate.
[0048] Next, the mother laminate is divided. Specifically, the mother laminate is divided into a matrix by press-cutting or dicing, and is divided into a plurality of pre-fired laminates. The pre-fired laminates may be subjected to barrel polishing.
[0049] In the firing step, the pre-fired laminate is fired. Specifically, the pre-fired laminate is heated to a predetermined temperature at a predetermined heating rate. The firing temperature is set appropriately depending on the type of starting material, and may be, for example, 1100°C or higher and 1300°C or lower. Heat treatment (annealing) may be performed after firing. The annealing temperature may be, for example, 900°C or higher and 1100°C or lower. As described above, the grain diameter in the dielectric layer can be adjusted, for example, by the firing temperature and heating rate in the firing step.
[0050] Next, after a base electrode layer is formed on the surface of the laminate, a plating layer is formed by electrolytic plating so as to cover the base electrode layer.
[0051] The multilayer ceramic capacitor 100 of the present disclosure is manufactured through the above series of steps.
[0052] [Measurement of Relative Dielectric Constant] The multilayer ceramic capacitor was left in an oven at 150°C for 60 minutes, and then removed from the oven. 24 hours later, the capacitance was measured (measurement voltage = 0.5 V, measurement frequency = 1 kHz, average value of n = 30). The multilayer ceramic capacitor was then polished at a 1 / 2LT cross section and a 1 / 2WT cross section, and the effective electrode length in the L direction and the effective electrode length in the W direction were determined (average value of n = 5 for each). This (effective electrode length in the L direction) x (effective electrode length in the W direction) was defined as the effective electrode. The center of the 1 / 2LT cross section was observed under an SEM to determine the thickness of the dielectric element (average value for 100 arbitrary locations). Furthermore, the relative dielectric constant of the dielectric was calculated using the number of effective elements. The results are shown in Table 1. In Table 1, a relative dielectric constant of less than 2500 is represented by x, a value of 2500 or more but less than 3300 is represented by ◯, and a value of 3300 or more is represented by ⊚.
[0053] [Evaluation of Life Characteristics] In a high temperature accelerated load test (HALT) in which a voltage of 6.3 V is applied at a temperature of 150° C., the LogIR was 1×10 6 The time when the MTTF was less than 10 hours was determined as the mean time to failure (MTTF). The results are shown in Table 1. An MTTF of less than 10 hours was evaluated as x, an MTTF of 10 hours or more but less than 30 hours was evaluated as ◯, and an MTTF of 30 hours or more was evaluated as ⊚.
[0054] [Grain Diameter Measurement] A multilayer ceramic capacitor was cut with nippers to expose a cross section, which was then photographed with a SEM at 30,000 magnification. Using analysis software ("Winroof" by Mitani Shoji Co., Ltd.), the circle-equivalent diameters of 200 or more grains were calculated from the SEM image. The grain diameter corresponding to 1% of the cumulative volume was defined as the minimum grain diameter D1, the grain diameter corresponding to 50% of the cumulative volume was defined as the grain diameter D50, and the grain diameter corresponding to 99% of the cumulative volume was defined as the maximum grain diameter D99. Furthermore, the average diameter D and standard deviation σ of the calculated circle-equivalent diameters were calculated, and the grain diameter CV value was calculated using the following formula: CV [%] = (σ / D) × 100. The results are shown in Table 1. In Table 1, the minimum grain diameter D1, grain diameter D50, maximum grain diameter D99, and grain diameter CV value are denoted as D1, D50, D99, and CV, respectively.
[0055] Comparative Example 1 A multilayer ceramic capacitor was fabricated in the following manner. First, a pre-sintered dielectric sheet was fabricated using a dielectric raw material powder. The dielectric raw material powder was BaTiO 3 BaTiO powder and Dy. 3 The powder prepared had a narrow particle size distribution width. The Dy content in the dielectric raw material powder was BaTiO 3 It was 1.5 mol % relative to 100 mol % of the powder.
[0056] Next, an internal electrode pattern was formed by printing a conductive paste for the internal electrodes on the pre-sintered dielectric sheets in a predetermined pattern. A predetermined number of pre-sintered dielectric sheets for the outer layers, each without an internal electrode pattern printed thereon, were stacked on top of these, followed by a predetermined number of pre-sintered dielectric sheets for the outer layers, resulting in a pre-sintered laminate with one effective layer and 100 pseudo layers. The pre-sintered laminate was pressed in the stacking direction using an isostatic press to produce a laminate block. The laminate block was cut to a predetermined size, and laminate chips were cut out. The corners and ridges of the laminate chip were rounded by barrel polishing. The laminate chip was sintered to produce a laminate. The sintering temperature was 1025°C, and the heating rate from the start of sintering to the sintering temperature was 25°C / sec. A conductive paste for the external electrodes was applied to both end surfaces of the laminate chip and baked to form a baked layer for the external electrodes. The surface of the baked layer was plated to obtain a multilayer ceramic capacitor. The dielectric layer had a thickness of 0.40 μm. The obtained multilayer ceramic capacitor was evaluated for life characteristics and relative dielectric constant of the dielectric, and the results are shown in Table 1.
[0057] <Examples 1 to 12 and Comparative Examples 2 to 4> Dielectric raw material powder (BaTiO 3 Multilayer ceramic capacitors were fabricated in the same manner as in Example 1, except that the average particle size and particle size CV value of the dielectric raw material powder (BaTiO 3 The powder) had an average particle size of 120 nm and a particle size CV value of 15%.
[0058]
[0059] As shown in Table 1, Examples 1 to 12 according to the present disclosure exhibited high dielectric constants and improved life characteristics. On the other hand, Comparative Examples 1 and 3 had large minimum grain diameters D1 and D99, resulting in no improvement in life characteristics. Furthermore, Comparative Examples 2 and 4 had small minimum grain diameters D1 and D99, resulting in low dielectric constants. It can be seen that the multilayer ceramic capacitor according to the present disclosure suppresses deterioration in life characteristics and has a high dielectric constant of the dielectric.
[0060] In the above-described embodiments, configurations that can be combined may be combined with each other.
[0061] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present invention is defined by the claims, not by the above description, and is intended to include all modifications within the meaning and scope of the claims.
[0062] It will be appreciated by those skilled in the art that the exemplary embodiments described above are examples of the following aspects.
[0063] (Item 1) A multilayer ceramic capacitor according to the present disclosure includes a plurality of dielectric layers and a plurality of internal electrode layers alternately stacked. The dielectric layers contain barium titanate as a main component. The dielectric layers have a thickness of 0.5 μm or less. The dielectric layers include a plurality of grains. In a particle size distribution of area-equivalent circle diameters measured from an SEM image of a cross section of the dielectric layer, the plurality of grains have a particle size D1 of 50 nm or more and less than 80 nm, and a particle size D99 of 190 nm or more and less than 250 nm, where D1 is the particle size corresponding to 1% of the total volume and D99 is the particle size corresponding to 99% of the total volume.
[0064] (Item 2) In the multilayer ceramic capacitor according to item 1, the CV value of the particle size of the plurality of grains is 40% or less.
[0065] (Item 3) In the multilayer ceramic capacitor according to item 1 or 2, the particle size of the plurality of grains is 125 nm or more and less than 150 nm, where D50 is the particle size at a cumulative 50% on a volume basis in a particle size distribution of area-equivalent circle diameters measured from an SEM observation image of a cross section of the dielectric layer.
[0066] (Item 4) In the multilayer ceramic capacitor according to any one of Items 1 to 3, the dielectric layers further contain a rare earth element. The content of the rare earth element in the dielectric layers is 0.5 mol % to 3.0 mol % when the content of the barium titanate in the dielectric layers is taken as 100 mol %.
[0067] (Item 5) In the multilayer ceramic capacitor according to item 4, the rare earth element contains at least one element selected from the group consisting of dysprosium, yttrium, gadolinium, terbium, holnium, and erbium.
[0068] (Item 6) In the multilayer ceramic capacitor according to item 5, the rare earth element includes dysprosium.
[0069] (7) In the multilayer ceramic capacitor according to any one of the first to sixth aspects, the thickness of the internal electrode layers is 0.4 μm or less.
[0070] 100 Multilayer ceramic capacitor, 10 Laminate, 11 Dielectric layer, 12 Internal electrode layer, 12a First internal electrode layer, 12b Second internal electrode layer, 13a First end face, 13b Second end face, 14a First external electrode, 14b Second external electrode, G Grain, GB Grain boundary.
Claims
1. A multilayer ceramic capacitor in which a plurality of dielectric layers and a plurality of internal electrode layers are alternately laminated, the dielectric layers containing barium titanate as a main component, the thickness of the dielectric layers being 0.5 μm or less, the dielectric layers containing a plurality of grains, the plurality of grains having a particle size distribution of area-equivalent circle diameters measured from an SEM observation image of a cross section of the dielectric layer, where D1 is the particle size at 1% cumulative on a volume basis and D99 is the particle size at 99% cumulative on a volume basis, D1 is 50 nm or more and less than 80 nm, and D99 is 190 nm or more and less than 250 nm.
2. The multilayer ceramic capacitor according to claim 1, wherein the CV value of the particle size of the plurality of grains is 40% or less.
3. The multilayer ceramic capacitor according to claim 1 or 2, wherein the plurality of grains have a D50 of 125 nm or more but less than 150 nm, where D50 is the particle size at a cumulative 50% on a volume basis in a particle size distribution of equivalent circle diameters in area measured from an SEM observation image of a cross section of the dielectric layer.
4. The multilayer ceramic capacitor according to any one of claims 1 to 3, wherein the dielectric layers further contain a rare earth element, and the content of the rare earth element in the dielectric layers is 0.5 mol % or more and 3.0 mol % or less, when the content of the barium titanate in the dielectric layers is 100 mol %.
5. The multilayer ceramic capacitor according to claim 4, wherein the rare earth element includes at least one element selected from the group consisting of dysprosium, yttrium, gadolinium, terbium, holnium, and erbium.
6. The multilayer ceramic capacitor according to claim 5, wherein the rare earth element includes dysprosium.
7. The multilayer ceramic capacitor according to any one of claims 1 to 6, wherein the thickness of the internal electrode layers is 0.4 μm or less.
Citation Information
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