Multilayer substrate, filter module, and communication device

Abstract

This multilayer substrate has a first circuit and a second circuit. The first circuit has a first land, a first via hole conductor connected to the first land, a pattern conductor connected to the first via hole conductor, and a second via hole conductor connected to the pattern conductor. In planar perspective, the distance between the second circuit and the second via hole conductor, the center of which is provided at a different position compared to the first via hole conductor, is greater than the distance between the second circuit and the first via hole conductor, which overlaps the first land.

Description

Multilayer substrates, filter modules and communication devices

[0001] The present disclosure relates to multilayer substrates and the like.

[0002] Conventionally, a circuit board configured with a multilayer substrate and electronic components mounted on the surface of the multilayer substrate has been known (see, for example, Patent Document 1). Patent Document 1 describes a technique for improving the connection reliability of joints in the circuit board.

[0003] Japanese Patent Application Publication No. 2005-123332

[0004] In order to solve the above-mentioned problems, a multilayer substrate according to one embodiment of the present disclosure is a multilayer substrate having a first circuit that is combined with a mounted component or that alone constitutes a first functional unit, and a second circuit that is adjacent to the first circuit and that is combined with the mounted component or that alone constitutes a second functional unit, wherein the first circuit has a first land configured to connect the mounted component, a first via-hole conductor connected to the first land, a pattern conductor connected to the first via-hole conductor, and a second via-hole conductor connected to the pattern conductor, wherein, in a planar perspective view, the first via-hole conductor overlaps the first land, the second via-hole conductor is located at a position different in center from the first via-hole conductor, and the distance between the second via-hole conductor and the second circuit is greater than the distance between the first via-hole conductor and the second circuit.

[0005] Fig. 1 is a plan view and a cross-sectional view schematically illustrating a configuration example of a multilayer substrate according to a first embodiment of the present disclosure; Fig. 2 is an exploded perspective view schematically illustrating a configuration example of a multilayer substrate according to a first embodiment of the present disclosure; Fig. 3 is a schematic diagram for explaining a configuration example of a filter module according to a second embodiment of the present disclosure; Fig. 4 is a schematic diagram for explaining a configuration example of a communication device according to a third embodiment of the present disclosure;

[0006] [Embodiment 1] In a multilayer board, when multiple circuits are formed in close proximity, there is a possibility that the functions of the multiple circuits may be hindered due to mutual interference, etc. A multilayer board that is less likely to cause such mutual interference (for example, that makes it easier to ensure isolation between circuits) is desired.

[0007] Hereinafter, a multilayer substrate according to an embodiment of the present disclosure will be described in detail with reference to the drawings. However, the following description is intended to provide a better understanding of the gist of the invention and does not limit the present disclosure unless otherwise specified. For the sake of convenience, the drawings referred to in the following description show only the main components necessary for explaining the embodiment in a simplified form, and for the sake of brevity, descriptions of well-known technical matters will be omitted as appropriate.

[0008] (Multilayer Substrate) FIG. 1 is a plan view and a cross-sectional view schematically illustrating an example of the configuration of a multilayer substrate of embodiment 1. FIG. 2 is an exploded perspective view schematically illustrating an example of the configuration of a multilayer substrate of embodiment 1. The view indicated by reference numeral 1001 in FIG. 1 is a plan view of multilayer substrate 1, the view indicated by reference numeral 1002 is a cross-sectional view taken along line IA-IA in the view indicated by reference numeral 1001, and the view indicated by reference numeral 1003 is a cross-sectional view taken along line IB-IB in the view indicated by reference numeral 1001. In FIG. 2, for clarity of illustration, a portion of the surface of a layer of interest in multilayer substrate 1 is schematically illustrated, which will be described in more detail below.

[0009] As shown in Figures 1 and 2, the multilayer substrate 1 of this embodiment has a first circuit C1 and a second circuit C2 adjacent to each other. The first circuit C1 and the second circuit C2 are each a multilayer circuit. The multilayer circuit includes a plurality of conductor wirings (pattern wirings) and a plurality of via-hole conductors. The specific configuration of the second circuit C2 is not particularly limited. Of the various parts of the multilayer substrate 1, Figures 1 and 2 illustrate only the structure related to the first circuit C1, and the other parts are not illustrated (an example of the structure related to the second circuit C2 is omitted).

[0010] In the following description, a Cartesian coordinate system (D1-D2-D3 coordinate system) shown in FIGS. 1 and 2 may be used. In the multilayer substrate 1, the first circuit C1 and the second circuit C2 are positioned side by side (adjacent) in the D1 direction. One end of the multilayer substrate 1 in the D1 direction is referred to as the first end EP1, and the other end of the multilayer substrate 1 in the D1 direction is referred to as the second end EP2. In this specification, the thickness direction of the multilayer substrate 1 is referred to as the D3 direction (third direction), and viewing the multilayer substrate 1 from the D3 direction is referred to as a plan view, and planar perspective from the D3 direction is simply referred to as "planar perspective." The D2 direction (second direction) is a direction perpendicular to the D1 and D3 directions.

[0011] In the Cartesian coordinate system (D1-D2-D3 coordinate system) shown in Figures 1 and 2, positive and negative directions may be defined for each direction. The direction from the second circuit C2 toward the first circuit C1 (toward the first end EP1) is defined as the positive direction of the D1 direction. The side of the multilayer substrate 1 on which components are mounted is defined as the upward direction, and the upward direction is defined as the positive direction of the D3 direction. The direction of the cross product of the vector in the D1 direction and the vector in the D3 direction is defined as the positive direction of the D2 direction.

[0012] In the multilayer substrate 1, the first circuit C1 may be combined with a mounted component or may form a first functional unit by itself. The second circuit C2 may be combined with a mounted component or may form a second functional unit by itself. In the example shown in FIGS. 1 and 2 , the first circuit C1 and the first component 11 are combined to form the first functional unit 10, and the second circuit C2 and the second component 21 are combined to form the second functional unit 20. The view indicated by reference numeral 1001 in FIG. 1 shows the first component 11 and the second component 21 in a see-through view. Specific examples of the first functional unit 10 and the second functional unit 20 are not particularly limited. For example, the first circuit C1 may be an LC filter, and the first component 11 may be a piezoelectric device including an acoustic wave resonator. In this case, the first functional unit 10 may be an LC hybrid SAW filter. The second functional unit 20 may be, for example, a filter different from the first functional unit 10.

[0013] The first circuit C1 has a first land LA1 configured to connect a mounted component, a first via-hole conductor VC1 connected to the first land LA1, a pattern conductor (first pattern conductor) PC1 connected to the first via-hole conductor VC1, and a second via-hole conductor VC2 connected to the pattern conductor PC1. In a planar perspective view of the multilayer substrate 1, the first via-hole conductor VC1 overlaps the first land LA1, and the second via-hole conductor VC2 is provided at a position different in center from that of the first via-hole conductor VC1. In the multilayer substrate 1, the distance between the second via-hole conductor VC2 and the second circuit C2 is greater than the distance between the first via-hole conductor VC1 and the second circuit C2.

[0014] As a result, in the multilayer substrate 1, the second via-hole conductor VC2 is located farther away from the second circuit C2 toward the first end EP1 than when the second via-hole conductor VC2 is provided continuously with the first via-hole conductor VC1 (i.e., overlapping in a planar perspective view). This effectively reduces the influence of the second via-hole conductor VC2 on the function of the second circuit C2 (or the second functional unit 20). Alternatively, it effectively reduces the influence of the second circuit C2 on the function of the first circuit C1 (or the first functional unit 10). This makes it possible to provide a multilayer substrate 1 that easily ensures isolation between the first circuit C1 and the second circuit C2.

[0015] Here, it is possible to calculate a specific value for the distance between the first via-hole conductor VC1 or the second via-hole conductor VC2 and the second circuit C2, i.e., to virtually set the outer edge of the second circuit C2 in a planar perspective, but the following relationship is sufficient for the multilayer substrate 1. That is, in the multilayer substrate 1, the first circuit C1 may be located on the first direction side (the positive side of the direction D1 shown in FIGS. 1 and 2 ) when viewed from the second circuit C2, and the second via-hole conductor VC2 may be located on the first direction side of the first via-hole conductor VC1 in a planar perspective (the positive side of the direction D1 shown in FIGS. 1 and 2 ). By achieving such a positional relationship, it is possible to easily achieve a multilayer substrate 1 in which the distance between the second via-hole conductor VC2 and the second circuit C2 is greater than the distance between the first via-hole conductor VC1 and the second circuit C2.

[0016] Furthermore, in the multilayer substrate 1, the pattern conductor PC1 may extend in the first direction (direction D1) from the first via-hole conductor VC1. In this case, one end (the second end EP2 side) of the pattern conductor PC1 extending in the first direction is connected to the first via-hole conductor VC1, and the other end (the first end EP1 side) is connected to the second via-hole conductor VC2. This allows the first via-hole conductor VC1 and the second via-hole conductor VC2 to be connected by the pattern conductor PC1 over the shortest distance. Therefore, the inductance of the multilayer substrate 1 can be reduced more effectively than when the pattern conductor PC1 is provided over a distance longer than the shortest distance.

[0017] Here, for example, as the length of the first via-hole conductor VC1 in the D3 direction becomes relatively larger, the reliability of the joint between the first component 11 and the first land LA1 may decrease for the following reason. That is, in the multilayer substrate 1 on which the first component 11 is mounted, when a thermal cycle is applied, thermal stress occurs in the first via-hole conductor VC1 connected to the first land LA1. This causes a load on the joint. When the length of the first via-hole conductor VC1 in the D3 direction is large (i.e., when the first via-hole conductor VC1 extends across multiple layers of the multilayer substrate 1), the thermal stress increases, and as a result, the load on the joint may also increase.

[0018] In contrast, in the multilayer substrate 1 of this embodiment, the length of the first via-hole conductor VC1 in the thickness direction (direction D3) may be 20% or less of the thickness of the multilayer substrate 1. This effectively improves the reliability of the joint (first joint) JP1 between the first component 11 and the first land LA1.

[0019] More specifically, the multilayer substrate 1 of the example shown in FIGS. 1 and 2 may have the following structure. The multilayer substrate 1 has multiple dielectric layers LD stacked in the thickness direction (D3 direction). The multiple dielectric layers LD include a first dielectric layer LD1 (located on the outermost layer on the positive side of the D3 direction) in contact with the first land LA1 and a second dielectric layer LD2 adjacent to the first dielectric layer LD1 across a first conductor layer L1 including a pattern conductor PC1. In the example shown in FIG. 1 , for clarity, the multiple dielectric layers LD and other elements in the multilayer substrate 1 are omitted as appropriate, and four dielectric layers LD are shown, including the first dielectric layer LD1 and the second dielectric layer LD2. In practice, the number of dielectric layers LD in the multilayer substrate 1 is not particularly limited. Furthermore, the multilayer substrate 1 may have a circuit configuration that includes the structure specified in the present disclosure, and other specific circuit configurations are not particularly limited. At least a portion of the first via-hole conductor VC1 may be located in a first via hole VH1 provided in the first dielectric layer LD1, and at least a portion of the second via-hole conductor VC2 may be located in a second via hole VH2 provided in the second dielectric layer LD2. The first via-hole conductor VC1 and the second via-hole conductor VC2 may each be a conductor that penetrates one dielectric layer LD, or may be an entire conductor that continuously penetrates multiple dielectric layers LD (extending in the D3 direction).

[0020] According to an embodiment serving as an example of the present disclosure, the first via-hole conductor VC1 may be located only in the first layer (first dielectric layer LD1) located on the component mounting surface side of the multilayer substrate 1, and at least a portion of the second via-hole conductor VC2 may be located in the second layer (second dielectric layer LD2) of the multilayer substrate 1. The second via-hole conductor VC2 may be connected to a via-hole conductor in a via hole provided in a dielectric layer LD below the second dielectric layer LD2. The second via-hole conductor VC2 may be connected to a pattern conductor located below the second dielectric layer LD2.

[0021] In the example shown in FIG. 1 , the multilayer substrate 1 has a rectangular shape in a planar view. While the external shape of the multilayer substrate 1 is not particularly limited, the multilayer substrate 1 has an outer peripheral edge E in a planar view. In the multilayer substrate 1, the second via hole conductor VC2 may be located closer to the outer peripheral edge E of the multilayer substrate 1 than the first via hole conductor VC1. More specifically, when the multilayer substrate 1 has multiple circuits including a first circuit C1 and a second circuit C2, the first circuit C1 may be located closest to the outer peripheral edge E among the multiple circuits. For example, in one configuration example, the positional relationship between the first circuit C1 and the second circuit C2 arranged in the D1 direction may be reversed from the example shown in FIG. 1 , and the multilayer substrate 1 of such a configuration example also achieves the above-described effects. However, while it is easy to ensure isolation between the first circuit C1 and the second circuit C2, there is a possibility that the first circuit C1 may interfere with another circuit. In contrast, when the first circuit C1 is located closer to the outer edge E than the second circuit C2, as in the example shown in Figure 1, it is easier to ensure isolation between the first circuit C1 and other circuits (including the second circuit C2).

[0022] FIG. 2 schematically shows the underside 11U of the first component 11 on which a plurality of pads PD are provided, the surface S1 of the first dielectric layer LD1 of the multilayer substrate 1, and the surface S2 of the second dielectric layer LD2.

[0023] In the multilayer substrate 1, the outer edge OE2 of the second via-hole conductor VC2 does not need to overlap the outer edge OE1 of the first via-hole conductor VC1 in a planar perspective view, which makes it easier to ensure isolation between the first circuit C1 and the second circuit C2 more reliably.

[0024] The multilayer substrate 1 may include a plurality of lands LA located on the surface S1 of the first dielectric layer LD1. In the example shown in Figures 1 and 2, seven lands LA are provided, and the seven lands LA include a second land LA2, a third land LA3, a fourth land LA4, and a fifth land LA5 aligned in the positive direction D2, and a sixth land LA6, a first land LA1, and a seventh land LA7 aligned in the positive direction D2 and positioned closer to the second end EP2 than the second to fifth lands LA2 to LA5.

[0025] The multilayer substrate 1 has seven first-layer via-hole conductors FVC connected to seven lands LA (first to seventh lands LA1 to LA7), respectively. The first via-hole conductor VC1 is one of the seven first-layer via-hole conductors FVC. The multilayer substrate 1 also has a plurality of pattern conductors PC located on the surface S2 of the second dielectric layer LD2, and six second-layer via-hole conductors SVC located in six via holes provided in the second dielectric layer LD2, respectively. The second via-hole conductor VC2 is one of the six second-layer via-hole conductors SVC.

[0026] In the multilayer substrate 1, the first-layer via-hole conductors FVC and the second-layer via-hole conductors SVC are connected by the pattern conductors PC, and in a planar perspective view, the first-layer via-hole conductors FVC (e.g., seven) do not overlap with the second-layer via-hole conductors SVC (e.g., six). This allows the length of the first-layer via-hole conductors FVC to be relatively short in the multilayer substrate 1. This further improves the reliability of the multiple joints between the pads PD and the lands LA in the first component 11.

[0027] [Embodiment 2] Figure 3 is a schematic diagram illustrating an example configuration of a filter module according to embodiment 2. The filter module 100 includes a multilayer substrate 1 according to one aspect of the present disclosure and a first component (first mounted component) 11 mounted on a first circuit C1. The first functional unit 10 may be a first filter FL1 that extracts signals in a predetermined frequency band. The first component 11 may be a piezoelectric device including an acoustic wave resonator. In the filter module 100, the multilayer substrate 1 and the first component 11 may be joined by solder, in which case the joint JP1 (see Figure 1) may be formed of solder.

[0028] In the example shown in FIG. 3 , the filter module 100 includes a second component (second mounted component) 21 mounted on the second circuit C2, and the second functional unit 20 may be a second filter FL2 different from the first filter FL1. The second component 21 may be a piezoelectric device including an acoustic wave resonator. The second filter FL2 may have, for example, a different passband from the first filter FL1. For example, the second filter FL2 has a different frequency terminal from the first filter FL1. Therefore, the circuit configuration of the second filter FL2 in the example shown in FIG. 3 is different from the circuit configuration of the first filter FL1. The filter module 100 may be, for example, a duplexer.

[0029] In the example of Figure 3, the first terminal T1 may be a terminal dedicated to the first filter FL1, and the second terminal T2 may be a terminal dedicated to the second filter FL2. The common terminal TCOM is a terminal different from the first terminal T1 and the second terminal T2. The common terminal TCOM may be a common terminal between the first filter FL1 and the second filter FL2. The first filter FL1 is connected to the common terminal TCOM and the first terminal T1. The second filter FL2 is connected to the common terminal TCOM and the second terminal T2.

[0030] 1 and 2 , the filter module 100 may include a multilayer substrate 1 and a first component 11 joined together, and the first via-hole conductor VC1, the pattern conductor PC1, and the second via-hole conductor VC2 may connect the acoustic wave resonator of the first component 11 to the ground G. The ground G may be located on the back surface side of the multilayer substrate 1. The second via-hole conductor VC2 may be directly connected to the ground G, or may be indirectly connected to the ground G via, for example, another via-hole conductor (a third via-hole conductor).

[0031] The filter module 100 may be mounted on a printed circuit board by bonding the back surface of the multilayer substrate 1 to the printed circuit board. The filter module 100 may be subjected to thermal cycles during the manufacturing process or in an operating environment. Heat may also be applied to remove the filter module 100 from the printed circuit board, and a repair test may be performed to anticipate such a situation. In the repair test, hot air at approximately 300°C is blown onto the filter module 100. When the joint between the filter module 100 and the printed circuit board is heated, the joint between the multilayer substrate 1 and the first component 11 is also heated. The filter module 100 of this embodiment includes the multilayer substrate 1 of the first embodiment, which not only ensures isolation between the first circuit C1 and the second circuit C2 but also effectively enhances the reliability of the joint between the multilayer substrate 1 and the first component 11.

[0032] [Embodiment 3] Fig. 4 is a schematic diagram illustrating an example configuration of a communication device according to embodiment 3. A communication device 900 according to this embodiment includes a filter module 100. The communication device 900 performs wireless communication using radio waves. The filter module 100 in the example of Fig. 4 includes a transmit filter 109 and a receive filter 111. As an example, the transmit filter 109 may be a first filter FL1, and the receive filter 111 may be a second filter FL2.

[0033] In the communication device 900, a transmission information signal TIS containing information to be transmitted may be modulated and frequency-raised (converted into a high-frequency signal having a carrier frequency) by an RF-IC (Radio Frequency-Integrated Circuit) 153, and converted into a transmission signal TS. A band-pass filter 155 may remove unnecessary components from the transmission signal TS that are not in the transmission passband. Next, the transmission signal TS after removing the unnecessary components may be amplified by an amplifier 157 and input to the transmission filter 109.

[0034] The transmission filter 109 may remove unnecessary components outside the transmission passband from the input transmission signal TS. The transmission filter 109 may output the transmission signal TS after the unnecessary components have been removed to the antenna 159 via the antenna terminal. As an example, the antenna terminal may be the above-mentioned common terminal TCOM. The antenna 159 may convert the transmission signal TS, which is an electrical signal input thereto, into radio waves as a wireless signal and transmit the radio waves to the outside of the communication device 900.

[0035] Furthermore, the antenna 159 may convert the received external radio waves into a received signal RS, which is an electrical signal, and input the received signal RS to the receive filter 111 via the antenna terminal. The receive filter 111 may remove unnecessary components outside the receive passband from the input received signal RS. The receive filter 111 may output the received signal RS after the unnecessary components have been removed to the amplifier 161. The output received signal RS may be amplified by the amplifier 161. The bandpass filter 163 may remove unnecessary components outside the receive passband from the amplified received signal RS. The received signal RS after the unnecessary components have been removed may be frequency-downgraded and demodulated by the RF-IC 153, and converted into a received information signal RIS.

[0036] The TIS and RIS may be low-frequency signals (baseband signals) containing appropriate information. For example, the TIS and RIS may be analog audio signals or digitized audio signals. The passband of the wireless signals may be set appropriately, for example, as long as they comply with any standard.

[0037] [Summary] A multilayer substrate in aspect 1 of the present disclosure is a multilayer substrate having a first circuit that is combined with a mounted component or that stands alone to form a first functional unit, and a second circuit that is adjacent to the first circuit and that is combined with a mounted component or that stands alone to form a second functional unit, wherein the first circuit has a first land configured to connect the mounted component, a first via-hole conductor connected to the first land, a pattern conductor connected to the first via-hole conductor, and a second via-hole conductor connected to the pattern conductor, wherein, in a planar perspective view, the first via-hole conductor overlaps the first land, the second via-hole conductor is located at a position with a center different from that of the first via-hole conductor, and the distance between the second via-hole conductor and the second circuit is greater than the distance between the first via-hole conductor and the second circuit.

[0038] In a multilayer substrate in aspect 2 of the present disclosure, in aspect 1, the first circuit is located on the first direction side of the second circuit, and in a planar perspective, the second via hole conductor is located on the first direction side of the first via hole conductor.

[0039] In a multilayer board in aspect 3 of the present disclosure, in aspects 1 or 2, the first circuit is located on the first direction side of the second circuit, and the pattern conductor extends in the first direction from the first via hole conductor.

[0040] In a multilayer substrate according to aspect 4 of the present disclosure, in any one of aspects 1 to 3, the length of the first via-hole conductor in the thickness direction of the multilayer substrate is 20% or less of the thickness of the multilayer substrate.

[0041] In a multilayer substrate in aspect 5 of the present disclosure, in any one of aspects 1 to 4, the multilayer substrate has a plurality of dielectric layers stacked in the thickness direction of the multilayer substrate, the plurality of dielectric layers including a first dielectric layer in contact with the first land and a second dielectric layer adjacent to the first dielectric layer via a first conductor layer including the pattern conductor, the first via hole conductor is located within a first via hole provided in the first dielectric layer, and at least a portion of the second via hole conductor is located within a second via hole provided in the second dielectric layer.

[0042] In a multilayer substrate according to a sixth aspect of the present disclosure, in any one of the first to fifth aspects, the second via-hole conductors are positioned closer to the outer periphery of the multilayer substrate than the first via-hole conductors.

[0043] In a multilayer substrate according to aspect 7 of the present disclosure, in any one of aspects 1 to 6, an outer edge of the second via-hole conductor does not overlap an outer edge of the first via-hole conductor in a planar perspective view.

[0044] A filter module in aspect 8 of the present disclosure includes a multilayer substrate in any one of aspects 1 to 7 and a first mounting component mounted on the first circuit, and the first functional unit is a first filter that extracts signals in a predetermined frequency band.

[0045] A filter module according to a ninth aspect of the present disclosure is the filter module of the eighth aspect, further comprising a second mounted component mounted on the second circuit, and the second functional unit being a second filter different from the first filter.

[0046] In a filter module according to a tenth aspect of the present disclosure, in addition to the eighth or ninth aspect, the first mounting component is a piezoelectric device including an acoustic wave resonator.

[0047] In a filter module according to an eleventh aspect of the present disclosure, in any one of the eighth to tenth aspects, the multilayer substrate and the first mounting component are joined by solder.

[0048] In a filter module according to aspect 12 of the present disclosure, in any one of aspects 8 to 11, the first via-hole conductor, the pattern conductor, and the second via-hole conductor connect the acoustic wave resonator to ground.

[0049] A communication device according to a thirteenth aspect of the present disclosure includes the filter module according to any one of the eighth to twelfth aspects.

[0050] [Additional Notes] The invention according to the present disclosure has been described above based on the drawings and embodiments. However, the invention according to the present disclosure is not limited to the above-described embodiments. In other words, the invention according to the present disclosure can be modified in various ways within the scope of the present disclosure, and embodiments obtained by appropriately combining the technical means disclosed in different embodiments are also included in the technical scope of the invention according to the present disclosure. In other words, it should be noted that a person skilled in the art would easily be able to make various modifications or corrections based on the present disclosure. It should also be noted that these modifications or corrections are included in the scope of the present disclosure.

[0051] REFERENCE SIGNS LIST 1 multilayer substrate 10 first functional section 11 first component (mounted component) 20 second functional section 21 second component (mounted component) 100 filter module 900 communication device C1 first circuit C2 second circuit LA1 first land LD dielectric layer LD1 first dielectric layer LD2 second dielectric layer PC1 pattern conductor VC1 first via hole conductor VC2 second via hole conductor

Claims

1. A multilayer substrate having a first circuit that is combined with a mounted component or that stands alone to form a first functional unit, and a second circuit that is adjacent to the first circuit and that is combined with a mounted component or that stands alone to form a second functional unit, wherein the first circuit has: a first land configured to connect the mounted component, a first via-hole conductor connected to the first land, a pattern conductor connected to the first via-hole conductor, and a second via-hole conductor connected to the pattern conductor, wherein, in a planar perspective view, the first via-hole conductor overlaps the first land, the second via-hole conductor is located at a position with a center different from that of the first via-hole conductor, and the distance between the second via-hole conductor and the second circuit is greater than the distance between the first via-hole conductor and the second circuit.

2. The multilayer board according to claim 1, wherein the first circuit is located on the first direction side of the second circuit, and in plan view, the second via hole conductor is located on the first direction side of the first via hole conductor.

3. A multilayer board according to claim 1 or 2, wherein the first circuit is located on the first direction side of the second circuit, and the pattern conductor extends in the first direction from the first via hole conductor.

4. The multilayer substrate according to any one of claims 1 to 3, wherein the length of the first via-hole conductor in the thickness direction of the multilayer substrate is 20% or less of the thickness of the multilayer substrate.

5. A multilayer substrate as claimed in any one of claims 1 to 4, having a plurality of dielectric layers stacked in a thickness direction of the multilayer substrate, the plurality of dielectric layers including a first dielectric layer in contact with the first land and a second dielectric layer adjacent to the first dielectric layer with a first conductor layer including the pattern conductor interposed therebetween, the first via hole conductor being located in a first via hole provided in the first dielectric layer, and at least a portion of the second via hole conductor being located in a second via hole provided in the second dielectric layer.

6. The multilayer substrate according to any one of claims 1 to 5, wherein the second via-hole conductors are located closer to the outer edge of the multilayer substrate than the first via-hole conductors.

7. The multilayer board according to any one of claims 1 to 6, wherein, in a planar perspective view, the outer edge of the second via-hole conductor does not overlap the outer edge of the first via-hole conductor.

8. A filter module comprising the multilayer substrate according to any one of claims 1 to 7 and a first mounted component mounted on the first circuit, wherein the first functional unit is a first filter that extracts signals in a predetermined frequency band.

9. The filter module according to claim 8, further comprising a second mounted component mounted on the second circuit, wherein the second functional unit is a second filter different from the first filter.

10. The filter module according to claim 8 or 9, wherein the first mounting component is a piezoelectric device including an elastic wave resonator.

11. The filter module according to any one of claims 8 to 10, wherein the multilayer substrate and the first mounting component are joined by soldering.

12. The filter module according to claim 10, wherein the first via-hole conductor, the pattern conductor, and the second via-hole conductor connect the acoustic wave resonator to ground.

13. A communications device comprising a filter module according to any one of claims 8 to 12.

Images