Resource allocation for two-stage control information

By signaling the second stage DCI resource allocation within the first stage in wireless communication systems, the complexity and blocking issues of two-stage DCI are mitigated, ensuring efficient and reliable transmission of control information.

WO2025233835A1PCT designated stage Publication Date: 2025-11-13NOKIA TECHNOLOGIES OY
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Patent Information

Application Number
PCT/IB2025/054736
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-05-10
Filing Date
2025-05-06
Publication Date
2025-11-13

AI Technical Summary

Technical Problem

The challenge in 5G and future wireless communication systems is the increased DCI payload size, particularly with the introduction of two-stage DCI, where the second stage's resource allocation is not efficiently signaled, leading to PDCCH blocking and complexity in decoding.

Method used

The proposed solution involves signaling the resource allocation for the second stage DCI within the first stage DCI, using flexible and independent resource allocation methods such as bitmaps, start & length, control indicator values, or PDCCH candidate indicators to minimize PDCCH blocking and reduce decoding complexity.

Benefits of technology

This approach enhances the probability of successful DCI transmission by reducing PDCCH blocking and simplifying the decoding process for two-stage DCI, ensuring reliable communication even with larger payloads.

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Abstract

A UE receives a PDCCH including a first stage DCI and a second stage DCI, where payload of the first stage DCI comprises an RA indicative of RA of the second stage DCI, where the RA of the second stage DCI comprises mapping for CCE(s) for the second stage DCI. The UE decodes the first stage DCI and determines the RA of the second stage DCI including the mapping for the CCE(s). The UE decodes the second stage DCI by using at least the determined RA including the mapping. A BS determine location of the first stage DCI in the PDCCH for DCI split into first and second stages, and determines location of the second stage DCI. The BS sends the PDCCH including the first stage and second stage DCI, where payload of the first stage DCI includes an RA indicative of RA of the second stage DCI.
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Description

Resource Allocation for Two-Stage Control Information RELATED APPLICATION

[0001] This application claims priority to FI Application No.20245585 filed May 10, 2024, which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0002] Examples of embodiments herein relate generally to wireless communication systems and, more specifically, relate to control information for such systems. BACKGROUND

[0003] In 5G (fifth generation) cellular systems, DCI (downlink control information) is used to convey control information from the base station (BS) to the user equipment (UE), which is a wireless and typically mobile device. The control channel is typically divided into multiple control channel elements (CCEs), each carrying a subset of the control information. These CCEs are then aggregated together to form a larger control channel resource for downlink control information (DCI) transmission.

[0004] The term Aggregation Level (AL) refers to the number of CCEs that are combined to form a larger control channel resource. This concept applies specifically to control channels used in DCI transmissions. The AL is an important parameter in DCI transmissions, as by combining multiple CCEs, the system can achieve higher DL control reliability.

[0005] There is a movement to increase the size of DCI, such as to use a two- stage (or “2-stage”) control system, where DCI is broken into two parts. While this might be useful, there are issues with how to find the second part once the first part has been found and decoded. BRIEF SUMMARY

[0006] This section is intended to include examples and is not intended to be limiting.

[0007] In an exemplary embodiment, a method is disclosed that includes receiving, by a user equipment, a physical downlink control channel comprising a first stagedownlink control information and a second stage downlink control information, where payload of the first stage downlink control information comprises a resource allocation indicative of resource allocation of the second stage downlink control information, where the resource allocation of the second stage downlink control information comprises mapping for one or more control channel elements for the second stage downlink control information; decoding, by the user equipment, the first stage downlink control information and determining the resource allocation of the second stage downlink control information including the mapping for the one or more control channel elements; and decoding, by the user equipment, the second stage downlink control information by using at least the determined resource allocation including the mapping for the one or more control channel elements.

[0008] An additional exemplary embodiment includes a computer program, comprising instructions for performing the method of the previous paragraph, when the computer program is run on an apparatus. The computer program according to this paragraph, wherein the computer program is a computer program product comprising a computer-readable medium bearing the instructions embodied therein for use with the apparatus. Another example is the computer program according to this paragraph, wherein the program is directly loadable into an internal memory of the apparatus.

[0009] An exemplary apparatus includes one or more processors and one or more memories storing instructions that, when executed by the one or more processors, cause the apparatus at least to perform: receiving a physical downlink control channel comprising a first stage downlink control information and a second stage downlink control information, where payload of the first stage downlink control information comprises a resource allocation indicative of resource allocation of the second stage downlink control information, where the resource allocation of the second stage downlink control information comprises mapping for one or more control channel elements for the second stage downlink control information; decoding the first stage downlink control information and determining the resource allocation of the second stage downlink control information including the mapping for the one or more control channel elements; and decoding the second stage downlink control information by using at least the determined resource allocation including the mapping for the one or more control channel elements.

[0010] An exemplary computer program product includes a computer-readable storage medium bearing instructions that, when executed by an apparatus, cause the apparatusto perform at least the following: receiving, by a user equipment, a physical downlink control channel comprising a first stage downlink control information and a second stage downlink control information, where payload of the first stage downlink control information comprises a resource allocation indicative of resource allocation of the second stage downlink control information, where the resource allocation of the second stage downlink control information comprises mapping for one or more control channel elements for the second stage downlink control information; decoding, by the user equipment, the first stage downlink control information and determining the resource allocation of the second stage downlink control information including the mapping for the one or more control channel elements; and decoding, by the user equipment, the second stage downlink control information by using at least the determined resource allocation including the mapping for the one or more control channel elements.

[0011] In another exemplary embodiment, an apparatus comprises means for: receiving a physical downlink control channel comprising a first stage downlink control information and a second stage downlink control information, where payload of the first stage downlink control information comprises a resource allocation indicative of resource allocation of the second stage downlink control information, where the resource allocation of the second stage downlink control information comprises mapping for one or more control channel elements for the second stage downlink control information; decoding the first stage downlink control information and determining the resource allocation of the second stage downlink control information including the mapping for the one or more control channel elements; and decoding the second stage downlink control information by using at least the determined resource allocation including the mapping for the one or more control channel elements.

[0012] In an exemplary embodiment, a method is disclosed that includes determining, by a base station, location of a first stage downlink control information in physical downlink control channel for a downlink control information that is split into first and second stages; determining, by the base station, location of a second stage downlink control information and corresponding resource allocation in the physical downlink control channel; and sending, by the base station to a user equipment, a physical downlink control channel comprising the first stage downlink control information and the second stage downlink control information, where payload of the first stage downlink control information comprises a resource allocation indicative of resource allocation of the second stage downlinkcontrol information, where the resource allocation of the second stage downlink control information comprises mapping for one or more control channel elements for the second stage downlink control information.

[0013] An additional exemplary embodiment includes a computer program, comprising instructions for performing the method of the previous paragraph, when the computer program is run on an apparatus. The computer program according to this paragraph, wherein the computer program is a computer program product comprising a computer-readable medium bearing the instructions embodied therein for use with the apparatus. Another example is the computer program according to this paragraph, wherein the program is directly loadable into an internal memory of the apparatus.

[0014] An exemplary apparatus includes one or more processors and one or more memories storing instructions that, when executed by the one or more processors, cause the apparatus at least to perform: determining location of a first stage downlink control information in physical downlink control channel for a downlink control information that is split into first and second stages; determining location of a second stage downlink control information and corresponding resource allocation in the physical downlink control channel; and sending, to a user equipment, a physical downlink control channel comprising the first stage downlink control information and the second stage downlink control information, where payload of the first stage downlink control information comprises a resource allocation indicative of resource allocation of the second stage downlink control information, where the resource allocation of the second stage downlink control information comprises mapping for one or more control channel elements for the second stage downlink control information.

[0015] An exemplary computer program product includes a computer-readable storage medium bearing instructions that, when executed by an apparatus, cause the apparatus to perform at least the following: determining, by a base station, location of a first stage downlink control information in physical downlink control channel for a downlink control information that is split into first and second stages; determining, by the base station, location of a second stage downlink control information and corresponding resource allocation in the physical downlink control channel; and sending, by the base station to a user equipment, a physical downlink control channel comprising the first stage downlink control information and the second stage downlink control information, where payload of the first stage downlink control information comprises a resource allocation indicative of resource allocation of the second stage downlink control information, where the resource allocation of the second stagedownlink control information comprises mapping for one or more control channel elements for the second stage downlink control information.

[0016] In another exemplary embodiment, an apparatus comprises means for: determining location of a first stage downlink control information in physical downlink control channel for a downlink control information that is split into first and second stages; determining location of a second stage downlink control information and corresponding resource allocation in the physical downlink control channel; and sending, to a user equipment, a physical downlink control channel comprising the first stage downlink control information and the second stage downlink control information, where payload of the first stage downlink control information comprises a resource allocation indicative of resource allocation of the second stage downlink control information, where the resource allocation of the second stage downlink control information comprises mapping for one or more control channel elements for the second stage downlink control information. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The accompanying drawings use reference numerals, where the same reference numerals may be used to refer to like parts throughout, but parts having the same reference numeral can differ in operation and components. In the attached drawings:

[0018] FIG.1 is a block diagram of the principle of a 2-stage DCI;

[0019] FIG.2 is a block diagram of the principle of indication of 2nd stage DCI resource allocation on PDCCH through the 1st stage DCI;

[0020] FIG.3 is a block diagram of resource allocation that is defined (at least in part) in terms of mapping for one or more CCEs for the second stage DCI;

[0021] FIG.4 is a flowchart of a method for resource allocation for two-stage control information; and

[0022] FIG.5 is a block diagram of one possible and non-limiting exemplary system in which the exemplary embodiments may be practiced. DETAILED DESCRIPTION OF THE DRAWINGS

[0023] Abbreviations that may be found in the specification and / or the drawing figures are defined below, at the end of the detailed description section.

[0024] The word “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any embodiment described herein as “exemplary” is not necessarilyto be construed as preferred or advantageous over other embodiments. All of the embodiments described in this Detailed Description are exemplary embodiments provided to enable persons skilled in the art to make or use the examples.

[0025] When more than one drawing reference numeral, word, or acronym is used within this description with “ / ”, and in general as used within this description, the “ / ” may be interpreted as “or”, “and”, or “both”. As used herein, “at least one of the following: ” and “at least one of ” and similar wording, where the list of two or more elements are joined by “and” or “or,” mean at least any one of the elements, or at least any two or more of the elements, or at least all the elements.

[0026] As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises”, “comprising”, “has”, “having”, “includes” and / or “including”, when used herein, specify the presence of stated features, elements, and / or components etc., but do not preclude the presence or addition of one or more other features, elements, components and / or combinations thereof.

[0027] It is noted that capital and lowercase words or phrases are considered to be the same herein. For instance, the words Slice and slice are the same, as are the phrases Network Repository Function and network repository function.

[0028] Any flow diagram or signaling diagram (such as FIG.5) herein may be considered to be a logic flow diagram, and illustrates the operation of an exemplary method, results of execution of computer program instructions embodied on a computer readable memory, and / or operations performed by logic implemented in circuitry. For methods, such as flow diagrams, and signaling diagrams, the orders of method steps, blocks in the flow, or signaling are not critical and instead are examples.

[0029] Technical context is now provided for technical areas related to the understanding of the examples. The examples herein are related to PDCCH and DCI design for systems such as 6G, which is currently being designed.

[0030] In 5G NR, polar code, which is used for downlink control information (DCI) on PDCCH, supports a maximum DCI size of 164 bits due to interleaver design. This means that without CRC, the DCI maximum payload size is limited to 140 bits in 5G.

[0031] It has been already observed in 5G that DCI payload size is reaching its limits, and it is expected that 6G will need to enable larger DCI payloads. For example, 3GPPRel-18 was specifying new 5G DCI formats where a single DCI can schedule multiple cells. Such DCI design may not be easily scalable because the 140-bit limit may be easily exceeded. In addition to that, multi-cell scheduling may be applied in combination with multi-slot scheduling (which is a feature introduced in Rel-16 and Rel-17 for NR). There can be also other reasons to increase DCI size further, e.g., due to enhancements in MIMO, increase in bandwidths, support for multiple parallel PxSCHs (e.g., PUSCH, PDSCH) in a cell, or the like.

[0032] It has also been discussed that another approach for multi-cell scheduling could be to divide the overall DCI to two stages, which would scale better for even larger payloads, e.g., if more cells (and / or slots) would be specified. Further, in the 3GPP Rel-19 NR workshop in June 2023 there were many proposals to specify 2-stage DCI for multi-cell scheduling.

[0033] The basic idea of applying a 2-stage DCI has been discussed in 3GPP RAN1 in several releases. One of the motivations has been to support a larger overall DCI payload size than 140 bits as described above. Further, it has been discussed that the information content of the 1st stage is to be carried in the physical downlink control channel (PDCCH), whereas the 2nd stage DCI information could be carried on PDCCH or also carried in or piggy-backed on a PDSCH (physical downlink shared channel).

[0034] The principle of 2-stage DCI, where both stages are to be transmitted on PDCCH is illustrated in FIG.1, which is a block diagram of the principle of a 2-stage DCI. The total payload 110 in size is split 115 in two parts 120-1 and 120-2 with one payload part 120-1 associated with the 1st (first) stage and the other payload part 120-2 with the 2nd (second) stage of DCI. The two payloads are separately encoded and then mapped as such on PDCCH 140. See block 125. This forms a 1ststage DCI 130-1 and a 2ndstage DCI 130-2 on the PDCCH 140. RNTI (Radio network temporal identifier) is the CRC mask that is required to decode DCI. RNTI is used to identify one specific radio channel from other radio channels and one user from another user. Each DCI message (more precisely the CRC bits of each DCI) is scrambled by a specific RNTI Value. In one embodiment, the 1ststage and the 2ndstage may use the same RNTI for CRC (e.g. following the principle used currently for 1-stage DCI). Alternatively, RNTI for the 2ndstage DCI may use a different RNTI, which may be derived, e.g., from the RNTI used for 1-stage DCI.

[0035] In 3GPP RAN1, there had been discussions that the location of the 1st stage and the 2nd stage of the DCI should be directly linked in order for the UE to locate the 2nd stage DCI with respect to the first stage.

[0036] In this document, the case is targeted where the first stage DCI 130-1 and also the second stage DCI 130-2 would be carried in PDCCH (as shown in FIG.1). Herein, what is targeted is an approach where, in an example, only a single PDCCH candidate would need to be decoded for the second stage DCI 130-2.

[0037] As noted above, there is the option of having the PDCCH candidates of the 1st 130-1 and 2nd 130-2 stage DCI directly linked, i.e., the location of the 1st stage DCI 130- 1 on PDCCH (or within a search space) will automatically define the location of the 2nd stage DCI 130-2 on PDCCH (with the search space). This direct linkage from the location of the 1ststage DCI to the location of the 2ndstage DCI, however, results in increased PDCCH blocking, as in the case where the PDCCH resources required for the 1st and / or the 2nd stage are not available, and the DL control information cannot be transmitted to the UE.

[0038] Therefore, examples herein propose a more flexible and independent resource allocation on PDCCH for the 2nd stage DCI 130-2 with respect to the 1st stage DCI 130-1 by directly indicating the information on the flexible resource allocation (RA) of the 2nd stage DCI 130-2 through the 1st stage DCI 130-1. Thus, the addressed problem is that how the first stage signals the exact resource allocation for the 2nd stage DCI, so that the complexity is minimized by not needing to blind decode also for the 2nd stage, and reduce the PDCCH blocking for 2-stage DCI compared to a direct linkage of PDCCH candidates of the 1st and 2nd stage.

[0039] The examples propose to signal the resource allocation for the 2nd stage DCI as part of the downlink control information in the 1st stage DCI. This enables the UE, after successful blind decoding for the 1st stage, to decode the 2nd stage DCI at the location signaled in the 1st stage. From the network perspective, in contrast to the direct linkage, this allows the network to select the resource allocation within PDCCH (or to be more specific and in one example, the search space of the associated CORESET containing the 2nd stage DCI) more independently for the 1stand 2ndstage DCIs, resulting in less PDCCH blocking and thereby leading to a higher probability of being able to map the DL control information for a UE on PDCCH.

[0040] This principle is shown in exemplary FIG.2, where some RA allocation information 210 (shown as ‘RA’) is added to the 1st stage DCI information content of the 1stDCI, which then provides the information of the 2nd stage DCI, which is illustrated by the dashed arrow 220 in FIG.2. A BS in block 215 splits the total DCI payload 110 into two parts, the 1ststage DCI payload 120-1 and the 2ndstage DCI payload 120-2, but an indication of RA (as RA allocation information 210) is added to the 1ststage DCI payload 120-1.

[0041] It is noted that a larger single stage DCI applying a larger aggregation level will have a similar PDCCH blocking as a two-stage DCI without the proposed resource allocation (assuming similar payloads). Two-stage DCI with the proposed resource allocation and slightly higher payload will have lower PDCCH blocking compared to the above two examples.

[0042] In the following, the details are described of the envisioned resource allocation signaling information to be provided in the 1st stage DCI for the mapping of the 2nd stage DCI on PDCCH. One example is that the first stage DCI indicates whether a one stage or a two stage DCI transmission is used, and indication of whether the one stage or a two stage DCI transmission is used is by a field in the first stage DCI for DCI resource allocation or by a bit or another field of the first stage DCI.

[0043] The following uses a nested topical structure for ease of reference. This nested topical structure has the following key: I, II, III… are main categories; a, b, c… are subcategories; 1, 2, 3… are further subcategories; and i, ii, iii… are even further subcategories.

[0044] The UE decodes the first DCI, which contains an indication of the resource allocation for the second stage DCI. Additional examples concerning the resource allocation are now described. Some of these examples are presented using FIG.3, which is a block diagram of resource allocation 300 that is defined (at least in part) in terms of mapping 305 for one or more CCEs for the second stage DCI. The blocks connected to mapping 305 are connected via arrows.

[0045] It is noted that the mapping for the one or more CCEs is typically described herein as being for one or more CCEs in a search space of an associated CORESET containing the 2ndstage DCI. While the term “search space” is frequently used in this technical area, however, the UE should not have to perform much “searching” because of the indicated mapping. Also, an associated CORESET is one possibility for the resource space into which the one or more CCEs for the 2ndstage DCI may be located. Consequently, the mapping 305 in FIG.3 is illustrated as mapping for one or more CCEs for the 2ndstage DCI.Furthermore, while the term “mapping” herein is used, any term that provides a UE the ability to find CCEs for a 2ndstage DCI may be used.

[0046] I) The resource allocation may be defined in terms of CCE mapping (e.g., in mapping 305) (which may be equivalent to the number of allocated CCEs and location of the allocated CCEs) in a search space of the associated CORESET having ^^^^CCEs. The CCE mapping (e.g., in mapping 305) will also be referred to herein as mapping of one or more CCEs, since indication may be made for a single CCE (e.g., in addition to other information) or multiple CCEs (e.g., also with other information). One example is in block 310, where the mapping of the one or more CCEs comprises one or both of the following: a location of allocated CCEs of the second stage DCI; or a location of a first allocated CCE of the second stage DCI. Another example is illustrated by block 315, where the mapping of the one or more CCEs comprises one or both of the following: a number of the allocated CCEs of the second stage DCI; or an aggregation level of the second stage DCI.

[0047] II) The number of allocated CCEs in the CCE mapping may be equal to aggregation level (AL).

[0048] III) Aggregation level (AL) in the 2ndstage can be either the same or different than in the 1ststage. There may also be, e.g., a configured AL offset between the 1stand 2ndstage. For instance, if the AL in the 1st stage = X, then the AL in the second stage = X + AL offset. It should be noted that AL offset can be also negative (meaning that AL for the 2ndstage is smaller than AL for the 1ststage, e.g., X – AL offset for the previous example).

[0049] IV) The indication of the CCE mapping may performed using one of the following options:

[0050] a) Option 1: A bitmap indicates the CCE mapping of the 2nd stage DCI (e.g., in the search space of the associated CORESET). See block 320.

[0051] 1) The size of the bitmap may be determined using ^^^^, where ^^^^is a number of CCEs in the CORESET, and a number of bits in the bitmap may be equivalent to ^^^^. As indicated previously, a CORESET is one example of a resource space into which the one or more CCEs for the 2ndstage DCI may be located.

[0052] 2) Bitmaps may have different granularity, e.g., M CCEs, where M >= 1.

[0053] i) This means that 1 (one) bit in the bitmap would indicate a resource allocation of M consecutive CCEs.

[0054] ii) The bitmap size (e.g., also referred to as length) would be ⌈^^^^ / ^⌉, where ⌈^⌉ indicates a ceiling function where the ceiling function of a real number ^ is the least integer that is greater than or equal to the given number ^. Alternatively, the bitmap length may be fixed, e.g., L bits. In this case, the granularity M is determined based on thebitmap length and the number of CCEs in the associated CORESET. In other words, ^ =⌈^^^^ / ^⌉.

[0055] iii) Granularity may be predefined or configurable, and may define a minimum aggregation level.

[0056] 3) For example, consider the following.

[0057] i) 32 bits could be used to allocate from ^^^^ = 32 CCEs.

[0058] ii) If M=2, 16 bits could be used to indicate allocation from ^^^^ = 32CCEs with a granularity of 2 CCEs. The effective aggregation level is M*num_’1’s, where num_’1’s would then be the number of bits indicated as ‘1’ in the bitmap. For instance, using this example, if the first four bits are 1010, this means the first 2 CCEs are mapped, the second 2 CCEs are not mapped, the third 2 CCEs are mapped, and the fourth 2 CCEs are not mapped. This assumes that a bit of ‘1’ means mapping is used, and it is possible to reverse this so that a bit of ‘1’ means mapping is not used.

[0059] b) Option 2: Start & Length. See block 330, where Start & Length are used to indicate the mapping 350.

[0060] 1) ‘Start’ would mean starting CCE, that is, CCE with the lowest CCE index that is allocated, e.g., in the search space of the associated CORESET, and length the number of consecutively allocated CCEs from the starting CCE in order of increasing CCE index.

[0061] 2) Number of bits for the start could be ⌈^^^^^^^^^^⌉.

[0062] i) For example, up to 5 bits may be needed to indicate start allocation fromup to ^^^^ = 32 CCEs.

[0063] ii) Starting CCE could be limited to be configurable, e.g., by a specific offset value CCEoffset, so that only a starting CCE from CCEoffset to ^^^^could be indicated.This would reduce the required number of bits for the start to ^^^^^ ^^^^ − ""#$%%&'()*.Alternatively, a granularity M for the starting offset may beso that only every M-th CCE would be a possible starting CCE reducing the required number of bits for the start to+^^^^ ,+-.. / 121.

[0064] 3) Number of bits for the length could be ⌈^^^^^4^&(5('&^⌉.

[0065] i) For example, if there would be five possible AL states (corresponding to ALs 1, 2, 4, 8, and 16), this could be indicated by 3 bits. The set of AL states could be defined in a specification or configured to the UE.

[0066] 4) In an embodiment, only the “Start” is explicitly signaled and the Length (e.g., AL) is derived from the AL of the 1ststage by means of differential signaling. For example, with 1 bit differential signaling:

[0067] i) “0” could mean that the Length (AL) is assumed to be the same as AL for the 1ststage.

[0068] ii) “1” could mean that the Length (AL) is assumed to be the next smaller AL compared to the AL for the 1ststage (e.g., AL4^AL2).

[0069] c) Option 3: Control indicator value (combined start and length). See block 340, where a control indicator value (combined start and length) is used to indicate the mapping of the 2nd stage DCI.

[0070] 1) For example, if there are 5 AL states with ALs of 1, 2, 4, 8, or 16, and NCCE=32, the control indicator value would need to have 8 bits for all combinations, but also see the following.

[0071] i) The control indicator value could be also restricted to smaller number of bits, e.g., by assuming a specific starting or ending CCE, that is, the allocated CCEs with the lowest or highest CCE index, respectively. For example, aggregation level N candidates start only at (CCE index) mod N = 0.

[0072] ii) Starting or ending CCE could be limited to be configurable, e.g., via an offset parameter.

[0073] d) Option 4: PDCCH candidate indicator. See block 340, where a PDCCH candidate indicator is used to indicate the mapping of the 2nd stage DCI.

[0074] 1) In this option, the indication provides the PDCCH candidate of a corresponding AL on the search space of the associated CORESET containing the 2ndstage DCI. A PDCCH candidate is a set of CCEs for potential mapping and may include a starting CCE and a number of CCEs. Typically, this is fixed such that there are only a number of PDCCH candidates, and this term is used in both 4G and 5G.

[0075] 2) Two different ways of indication can be envisioned here – separate indication of AL and the corresponding PDCCH candidate (Alternative 1), a joint indication across all ALs (Alternative 2), as indicated below.

[0076] i) Alt. (Alternative) 1: [AL, PDCCH candidate(AL)] signaling (see block 351): In this case the gNB (e.g., BS 70) indicates the applicable AL for the 2ndstage DCI and the corresponding PDCCH candidate for the AL separately. For example, if one is assumed to have K aggregation levels states AL1to ALK(such as K=5 different ALs, e.g., {1, 2, 4, 8, 16}) and having for each of the aggregation levels Mk PDCCH candidates (e.g., {6,4,2,2,1} for the corresponding ALs, this would result in ⌈^^^^^6^⌉ bits for indicating the AL and +^^^^,m9ax ^921 bits for the PDCCH candidate signaling. For the example given above, this bits for the AL signaling (for K=5) and 3 bits for the PDCCH candidateof 6 PDCCH candidates for an AL are supported). In the case that the 2ndstage AL is determined based on the AL of the detected 1ststage, only the PDCCH candidate is signaled.

[0077] ii) Alt.2: PDCCH candidate across AL signaling (see block 352): In this case the gNB (e.g., BS 70) indicates the applicable PDCCH candidate across all the ALs in order of increasing AL, where the total number of PDCCH candidates is given by ^:$(5;=∑9=>..? ^9 and the required number of bits is given by ⌈^^^^^^:$(5;^⌉ bits. Consider thelooking again at the example above: AL ={1,2,4,8,16]; ^9={6,4,2,2,1}; and ^:$(5;would be 15, resulting in 4 bits. The values of the 4 bits would be mapped as follows:

[0078] 0..5, 1st to 6th PDCCH candidate of AL=1;

[0079] 6..9, 1st to 4th PDCCH candidate of AL=2;

[0080] 10…11, 1st to 2nd PDCCH candidate of AL=4;

[0081] 12…14, 1st to 2nd PDCCH candidate of AL=8; and

[0082] 15, AL=8 (only 1 PDCCH candidate).

[0083] As the ALs and a number of candidates for each AL are known at the UE, the UE determines the mapping or other association for the values of the 4 bits to the ALs and PDCCH candidates. Then based on the value of the indication, the UE determines the AL and the PDCCH candidate associated with the value of the indication. This leads to no blind searching for the 2ndstage.

[0084] iii) For the same example as for Alt.1 above, there are in total MTotal=15 PDCCH candidates – and therefore 4 bits for the indication are needed (in contrast to 6 bits for Alt.1). For example, in the indication for the example given, the first 6 values (i.e., 0…5) correspond to the 6 PDCCH candidates of AL 1, 6…9 to the 4 PDCCH candidates of AL 2,10 and 11 to the 2 PDCCH candidates of AL 4, 12 and 13 to the 2 PDCCH candidates of AL 8 and 13 to the single PDCCH candidate of AL 16.

[0085] V) In an embodiment, the resource allocation for the second stage occupies a reserved bit field or state indicating a special operation. An example of such operation is 1- stage (one-stage) scheduling, where the reserved bit field or state of a bit indicates that the total control information is contained in the 1-stage only and there is no associated 2-stage DCI for the downlink control information.

[0086] VI) The search space for the 2nd stage DCI may be, e.g., the same as or different than the search space of the first stage DCI, and may be located, e.g., on the same or a different carrier.

[0087] VII) The CCEs may be non-interleaved or interleaved in the search space of the associated CORESET, and the bit indication may be provided either assuming ordering of non-interleaved or interleaved CCEs. E.g., in case of interleaved CCEs, ordering may be following just frequency domain resource ordering from the lowest to highest, or actual CCE number ordering.

[0088] FIG.4 is a flowchart of a method for resource allocation for two-stage control information. This provides an overview of an example of a method and corresponding operations.

[0089] In block 1, the BS 70 determines the location of the 1st stage DCI for a UE 10 to be transmitted on PDCCH to the UE 10. In this context, the location covers the actual CCEs used to convey the 1ststage DCI.

[0090] In block 2, the BS 70 determines the (resource) location of the 2nd stage DCI for a UE to be transmitted on PDCCH to the UE, and determines the corresponding resource allocation (RA). The determination is subject to the resource allocation signaling flexibility as described in detail above for the different Options 1 to 4.

[0091] In block 3, the BS 70 includes the information on the determined resource allocation of block 2 in the DCI information to be transmitted in the 1st stage DCI. This block may include mapping for one or more CCEs, e.g., in a search space of an associated CORESET containing the second stage DCI.

[0092] 3.i. The indication may use the signaling described in detail below for the different envisioned Options (Option 1...4).

[0093] 3.ii. At least one separate DCI field DCI resource allocation may be included in the 1st stage DCI to enable the related resource allocation signaling.

[0094] For Option1, Option 3 and Option 4 Alt.2, a single DCI field is sufficient.

[0095] For Option 2 (start, length) and Option 4 Alt.1 (AL, PDCCH candidate(AL)), the two indications may be either mapped to separate DCI fields for start & length as well as AL and PDCCH candidate or alternatively, the required bits are mapped to the same single DCI field by just concatenating required information for start and length for Option 2 and AL and PDCCH candidate for Option 4 Alt.1, respectively.

[0096] In signaling 4, the BS 70 transmits 1st and 2nd stage DCI on the determined locations on PDCCH (of blocks 1 and 2). Note that this transmission should use the locations determined in blocks 1 and 2. That is, the transmission should use the determined location of the 1st stage DCI from block 1 and the determined location of the 2nd stage DCI from block 2.

[0097] In block 5, the UE performs PDCCH blind decoding for a 1st stage DCI intended for the UE.

[0098] In block 6, in case of successful decoding of the 1st stage DCI transmitted by the gNB (in signaling 4), the UE determines the resource allocation of the 2nd stage DCI based on the information provided in the 1st stage DCI. This may include the indicated value of the DCI resource allocation field(s) and the applied signaling option (described in detail above, Options 1 to Option 4). As described in block 3, the resource allocation may be alternatively (for Options 2 and Option 4 Alt.1) determined based on the values of two separate DCI fields in the 1st stage DCI.

[0099] In block 7, the UE decodes the 2nd stage DCI information at the determined resource allocation of block 6.

[0100] In block 8, when the 1ststage and the 2ndstage have been received correctly, the UE may combine the payload bits of two stages to obtain an aggregated DCI. Not shown is that, after block 8, the UE might perform one or more actions based on the DCI. The most common UE actions include 1) receiving PDSCH according to aggregated DCI; and / or 2) transmitting PUSCH according to aggregated DCI. The UE may determine based on the CRC bits whether the 2ndstage DCI is received correctly or not. In the case of erroneous reception, the UE may consider the aggregated DCI as invalid.

[0101] Turning to FIG.5, this figure shows a block diagram of one possible and non-limiting example of a cellular network 1 that is connected to a user equipment (UE) 10. A number of network elements are shown in the cellular network of FIG.5: a base station 70; and a core network 90.

[0102] In FIG.5, a user equipment (UE) 10 is in wireless communication via radio link 11 with the base station 70 of the cellular network 1. A UE 10 is a wireless communication device, such as a mobile device, that is configured to access a cellular network. The UE 10 is illustrated with one or more antennas 28. The ellipses 2 indicate there could be multiple UEs 10 in wireless communication via radio links with the base station 70. The UE 10 includes one or more processors 13, one or more memories 15, and other circuitry 16. The other circuitry 16 includes one or more receivers (Rx(s)) 17 and one or more transmitters (Tx(s)) 18. A program 12 is used to cause the UE 10 to perform the operations described herein. For a UE 10, the other circuitry 16 could include circuitry such as for user interface elements (not shown) like a display. The program 12 may be implemented via instructions stored in memory / memories 15 and executed by processor(s) 13, or by hardware such being implemented as part of the processor(s) or other hardware elements, or both.

[0103] The base station 70, as a network element of the cellular network 1, provides the UE 10 access to cellular network 1 and to the data network 91 via the core network 90 (e.g., via a user plane function (UPF) of the core network 90). As such, the base station 70 may be considered to be an access node, which provides access by UE(s) 10 to the cellular network 1. The base station 70 is illustrated as having one or more antennas 58. In general, the base station 70 may be referred to as RAN node 70, although many will make reference to this as a gNB (gNode B, a base station for NR, new radio) instead. There are, however, many other examples of RAN nodes including an eNB (evolved Node B) or TRP (Transmission-Reception Point). The base station 70 includes one or more processors 73, one or more memories 75, and other circuitry 76. The other circuitry 76 includes one or more receivers (Rx(s)) 77 and one or more transmitters (Tx(s)) 78. A program 72 is used to cause the base station 70 to perform the operations described herein. The program 72 may be implemented via instructions stored in memory / memories 75 and executed by processor(s) 73, or by hardware such being implemented as part of the processor(s) or other hardware elements, or both.

[0104] It is noted that the base station 70 may instead be implemented via other wireless technologies, such as Wi-Fi (a wireless networking protocol that devices use to communicate without direct cable connections). In the case of Wi-Fi, the link 11 could be characterized as a wireless link.

[0105] Two or more base stations 70 communicate using, e.g., link(s) 79. The link(s) 79 may be wired or wireless or both and may implement, e.g., an Xn interface for 5G(fifth generation), an X2 interface for LTE (Long Term Evolution), or other suitable interface for other standards.

[0106] The cellular network 1 may include a core network 90, as a second network element or elements, that may include core network functionality, and which provide connectivity via a link or links 81 with a data network 91, such as a telephone network and / or a data communications network (e.g., the Internet). The core network 90 includes one or more processors 93, one or more memories 95, and other circuitry 96. The other circuitry 96 includes one or more receivers (Rx(s)) 97 and one or more transmitters (Tx(s)) 98. A program 92 is used to cause the core network 90 to perform the operations described herein. The program 92 may be implemented via instructions stored in memory / memories 95 and executed by processor(s) 93, or by hardware such being implemented as part of the processor(s) or other hardware elements, or both.

[0107] The core network 90 could be a 5GC (5G core network). The core network 90 can implement or comprise multiple network functions (NF(s)) 99, and the program 92 may comprise one or more of the NFs 99. A 5G core network may use hardware such as memory and processors and a virtualization layer. It could be a single standalone computing system, a distributed computing system, or a cloud computing system. The NFs 99, as network elements, of the core network could be containers or virtual machines running on the hardware of the computing system(s) making up the core network 90.

[0108] Core network functionality for 5G may include access and mobility management functionality that is provided by a network function 99 such as an access and mobility management function (AMF), session management functionality that is provided by a network function such as a session management function (SMF). Core network functionality for access and mobility management in an LTE (Long Term Evolution) network may be provided by an MME (Mobility Management Entity) and / or SGW (Serving Gateway) functionality, which routes data to the data network. Many others are possible, as illustrated by the examples in FIG.5: AMF; SMF; MME; SGW; GMLC (Gateway Mobile Location Center); LMF (Location Management Function); UDM (Unified Data Management) / UDR (Unified Data Repository); NRF (Network Repository Function); and / or E-SMLC (Evolved Serving Mobile Location Center). These are merely exemplary core network functionality that may be provided by the core network 90, and note that both 5G and LTE core network functionality might be provided by the core network 90. The base station 70 is coupled via a backhaul link 31 to the core network 90. The base station 70 and the core network 90 mayinclude an NG (Next Generation) interface for 5G, or an S1 interface for LTE, or other suitable interface for other radio access technologies for communicating via the backhaul link 31.

[0109] In the data network 91, there is a computer-readable medium 94. The computer-readable medium 94 contains instructions that, when downloaded and installed into the memories 15, 75, or 95 of the corresponding UE 10, base station 70, and / or core network element(s) 90, and executed by processor(s) 13, 73, or 93, cause the respective device to perform corresponding actions described herein. The computer-readable medium 94 may be implemented in other forms, such as via a compact disc or memory stick.

[0110] The programs 12, 72, and 92 contain instructions (as part of a corresponding program 12, 72, and 92) stored by corresponding one or more memories 15, 75, or 95. These instructions, when executed by the corresponding one or more processors 13, 73, or 93, cause the corresponding apparatus 10, 70, or 90, to perform the operations described herein. The computer readable memories 15, 75, or 95 are circuitry and may be of any type suitable to the local technical environment and may be implemented using any suitable data storage technology, such as semiconductor-based memory devices, flash memory, firmware, magnetic memory devices and systems, optical memory devices and systems, fixed memory and removable memory. The processors 13, 73, and 93, are circuitry and may be of any type suitable to the local technical environment. For example, these processors may include one or more of general-purpose computers, special purpose computers, microprocessors, digital signal processors (DSPs), processors based on a multi- core processor architecture, and may also include specialized circuits such as field- programmable gate arrays (FPGAs), application specific circuits (ASICs), signal processing devices and other devices, or combinations of these devices, as non-limiting examples. The processors 13, 73, and 93 are circuitry that can be programmed to perform functions via software, firmware or the like (including microcode), but are not solely software.

[0111] The receivers 17, 77, and 97, and the transmitters 18, 78, and 98 may implement wired or wireless interfaces. The receivers and transmitters may be grouped together as transceivers.

[0112] The cellular network 1 may implement network virtualization, which is the process of combining hardware and software network resources and network functionality into a single, software-based administrative entity, a virtual network. Network virtualization involves platform virtualization, often combined with resource virtualization. Networkvirtualization is categorized as either external, combining many networks, or parts of networks, into a virtual unit, or internal, providing network-like functionality to software containers on a single system. Note that the virtualized entities (such as network functions 99) that result from the network virtualization are still implemented, at some level, using hardware such as processors 73 and / or 93 and memories 75 and / or 95, and also such virtualized entities create technical effects.

[0113] It is noted that a common way to view “cells” in a cellular system is as a 360-degree oval. However, antennas typically do not radiate over 360 degrees, and therefore a common technique is to have the 360 degrees subdivided into multiple sections. That is, there can be multiple cells per base station. For instance, there could be three cells for a single carrier frequency and associated bandwidth, each cell covering one-third of a 360- degree area so that the single base station’s coverage area covers an approximate oval. Furthermore, each cell can correspond to a single carrier and a base station may use multiple carriers. So, if there are three 120-degree cells per carrier and two carriers, then the base station has a total of six cells. While the description herein may indicate that “cells” perform functions, it should be apparent that the base station that forms the cell will perform the functions.

[0114] In general, the various embodiments of the user equipment 10 can include, but are not limited to, cellular telephones (such as smart phones, mobile phones, cellular phones, voice over Internet Protocol (IP) (VoIP) phones, and / or wireless local loop phones), tablets, portable computers, vehicles or vehicle-mounted devices for, e.g., wireless V2X (vehicle-to-everything) communication, image capture devices such as digital cameras, gaming devices, music storage and playback appliances, Internet appliances (including Internet of Things, IoT, devices), IoT devices with sensors and / or actuators for, e.g., automation applications, as well as portable units or terminals that incorporate combinations of such functions, laptop-embedded equipment (LEE), laptop-mounted equipment (LME), Universal Serial Bus (USB) dongles, smart devices, wireless customer-premises equipment (CPE), an Internet of Things (IoT) device, a watch or other wearable, a head-mounted display (HMD), a vehicle, a drone, a medical device and applications (e.g., remote surgery), an industrial device and applications (e.g., a robot and / or other wireless devices operating in an industrial and / or an automated processing chain contexts), a consumer electronics device, a device operating on commercial and / or industrial wireless networks, and the like. That is, the UE 10 could be any end device that may be capable of wireless communication. By way ofexample rather than limitation, the UE may also be referred to as a communication device, terminal device (MT), a Subscriber Station (SS), a Portable Subscriber Station, a Mobile Station (MS), or an Access Terminal (AT).

[0115] Without in any way limiting the scope, interpretation, or application of the claims appearing below, a technical effect and / or advantage of one or more of the example embodiments disclosed herein is examples enable minimum blind decoding complexity by avoiding blind decoding of the second stage. Another technical effect and / or advantage of one or more of the example embodiments disclosed herein is the examples enable minimum PDCCH blocking probability by flexible 2nd stage PDCCH resource allocation.

[0116] The following are additional examples.

[0117] Example 1. A method, comprising: receiving, by a user equipment, a physical downlink control channel comprising a first stage downlink control information and a second stage downlink control information, where payload of the first stage downlink control information comprises a resource allocation indicative of resource allocation of the second stage downlink control information, where the resource allocation of the second stage downlink control information comprises mapping for one or more control channel elements for the second stage downlink control information; decoding, by the user equipment, the first stage downlink control information and determining the resource allocation of the second stage downlink control information including the mapping for the one or more control channel elements; and decoding, by the user equipment, the second stage downlink control information by using at least the determined resource allocation including the mapping for the one or more control channel elements.

[0118] Example 2. The method according to example 1, where the mapping of the one or more control channel elements comprises one or both of the following: a location of allocated control channel elements of the second stage downlink control information; or a location of a first allocated control channel element of the second stage downlink control information.

[0119] Example 3. The method according to any of examples 1 or 2, where the mapping of the one or more control channel elements comprises one or both of the following: a number of the allocated control channel elements of the second stage downlink control information; or an aggregation level of the second stage downlink control information.

[0120] Example 4. The method according to example 1, where the mapping for the one or more control channel elements comprises a bitmap indicating the mapping for theone or more control channel elements for the second stage downlink control information in a search space of an associated control resource set.

[0121] Example 5. The method according to example 4, wherein a size of the bitmap is determined using ^^^^, where ^^^^is a number of control channel elements in the search space of the associated control resource set, and the size of the bitmap is a number of bits equivalent to ^^^^.

[0122] Example 6. The method according to example 4, wherein: the bitmap has a granularity of M control channel elements, where M >= 1, and individual bits indicate a resource allocation of the granularity of M control channel elements; and a size of the bitmap is determined using ^^^^, where ^^^^is a number of control channel elements in the search space of the associated control resource set, and the size of the bitmap is a number of bits equivalent to +-.. / 0 1. 7. The method according to example 1, where the mapping forthe one or more channel elements comprises indications of a start and a length, where start indicates a starting control channel element in a search space of an associated control resource set, and length indicates a number of consecutively allocated control channel elements from the starting control channel element.

[0124] Example 8. The method according to example 7, wherein the mapping includes one or both of the following: a number of bits for the start are ⌈^^^^^^^^^^⌉, where ^^^^is a number of control channel elements in the associated control resource set; or a number of bits for the length is⌈^^^^^4^&(5('&^⌉, where 4^&(5('&is a number of a set of states of an aggregation level.

[0125] Example 9. The method according to any of examples 7 or 8, wherein the start is explicitly signaled via signaling received by the user equipment from a network, and the length is derived from an aggregation level of the first stage downlink control information through use of differential signaling.

[0126] Example 10. The method according to example 1, where the mapping for the one or more control channel elements comprises a control indicator value that combines both a start for the one or more control channel elements and a length indicating a number of the one or more control channel elements for the second stage downlink control information in a search space of an associated control resource set.

[0127] Example 11. The method according to example 1, where the mapping of the one or more control channel elements comprises an indication that provides a physical downlink control channel candidate of an aggregation level for the second stage downlink control information in a search space of an associated control resource set.

[0128] Example 12. The method according to example 11, further comprising receiving, by the user equipment from a network, separate indications of the aggregation level and a corresponding physical downlink control channel candidate.

[0129] Example 13. The method according to example 11, further comprising receiving, by the user equipment from a network, a joint indication of the aggregation level and a corresponding physical downlink control channel candidate.

[0130] Example 14. The method according to any of examples 1 to 13, further comprising receiving, by the user equipment, indication of an aggregation level offset, wherein the aggregation level offset describes an offset between an aggregation level of the first stage downlink control information and an aggregation level of the second stage downlink control information.

[0131] Example 15. The method according to examples 1 to 14, wherein aggregation levels of the first and second stage downlink control information are one of same aggregation levels or different aggregation levels.

[0132] Example 16. The method according to examples 1 to 15, wherein the first stage downlink control information indicates whether a one stage or a two stage downlink control information transmission is used, and indication of whether the one stage or a two stage downlink control information transmission is used is by a field in the first stage downlink control information, by a bit or a state in a downlink control information resource allocation field or by a bit or another field of the first stage downlink control information.

[0133] Example 17. The method according to examples 1 to 16, wherein a search space for the second stage downlink control information is one of a same as or different than a search space of the first stage downlink control information, and is located on one of a same or a different component carrier.

[0134] Example 18. The method according to any of examples 1 to 17, further comprising combining, by the user equipment, payload bits of the decoded first and second stages of downlink control information to obtain an aggregated downlink control information.

[0135] Example 19. The method according to example 18, further comprising one or both of the following: receiving a physical downlink shared channel according to theaggregated downlink control information; or transmitting a physical uplink shared channel according to the aggregated downlink control information.

[0136] Example 20. A method, comprising: determining, by a base station, location of a first stage downlink control information in physical downlink control channel for a downlink control information that is split into first and second stages; determining, by the base station, location of a second stage downlink control information and corresponding resource allocation in the physical downlink control channel; and sending, by the base station to a user equipment, a physical downlink control channel comprising the first stage downlink control information and the second stage downlink control information, where payload of the first stage downlink control information comprises a resource allocation indicative of resource allocation of the second stage downlink control information, where the resource allocation of the second stage downlink control information comprises mapping for one or more control channel elements for the second stage downlink control information.

[0137] Example 21. The method according to example 20, where the mapping of the one or more control channel elements comprises one or both of the following: a location of allocated control channel elements of the second stage downlink control information; or a location of a first allocated control channel element of the second stage downlink control information.

[0138] Example 22. The method according to any of examples 20 or 21, where the mapping of the one or more control channel elements comprises one or both of the following: a number of the allocated control channel elements of the second stage downlink control information; or an aggregation level of the second stage downlink control information.

[0139] Example 23. The method according to example 20, where the mapping for the one or more control channel elements comprises a bitmap indicating the mapping for the one or more control channel elements for the second stage downlink control information in a search space of an associated control resource set.

[0140] Example 24. The method according to example 23, wherein a size of the bitmap is determined using ^^^^, where ^^^^is a number of control channel elements in the search space of the associated control resource set, and the size of the bitmap is a number of bits equivalent to ^^^^.

[0141] Example 25. The method according to example 23, wherein: the bitmap has a granularity of M control channel elements, where M >= 1, and individual bits indicate aresource allocation of the granularity of M control channel elements; and a size of the bitmap is determined using ^^^^, where ^^^^is a number of control channel elements in the search space of the associated control resource set, and the size of the bitmap is a number of bits equivalent to+-.. / 01. 26. The method according to example 20, where the mapping for the one orchannel elements comprises indications of a start and a length, where start indicates a starting control channel element in a search space of an associated control resource set, and length indicates a number of consecutively allocated control channel elements from the starting control channel element.

[0143] Example 27. The method according to example 26, wherein the mapping includes one or both of the following: a number of bits for the start are⌈^^^^^^^^^^⌉, where ^^^^is a number of control channel elements in the associated control resource set; or a number of bits for the length is ⌈^^^^^4^&(5('&^⌉, where 4^&(5('&is a number of a set of states of an aggregation level.

[0144] Example 28. The method according to any of examples 26 or 27, wherein the start is explicitly signaled via signaling sent by the base station to the user equipment, and the length is derived from an aggregation level of the first stage downlink control information through use of differential signaling.

[0145] Example 29. The method according to example 20, where the mapping for the one or more control channel elements comprises a control indicator value that combines both a start for the one or more control channel elements and a length indicating a number of the one or more control channel elements for the second stage downlink control information in a search space of an associated control resource set.

[0146] Example 30. The method according to example 20, where the mapping of the one or more control channel elements comprises an indication that provides a physical downlink control channel candidate of an aggregation level for the second stage downlink control information in a search space of an associated control resource set.

[0147] Example 31. The method according to example 30, further comprising sending, by the base station to the user equipment, separate indications of the aggregation level and a corresponding physical downlink control channel candidate.

[0148] Example 32. The method according to example 30, further comprising sending, from the base station to the user equipment, a joint indication of the aggregation level and a corresponding physical downlink control channel candidate.

[0149] Example 33. The method according to any of examples 20 to 32, further comprising sending, by the base station to the user equipment, indication of an aggregation level offset, wherein the aggregation level offset describes an offset between an aggregation level of the first stage downlink control information and an aggregation level of the second stage downlink control information.

[0150] Example 34. The method according to examples 20 to 33, wherein aggregation levels of the first and second stage downlink control information are one of same aggregation levels or different aggregation levels.

[0151] Example 35. The method according to examples 20 to 34, wherein the first stage downlink control information indicates whether a one stage or a two stage downlink control information transmission is used, and indication of whether the one stage or a two stage downlink control information transmission is used is by a field in the first stage downlink control information, by a bit or a state in a downlink control information resource allocation field or by a bit or another field of the first stage downlink control information.

[0152] Example 36. The method according to examples 20 to 35, wherein a search space for the second stage downlink control information is one of a same as or different than a search space of the first stage downlink control information, and is located on one of a same or a different component carrier.

[0153] Example 37. The method according to any of examples 20 to 36, further comprising one or both of the following: sending a physical downlink shared channel according to the downlink control information; or receiving physical uplink shared channel according to the downlink control information.

[0154] Example 38. An apparatus, comprising means for: receiving a physical downlink control channel comprising a first stage downlink control information and a second stage downlink control information, where payload of the first stage downlink control information comprises a resource allocation indicative of resource allocation of the second stage downlink control information, where the resource allocation of the second stage downlink control information comprises mapping for one or more control channel elements for the second stage downlink control information; decoding the first stage downlink control information and determining the resource allocation of the second stage downlink controlinformation including the mapping for the one or more control channel elements; and decoding the second stage downlink control information by using at least the determined resource allocation including the mapping for the one or more control channel elements.

[0155] Example 39. The apparatus according to example 38, where the mapping of the one or more control channel elements comprises one or both of the following: a location of allocated control channel elements of the second stage downlink control information; or a location of a first allocated control channel element of the second stage downlink control information.

[0156] Example 40. The apparatus according to any of examples 38 or 39, where the mapping of the one or more control channel elements comprises one or both of the following: a number of the allocated control channel elements of the second stage downlink control information; or an aggregation level of the second stage downlink control information.

[0157] Example 41. The apparatus according to example 38, where the mapping for the one or more control channel elements comprises a bitmap indicating the mapping for the one or more control channel elements for the second stage downlink control information in a search space of an associated control resource set.

[0158] Example 42. The apparatus according to example 41, wherein a size of the bitmap is determined using ^^^^, where ^^^^is a number of control channel elements in the search space of the associated control resource set, and the size of the bitmap is a number of bits equivalent to ^^^^.

[0159] Example 43. The apparatus according to example 41, wherein: the bitmap has a granularity of M control channel elements, where M >= 1, and individual bits indicate a resource allocation of the granularity of M control channel elements; and a size of the bitmap is determined using ^^^^, where ^^^^is a number of control channel elements in the search space of the associated control resource set, and the size of the bitmap is a number of bits equivalent to +-.. / 0 1.44. The apparatus according to example 38, where the mapping for the one or more control channel elements comprises indications of a start and a length, where start indicates a starting control channel element in a search space of an associated control resource set, and length indicates a number of consecutively allocated control channel elements from the starting control channel element.

[0161] Example 45. The apparatus according to example 44, wherein the mapping includes one or both of the following: a number of bits for the start are⌈^^^^^^^^^^⌉, where ^^^^is a number of control channel elements in the associated control resource set; or a number of bits for the length is ⌈^^^^^4^&(5('&^⌉, where 4^&(5('&is a number of a set of states of an aggregation level.

[0162] Example 46. The apparatus according to any of examples 44 or 45, wherein the start is explicitly signaled via signaling received from a network, and the length is derived from an aggregation level of the first stage downlink control information through use of differential signaling.

[0163] Example 47. The apparatus according to example 38, where the mapping for the one or more control channel elements comprises a control indicator value that combines both a start for the one or more control channel elements and a length indicating a number of the one or more control channel elements for the second stage downlink control information in a search space of an associated control resource set.

[0164] Example 48. The apparatus according to example 38, where the mapping of the one or more control channel elements comprises an indication that provides a physical downlink control channel candidate of an aggregation level for the second stage downlink control information in a search space of an associated control resource set.

[0165] Example 49. The apparatus according to example 48, wherein the means are further configured for receiving, from a network, separate indications of the aggregation level and a corresponding physical downlink control channel candidate.

[0166] Example 50. The apparatus according to example 48, wherein the means are further configured for receiving, from a network, a joint indication of the aggregation level and a corresponding physical downlink control channel candidate.

[0167] Example 51. The apparatus according to any of examples 38 to 50, wherein the means are further configured for receiving indication of an aggregation level offset, wherein the aggregation level offset describes an offset between an aggregation level of the first stage downlink control information and an aggregation level of the second stage downlink control information.

[0168] Example 52. The apparatus according to examples 38 to 51, wherein aggregation levels of the first and second stage downlink control information are one of same aggregation levels or different aggregation levels.

[0169] Example 53. The apparatus according to examples 38 to 52, wherein the first stage downlink control information indicates whether a one stage or a two stage downlink control information transmission is used, and indication of whether the one stage or a two stage downlink control information transmission is used is by a field in the first stage downlink control information, by a bit or a state in a downlink control information resource allocation field or by a bit or another field of the first stage downlink control information.

[0170] Example 54. The apparatus according to examples 38 to 53, wherein a search space for the second stage downlink control information is one of a same as or different than a search space of the first stage downlink control information, and is located on one of a same or a different component carrier.

[0171] Example 55. The apparatus according to any of examples 38 to 54, wherein the means are further configured for combining payload bits of the decoded first and second stages of downlink control information to obtain an aggregated downlink control information.

[0172] Example 56. The apparatus according to example 55, wherein the means are further configured for one or both of the following: receiving a physical downlink shared channel according to the aggregated downlink control information; or transmitting a physical uplink shared channel according to the aggregated downlink control information.

[0173] Example 57. An apparatus, comprising means for: determining location of a first stage downlink control information in physical downlink control channel for a downlink control information that is split into first and second stages; determining location of a second stage downlink control information and corresponding resource allocation in the physical downlink control channel; and sending, to a user equipment, a physical downlink control channel comprising the first stage downlink control information and the second stage downlink control information, where payload of the first stage downlink control information comprises a resource allocation indicative of resource allocation of the second stage downlink control information, where the resource allocation of the second stage downlink control information comprises mapping for one or more control channel elements for the second stage downlink control information.

[0174] Example 58. The apparatus according to example 57, where the mapping of the one or more control channel elements comprises one or both of the following: a location of allocated control channel elements of the second stage downlink controlinformation; or a location of a first allocated control channel element of the second stage downlink control information.

[0175] Example 59. The apparatus according to any of examples 57 or 58, where the mapping of the one or more control channel elements comprises one or both of the following: a number of the allocated control channel elements of the second stage downlink control information; or an aggregation level of the second stage downlink control information.

[0176] Example 60. The apparatus according to example 57, where the mapping for the one or more control channel elements comprises a bitmap indicating the mapping for the one or more control channel elements for the second stage downlink control information in a search space of an associated control resource set.

[0177] Example 61. The apparatus according to example 60, wherein a size of the bitmap is determined using ^^^^, where ^^^^is a number of control channel elements in the search space of the associated control resource set, and the size of the bitmap is a number of bits equivalent to ^^^^.

[0178] Example 62. The apparatus according to example 60, wherein: the bitmap has a granularity of M control channel elements, where M >= 1, and individual bits indicate a resource allocation of the granularity of M control channel elements; and a size of the bitmap is determined using ^^^^, where ^^^^is a number of control channel elements in the search space of the associated control resource set, and the size of the bitmap is a number of bits equivalent to +-.. / 0 1.63. The apparatus according to example 57, where the mapping for the one or more control channel elements comprises indications of a start and a length, where start indicates a starting control channel element in a search space of an associated control resource set, and length indicates a number of consecutively allocated control channel elements from the starting control channel element.

[0180] Example 64. The apparatus according to example 63, wherein the mapping includes one or both of the following: a number of bits for the start are ⌈^^^^^^^^^^⌉, where ^^^^is a number of control channel elements in the associated control resource set; or a number of bits for the length is⌈^^^^^4^&(5('&^⌉, where 4^&(5('&is a number of a set of states of an aggregation level.

[0181] Example 65. The apparatus according to any of examples 63 or 64, wherein the start is explicitly signaled via signaling sent to the user equipment, and the length is derived from an aggregation level of the first stage downlink control information through use of differential signaling.

[0182] Example 66. The apparatus according to example 57, where the mapping for the one or more control channel elements comprises a control indicator value that combines both a start for the one or more control channel elements and a length indicating a number of the one or more control channel elements for the second stage downlink control information in a search space of an associated control resource set.

[0183] Example 67. The apparatus according to example 57, where the mapping of the one or more control channel elements comprises an indication that provides a physical downlink control channel candidate of an aggregation level for the second stage downlink control information in a search space of an associated control resource set.

[0184] Example 68. The apparatus according to example 67, wherein the means are further configured for sending, to the user equipment, separate indications of the aggregation level and a corresponding physical downlink control channel candidate.

[0185] Example 69. The apparatus according to example 67, wherein the means are further configured for sending, to the user equipment, a joint indication of the aggregation level and a corresponding physical downlink control channel candidate.

[0186] Example 70. The apparatus according to any of examples 57 to 69, wherein the means are further configured for sending, to the user equipment, indication of an aggregation level offset, wherein the aggregation level offset describes an offset between an aggregation level of the first stage downlink control information and an aggregation level of the second stage downlink control information.

[0187] Example 71. The apparatus according to examples 57 to 70, wherein aggregation levels of the first and second stage downlink control information are one of same aggregation levels or different aggregation levels.

[0188] Example 72. The apparatus according to examples 57 to 71, wherein the first stage downlink control information indicates whether a one stage or a two stage downlink control information transmission is used, and indication of whether the one stage or a two stage downlink control information transmission is used is by a field in the first stage downlink control information, by a bit or a state in a downlink control information resource allocation field or by a bit or another field of the first stage downlink control information.

[0189] Example 73. The apparatus according to examples 57 to 72, wherein a search space for the second stage downlink control information is one of a same as or different than a search space of the first stage downlink control information, and is located on one of a same or a different component carrier.

[0190] Example 74. The apparatus according to any of examples 57 to 73, wherein the means are further configured for one or both of the following: sending a physical downlink shared channel according to the downlink control information; or receiving physical uplink shared channel according to the downlink control information.

[0191] Example 75. An apparatus, comprising: one or more processors; and one or more memories storing instructions that, when executed by the one or more processors, cause the apparatus at least to perform: receiving a physical downlink control channel comprising a first stage downlink control information and a second stage downlink control information, where payload of the first stage downlink control information comprises a resource allocation indicative of resource allocation of the second stage downlink control information, where the resource allocation of the second stage downlink control information comprises mapping for one or more control channel elements for the second stage downlink control information; decoding the first stage downlink control information and determining the resource allocation of the second stage downlink control information including the mapping for the one or more control channel elements; and decoding the second stage downlink control information by using at least the determined resource allocation including the mapping for the one or more control channel elements.

[0192] Example 76. The apparatus according to example 75, where the mapping of the one or more control channel elements comprises one or both of the following: a location of allocated control channel elements of the second stage downlink control information; or a location of a first allocated control channel element of the second stage downlink control information.

[0193] Example 77. The apparatus according to any of examples 75 or 76, where the mapping of the one or more control channel elements comprises one or both of the following: a number of the allocated control channel elements of the second stage downlink control information; or an aggregation level of the second stage downlink control information.

[0194] Example 78. The apparatus according to example 75, where the mapping for the one or more control channel elements comprises a bitmap indicating the mapping forthe one or more control channel elements for the second stage downlink control information in a search space of an associated control resource set.

[0195] Example 79. The apparatus according to example 78, wherein a size of the bitmap is determined using ^^^^, where ^^^^is a number of control channel elements in the search space of the associated control resource set, and the size of the bitmap is a number of bits equivalent to ^^^^.

[0196] Example 80. The apparatus according to example 78, wherein: the bitmap has a granularity of M control channel elements, where M >= 1, and individual bits indicate a resource allocation of the granularity of M control channel elements; and a size of the bitmap is determined using ^^^^, where ^^^^is a number of control channel elements in the search space of the associated control resource set, and the size of the bitmap is a number of bits equivalent to +-.. / 0 1. 81. The apparatus according to example 75, where the mappingfor the one or more control channel elements comprises indications of a start and a length, where start indicates a starting control channel element in a search space of an associated control resource set, and length indicates a number of consecutively allocated control channel elements from the starting control channel element.

[0198] Example 82. The apparatus according to example 81, wherein the mapping includes one or both of the following: a number of bits for the start are ⌈^^^^^^^^^^⌉, where ^^^^is a number of control channel elements in the associated control resource set; or a number of bits for the length is⌈^^^^^4^&(5('&^⌉, where 4^&(5('&is a number of a set of states of an aggregation level.

[0199] Example 83. The apparatus according to any of examples 81 or 82, wherein the start is explicitly signaled via signaling received by the apparatus from a network, and the length is derived from an aggregation level of the first stage downlink control information through use of differential signaling.

[0200] Example 84. The apparatus according to example 75, where the mapping for the one or more control channel elements comprises a control indicator value that combines both a start for the one or more control channel elements and a length indicating a number of the one or more control channel elements for the second stage downlink control information in a search space of an associated control resource set.

[0201] Example 85. The apparatus according to example 75, where the mapping of the one or more control channel elements comprises an indication that provides a physical downlink control channel candidate of an aggregation level for the second stage downlink control information in a search space of an associated control resource set.

[0202] Example 86. The apparatus according to example 85, wherein the one or more memories further store instructions that, when executed by the one or more processors, cause the apparatus at least to perform receiving, from a network, separate indications of the aggregation level and a corresponding physical downlink control channel candidate.

[0203] Example 87. The apparatus according to example 85, wherein the one or more memories further store instructions that, when executed by the one or more processors, cause the apparatus at least to perform receiving, from a network, a joint indication of the aggregation level and a corresponding physical downlink control channel candidate.

[0204] Example 88. The apparatus according to any of examples 75 to 87, wherein the one or more memories further store instructions that, when executed by the one or more processors, cause the apparatus at least to perform receiving indication of an aggregation level offset, wherein the aggregation level offset describes an offset between an aggregation level of the first stage downlink control information and an aggregation level of the second stage downlink control information.

[0205] Example 89. The apparatus according to examples 75 to 88, wherein aggregation levels of the first and second stage downlink control information are one of same aggregation levels or different aggregation levels.

[0206] Example 90. The apparatus according to examples 75 to 89, wherein the first stage downlink control information indicates whether a one stage or a two stage downlink control information transmission is used, and indication of whether the one stage or a two stage downlink control information transmission is used is by a field in the first stage downlink control information, by a bit or a state in a downlink control information resource allocation field or by a bit or another field of the first stage downlink control information.

[0207] Example 91. The apparatus according to examples 75 to 90, wherein a search space for the second stage downlink control information is one of a same as or different than a search space of the first stage downlink control information, and is located on one of a same or a different component carrier.

[0208] Example 92. The apparatus according to any of examples 75 to 91, wherein the one or more memories further store instructions that, when executed by the oneor more processors, cause the apparatus at least to perform combining payload bits of the decoded first and second stages of downlink control information to obtain an aggregated downlink control information.

[0209] Example 93. The apparatus according to example 92, wherein the one or more memories further store instructions that, when executed by the one or more processors, cause the apparatus at least to perform one or both of the following: receiving a physical downlink shared channel according to the aggregated downlink control information; or transmitting a physical uplink shared channel according to the aggregated downlink control information.

[0210] Example 94. An apparatus, comprising: one or more processors; and one or more memories storing instructions that, when executed by the one or more processors, cause the apparatus at least to perform: determining location of a first stage downlink control information in physical downlink control channel for a downlink control information that is split into first and second stages; determining location of a second stage downlink control information and corresponding resource allocation in the physical downlink control channel; and sending, to a user equipment, a physical downlink control channel comprising the first stage downlink control information and the second stage downlink control information, where payload of the first stage downlink control information comprises a resource allocation indicative of resource allocation of the second stage downlink control information, where the resource allocation of the second stage downlink control information comprises mapping for one or more control channel elements for the second stage downlink control information.

[0211] Example 95. The apparatus according to example 94, where the mapping of the one or more control channel elements comprises one or both of the following: a location of allocated control channel elements of the second stage downlink control information; or a location of a first allocated control channel element of the second stage downlink control information.

[0212] Example 96. The apparatus according to any of examples 94 or 95, where the mapping of the one or more control channel elements comprises one or both of the following: a number of the allocated control channel elements of the second stage downlink control information; or an aggregation level of the second stage downlink control information.

[0213] Example 97. The apparatus according to example 94, where the mapping for the one or more control channel elements comprises a bitmap indicating the mapping forthe one or more control channel elements for the second stage downlink control information in a search space of an associated control resource set.

[0214] Example 98. The apparatus according to example 97, wherein a size of the bitmap is determined using ^^^^, where ^^^^is a number of control channel elements in the search space of the associated control resource set, and the size of the bitmap is a number of bits equivalent to ^^^^.

[0215] Example 99. The apparatus according to example 97, wherein: the bitmap has a granularity of M control channel elements, where M >= 1, and individual bits indicate a resource allocation of the granularity of M control channel elements; and a size of the bitmap is determined using ^^^^, where ^^^^is a number of control channel elements in the search space of the associated control resource set, and the size of the bitmap is a number of bits equivalent to +-.. / 0 1. 100. The apparatus according to example 94, where the mappingfor the one or more control channel elements comprises indications of a start and a length, where start indicates a starting control channel element in a search space of an associated control resource set, and length indicates a number of consecutively allocated control channel elements from the starting control channel element.

[0217] Example 101. The apparatus according to example 100, wherein the mapping includes one or both of the following: a number of bits for the start are ⌈^^^^^^^^^^⌉, where ^^^^is a number of control channel elements in the associated control resource set; or a number of bits for the length is ⌈^^^^^4^&(5('&^⌉, where 4^&(5('&is a number of a set of states of an aggregation level.

[0218] Example 102. The apparatus according to any of examples 100 or 101, wherein the start is explicitly signaled via signaling sent to the user equipment, and the length is derived from an aggregation level of the first stage downlink control information through use of differential signaling.

[0219] Example 103. The apparatus according to example 94, where the mapping for the one or more control channel elements comprises a control indicator value that combines both a start for the one or more control channel elements and a length indicating a number of the one or more control channel elements for the second stage downlink control information in a search space of an associated control resource set.

[0220] Example 104. The apparatus according to example 94, where the mapping of the one or more control channel elements comprises an indication that provides a physical downlink control channel candidate of an aggregation level for the second stage downlink control information in a search space of an associated control resource set.

[0221] Example 105. The apparatus according to example 104, wherein the one or more memories further store instructions that, when executed by the one or more processors, cause the apparatus at least to perform sending, to the user equipment, separate indications of the aggregation level and a corresponding physical downlink control channel candidate.

[0222] Example 106. The apparatus according to example 104, wherein the one or more memories further store instructions that, when executed by the one or more processors, cause the apparatus at least to perform sending, to the user equipment, a joint indication of the aggregation level and a corresponding physical downlink control channel candidate.

[0223] Example 107. The apparatus according to any of examples 94 to 106, wherein the one or more memories further store instructions that, when executed by the one or more processors, cause the apparatus at least to perform sending, to the user equipment, indication of an aggregation level offset, wherein the aggregation level offset describes an offset between an aggregation level of the first stage downlink control information and an aggregation level of the second stage downlink control information.

[0224] Example 108. The apparatus according to examples 94 to 107, wherein aggregation levels of the first and second stage downlink control information are one of same aggregation levels or different aggregation levels.

[0225] Example 109. The apparatus according to examples 94 to 108, wherein the first stage downlink control information indicates whether a one stage or a two stage downlink control information transmission is used, and indication of whether the one stage or a two stage downlink control information transmission is used is by a field in the first stage downlink control information, by a bit or a state in a downlink control information resource allocation field or by a bit or another field of the first stage downlink control information.

[0226] Example 110. The apparatus according to examples 94 to 109, wherein a search space for the second stage downlink control information is one of a same as or different than a search space of the first stage downlink control information, and is located on one of a same or a different component carrier.

[0227] Example 111. The apparatus according to any of examples 94 to 110, wherein the one or more memories further store instructions that, when executed by the oneor more processors, cause the apparatus at least to perform one or both of the following: sending a physical downlink shared channel according to the downlink control information; or receiving physical uplink shared channel according to the downlink control information.

[0228] Example 112. A computer program, comprising instructions which, when the program is executed by an apparatus, cause the apparatus to carry out the methods of any of examples 1 to 37.

[0229] Example 113. The computer program according to example 112, wherein the computer program is a computer program product comprising a computer-readable medium bearing the instructions embodied therein for use with the apparatus.

[0230] Example 114. The computer program according to example 112, wherein the computer program is directly loadable into an internal memory of the apparatus.

[0231] As used in this application, the term “circuitry” may refer to one or more or all of the following:

[0232] (a) hardware-only circuit implementations (such as implementations in only analog and / or digital circuitry) and

[0233] (b) combinations of hardware circuits and software, such as (as applicable): (i) a combination of analog and / or digital hardware circuit(s) with software / firmware and (ii) any portions of hardware processor(s) (including digital signal processor(s)) with software, and memory(ies) that work together to cause an apparatus, such as a mobile phone or server, to perform various functions) and

[0234] (c) hardware circuit(s) and or processor(s), such as a microprocessor(s) or a portion of a microprocessor(s), that requires software (e.g., firmware) for operation, but the software may not be present when it is not needed for operation.

[0235] This definition of circuitry applies to all uses of this term in this application, including in any claims. As a further example, as used in this application, the term circuitry also covers an implementation of merely a hardware circuit or processor (or multiple processors) or portion of a hardware circuit or processor and its (or their) accompanying software and / or firmware. The term circuitry also covers, for example and if applicable to the particular claim element, a baseband integrated circuit or processor integrated circuit for a mobile device or a similar integrated circuit in server, a cellular network device, or other computing or network device.

[0236] Embodiments herein may be implemented in software (executed by one or more processors), hardware (e.g., an application specific integrated circuit), or a combinationof software and hardware. In an example embodiment, the software (e.g., application logic, an instruction set) is maintained on any one of various conventional computer-readable media. In the context of this document, a “computer-readable medium” may be any media or means that can contain, store, communicate, propagate or transport the instructions for use by or in connection with an instruction execution system, apparatus, or device, such as a computer, with one example of a computer described and depicted, e.g., in FIG.5. A computer-readable medium may comprise a computer-readable storage medium (e.g., memories 15, 75, and 95 or other device) that may be any media that can contain, store, and / or transport the instructions for use by or in connection with an instruction execution system, apparatus, or device, such as a computer. A computer-readable storage medium does not comprise propagating signals, and therefore may be considered to be non-transitory. The term “non-transitory”, as used herein, is a limitation of the medium itself (i.e., tangible, not a signal) as opposed to a limitation on data storage persistency (e.g., RAM, random access memory, versus ROM, read-only memory).

[0237] If desired, the different functions discussed herein may be performed in a different order and / or concurrently with each other. Furthermore, if desired, one or more of the above-described functions may be optional or may be combined.

[0238] Although various aspects of the invention are set out in the independent claims, other aspects of the invention comprise other combinations of features from the described embodiments and / or the dependent claims with the features of the independent claims, and not solely the combinations explicitly set out in the claims.

[0239] It is also noted herein that while the above describes example embodiments of the invention, these descriptions should not be viewed in a limiting sense. Rather, there are several variations and modifications which may be made without departing from the scope of the present invention as defined in the appended claims.

[0240] The following abbreviations that may be found in the specification and / or the drawing figures are defined as follows:

[0241] 1stfirst

[0242] 2ndsecond

[0243] 3GPP third generation partnership project

[0244] 5G fifth generation

[0245] 6G sixth generation

[0246] ACLR Adjacent Channel Leakage Ratio

[0247] AL aggregation level

[0248] AMF access and mobility management function

[0249] A-MPR Additional MPR (Maximum power reduction)

[0250] BS base station

[0251] BW bandwidth

[0252] CBW channel bandwidth

[0253] CC component carrier

[0254] CCE control channel element

[0255] CORESET control resource set

[0256] CRC Cyclic Redundancy Check

[0257] DCI downlink control information

[0258] DFT discrete Fourier transform

[0259] DFT-s-OFDM Discrete Fourier Transform spread Orthogonal Frequency Division Multiplexing

[0260] E-SMLC evolved serving mobile location center

[0261] eNB (or eNodeB) evolved Node B (e.g., an LTE base station)

[0262] EVM error vector magnitude

[0263] FDSS frequency domain spectrum shaping

[0264] GMLC Gateway Mobile Location Center

[0265] gNB (or gNodeB) base station for 5G / NR

[0266] IBE In-band Emissions

[0267] I / F interface

[0268] LMF Location Management Function

[0269] LPWZ Low Power Wide Area

[0270] LTE long term evolution

[0271] MIMO multiple input, multiple output

[0272] MME mobility management entity

[0273] MPR maximum power reduction

[0274] NF network function

[0275] ng or NG next generation

[0276] NR new radio

[0277] NRF Network Repository Function

[0278] N / W or NW network

[0279] OBO output back-off

[0280] OOB out-of-band

[0281] OOBE out-of-band emissions

[0282] PDCCH physical downlink control channel

[0283] PDSCH physical downlink shared channel

[0284] PUSCH physical uplink shared channel

[0285] PSD power spectral density

[0286] QPSK quadrature phase shift keying

[0287] RA resource allocation

[0288] RAN radio access network

[0289] RB resource block

[0290] Rel release

[0291] RF radio frequency

[0292] RNTI radio network temporal identifier

[0293] RRC radio resource control

[0294] Rx receiver

[0295] SEM spectral emission mask

[0296] SGW serving gateway

[0297] SMF session management function

[0298] TRP transmission-reception point

[0299] Tx transmitter

[0300] UDM unified data management

[0301] UDR unified data repository

[0302] UE user equipment (e.g., a wireless, typically mobile device)

[0303] UL uplink

[0304] UPF user plane function

Claims

What is claimed is:

1. An apparatus, comprising: one or more processors; and one or more memories storing instructions that, when executed by the one or more processors, cause the apparatus at least to perform: receiving a physical downlink control channel comprising a first stage downlink control information and a second stage downlink control information, where payload of the first stage downlink control information comprises a resource allocation indicative of resource allocation of the second stage downlink control information, where the resource allocation of the second stage downlink control information comprises mapping for one or more control channel elements for the second stage downlink control information; decoding the first stage downlink control information and determining the resource allocation of the second stage downlink control information including the mapping for the one or more control channel elements; and decoding the second stage downlink control information by using at least the determined resource allocation including the mapping for the one or more control channel elements.

2. The apparatus according to claim 1, where the mapping of the one or more control channel elements comprises one or both of the following: a location of allocated control channel elements of the second stage downlink control information; or a location of a first allocated control channel element of the second stage downlink control information.

3. The apparatus according to any of claims 1 or 2, where the mapping of the one or more control channel elements comprises one or both of the following: a number of the allocated control channel elements of the second stage downlink control information; or an aggregation level of the second stage downlink control information.

4. The apparatus according to claim 1, where the mapping for the one or more control channel elements comprises a bitmap indicating the mapping for the one or more control channel elements for the second stage downlink control information in a search space of an associated control resource set.

5. The apparatus according to claim 4, wherein a size of the bitmap is determined using ^^^^, where ^^^^is a number of control channel elements in the search space of the associated control resource set, and the size of the bitmap is a number of bits equivalent to ^^^^.

6. The apparatus according to claim 4, wherein: the bitmap has a granularity of M control channel elements, where M >= 1, and individual bits indicate a resource allocation of the granularity of M control channel elements; and a size of the bitmap is determined using ^^^^, where ^^^^is a number of control channel elements in the search space of the associated control resource set, and the size of the bitmap is a number of bits equivalent to +-.. / 0 1.

7. The apparatus according to claim 1, where the mapping for the one or more control channel elements comprises indications of a start and a length, where start indicates a starting control channel element in a search space of an associated control resource set, and length indicates a number of consecutively allocated control channel elements from the starting control channel element.

8. The apparatus according to claim 7, wherein the mapping includes one or both of the following: a number of bits for the start are⌈^^^^^^^^^^⌉, where ^^^^is a number of control channel elements in the associated control resource set; or a number of bits for the length is ⌈^^^^^4^&(5('&^⌉, where 4^&(5('&is a number of a set of states of an aggregation level.

9. The apparatus according to any of claims 7 or 8, wherein the start is explicitly signaled via signaling received by the apparatus from a network, and the length is derived from an aggregation level of the first stage downlink control information through use of differential signaling.

10. The apparatus according to claim 1, where the mapping for the one or more control channel elements comprises a control indicator value that combines both a start for the one or more control channel elements and a length indicating a number of the one or more control channel elements for the second stage downlink control information in a search space of an associated control resource set.

11. The apparatus according to claim 1, where the mapping of the one or more control channel elements comprises an indication that provides a physical downlink control channel candidate of an aggregation level for the second stage downlink control information in a search space of an associated control resource set.

12. The apparatus according to claim 11, wherein the one or more memories further store instructions that, when executed by the one or more processors, cause the apparatus at least to perform receiving, from a network, separate indications of the aggregation level and a corresponding physical downlink control channel candidate.

13. The apparatus according to claim 11, wherein the one or more memories further store instructions that, when executed by the one or more processors, cause the apparatus at least to perform receiving, from a network, a joint indication of the aggregation level and a corresponding physical downlink control channel candidate.

14. The apparatus according to any of claims 1 to 13, wherein the one or more memories further store instructions that, when executed by the one or more processors, cause the apparatus at least to perform receiving indication of an aggregation level offset, wherein the aggregation level offset describes an offset between an aggregation level of the first stage downlink control information and an aggregation level of the second stage downlink control information.

15. The apparatus according to claims 1 to 14, wherein aggregation levels of the first and second stage downlink control information are one of same aggregation levels or different aggregation levels.

16. The apparatus according to claims 1 to 15, wherein the first stage downlink control information indicates whether a one stage or a two stage downlink control information transmission is used, and indication of whether the one stage or a two stage downlink control information transmission is used is by a field in the first stage downlink control information, by a bit or a state in a downlink control information resource allocation field or by a bit or another field of the first stage downlink control information.

17. The apparatus according to claims 1 to 16, wherein a search space for the second stage downlink control information is one of a same as or different than a search space of the first stage downlink control information, and is located on one of a same or a different component carrier.

18. The apparatus according to any of claims 1 to 17, wherein the one or more memories further store instructions that, when executed by the one or more processors, cause the apparatus at least to perform combining payload bits of the decoded first and second stages of downlink control information to obtain an aggregated downlink control information.

19. The apparatus according to claim 18, wherein the one or more memories further store instructions that, when executed by the one or more processors, cause the apparatus at least to perform one or both of the following: receiving a physical downlink shared channel according to the aggregated downlink control information; or transmitting a physical uplink shared channel according to the aggregated downlink control information.

20. An apparatus, comprising: one or more processors; andone or more memories storing instructions that, when executed by the one or more processors, cause the apparatus at least to perform: determining location of a first stage downlink control information in physical downlink control channel for a downlink control information that is split into first and second stages; determining location of a second stage downlink control information and corresponding resource allocation in the physical downlink control channel; and sending, to a user equipment, a physical downlink control channel comprising the first stage downlink control information and the second stage downlink control information, where payload of the first stage downlink control information comprises a resource allocation indicative of resource allocation of the second stage downlink control information, where the resource allocation of the second stage downlink control information comprises mapping for one or more control channel elements for the second stage downlink control information.

21. A method, comprising: receiving, by a user equipment, a physical downlink control channel comprising a first stage downlink control information and a second stage downlink control information, where payload of the first stage downlink control information comprises a resource allocation indicative of resource allocation of the second stage downlink control information, where the resource allocation of the second stage downlink control information comprises mapping for one or more control channel elements for the second stage downlink control information; decoding, by the user equipment, the first stage downlink control information and determining the resource allocation of the second stage downlink control information including the mapping for the one or more control channel elements; and decoding, by the user equipment, the second stage downlink control information by using at least the determined resource allocation including the mapping for the one or more control channel elements.

22. A method, comprising: determining, by a base station, location of a first stage downlink control information in physical downlink control channel for a downlink control information that is split into first and second stages; determining, by the base station, location of a second stage downlink control information and corresponding resource allocation in the physical downlink control channel; and sending, by the base station to a user equipment, a physical downlink control channel comprising the first stage downlink control information and the second stage downlink control information, where payload of the first stage downlink control information comprises a resource allocation indicative of resource allocation of the second stage downlink control information, where the resource allocation of the second stage downlink control information comprises mapping for one or more control channel elements for the second stage downlink control information.

23. An apparatus, comprising means for: receiving a physical downlink control channel comprising a first stage downlink control information and a second stage downlink control information, where payload of the first stage downlink control information comprises a resource allocation indicative of resource allocation of the second stage downlink control information, where the resource allocation of the second stage downlink control information comprises mapping for one or more control channel elements for the second stage downlink control information; decoding the first stage downlink control information and determining the resource allocation of the second stage downlink control information including the mapping for the one or more control channel elements; and decoding the second stage downlink control information by using at least the determined resource allocation including the mapping for the one or more control channel elements.

4. An apparatus, comprising means for: determining location of a first stage downlink control information in physical downlink control channel for a downlink control information that is split into first and second stages; determining location of a second stage downlink control information and corresponding resource allocation in the physical downlink control channel; and sending, to a user equipment, a physical downlink control channel comprising the first stage downlink control information and the second stage downlink control information, where payload of the first stage downlink control information comprises a resource allocation indicative of resource allocation of the second stage downlink control information, where the resource allocation of the second stage downlink control information comprises mapping for one or more control channel elements for the second stage downlink control information.

Citation Information

Patent Citations

  • A method, terminal, and base station for resource allocation indication

    CN108934068B

  • Resource scheduling method and device

    CN115707130A

  • Radio resource semi-static allocation method and device, terminal equipment and network equipment

    CN117676882A

  • Method for sending and receiving downlink control information, base station, and mobile terminal

    US20140133440A1

  • A method for multi-stage downlink control information transmission in wireless access network

    WO2024216864A1