Metal-bonded substrates for devices, thermoelectric modules, and thermoelectric arrays

Abstract

A device includes a metal-bonded substrate, a contact layer disposed on the metal-bonded substrate, and a thermoelectric element disposed on the first contact layer. The thermoelectric element comprises a controlled hierarchically engineered superlattice structure (CHESS). A thermoelectric module, an array of thermoelectric modules, and a method for manufacturing an array of thermoelectric modules are also disclosed.

Description

METAL-BONDED SUBSTRATES FOR DEVICES, THERMOELECTRIC MODULES, AND THERMOELECTRIC ARRAYSCROSS-REFERENCE TO RELATED APPLICATIONS

[0001] The present application claims benefit under 35 U.S.C. § 119(e) to U.S. Provisional Patent Application No. 63 / 656,205 filed on June 5, 2024, which is hereby incorporated by reference in its entirety.STATEMENT REGARDING FEDERALLY-SPONSORED RESEARCH AND DEVELOPMENT

[0002] This invention was made with support from the United States Government. The United States Government has certain rights in the invention.FIELD

[0003] This disclosure relates generally to devices and thermoelectric modules bonded to fused substrates, in particular to thin film thermoelectric heating and / or cooling and electric power generation devices disposed on metal-bonded substrates and methods for manufacturing.BACKGROUND

[0004] Thermoelectric materials use the Peltier and Seebeck effects to convert electric power into a temperature differential to generate a heating or cooling effect or to turn a temperature gradient across the device into a voltage that can be used for power generation, respectively. Thermoelectric modules are formed by electrically connecting two disparate thermoelectric materials, one a p-type semiconductor and the other an n- type semiconductor. The dimensionless thermoelectric figure of merit for a material [zT = (a2.o / K)T] at any temperature T can be increased by increasing the electrical conductivity (c) and Seebeck coefficient (a) of a material and / or by reducing the thermal conductivity (K) of the material. However, the thermal conductivity of a material is the sum of thermal conductivity from electrons (Ke) and lattice vibrations known as phonons (KL). Thus,materials such as metals that have very high electrical conductivities due to high carrier numbers also have very high thermal conductivities, and thus make poor thermoelectric materials.

[0005] In view of the above, thermoelectric material research has focused on semiconductor materials. Intrinsic semiconductors have tunable electrical conductivities and exhibit much lower thermal conductivities than metals due to strongly reduced electron thermal conductivities. However, as the electrical conductivity of a semiconductor increases (for example, by electron or hole conduction with donor or acceptor doping, respectively), the higher number of carriers leads to a higher electronic thermal conductivity. Thus, a key consideration in thermoelectric materials research is in increasing the electrical conductivity of a material without greatly increasing the material’s electronic thermal conductivity. This is achieved by nanostructures that can scatter lattice vibrations / phonons that transport heat without affecting electronic carrier scattering. Any heat within a device, such as for example, Joule heating due to either the resistance of die headers that connect the P and N elements of a P-N couple or the traces that bring current into the N-element and takes it out from the P-element, can negatively affect the performance of a thermoelectric heating and / or cooling or electric power generation device.SUMMARY

[0006] In view of the above, it is desirable to develop devices and thermoelectric modules having improved performance.

[0007] In some aspects, a device includes a metal-bonded substrate, a contact layer disposed on the metal-bonded substrate, and a thermoelectric element disposed on the contact layer. The thermoelectric element may be a controlled hierarchically engineered superlattice structure (CHESS).

[0008] In some aspects, a module includes at least one first device and at least one second device. The at least one first device may include a first metal-bonded substrate, a first contact layer provided on the first metal-bonded substrate, a first thermoelectric element provided on the first contact layer, a second contact layer provided on the first thermoelectric element, and a second metal-bonded substrate bonded to the second contact layer. The at least one second device may include a third metal-bonded substrate,a third contact layer provided on the third metal-bonded substrate, a second thermoelectric element provided on the third contact layer, and a fourth contact layer provided on the second thermoelectric element. The second metal-bonded substrate may be bonded to the fourth contact layer. The first thermoelectric element may be one of a p- type thermoelectric material and an n-type thermoelectric material, and the second thermoelectric element may be the other of the p-type thermoelectric material and the n- type thermoelectric material. The first thermoelectric element and the second thermoelectric element may be electrically connected in series via the second metal- bonded substrate. Each of the first thermoelectric element and the second thermoelectric element may be a controlled hierarchically engineered superlattice structure (CHESS).

[0009] In some aspects, a method includes disposing a first contact layer on at least a first portion of a metal-bonded substrate and at least a second portion of the first metal-bonded substrate. At least one first thermoelectric element may be disposed on the first contact layer in the first portion. At least one second thermoelectric element may be disposed on the first contact layer in the second portion. A second contact layer may be disposed on the at least one first thermoelectric element in the first portion and on the at least one second thermoelectric element in the second portion. A header substrate may be bonded to the second contact layer in each of the first portion and the second portion. Each of the first thermoelectric element and the second thermoelectric element may be a controlled hierarchically engineered superlattice structure (CHESS).BRIEF DESCRIPTION OF THE DRAWINGS / FIGURES

[0010] The accompanying drawings, which are incorporated herein and form part of the specification, illustrate the present disclosure and, together with the description, further serve to explain the principles of the present disclosure and to enable those skilled in the relevant art(s) to make and use aspects described herein.

[0011] FIG. 1 shows a device, according to some aspects.

[0012] FIG. 2 shows a thermoelectric module, according to some aspects.

[0013] FIG. 3 shows a method of manufacturing an array of thermoelectric modules, according to some aspects.

[0014] FIG. 4 shows a process flow for a method of manufacturing thermoelectric modules and arrays using metal-bonded substrates, according to some aspects.

[0015] The features of the present disclosure will become more apparent from the detailed description set forth below when taken in conjunction with the drawings, in which like reference characters identify corresponding elements throughout. In the drawings, like reference numbers generally indicate identical, functionally similar, and / or structurally similar elements. Additionally, generally, the left-most digit(s) of a reference number identifies the drawing in which the reference number first appears. Unless otherwise indicated, the drawings provided throughout the disclosure should not be interpreted as to-scale drawings.DETAILED DESCRIPTION

[0016] The aspects described herein, and references in the specification to “one aspect,” “an aspect,” “an exemplary aspect,” “an example aspect,” etc., indicate that the aspects described can include a particular feature, structure, or characteristic, but every aspect may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same aspect. Further, when a particular feature, structure, or characteristic is described in connection with an aspect, it is understood that it is within the knowledge of those skilled in the art to effect such feature, structure, or characteristic in connection with other aspects whether or not explicitly described.

[0017] Spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “on,” “upper” and the like, can be used herein for ease of description to describe one element or feature’s relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus can be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein can likewise be interpreted accordingly.

[0018] The terms “about,” “approximately,” “nearly,” or the like can be used herein indicates the value of a given quantity that can vary based on a particular technology. Based on the particular technology, the terms “about,” “approximately,” “nearly,” or the like can indicate a value of a given quantity that varies within, for example, 1-30% of the value (e.g., ±1%, ±5%, ±10%, ±20%, or ±30% of the value).Thermoelectric CHESS Modules, Devices, and Arrays

[0019] Described herein are devices disposed on metal-bonded substrates, thermoelectric modules including devices disposed on metal-bonded substrates, arrays of thermoelectric modules, and methods for manufacturing such arrays.

[0020] Thermoelectric materials utilize the thermoelectric effect to convert an electric power input into a temperature differential to generate a heating effect or cooling effect. This thermoelectric effect, referred to as the “Peltier effect,” can be achieved by connecting together two different thermoelectric materials, one being a p-type material and the other being an n-type material, with a metal interconnect to form an electrical junction. A thermoelectric module comprises at least one n-type material so connected with at least one n-type material via an electrical junction. Applying a voltage across the junction may induce a current flow, thereby cooling at one end of the junction (producing a cooling effect) while rejecting heat at the opposite end of the junction (producing a heating effect). Thermoelectric materials may also use the Seebeck effect — which induces a voltage in a junction due to the presence of a temperature gradient across the junction — to turn a temperature differential into electric power. The Seebeck effect is complimentary to the Peltier effect, and the material properties and device requirements are similar for both the cooling / heating with electrical power input (the Peltier effect) and electrical power generation with an external heat-source generated temperature differential (the Seebeck effect).

[0021] In some aspects, thermoelectric heating and / or cooling power generation devices may contain a single thermoelectric module, or an array of thermoelectric modules. Such thermoelectric devices may be used for electronics cooling, air conditioning, refrigeration, thermal control, energy harvesting, or any combination thereof.

[0022] The performance of a thermoelectric device is based on the energy conversion efficiency (for both heating and cooling and power generation) of the thermoelectric module(s). This efficiency can be determined from the thermoelectric figure of merit(ZT), defined as ZT =where a, T, <J, and KT are the Seebeck coefficient, absolute K temperature, electrical conductivity, and total thermal conductivity, respectively.

[0023] Recently, thin film thermoelectric heating and / or cooling and power generation devices have demonstrated high figures of merit (ZT), due in part to the scattering of heat-carrying phonons at the various interfaces within the thin film. Combinations ormulti-layer stacks of superlattices build a thin film - i.e., from multiple layers of semiconductors having different lattice constants, leading to higher electrical conductivity along a two-dimensional plane of the material and reduced thermal conductivity along the direction perpendicular to that plane (i.e., through the superlattice layers). Engineered thin films, such as controlled hierarchically engineered superlattice structures (CHESS), have emerged as promising candidates for high performance thermoelectric heating and / or cooling and power generation devices. Within aspects, CHESS thin films may scatter heat-conducting phonons without significant impediment to electronic carrier transport, thus reducing lattice thermal conductivity ki. and improving or maintaining electrical conductivity c, and thereby help achieve higher ZT. In some aspects, CHESS thin film thermoelectric heating and / or cooling and power generation devices structures and operations can be found in U.S. App. No. 15 / 700,263, which is incorporated by reference herein in its entirety.

[0024] In some aspects, CHESS thin film thermoelectric heating and / or cooling and power generation devices are thin film thermoelectric heating and / or cooling and power generation devices that may operate at higher currents (e.g., 1 to 10 Amps) to provide high heat flux cooling and refrigeration and power generation. For example, in some aspects, a CHESS thin film thermoelectric heating and / or cooling and power generation device may form a thermoelectric heating and / or cooling device in a heat pump configured to heat an area or in a refrigerator to cool an area. Within aspects, a CHESS thin film thermoelectric heating and / or cooling and power generation device may form a power conversion or energy harvesting device. For example, in aspects, a CHESS thin film thermoelectric heating and / or cooling and power generation device may form an energy harvesting device in a spacecraft — for example, to convert solar radiation into electrical power — or in a wearable device — for example, to convert heat generated by a human or robot into electrical power. Additionally, for example, in aspects, a CHESS thin film thermoelectric heating and / or cooling and power generation device may provide cooling or heating effects in a wearable device.

[0025] Under these high current loads, the electrical resistance of die headers — one or more substrates that form the cold-side die header and / or hot-side die header and that hold and / or connect various thermoelectric modules into a single array — may contribute to dissipative Joule (I2R) heating. Thus, according to aspects, the electrical resistance of thedie headers should be kept low, e.g., negligible as compared to the Ohmic resistances of the P- and N-elements, to minimize or avoid Joule heating, particularly at the cold-end of the array. This Joule heating will reduce the heat that is pumped from a target thermal load. However, conventional electroplated copper traces may be thin (e.g., ~30 pm or less), and thus have small cross-sectional areas for current conduction and hence increased electrical resistance. The thinness of such copper traces may lead to high resistance values and to problems such as current crowding and heating at higher current levels.

[0026] According to aspects, a thermoelectric module including CHESS structures as the p-type and n-type thermoelectric elements can demonstrate improved ZT. In some aspects, a thermoelectric module may include two or more thermoelectric elements, each thermoelectric element including at least one controlled hierarchical engineered superlattice structure (CHESS) structure or material. In some aspects, a thermoelectric module may include p-type CHESS (P-CHESS) structures or materials and n-type CHESS (N-CHESS) structures or materials. In some aspects, a thermoelectric module may be formed from a pair of thermoelectric elements that includes one of the P-CHESS structures or materials and one of the N-CHESS structures or materials.

[0027] In some aspects, each of the P-CHESS structures can include a first CHESS material including first CHESS periods. In some aspects, each of the first CHESS periods may include a first p-type semiconductor material layer disposed adjacent to a second p- type semiconductor material layer. In some aspects, for each of the first CHESS periods, the first p-type semiconductor material layer can include p-type bismuth telluride (Bi2Tes), and the second p-type semiconductor material layer can include p-type antimony telluride (Sb2Te3) or a p-type bismuth antimonide alloy (BixSb2-x Tea). In some aspects, for each of the first CHESS periods, the first p-type semiconductor material layer can include a first periodic table Group V-VI, II- VI, or IV compound doped to form a second p-type semiconductor material, and the second p-type semiconductor material layer can include a second periodic table Group V-VI, II- VI, or IV compound doped to form a second p-type semiconductor material. As used herein, the term “semiconductor material” can include, but is not limited to, Bi2Te3, Sb2Te3, Sb2-xBixTe3, Bi, Sb, PbTe, PbSe, PbTei-xSex, PbS, PnSnTe, Si, Ge, SixGei-x, or any other suitable material or combination thereof.

[0028] In some aspects, each of the N-CHESS structures can include a second CHESS material including second CHESS periods. In some aspects, each of the second CHESS periods can include a first n-type semiconductor material layer disposed adjacent to a second n-type semiconductor material layer. In some aspects, for each of the second CHESS periods, the first n-type semiconductor material layer can include n-type Bi2Te3, and the second n-type semiconductor material layer can include n-type Bi2Se3 or n-type Bi2Te3-xSex. In some aspects, for each of the second CHESS periods, the first n-type semiconductor material layer can include a first periodic table Group V-VI, II- VI, or IV compound doped to form a first n-type semiconductor material, and the second n-type semiconductor material layer can include a second periodic table Group V-VI, II- VI, or IV compound doped to form a second n-type semiconductor material structure (CHESS) structure or material. As used herein, the term “semiconductor material” can include, but is not limited to, Bi2Te3, Bi2Se3,Bi2Te3-xSex, Bi, Sb, PbTe, PbSe, PbTei-xSex, PbS, PnSnTe, Si, Ge, SixGei-x, or any other suitable material or combination thereof. In some aspects, the thermoelectric structures can include p-type CHESS (P-CHESS) structures and n-type CHESS (N-CHESS) structures. In some aspects, the pair of thermoelectric structures can include one of the P-CHESS structures and one of the N-CHESS structures.

[0029] In some aspects, the thermoelectric figure of merit (ZT) may also be improved though the implementation of novel thin-film fabrication methods. In one example, doped contact layers may be epitaxially grown on either side of an n-type or p-type element. The doped contact layers may lower the contact resistivity between the n-type or p-type thermoelectric structure and their respective metal contacts.

[0030] In some aspects, n-type or p-type elements may be etched to remove defects that are formed between the original substrate on which an epitaxial film (e.g., n-type or p- type element) is grown and the epitaxial film. Etching times may be increased from about 60 seconds to about 120 seconds to better remove deep defects in an n-type thermoelectric structure.

[0031] In some aspects, force points can be used to hold n-type elements and p-type elements in place while the n- and p-type elements are bonded to a die header. This may reduce bending and twisting of the n-type and p-type elements during bonding and lower step height to below about 25 microns. In aspects, a robotic system may automaticallypick and place thermoelectric elements onto a die header. This can improve speed and accuracy of fabrication.Metal-bonded Substrates

[0032] In some aspects, reduction of the electrical resistance of the die header may be achieved by providing a copper trace layer having a thickness between approximately 50 microns and 200 microns. However, such thick copper traces are difficult to achieve by conventional electroplating techniques. Thus, according to aspects, a metal-bonded substrate may be used as one or both headers in place of conventional copper traces electroplated onto a ceramic substrate.

[0033] According to aspects, a metal-bonded substrate consists of a metal layer bonded onto a ceramic substrate. In aspects, the metal layer may be one or more of copper and molybdenum. Within aspects, the metal layer may comprise pure copper or pure molybdenum, nearly pure copper or nearly pure molybdenum, approximately pure copper or approximately pure molybdenum, copper having low impurities or molybdenum having low impurities, or a combination of copper and molybdenum. For example, a metal layer in aspects may be formed of 95% copper, 99% copper, 99.9% copper, 99.99% copper, or higher purity copper. A metal layer in aspects may be formed of 95% molybdenum, 99% molybdenum, 99.9% molybdenum, 99.99% molybdenum, or higher purity molybdenum. In some aspects, the metal layer may comprise copper or molybdenum alloyed with one or more metals to increase one or more physical properties of the copper or molybdenum. For example, in some aspects, the metal layer may comprise copper or molybdenum alloyed or mixed with at least one of gold, silver, indium, tin, lead, bismuth, zinc, nickel, aluminum, phosphor, silicon, and beryllium. According to some aspects, the metal layer may comprise only a thin copper or molybdenum cladding layer disposed on another layer comprising at least one of gold, silver, indium, tin, lead, bismuth, zinc, nickel, aluminum, phosphor, silicon, and beryllium.

[0034] According to aspects, a metal-bonded substrate consists of a ceramic layer with which the metal layer is fused. Within aspects, the ceramic layer may be comprised of at least one of aluminum oxide (i.e., alumina) aluminum nitride, silicon carbide, boron nitride, boron carbide, and zirconia. Within aspects, the ceramic layer may be a multi-layer ceramic material. For example, in some aspects, the ceramic layer may comprise a silicon substrate coated with one or more of silicon nitride and silicon dioxide.

[0035] In aspects, a thickness of the metal layer may be determined based on a thickness of the thermoelectric element, a desired thickness of the thermoelectric module, and desired physical (electrical and thermal) properties of the thermoelectric module. In some aspects, a thickness of the thermoelectric module may be greater than or equal to approximately 0.5 mm and less than or equal to approximately 3 mm. Within aspects, to facilitate such a thickness of the thermoelectric module, the metal layer may have a thickness that is greater than or equal to approximately 50 pm and less than or equal to 300 pm. In an exemplary aspect, the metal layer may have a thickness that is greater than or equal to 200 pm and less than or equal to 250 pm. In at least one aspect, the metal layer may have a thickness of approximately 250 pm. Due to the greater thickness of the metal layer in metal-bonded substrates, metal-bonded substrates are able to reduce the sheet resistance and current crowding effects that may cause undesired heating on either the cold side die header or the hot side die header adjacent to the heat-sink side of a thermoelectric heating and / or cooling or power generation device.

[0036] According to aspects, a metal-bonded substrate may be formed by fusing a relatively thick metal layer onto the surface of a ceramic. In aspects, a metal layer may be disposed on a ceramic layer and then bonded to the ceramic layer in a high temperature heat treatment. During the high temperature heat treatment, the metal layer may be melted or otherwise allowed to at least somewhat diffuse into the ceramic, thereby lowering an interfacial boundary between the metal layer and the ceramic. In some aspects, the metal- bonded substrate may be a direct bond copper (DBC) substrate.

[0037] In aspects, a thickness of the ceramic may be determined based on a thickness of the thermoelectric element, a desired thickness of the thermoelectric module, and desired physical (electrical and thermal) properties of the thermoelectric module. In some aspects, to facilitate a thermoelectric module having a thickness that is greater than or equal to approximately 0.5 mm and less than or equal to approximately 3 mm, the ceramic may have a thickness that is greater than or equal to approximately 250 pm and less than or equal to approximately 1 mm. According to aspects, the ceramic may have a thickness of approximately 381 pm, approximately 635 pm, or approximately 1.016 mm.

[0038] In some aspects, using a metal-bonded substrate as a die header on the cold side of a thermoelectric module may provide several benefits over a conventional copper trace. For example, a metal-bonded substrate may reduce the thermal interface at the boundary between the metal layer and the ceramic, which may reduce phonon scattering and improve thermal conductivity between the metal layer and the ceramic, thereby allowing more efficient “pumping” of heat at the cold side - specifically from the ceramic to the metal layer to the thermoelectric element. In addition, the presence of a high thickness metal layer reduces the resistance of the metal layer, thereby lowering the resistance of electrical connections and reducing Joule heating from the copper layer. Minimizing such Joule heating may be particularly important when the thermoelectric modules incorporate high current CHESS thermoelectric structures or materials. This is because Joule heating rises as the square of the current passing through the material and this Joule heating will reduce the amount of heat pumped from a desired object that needs to be cooled.

[0039] In some aspects, using a metal-bonded substrate on the hot side of a thermoelectric module may also provide benefits over a conventional copper trace substrate. For example, in addition to reducing Joule heating, a thick metal layer lowers the heat flux at the metal-ceramic interface by spreading the heat from the thermoelectric module to a larger portion of the ceramic. As one example, a 200 pm metal layer can reduce the heat flux at the metal-ceramic interface by more than a factor of four compared to a 30 pm thick copper trace for the same size (e.g., 250 pm) thermoelectric element. Although the heat is mostly carried by electrons in the metal layer, heat in the ceramic is mostly carried by phonons. Under such circumstances, a reduction of heat flux in the ceramic is significant and reduces the impact of thermal interfacial resistance at the metal-ceramic interface. These properties of the metal-bonded substrate allow for the reduction of both electrical and thermal parasitics, particularly, in high current application thermoelectric heating and / or cooling and power generation devices (e.g., high heat pumping applications). Similar considerations may also be beneficial in high temperature differential applications (e.g., cooling lift applications). In some aspects, these properties of a metal-bonded substrate may lead to a higher coefficient of performance (CoP) and higher temperature differential (DTmax) in the resulting thermoelectric heating and / or cooling device or higher heat-to-electric conversion efficiency in power generation.Metal-bonded Substrate Devices and Thermoelectric Modules

[0040] FIG. 1 shows a block diagram of an exemplary device 100, according to some aspects. A metal -bonded substrate 102 may form a top or bottom of device 100. A contact layer 104 may be disposed on metal -bonded substrate 102, and a thermoelectric element 106 may be disposed on contact layer 104.

[0041] According to aspects, metal -bonded substrate 102 may be a metal -bonded substrate as discussed above. For example, metal -bonded substrate 102 may include a metal layer fused to a ceramic substrate. In some aspects, metal -bonded substrate 102 may constitute a direct bond copper (DBC) substrate. Within aspects, metal-bonded substrate 102 may form a cold-side die header or a hot-side die header for thermoelectric element 106. In an exemplary aspect, metal -bonded substrate 102 may be a cold-side die header for thermoelectric element 106.

[0042] In aspects, contact layer 104 may include one or more layers that function to bond thermoelectric element 106 to metal -bonded substrate 102. In some aspects, contact layer 104 may include at least one metal or metal alloy that creates a bond between thermoelectric element 106 and the metal layer of metal-bonded substrate 102. For example, contact layer 104 may include at least one of indium, lead, tin, gallium, germanium, bismuth, antimony, tellurium, selenium, arsenic, aluminum, silicon, phosphorus, boron, carbon, silver, gold, and zinc. In an exemplary aspect, contact layer 104 may comprise a layer of pure, nearly pure, or approximately pure tin or a tin alloy. In some aspects, the contact layer may include at least one of tin, indium, silver, and an alloy of one or more of tin, indium, and silver. For example, in some aspects, the contact layer may include at least one of indium-tin (InSn) and silver-tin (AgSn).

[0043] Within aspects, contact layer 104 may also include additional layers, such as a nickel or chromium contact layer and / or a copper layer. In at least one exemplary aspect, contact layer 104 may include a tin layer provided on the metal layer of metal -bonded substrate 102 and a nickel or chromium layer formed on the surface of the tin layer to be in direct contact with thermoelectric element 106. Contact layer 104 may comprise more or fewer layers according to aspects.

[0044] According to aspects, contact layer 104 may be formed to have a thickness sufficient to bond thermoelectric element 106 to the metal layer of metal -bonded substrate 102. In aspects, contact layer 104 may have a thickness that is less than or equal to 200m, less than or equal to 150 pm, or approximately 100 pm. In an exemplary aspect, contact layer 104 may constitute a tin layer having a thickness of approximately 50 pm, and a copper layer having a thickness of 30 pm, so that a total thickness of contact layer 104 is approximately 80 pm. However, aspects are not limited to these thicknesses.

[0045] According to aspects, thermoelectric element 106 may be a thin film thermoelectric structure or material. In aspects, thermoelectric element 106 may be a P- CHESS structure or material or an N-CHESS structure or material, as discussed above.

[0046] According to some aspects, device 100 may further comprise a contact layer 108 provided on thermoelectric element 106 and a header 110 provided on contact layer 108. In some aspects, contact layer 108 may be made of similar materials having similar thicknesses to contact layer 104. For example, in some aspects, contact layer 108 may include a layer of nickel or chromium in contact with thermoelectric element 106 and a layer of pure, nearly pure, or approximately pure indium having a thickness of approximately 25 pm. Within aspects, contact layer 108 may comprise an array of indium bonding bumps. However, within aspects, contact layer 108 may comprise one or more of indium, lead, tin, gallium, germanium, bismuth, antimony, tellurium, selenium, arsenic, aluminum, silicon, phosphorus, boron, carbon, silver, gold, and zinc. In some aspects, contact layer 108 may include one or more additional layers, such as a nickel or chromium layer and / or an additional copper layer.

[0047] Contact layer 108 may be provided to bond thermoelectric element 106 to a header 110. In aspects, header 110 may be a cold-side die header or a hot-side die header for thermoelectric element 106. For example, if metal-bonded substrate 102 forms a coldside die header for thermoelectric element 106, header 110 may form a hot-side die header for thermoelectric element 106, or vice-versa. In some aspects, header 110 may constitute a metal-bonded substrate as discussed above, such as, for example, a direct bond copper (DBC) substrate. However, aspects are not limited to using a metal-bonded substrate for header 110. In some aspects, a substrate other than a metal -bonded substrate may be used for header 110. For example, in some aspects, header 110 may comprise a ceramic substrate having a copper trace electroplated thereon. Benefits of using a metal- bonded substrate for header 110 will be discussed below.

[0048] FIG. 2 shows a block diagram of an example thermoelectric module 200, according to some aspects. According to aspects, thermoelectric module 200 may includea first device 201 and a second device 221. In some aspects, first device 201 and a second device 221 may be disposed on a carrier substrate 250.

[0049] According to aspects, first device 201 may include a metal -bonded substrate 202, a contact layer 204, a thermoelectric element 206, a contact layer 208, and a header 210 that are similar to metal -bonded substrate 102, contact layer 104, thermoelectric element 106, contact layer 108, and header 110 discussed above. In addition, second device 221 may include a metal-bonded substrate 222, a contact layer 224, a thermoelectric element 226, a contact layer 228, and header 210 that are similar to metal -bonded substrate 102, contact layer 104, thermoelectric element 106, contact layer 108, and header 110 discussed above. Within aspects, header 210 may connect between first device 201 and second device 221.

[0050] In some aspects, thermoelectric element 206 and thermoelectric element 226 may be opposite type thermoelectric elements. For example, in some aspects, thermoelectric element 206 may be p-type, and thermoelectric element 226 may be n-type, or vice versa. Thus, within aspects, header 210 may provide a series electrical connection between thermoelectric element 206 and thermoelectric element 226. According to aspects, such a series electrical connection between thermoelectric element 206 and thermoelectric element 226 may create a single thermoelectric module 200. In such a case, header 210 may form either a cold-side die header or a hot-side die header for both of device 201 and device 221. Correspondingly, metal -bonded substrate 202 and metal -bonded substrate 222 may form the other of the cold-side die header or the hot-side die header for both of device 201 and device 221.

[0051] Although FIG. 2 shows a configuration wherein one p-type device and one n-type device are electrically connected into a single thermoelectric module, aspects are not limited to this configuration. More or fewer devices may be combined by header 210. In some aspects, a plurality of modules 200 may be combined into a single array. For example, header 210 may be bonded to a plurality of p-type devices and a plurality of n- type devices to create an array. In aspects, each device of a single type may be connected to a single metal-bonded substrate or to a separate respective metal-bonded substrate, or to multiple metal-bonded substrates. According to aspects, each device of a single type may be electrically and thermally connected in parallel with one another to form asubarray, and two or more such subarrays may be electrically connected in series via a header to form an array.

[0052] There are several process steps unique to implementing CHESS thin film thermoelectric heating and / or cooling and power generation devices on metal-bonded substrates on cold-side and / or hot-side die headers. These process steps are described in detail below with regard to FIG. 3. The method set forth in FIG. 3 is also scalable to multi-module arrays for higher array ZT, higher DTmax, higher CoP, and higher heat-to- electric conversion efficiency.

[0053] FIG. 3 shows a flowchart for a method 300 of manufacturing a thermoelectric array, according to some aspects. Method 300 begins at operation 302 by disposing a contact layer on first portions and second portions of a metal-bonded substrate. This contact layer may be similar to contact layers 104, 204, and 224 discussed above. At operation 302, in some aspects, the contact layer may be disposed over an entire surface of the metal-bonded substrate. In some aspects, the contact layer may be disposed only over specified portions of the metal-bonded substrate, so that the first and second portions of the metal-bonded substrate are separated by areas lacking the contact layer.

[0054] Once the contact layer is disposed on the metal-bonded substrate at operation 302, method 300 may proceed to operation 304. According to aspects, at operation 304, a first thermoelectric element may be disposed on the first contact layer in the first portions of the metal-bonded substrate. In aspects, after the first thermoelectric element is disposed, method 300 may proceed to operation 306, where a second thermoelectric element is disposed on the first contact layer in the second portions of the metal-bonded substrate. Each of the first thermoelectric element and the second thermoelectric element may be a controlled hierarchically engineered superlattice structure (CHESS) thin film thermoelectric. Although FIG. 3 shows operations 304 and 306 as occurring sequentially, aspects are not limited to this configuration, and operations 304 and 306 may occur concurrently, or operation 306 may occur before operation 304.

[0055] After the first thermoelectric element and the second thermoelectric element are each disposed on the contact layer, method 300 may proceed to the disposing of a second contact layer at operation 308, according to aspects. The second contact layer disposed at operation 308 may be similar to contact layers 108, 208, and 228, as discussed above. Forexample, in one aspect, operation 308 may include disposing a plurality of indium bumping material on the surfaces of the first device and the second device.

[0056] Method 300 may then proceed to dicing the metal -bonded substrate at operation 310, according to aspects. In some aspects, during operation 310, each device may be singulated into a separate die. In some aspects, operation 310 may comprise only dicing the metal-bonded substrate to separate devices of different types (i.e., to separate n-type devices from p-type devices), so that devices of a single type are connected by a single metal-based substrate.

[0057] According to aspects, method 300 may conclude with the bonding of one or more headers to the second contact layer at operation 312. In aspects, at operation 312, a single header may be bonded to a plurality of devices to form a thermoelectric module or an array of thermoelectric modules. The header used in operation 312 may be similar to header 110 and 210, as discussed above. In some aspects, the header in operation 312 may be a second metal-bonded substrate. In some aspects, the header in operation 312 may be a substrate with a copper trace, as discussed above.

[0058] In some aspects, the header may be bonded to one p-type thermoelectric element and to one n-type thermoelectric element to form a single thermoelectric module. Alternatively, the header may be bonded to a plurality of p-type devices and to a plurality of n-type devices to form an array including multiple thermoelectric modules. In some aspects, an array may include, for example, 2 p-type devices and 2 n-type devices (a 2x2 array), or 4 p-type devices and 4 n-type devices (a 4x4 array), or 16 p-type devices and 16 n-type devices (a 16x16 array). Aspects are not limited to these exemplary configurations, and any NxN array, where N is an arbitrary integer number, is possible. Further, it is not necessary that the same number of p-type devices and n-type devices be used, so that an MxN array is also possible, where M and N are different arbitrary integer numbers.Examples

[0059] The above aspects may be clarified by several examples that illustrate the configurations discussed above.

[0060] As explained below, the DTmax may improve from approximately 45 K — in devices using thin copper traces of approximately 30 pm on ceramic for both cold side die header and hot-side die header — to as much as approximately 60.6 K in thermoelectricheating and / or cooling and power generation devices using thicker metal layers of approximately 200 pm on ceramic for both the cold side die header and the hot-side die header. In addition, using metal-bonded substrates may significantly reduce the processing steps and cost involved in the fabrication of thin film thermoelectric heating and / or cooling and power generation devices for high heat-flux pumping and refrigeration applications. Metal-bonded substrate CHESS thin film thermoelectric heating and / or cooling devices may also be useful for power generation (i.e., high electric power density) applications as well as low-cost waste harvesting applications to convert heat into electric power.

[0061] In a first set of experiments, a series of single die CHESS thin film thermoelectric heating and / or cooling devices were made using:• standard copper trace electroplated AIN substrates for each of the bottom header and the die header (Comparative Example 1);• a standard copper trace electroplated AIN substrate as the die header and a metal-bonded substrate comprising a copper metal layer on an aluminum nitride ceramic layer for the bottom header (Sample 1); and• metal-bonded substrates comprising a copper metal layer on an aluminum nitride ceramic layer for each of the die header and the bottom header (Sample 2).

[0062] The contact layers and thermoelectric elements were otherwise kept the same across the samples. The samples were tested for maximum current (Imax), maximum voltage (Vmax), and maximum temperature differential (DTmax). The results are summarized in Table I below.Table I: DT max for sample thin film thermoelectric heating and / or cooling devices using metal-bonded substrates.

[0063] As shown in Table I, DTmax increases for each of Sample 1 and Sample 2 as compared to Comparative Example 1. In addition, Sample 2 demonstrates an Imax increase over that of Comparative Example 1 and Sample 1. Moreover, Sample 2 also showed asignificant increase in DTmax to over 60 °C. The benefits measured in these cooling experiments are expected to translate into improvements in the power generation mode of the thin film thermoelectric heating and / or cooling devices, particularly if the thermal interfaces are improved, thereby allowing for more heat to flow through the CHESS thin film thermoelectric heating and / or cooling device and be converted into electric power.

[0064] Based on the above results, a 2x2 array, including a total of 4 dies, was built using a metal -bonded substrate for both the bottom header and the die header (as in Sample 2 above) to demonstrate the uniformity and modularity of the thermoelectric heating and / or cooling devices. The Vo, Vr, and ZT were individually measured for each die, where ZT is the thermoelectric figure of merit, and Vo and Vr are the transient voltage components due to an applied current pulse. A summary of the measured properties is provided in Table II below. As shown in Table II, die-to-die variation is minimal (near measurement error) despite the thermoelectric heating and / or cooling devices demonstrating a ZT in the range of 0.85 to 1.13. In addition, Vo for the entire array was 27.6 mV, and Vr for the entire array was 29.2 The ZT for the entire module was 0.95 as measured in open air, and is expected to be slightly higher in vacuum.Table II: ZT for a 2x2 array of metal-bonded substrate CHESS thin film thermoelectric heating and / or cooling devices.

[0065] Subsequent cooling tests were also performed on each die and are summarized below in Table III. The data in Table III confirms the ZT measurements in Table 1. In particular, the variation in DTmax across the four devices is minimal (1.8 °C variation). This data shows that using metal-bonded substrates as base headers and / or die headers for CHESS thin film thermoelectric heating and / or cooling devices can lead to improved DTmax and high ZT thermoelectric heating and / or cooling devices and arrays.Table III: DT max for heating and / or cooling devices using metal-bonded substrates.

[0066] FIG. 4 shows a process flow for a method 400 of manufacturing thermoelectric modules and arrays, according to aspects. Within aspects, method 400 may include three sub-processes: die processing, die header processing for a single metal-bonded substrate module or array, and bottom header processing for a double metal-bonded substrate module or array. In some aspects, method 400 may include all or fewer than all of these sub-processes. For example, in some aspects, a thermoelectric module using a single metal-bonded substrate as one die header and a conventional copper-trace substrate as the other die header may include only the sub-processes of die processing and die header processing for a single metal-bonded substrate module or array.

[0067] According to aspects, the die processing sub-process may begin by generating a thermoelectric element at operation 410. In some aspects, operation 410 may include epitaxial growth of the thermoelectric element. In aspects, a CHESS thermoelectric element may be grown by one or more of metal-organic chemical vapor deposition (MOCVD) and by physical vapor deposition (PVD) metallization. After thermoelectric element generation at operation 410, die processing may proceed within aspects to thermoelectric element singulation at operation 412. In aspects, the thermoelectric elements generated in operation 410 may be singulated by one or more of lithography, etching (e.g., mesa etching), and dicing. Singulated thermoelectric elements may then be formed into a thin-film device at operation 414, which may, within aspects, include the formation of contact layers. For example, within aspects, operation 414 may include one or more of tin melt processing, lithographic mask covering and etching, and other techniques for depositing one or more contact layers on the singulated thermoelectric element. In some aspects, operation 414 may also include one or more measurement steps, such as checking the step heights of the deposited layer(s).

[0068] Within aspects, the die processing sub-process may proceed to die header generation at operation 416. In some aspects, operation 416 may include post plating, etching (e.g., mesa etching), and other techniques for depositing one or more layers. Insome aspects, operation 416 may also include one or more measurements of the deposited layers. After die header generation, the die processing sub-process may proceed, in some aspects, to die header singulation at operation 418. In aspects, die header singulation may include dicing and / or trimming the die header(s) to singulate the die into discrete devices.

[0069] According to aspects, die header processing for a single metal-bonded substrate module or array sub-process may begin with the preparation of a metal-bonded substrate at operation 420. Within aspects, operation 420 may include one or more dicing, polishing, and planarizing a metal-bonded substrate. After preparing the metal-bonded substrate in operation 420, the die header processing for a single metal-bonded substrate module or array sub-process may proceed to electroplating in operation 422. In aspects, operation 422 may include plating one or more of copper, silver, gold, or other highly conductive metal onto the metal-bonded substrate prepared in operation 420. In aspects, at operation 424, the metal-bonded substrate may be singulated by, for example, a dicing process.

[0070] Within aspects, the metal-bonded substrate prepared in operations 420-424 may be used as a substrate for thin-film device generation in operation 414 in the die processing sub-process. For example, in aspects, the metal-bonded substrate may be used as the growth and / or deposition substrate for placement of the thermoelectric element and for formation of the contact layer(s) in thin-film device generation operation 414.

[0071] In some aspects, method 400 may also include operations for forming a thermoelectric module or array having bottom header of a metal-bonded substrate (i.e., a double metal-bonded substrate thermoelectric module or array). In aspects, forming a bottom header may include a process of singulating a metal-bonded substrate at operation 430. Within aspects, operation 430 may include, for example, dicing a metal-bonded substrate. In aspects, at operation 432, a contact layer may be formed on the singulated metal-bonded substrate. For example, within aspects, an indium layer may be formed on the singulated metal-bonded substrate. In addition, operation 432 may comprise additional steps including lithographic steps, such as mask deposition and etching, and measurement steps, such as profilometry. In aspects, at operation 434, individual die headers may be electrically isolated by processes such as wax coverage and / or shallow trench dicing.

[0072] Within aspects, method 400 may include thermoelectric module assembly at operation 450. In some aspects, thermoelectric module assembly operation 450 may include the thermoelectric element dies singulated in die header singulation operation 418. In some aspects, such singulated die header may include the metal-bonded substrate prepared by operations 420-424 and incorporated into a device in operations 414-418. In addition, in some aspects, thermoelectric module assembly operation 450 may include a bottom header that is second metal-bonded substrate prepared according to operations 430-434. In some aspects, thermoelectric module assembly operation 450 may include a bottom header that is a second substrate comprising a conventional copper-trace substrate. In aspects, thermoelectric module assembly operation 450 may include building a thermoelectric by cleaning, picking and placing thermoelectric element dies and bottom header(s), and bonding the bottom header(s) and the thermoelectric element dies.

[0073] Within aspects, method 400 may conclude with thermoelectric module or array finalization at operation 460. In aspects, operation 460 may include steps such as attaching the module or array to a carrier substrate and attaching one or more wires to the thermoelectric module or array. In aspects, operation 460 may include one or more measurement steps, such as thermoelectric figure of measurement (ZT) measurement of the thermoelectric module or array.

[0074] The foregoing description of specific aspects will so fully reveal the general nature of the invention that others can, by applying knowledge within the skill of the art, readily modify and / or adapt for various applications such specific embodiments, without undue experimentation, without departing from the general concept of the present invention. Therefore, such adaptations and modifications are intended to be within the meaning and range of equivalents of the disclosed embodiments, based on the teaching and guidance presented herein. It is to be understood that the phraseology or terminology herein is for the purpose of description and not of limitation, such that the terminology or phraseology of the present specification is to be interpreted by the skilled artisan in light of the teachings and guidance.

[0075] The breadth and scope of the present invention should not be limited by any of the above-described exemplary aspects, but should be defined only in accordance with the following claims and their equivalents.

Claims

WHAT IS CLAIMED IS:

1. A device, comprising: a metal-bonded substrate; a contact layer disposed on the metal-bonded substrate; and a thermoelectric element disposed on the contact layer, wherein the thermoelectric element comprises a controlled hierarchically engineered superlattice structure (CHESS).

2. The device of claim 1, wherein the metal-bonded substrate comprises at least one of copper and molybdenum fused to a ceramic substrate.

3. The device of claim 2, wherein the ceramic comprises at least one of aluminum nitride, aluminum oxide, silicon carbide, boron nitride, boron carbide, zirconia, silicon coated with silicon nitride, and silicon coated with silicon dioxide.

4. The device of claim 2, wherein the metal-bonded substrate comprises a direct bond copper (DBC) substrate.

5. The device of claim 1, wherein the contact layer comprises a bonding layer comprising at least one of tin, indium, silver, or an alloy of one or more thereof.

6. The device of claim 5, wherein the contact layer further comprises a nickel or chromium layer in direct contact with the thermoelectric element.

7. The device of claim 1, wherein the DTmax of the device is greater than or equal to 25 Kelvin.

8. The device of claim 1, wherein the metal-bonded substrate forms one of a cold-side die header and a hot-side die header for the thermoelectric element.

9. The device of claim 1, wherein: the metal-bonded substrate is a first metal-bonded substrate; the contact layer is a first contact layer, and the device further comprises: a second contact layer disposed on the thermoelectric element; and a second metal-bonded substrate bonded to the second contact layer.

10. The device of claim 9, wherein the second contact layer comprises an array of indium bonding bumps.

11. The device of claim 9, wherein the metal-bonded substrate comprises at least one of copper and molybdenum fused to a ceramic substrate.

12. The device of claim 11, wherein the ceramic comprises at least one of aluminum nitride, aluminum oxide, silicon carbide, boron nitride, boron carbide, zirconia, silicon coated with silicon nitride, and silicon coated with silicon dioxide.

13. The device of claim 11, wherein the second metal-bonded substrate comprises a direct bond copper (DBC) substrate.

14. The device of claim 9, wherein the second metal -bonded substrate is bonded to a contact layer of an adjacent device.

15. The device of claim 9, wherein a total thickness of the device is greater than or equal to 0.3 mm and less than or equal to 5 mm.

16. A module comprising: at least one first device comprising: a first metal-bonded substrate; a first contact layer provided on the first metal-bonded substrate; a first thermoelectric element provided on the first contact layer; a second contact layer provided on the first thermoelectric element; and a second metal-bonded substrate bonded to the second contact layer, at least one second device comprising: a third metal-bonded substrate; a third contact layer provided on the third metal-bonded substrate; a second thermoelectric element provided on the third contact layer; a fourth contact layer provided on the second thermoelectric element; and the second metal-bonded substrate bonded to the fourth contact layer, wherein: the first thermoelectric element comprises one of a p-type thermoelectric material and an n-type thermoelectric material; the second thermoelectric element comprises the other of the p-type thermoelectric material and the n-type thermoelectric material; the first thermoelectric element and the second thermoelectric element are electrically connected in series via the second metal-bonded substrate; and each of the first thermoelectric element and the second thermoelectric element comprises a controlled hierarchically engineered superlattice structure (CHESS).

17. The module of claim 16, wherein the first metal-bonded substrate and the third metal-bonded substrate form one of a cold-side die header and a hot-side die header for both of the first thermoelectric element and the second thermoelectric element; andthe second metal-bonded substrate forms the other of the cold-side die header and the hot-side die header for both of the first thermoelectric element and the second thermoelectric element.

18. An array based on the module according to claim 16, wherein: the at least one first device comprises a plurality of the first devices; the at least one second device comprises a plurality of the second devices; and each of the plurality of first devices and the plurality of second devices is bonded to the second metal-bonded substrate.

19. A heat pump comprising a thermoelectric heating and / or cooling device, the thermoelectric heating and / or cooling device comprising: at least one thermoelectric module according to claim 16.

20. A refrigerator comprising a thermoelectric heating and / or cooling device, the thermoelectric heating and / or cooling device comprising: at least one thermoelectric module according to claim 16.

21. A spacecraft comprising an energy harvesting device configured to convert heat to electric energy, the energy harvesting device comprising: at least one thermoelectric module according to claim 16.

22. A wearable device configured to be worn by at least one of a human and a robot, the wearable device comprising an energy harvesting device configured to convert heat to electric energy, the energy harvesting device comprising: at least one thermoelectric module according to claim 16.

23. A wearable device configured to be worn by at least one of a human and a robot, the wearable device comprising a heating and / or cooling device, the heating and / or cooling device comprising: at least one thermoelectric module according to claim 16.

24. A method, comprising: disposing a first contact layer on at least a first portion of a first metal-bonded substrate and at least a second portion of the first metal-bonded substrate; disposing at least one first thermoelectric element on the first contact layer in the first portion; disposing at least one second thermoelectric element on the first contact layer in the second portion; disposing a second contact layer on the at least one first thermoelectric element in the first portion and on the at least one second thermoelectric element in the second portion; and bonding a header substrate to the second contact layer in each of the first portion and the second portion, wherein each of the first thermoelectric element and the second thermoelectric element comprises a controlled hierarchically engineered superlattice structure (CHESS).

25. The method of claim 24, further comprising: prior to bonding the substrate to the second contact layer, dicing the metal-bonded substrate to physically separate the first portion and the second portion.

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