Direct current bias compensation value determination method

Abstract

Embodiments of the present invention provide a direct current bias compensation value determination method. The method comprises: scanning a direct current bias compensation value under preset mode parameters to obtain a preset number of direct current bias compensation values and a direct current power; on the basis of the direct current bias compensation values, the direct current power, and a preset direct current bias compensation model, determining an ideal direct current bias compensation value; on the basis of the ideal direct current bias compensation value and the preset number of direct current bias compensation values, determining a target interval corresponding to the ideal direct current bias compensation value; and traversing the direct current bias compensation values in the target interval, and determining the direct current bias compensation value closest to the ideal direct current bias compensation value as a target direct current bias compensation value.

Description

Method for determining DC bias compensation value

[0001] Cross-references to related applications

[0002] This disclosure is based on and claims priority to Chinese Patent Application No. 202410780052.9, filed on June 17, 2024, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to the field of communications, and more specifically, to a method for determining a DC bias compensation value. Background Technology

[0004] Carrier leakage, also known as "carrier leakage DC bias," occurs when the carrier oscillator introduces a certain component due to circuit imperfections. This error, introduced by the oscillator, manifests as an error at the modulation frequency at the transmitter. However, after carrier demodulation at the receiver, this original frequency error is shifted to the baseband zero frequency. The received signal, due to the in-phase quadrature (IQ) pattern shift, especially at low power ranges, results in a larger error vector magnitude (EVM) at the receiver, impacting subsequent decoding and demodulation performance. Furthermore, carrier leakage is a crucial metric for transmitted signal quality.

[0005] The traditional solution is to compensate for the signal deviation as much as possible by using the I and Q compensation values ​​corresponding to the DC leakage of the carrier, thereby avoiding the signal impact caused by the DC leakage of the carrier to a certain extent.

[0006] Currently, the methods for obtaining carrier DC leakage compensation values ​​in related technologies are generally fitting or bisection methods. However, the fitting method has low time overhead and low complexity, but also low accuracy; the bisection method has high accuracy, but has high time overhead and complex process. Summary of the Invention

[0007] This disclosure provides a method for determining DC bias compensation values, which at least solves the problems of low accuracy, high time overhead, and complex process in obtaining carrier DC leakage compensation values ​​in related technologies.

[0008] According to one embodiment of this disclosure, a method for determining a DC bias compensation value is provided, including:

[0009] The DC bias compensation values ​​under preset mode parameters are scanned to obtain a preset number of DC bias compensation values ​​and DC power; based on the DC bias compensation values, DC power, and preset DC bias compensation model, the ideal DC bias compensation value is determined; based on the ideal DC bias compensation value and the preset number of DC bias compensation values, the target interval corresponding to the ideal DC bias compensation value is determined; the DC bias compensation values ​​in the target interval are traversed, and the DC bias compensation value that is closest to the ideal DC bias compensation value is determined as the target DC bias compensation value.

[0010] According to yet another embodiment of this disclosure, a computer-readable storage medium is also provided, in which a computer program is stored, wherein the computer program is configured to perform the steps in any of the above method embodiments when it is run.

[0011] According to yet another embodiment of this disclosure, an electronic device is also provided, including a memory and a processor, wherein a computer program is stored in the memory and the processor is configured to run the computer program to perform the steps in any of the above method embodiments.

[0012] According to yet another embodiment of this disclosure, a computer program product is also provided, including a computer program that, when executed by a processor, implements the steps in any of the above method embodiments. Attached Figure Description

[0013] Figure 1 is a hardware structure block diagram of a computer terminal for a method of determining a DC bias compensation value according to an embodiment of the present disclosure.

[0014] Figure 2 is a system architecture diagram of a method for determining DC bias compensation values ​​according to an embodiment of the present disclosure;

[0015] Figure 3 is a flowchart of a method for determining DC bias compensation values ​​according to an embodiment of the present disclosure;

[0016] Figure 4 is a schematic diagram of the process for determining the DC bias compensation value according to an embodiment of the present disclosure. Detailed Implementation

[0017] The embodiments of this disclosure will be described in detail below with reference to the accompanying drawings and examples.

[0018] It should be noted that the terms "first," "second," etc., in the specification, claims, and drawings of this disclosure are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0019] Carrier leakage, also known as DC bias, is caused by the introduction of a certain DC component into the data after analog-to-digital conversion or digital-to-analog conversion due to circuit imperfections or other reasons. This affects signal demodulation, especially at the transmitting end in the low-power range.

[0020] The degree of carrier leakage is typically measured using the IQ-Offset metric.

[0021] Since carrier leakage caused by a suboptimal modem can affect many test parameters, it is necessary to control the DC component to be as small as possible through DC offset compensation (DCOC) calibration so as not to affect signal demodulation.

[0022] Testing revealed the impact of local oscillator leakage on IQ offset (IQ-Offset). The direct effect is on the transmitted signal's EVM (Effective Virtual Machine). A large IQ-Offset directly impacts the uplink decoding rate, leading to a decrease in decoding efficiency. Furthermore, tests at maximum uplink throughput also showed a close correlation between peak throughput and IQ-Offset. The magnitude of the DC component of local oscillator leakage is a crucial performance characteristic for uplink; therefore, improving RF uplink performance through DC calibration is essential.

[0023] Currently, the most commonly used methods for obtaining carrier DC leakage compensation values ​​are the fitting method and the bisection method. However, while the fitting method aims for the lowest time complexity, experimental tests have shown that its accuracy is often low. The bisection method, which combines accuracy with a certain level of algorithmic complexity, is simple in algorithm, but its time complexity can easily surge as the measurement range expands. Furthermore, it requires repeated instrument operations, and after each measurement, adjustments must be made while waiting for the result before proceeding to the next measurement. This continuous interaction process incurs a significant time overhead compared to sequential measurements, and the process is more complex, lacking simplicity.

[0024] To address the technical problems existing in the aforementioned related technologies, this disclosure proposes a method for determining DC bias compensation values. The technical concept is to use a fitting method to narrow down the range of DC leakage compensation values, and then perform a thorough search based on the narrowed range of DC leakage compensation values. This method can quickly obtain more accurate carrier DC leakage compensation values ​​with low process complexity.

[0025] The methods and embodiments provided in this disclosure can be executed in a mobile terminal, a computer terminal, or a similar computing device. Taking a computer terminal as an example, FIG1 is a hardware structure block diagram of a computer terminal for a method of determining a DC bias compensation value according to an embodiment of this disclosure. As shown in FIG1, the computer terminal may include one or more (only one is shown in FIG1) processors 102 (processor 102 may include, but is not limited to, processing devices such as microprocessors MCUs or programmable logic devices FPGAs) and a memory 104 for storing data. The computer terminal may also include a transmission device 106 for communication functions and an input / output device 108. It will be understood by those skilled in the art that the structure shown in FIG1 is only illustrative and does not limit the structure of the computer terminal. For example, the computer terminal may also include more or fewer components than shown in FIG1, or have a different configuration than shown in FIG1.

[0026] The memory 104 can be used to store computer programs, such as application software programs and modules, like the computer program corresponding to the method for determining the DC bias compensation value in this embodiment. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, thereby implementing the above-described method. The memory 104 may include high-speed random access memory and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include memory remotely located relative to the processor 102, and these remote memories can be connected to a computer terminal via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0027] The transmission device 106 is used to receive or send data via a network. Specific examples of the network described above may include a wireless network provided by a communication provider for the computer terminal. In one example, the transmission device 106 includes a Network Interface Controller (NIC), which can connect to other network devices via a base station to communicate with the Internet. In another example, the transmission device 106 may be a Radio Frequency (RF) module used for wireless communication with the Internet.

[0028] Figure 2 is a system architecture diagram of the method for determining the DC bias compensation value according to an embodiment of the present disclosure. The embodiment of the present disclosure can run on the system architecture shown in Figure 2. As shown in Figure 2, the network architecture includes: a host computer, a test development board, and a measuring instrument. The host computer can be used to configure the frequency point, chip channel, power level, transmission format, and transmission time of the test development board. It can also configure the measuring instrument to filter the corresponding waveform and measure the power after the transmission time or trigger signal. The test development board can be used to carry an RF chip and receive control commands from the host computer. Based on the control commands from the host computer, the RF chip transmits signal waveforms. The measuring instrument can be used to receive the signal from the development board and measure the corresponding DC power.

[0029] In the testing process, the host computer can first send instructions to the measuring instrument, configuring it to enter a standby trigger state, ready to receive signals sent by the test development board equipped with the RF chip. The host computer can then send instructions to control the test development board to send an RF signal corresponding to a specific DC compensation value to the measuring instrument. Upon receiving the RF signal, the measuring instrument triggers the measurement of the DC power of the RF signal waveform and returns the DC power measurement value to the host computer. The host computer can then perform data analysis based on the DC compensation value and the DC power.

[0030] This embodiment provides a method for determining the DC bias compensation value running on the above-described computer terminal or system architecture. Figure 3 is a flowchart of the method for determining the DC bias compensation value according to an embodiment of this disclosure. As shown in Figure 3, the process includes the following steps:

[0031] Step S301: Scan the DC bias compensation value under the preset mode parameters to obtain a preset number of DC bias compensation values ​​and the DC power.

[0032] In this embodiment of the present disclosure, the host computer can control the measuring instrument to scan the DC bias compensation value in the test development board, obtain a preset number of DC bias compensation values, and control the measuring instrument to measure the power of the scanned DC bias compensation value.

[0033] In one exemplary embodiment, the preset mode parameters include at least one of the following: frequency point, power amplification level, standard, and chip radio frequency channel.

[0034] In this embodiment of the disclosure, the host computer can pre-configure the mode parameters of the test development board so that the test instrument can measure the DC power under different mode parameters.

[0035] As an example, test instruments can perform tests on different frequencies, different paths, different power amplification levels, different standards, and different chip RF channels, thereby eliminating the impact of different carrier leakage values ​​under different modes.

[0036] In one exemplary embodiment, the acquisition of DC power includes:

[0037] The DC power was measured using the waveform at edge 1RB.

[0038] In this embodiment of the disclosure, the DC power can be measured using the waveform of edge 1RB to ensure the accuracy and convenience of power measurement.

[0039] The waveform of edge 1RB can accurately measure DC power without image leakage into the middle frequency band, and the sufficient waveform power can drive the test development board to send signals and trigger test instruments. This is a normal business process with no risk of piling up.

[0040] It should be noted that when using the 1RB waveform, a bandpass filter is required, and the bandwidth of the bandpass filter must be able to fully cover the carrier DC power and exclude the transmitted signal of the edge 1RB. In this case, the measured DC power is more accurate.

[0041] In one exemplary embodiment, the DC bias compensation value includes an in-phase DC bias compensation value and a quadrature DC bias compensation value, and obtaining a preset number of DC bias compensation values ​​and the DC power includes:

[0042] The orthogonal DC bias compensation value is fixed, a preset number of in-phase DC bias compensation values ​​are obtained, and the preset number of in-phase DC power values ​​are measured respectively to obtain the preset number of in-phase DC power values.

[0043] For example, the DC bias compensation value may include in-phase DC bias compensation value (i.e., I-channel value) and quadrature DC bias compensation value (i.e., Q-channel value), and the power can be measured by taking a preset number of in-phase DC bias compensation values ​​and quadrature DC bias compensation values ​​respectively.

[0044] As an example, the orthogonal DC bias compensation value can be fixed first, and then a preset number of in-phase DC bias compensation values ​​can be obtained. For example, control Q=0 and select n I-channel sampling points, where n can be a positive integer greater than or equal to 1, and the power of n I-channel sampling points can be measured.

[0045] In one exemplary embodiment, obtaining the preset number of DC bias compensation values ​​and the DC power further includes:

[0046] The in-phase DC bias compensation value is fixed, a preset number of quadrature DC bias compensation values ​​are obtained, and the preset number of quadrature DC power is measured to obtain the preset number of quadrature DC power.

[0047] As an example, you can first fix the in-phase DC bias compensation value (i.e., I-path value), and then obtain a preset number of quadrature DC bias compensation values ​​(i.e., Q-path values). For example, control I = 0 and select n Q-path value points, where n can be a positive integer greater than or equal to 1, and measure the power of the n Q-path value points.

[0048] Step S302: Determine the ideal DC bias compensation value based on the DC bias compensation value, the DC power, and the preset DC bias compensation model.

[0049] As an example, the DC bias compensation model can be pre-fitted based on the DC bias compensation value and the DC power.

[0050] In one exemplary embodiment, the DC bias compensation model includes: P = 10log 10 (aX 2 +bX+c)+d

[0051] Where P is DC power, X is DC bias compensation value, and a, b, c, and d are the parameters of the DC bias compensation model, respectively.

[0052] As an example, the selected DC bias compensation value and DC power can be input into a preset DC bias compensation model to obtain the DC bias compensation model. Based on the model parameters and the minimum DC power, the ideal DC bias compensation value can be determined.

[0053] Step S303: Determine the target range corresponding to the ideal DC bias compensation value based on the ideal DC bias compensation value and the preset number of DC bias compensation values.

[0054] As an example, the target range corresponding to the ideal DC bias compensation value can be determined based on the ideal DC bias compensation value and a preset number of DC bias compensation values.

[0055] As an example, a DC bias compensation value that is close to the ideal DC bias compensation value can be selected from a preset number of DC bias compensation values, and the interval containing the DC bias compensation value that is close to the ideal DC bias compensation value can be determined as the target interval.

[0056] In one exemplary embodiment, determining the target interval corresponding to the ideal DC bias compensation value based on the ideal DC bias compensation value and the preset number of DC bias compensation values ​​includes:

[0057] Based on the ideal DC bias compensation value, the preset number of intervals, and the preset unit interval length, determine the first interval corresponding to the preset number of intervals for the ideal DC bias compensation value;

[0058] Traverse the first interval of the preset number of intervals, and measure the DC power corresponding to the two endpoints of each first interval;

[0059] The target interval corresponding to the ideal DC bias compensation value is determined based on the difference in DC power corresponding to the two endpoints of each first interval.

[0060] As an example, the first interval corresponding to the preset number of intervals can be determined based on the ideal DC bias compensation value, the preset number of intervals, and the preset unit interval length. The first interval of the preset number of intervals can be traversed. For example, a 1% interval search can be performed within ±5% of the full scale range around the ideal DC bias compensation value, and the DC power corresponding to the two endpoints of each 1% interval can be measured. The target interval corresponding to the ideal DC bias compensation value can be determined based on the difference between the DC power corresponding to the two endpoints of each 1% interval.

[0061] In one exemplary embodiment, determining the target interval corresponding to the ideal DC bias compensation value based on the difference in DC power corresponding to the two endpoints of each first interval includes:

[0062] In the first interval where the preset number of intervals is determined, the signs of the difference in DC power corresponding to the two endpoints of two consecutive first intervals are different;

[0063] Compare the absolute values ​​of the differences in DC power corresponding to the two endpoints of the two consecutive first intervals;

[0064] The first interval, in which the absolute value of the difference between the DC power at the two endpoints is smaller, is determined as the target interval corresponding to the ideal DC bias compensation value.

[0065] As an example, if the signs of the difference in DC power between the two endpoints of each of two consecutive first intervals are different, by comparing the absolute values ​​of the difference in DC power between the two endpoints of each of the two consecutive first intervals, the target interval corresponding to the ideal DC bias compensation value can be determined based on the comparison results.

[0066] As an example, the first interval where the absolute value of the difference in DC power between the two endpoints is smaller has a DC bias compensation value that is closer to the ideal DC bias compensation value, and this interval can be determined as the target interval corresponding to the ideal DC bias compensation value.

[0067] Step S304: Traverse the DC bias compensation values ​​in the target interval, and determine the DC bias compensation value that is closest to the ideal DC bias compensation value as the target DC bias compensation value.

[0068] As an example, after determining the target interval, the DC bias compensation values ​​in the target interval can be further traversed, and the DC bias compensation value that is closest to the ideal DC bias compensation value can be determined as the target DC bias compensation value, thereby obtaining a more accurate carrier DC leakage compensation value.

[0069] The following example further illustrates the method for determining the DC bias compensation value according to the embodiments of this disclosure.

[0070] Example 1

[0071] Figure 4 is a schematic diagram of the process for determining the DC bias compensation value according to an embodiment of the present disclosure. As shown in Figure 4, the specific steps include:

[0072] 1. Connect the host computer to the test instruments and test development board and initialize them.

[0073] 2. Set the frequency point, power amplification level, standard, and chip RF channel.

[0074] After initialization, the host computer can configure the mode parameters required for calibration, such as frequency point, power amplification level, standard, chip RF channel, etc., and traverse the frequency point, power amplification level, standard, chip RF channel, etc. during the calibration process.

[0075] 3. Set the DC bias compensation value of the Q-channel to 0, select n I-channel measurement points to measure the power (n is a positive integer greater than or equal to 1), and model and solve for the point of lowest power (i.e., minimum power value).

[0076] For example, the host computer can control the test chip in the test development board to send edge 1RB waveforms to the test instrument for testing the power of the I-channel or Q-channel sampling points.

[0077] For example, the measuring instrument can first scan the I channel, set the DC bias compensation value of the Q channel to 0, and select n I channel value points to measure the power.

[0078] It should be noted that the range of values ​​for n points can be defined here according to the actual situation of the chip, so as to ensure that the power values ​​under this power are significantly different.

[0079] Based on prior information about the chip's DC bias compensation value, or in the absence of prior information, an iterative fitting method can be used to select a certain number of DC bias compensation values ​​distributed across the full scale, and measure the DC power of each selected value distributed across the full scale. The DC bias compensation model is then established by fitting the selected DC bias compensation values ​​and the selected DC power values ​​distributed across the full scale. Based on the DC bias compensation model, the DC bias compensation value corresponding to the minimum power value is further determined as the ideal DC bias compensation value. Sampling points for the DC bias compensation value can be selected near the ideal DC bias compensation value.

[0080] For example, during pre-fitting, the DC bias compensation value can be distributed at four points on the full scale. For example, taking the in-phase DC bias compensation value I as an example, (I1,P1), (I2,P2), (I3,P3), and (I4,P4) can be selected for fitting. After obtaining an optimal point (i.e., the ideal DC bias compensation value), sampling points can be selected near this value. According to the DC bias compensation model described below, a 1% full scale range can be selected for traversal to obtain the target DC bias compensation value.

[0081] The following DC bias compensation model is established: P = 10log 10 (aX 2 +bX+c)+d

[0082] Where P is DC power, X is DC bias compensation value, and a, b, c, and d are the parameters of the DC bias compensation model, respectively.

[0083] The values ​​of a, b, c, and d can be calculated from the above four points. Based on the values ​​of a, b, c, and d, the in-phase DC bias compensation value Ic corresponding to the minimum power can be further determined.

[0084] It should be noted that Ic here can be an in-phase DC bias compensation value that is close to the in-phase DC bias compensation value corresponding to the actual minimum power. The range can be further narrowed according to the power amplification level, so as to make the actual minimum point more accurate.

[0085] As an example, Q can be controlled to be 0, a certain number of in-phase DC bias compensation value sampling points I can be selected, and the ideal in-phase DC bias compensation value Ic can be solved using the DC bias compensation model; or I can be controlled to be 0, a certain number of quadrature DC bias compensation value sampling points Q can be selected, and the ideal quadrature DC bias compensation value Qc can be solved using the DC bias compensation model. Without performing a traversal operation, IcQc can be directly used as the target DC bias compensation value.

[0086] As an example, the I value can be scanned, the Q value controlled to Qc, and n I value sampling points can be selected for power measurement. Taking four points (I1, P1), (I2, P2), (I3, P3), and (I4, P4) as an example, the values ​​of a, b, c, and d can be calculated based on these four points. The lowest point Ic2 can then be determined, and Qc2 can be calculated using the same method. The obtained Ic2Qc2 is used as the target DC bias compensation value.

[0087] 4. A 1% interval search can be performed within ±5% of the full scale range around the ideal DC bias compensation value to determine the interval that is close to the ideal DC bias compensation value.

[0088] For example, based on the established DC bias compensation model, it can be determined in advance that the relationship between the power P value and the in-phase DC bias compensation value I value is a monotonically even function, and then it can be determined which interval the I value of the lowest power point of the I-path is in.

[0089] It should be noted that the 5% range test range and 1% interval length here are merely examples, and those skilled in the art can set the range test range and interval length according to the actual situation.

[0090] As can be seen from the above DC bias compensation model, the model is an even function. When the actual power approaches the ideal minimum point (i.e., the minimum power), the absolute value of the slope continuously increases, and it is a convex function. The process of traversing the interval is actually comparing the power difference on both sides of the interval. If the sign of the difference changes, the ideal DC bias compensation value should be in the two intervals before and after the sign change. These two intervals can be used as the target interval. Based on the symmetry of the even function, the interval of the ideal DC bias compensation value can be located. For example, the interval where the absolute value of the difference in DC power at the two endpoints is smaller can be determined as the interval of the ideal DC bias compensation value.

[0091] 5. Perform a second traversal search within the range of the ideal DC bias compensation value to obtain the target I-channel DC bias compensation value.

[0092] For example, the DC bias compensation values ​​within the range of the ideal DC bias compensation value can be traversed, and the DC bias compensation value closest to the ideal DC bias compensation value within the range can be used as the target I-channel compensation value, thereby accurately obtaining the optimal I-channel DC bias compensation value.

[0093] 6. The measuring instrument scans the Q channel, with the DC bias compensation value of the I channel set to 0. Select n Q channel measurement points to measure the power (n is a positive integer greater than or equal to 1), and repeat steps 3-5 to obtain the target Q channel DC bias compensation value.

[0094] For example, the DC bias compensation value of the I-channel can be fixed, the value point of the Q-channel can be selected, the DC power of the Q-channel can be measured, and steps 3 to 5 can be repeated to obtain the optimal DC bias compensation value of the Q-channel.

[0095] 7. Repeat steps 2 to 6 to obtain the optimal DC bias compensation values ​​for the I and Q channels of each frequency point, power amplification level, standard, and chip RF channel by setting different frequencies, power amplification levels, standards, and chip channels.

[0096] 8. The process ends when there are no untraversed frequency points, power amplification levels, standards, chip channels, etc.

[0097] In this embodiment, a preset number of DC bias compensation values ​​and DC power are obtained by scanning the DC bias compensation values ​​under preset mode parameters. Based on the DC bias compensation values, DC power, and a preset DC bias compensation model, an ideal DC bias compensation value is determined. Based on the ideal DC bias compensation value and the preset number of DC bias compensation values, a target interval corresponding to the ideal DC bias compensation value is determined. The DC bias compensation values ​​within the target interval are traversed, and the DC bias compensation value closest to the ideal DC bias compensation value is determined as the target DC bias compensation value. This solves the problems of low accuracy, high time overhead, and complex processes in related technologies for obtaining carrier DC leakage compensation values. This disclosure combines a fitting method to narrow the range of DC bias compensation values, fully considering the monotonicity in calibration, enabling rapid determination of the DC bias compensation value interval. A more accurate DC bias compensation value can then be found through a small-range traversal, and the process is simple.

[0098] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this disclosure, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of this disclosure.

[0099] Embodiments of this disclosure also provide a computer-readable storage medium storing a computer program configured to perform the steps in any of the above method embodiments when executed.

[0100] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0101] Embodiments of this disclosure also provide an electronic device including a memory and a processor, the memory storing a computer program and the processor being configured to run the computer program to perform the steps in any of the above method embodiments.

[0102] In one exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor and the input / output device is connected to the processor.

[0103] Specific examples in this embodiment can be found in the examples described in the above embodiments and exemplary implementations, and will not be repeated here.

[0104] Embodiments of this disclosure also provide a computer program product, including a computer program that, when executed by a processor, implements the steps in any of the method embodiments described above.

[0105] It is obvious to those skilled in the art that the modules or steps of this disclosure described above can be implemented using general-purpose computing devices. They can be centralized on a single computing device or distributed across a network of multiple computing devices. They can be implemented using computer-executable program code, and thus can be stored in a storage device for execution by a computing device. In some cases, the steps shown or described can be performed in a different order than those presented herein, or they can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module. Thus, this disclosure is not limited to any particular combination of hardware and software.

[0106] The above description is merely an exemplary embodiment of this disclosure and is not intended to limit this disclosure. Various modifications and variations can be made to this disclosure by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the principles of this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A method for determining a DC bias compensation value, comprising: Scan the DC bias compensation values ​​under preset mode parameters to obtain a preset number of DC bias compensation values ​​and the DC power; The ideal DC bias compensation value is determined based on the DC bias compensation value, the DC power, and the preset DC bias compensation model. Based on the ideal DC bias compensation value and the preset number of DC bias compensation values, determine the target range corresponding to the ideal DC bias compensation value; The DC bias compensation values ​​in the target range are traversed, and the DC bias compensation value that is closest to the ideal DC bias compensation value is determined as the target DC bias compensation value.

2. The method according to claim 1, wherein, The step of determining the target interval corresponding to the ideal DC bias compensation value based on the ideal DC bias compensation value and the preset number of DC bias compensation values ​​includes: Based on the ideal DC bias compensation value, the preset number of intervals, and the preset unit interval length, determine the first interval corresponding to the preset number of intervals for the ideal DC bias compensation value; Traverse the first interval of the preset number of intervals, and measure the DC power corresponding to the two endpoints of each first interval; The target interval corresponding to the ideal DC bias compensation value is determined based on the difference in DC power corresponding to the two endpoints of each first interval.

3. The method according to claim 2, wherein, Determining the target interval corresponding to the ideal DC bias compensation value based on the difference in DC power corresponding to the two endpoints of each first interval includes: In the first interval where the preset number of intervals is determined, the signs of the difference in DC power corresponding to the two endpoints of two consecutive first intervals are different; Compare the absolute values ​​of the differences in DC power corresponding to the two endpoints of the two consecutive first intervals; The first interval, in which the absolute value of the difference between the DC power at the two endpoints is smaller, is determined as the target interval corresponding to the ideal DC bias compensation value.

4. The method according to claim 1, wherein, The DC bias compensation model includes: P = 10log 10 (aX 2 +bX+c)+d Where P is DC power, X is DC bias compensation value, and a, b, c, and d are the parameters of the DC bias compensation model, respectively.

5. The method according to claim 1, wherein, The preset mode parameters include at least one of the following: frequency point, power amplification level, standard, and chip radio frequency channel.

6. The method according to claim 1, wherein, The acquisition of DC power includes: The DC power was measured using the waveform at edge 1RB.

7. The method according to claim 1, wherein, The DC bias compensation value includes in-phase DC bias compensation value and quadrature DC bias compensation value. Obtaining the preset number of DC bias compensation values ​​and the DC power includes: Fix the orthogonal DC bias compensation value, obtain a preset number of in-phase DC bias compensation values, and measure the preset number of in-phase DC powers respectively to obtain the preset number of in-phase DC powers.

8. The method according to claim 7, wherein, The process of obtaining a preset number of DC bias compensation values ​​and the DC power further includes: Fix the in-phase DC bias compensation value, obtain a preset number of quadrature DC bias compensation values, and measure the preset number of quadrature DC power to obtain the preset number of quadrature DC power.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the method described in any one of claims 1 to 8.

10. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method described in any one of claims 1 to 8.

11. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method described in any one of claims 1 to 8.

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