Method for producing a composite structure including a stack of layers made of single-crystal iii-v materials

Abstract

The invention relates to a method for producing a composite structure, the method comprising the following steps: a) providing a composite substrate including a carrier substrate and a seed layer of single-crystal III-V material arranged on the carrier substrate via a bonding interface, the carrier substrate having a thermal expansion coefficient different from that of the seed layer, and the seed layer having an intrinsic lattice parameter; b) epitaxially growing a stack of single-crystal III-V layers, referred to as epitaxial layers, on the seed layer, each epitaxial layer having an intrinsic lattice parameter. When the thermal expansion coefficient of the carrier substrate is less than that of the seed layer, at least one epitaxial layer of the stack has a composition selected such that the intrinsic lattice parameter thereof is reduced by 200 ppm to 3000 ppm relative to the intrinsic lattice parameter of the seed layer. When the thermal expansion coefficient of the carrier substrate is greater than that of the seed layer, at least one epitaxial layer of the stack has a composition selected such that the intrinsic lattice parameter thereof is increased by 200 ppm to 3000 ppm relative to the intrinsic lattice parameter of the seed layer. The invention also relates to a composite structure.

Description

Method for manufacturing a composite structure including a stack of layers of single-crystal III-V materials FIELD OF INVENTION

[0001] The present invention relates to the field of semiconductor materials for microelectronic components. It relates in particular to a method for manufacturing a composite structure comprising a support substrate and a seed layer of III-V material assembled via a bonding interface and transferred onto said support substrate, the growth of at least one epitaxial layer then being carried out on the seed layer. TECHNOLOGICAL BACKGROUND OF THE INVENTION

[0002] For the fabrication of certain microelectronic or optoelectronic components, particularly HBT and HEMT transistors, lasers, and photodiodes, it is desirable to use composite substrates that provide a thin seed layer of single-crystal III-V material on a support substrate of a different material. This is for economic reasons or to improve certain performance characteristics. For example, consider an InP (indium phosphide) on silicon composite substrate, in which the single-crystal InP layer serves as a seed for the epitaxial growth of a functional stack of III-V layers, traditionally grown on a bulk InP substrate. The silicon substrate provides mechanical strength to the composite substrate and allows for optimization of material costs.

[0003] Composite substrates can be developed in various ways, including by assembling (bonding) a donor substrate onto the support substrate, and transferring the seed layer (from the donor substrate) onto said support substrate, via thinning, delamination, or separation steps along a buried fragile plane formed in the donor substrate, as is notably the case in the well-known Smart Cut process.

[0004] Components produced using III-V epitaxy are generally very sensitive to the crystalline quality of the functional layer stack, particularly to crystalline defects (stacking faults, dislocations, etc.). Some crystalline defects may pre-exist in the seed layer; in this case, epitaxy merely propagates them into the functional stack. Defects can also be generated during epitaxial growth, notably due to poor initial nucleation, unsuitable growth conditions (temperature, pressure, gas flow, contamination, etc.), or excessive mechanical stresses leading to irreversible relaxation phenomena, generally synonymous with dislocations.

[0005] The authors observed that, in many cases, epitaxial growth on an InP-on-Si composite substrate, instead of a bulk InP substrate, induces texturing or undulations on the surface of the epitaxial layers of the resulting composite structure. The shape of these undulations can vary, but a frequently observed pattern is a grid-like structure known as a "cross hatch."

[0006] This phenomenon also occurs in epitaxial stacks on InP bulk substrates, as well as in other systems, for example on GaAs bulk substrates, or even in Si / SiGe systems. It is generally associated with mechanical stress issues and appears in situations where the lattice parameter of the epitaxial layer differs from that of the seed layer. In this case, the epitaxial layer is generally under stress, and since the energy stored in the epitaxial layer is an increasing function of its thickness, it eventually relaxes irreversibly beyond a certain limit.

[0007] It appears important to resolve this problem of texturing, and consequently of defects, of epitaxial layers on composite substrate. SUBJECT OF THE INVENTION

[0008] The present invention proposes a method for manufacturing a composite structure comprising the epitaxial growth of a functional stack of layers on the seed layer of a composite substrate. The method involves a specific adjustment of the intrinsic lattice parameter of at least one epitaxially grown layer relative to the intrinsic lattice parameter of the seed layer, based on the differential expansion properties of the support and the seed layer of the composite substrate. BRIEF DESCRIPTION OF THE INVENTION

[0009] The invention relates to a method for manufacturing a composite structure comprising the following steps:

[0010] a) the supply of a composite substrate including a support substrate and a seed layer of single-crystal III-V material disposed on the support substrate via a bonding interface, the support substrate having a coefficient of thermal expansion different from that of the seed layer, and the seed layer having an intrinsic lattice parameter;

[0011] b) the growth by epitaxy of a stack of type III-V single-crystal layers, called epitaxial layers, on the seed layer, each epitaxial layer having an intrinsic lattice parameter. The manufacturing process is remarkable in that:

[0012] - when the coefficient of thermal expansion of the support substrate is less than that of the seed layer, at least one epitaxial layer of the stack has a composition chosen so that its intrinsic lattice parameter is reduced by 200 ppm to 3000 ppm compared to the intrinsic lattice parameter of the seed layer; - when the coefficient of thermal expansion of the support substrate is greater than that of the seed layer, at least one epitaxial layer of the stack has a composition chosen so that its intrinsic lattice parameter is increased by 200 ppm to 3000 ppm compared to the intrinsic lattice parameter of the seed layer.

[0013] According to other advantageous and non-limiting features of the invention, taken alone or in any technically feasible combination: the single-crystal III-V seed layer material is a binary compound, in particular indium phosphide (InP) or gallium arsenide (GaAs); the binary compound of the seed layer is indium phosphide (InP), the coefficient of thermal expansion of the supporting substrate is lower than that of the seed layer, and at least one epitaxial layer is formed of a ternary InP-type compound 1-x Ga x P or In 1-x Al x P, in which x is between 0.0025 and 0.03; x is between 0.0075 and 0.025, preferably between 0.01 and 0.02; the binary compound of the seed layer is indium phosphide (InP), the coefficient of thermal expansion of the supporting substrate is lower than that of the seed layer, and at least one epitaxial layer is formed of a quaternary compound of the In type 1-x-y Gax Al y P, in which the sum of x and y is between 0.0025 and 0.03; the sum of x and y is between 0.0075 and 0.025, preferably between 0.01 and 0.02; the binary compound of the seed layer is gallium arsenide (GaAs), the coefficient of thermal expansion of the supporting substrate is lower than that of the seed layer, and at least one epitaxial layer is formed of a ternary compound of the GaAs type 1-z P z in which z is between 0.0025 and 0.08; the binary compound of the seed layer is indium phosphide (InP), the coefficient of thermal expansion of the supporting substrate is greater than that of the seed layer, and at least one epitaxial layer is formed of a ternary compound of the InAs type w P 1-win which w is between 0.0025 and 0.03, preferably between 0.01 and 0.02; at least two epitaxial layers of the stack have compositions chosen such that their intrinsic lattice parameter is reduced or increased relative to the intrinsic lattice parameter of the seed layer; each of the epitaxial layers of the stack has compositions chosen such that their intrinsic lattice parameter is reduced or increased relative to the intrinsic lattice parameter of the seed layer; the supporting substrate is formed of a single-crystal or polycrystalline material chosen from silicon, sapphire, gallium arsenide, germanium, aluminum nitride and silicon carbide;Step a) comprises the following substeps: the provision of a donor substrate of single-crystal III-V material, having a front face and a back face, the bonding by molecular adhesion of the front face of the donor substrate to the support substrate, and the thinning of the back face of the donor substrate to obtain the composite substrate; Step a) comprises the following substeps: a1) the provision of a donor substrate of single-crystal III-V material, a2) the formation of a fragile plane embedded in the donor substrate, delimiting, with a front face of said donor substrate, the seed layer to be transferred, a3) the bonding by molecular adhesion of the front face of the donor substrate to the support substrate, a4) the separation along the embedded fragile plane to transfer the seed layer to the support substrate and obtain the composite substrate, on the one hand, and the remainder of the donor substrate, on the other hand.

[0014] The invention also relates to a composite structure comprising: a composite substrate including a support substrate and a seed layer of single-crystal III-V material disposed on the support substrate via a bonding interface, the support substrate having a coefficient of thermal expansion different from that of the seed layer, the seed layer having an intrinsic lattice parameter; a stack of single-crystal III-V type layers, called epitaxial layers, on the seed layer, each epitaxial layer having an intrinsic lattice parameter.

[0015] When the coefficient of thermal expansion of the support substrate is lower than that of the seed layer, the intrinsic lattice parameter of at least one epitaxial layer of the stack is reduced by 200 ppm to 3000 ppm relative to the intrinsic lattice parameter of the seed layer. When the coefficient of thermal expansion of the support substrate is greater than that of the seed layer, the intrinsic lattice parameter of at least one epitaxial layer of the stack is increased by 200 to 3000 ppm relative to the intrinsic lattice parameter of the seed layer.

[0016] Preferably, the intrinsic lattice parameter of the -at least one- epitaxial layer, reduced or increased relative to the lattice parameter of the seed layer, is defined by the composition of said layer, in particular by a substitution of 0.25% to 8% of III or V elements by III or V elements that are respectively smaller or larger. BRIEF DESCRIPTION OF THE FIGURES

[0017] Other features and advantages of the invention will become apparent from the detailed description of the invention which follows with reference to the accompanying figures in which:

[0018]

[0019] [Fig. 1b] Laet la [Fig. 1b] respectively present a composite substrate and a composite structure according to the present invention;

[0020]

[0021]

[0022]

[0023] La, la, laet la represent sub-steps of step a) of a manufacturing process according to the invention;

[0024] Figure 1 shows the evolution of the lattice parameter of an InP layer (in particular the lattice parameter in the plane of the layer) as a function of temperature, in two cases: [a / - bulk InP] where the InP layer has been epitaxially grown on a bulk substrate also made of InP; [a / - InPOSi] where the InP layer is assembled on a silicon support substrate.

[0025] The same references in the figures can be used for elements of the same type. Some figures are schematic representations which, for the sake of clarity, are not drawn to scale. In particular, the layer thicknesses along the z-axis are not to scale with respect to the lateral dimensions along the x and y axes; and the relative thicknesses of the layers are not necessarily to scale in the figures. DETAILED DESCRIPTION OF THE INVENTION

[0026] The present invention relates to a method for manufacturing a composite structure comprising a stack of single-crystal layers, epitaxially grown on a seed layer 2 forming part of a composite substrate 10.

[0027] Thus, the process includes a step a) corresponding to the provision of a composite substrate 10 comprising a support substrate 1 and a seed layer 2 disposed on the support substrate 1 via a bonding interface 3 (). The seed layer 2 is made of a single-crystal III-V material (III: In, Ga, Al, ...; V: As, P, Sb, ...). Its thickness is typically between a few nanometers and 2 micrometers, preferably less than or equal to 1000 nm, 500 nm, 250 nm, or even 100 nm. This small thickness prevents the generation of defects during subsequent temperature ramps and cool-downs required for the fabrication of the composite structure 100, because the support substrate 10 has a coefficient of thermal expansion different from that of the seed layer 2, either higher or lower.

[0028] Recall that the coefficient of thermal expansion of a material depends on temperature. For the sake of simplicity, we can consider an average value for the coefficient of thermal expansion over the temperature range. This range extends from the assembly temperature between the seed layer 2 and the support substrate 1 (for example, ambient temperature, approximately 20°C) up to the epitaxial temperature, which varies depending on the nature of the epitaxially formed materials. Note that the assembly could also be carried out at lower or higher temperatures, which would shift the calculated average value of the coefficient of thermal expansion.

[0029] Typically, if we consider average coefficients of thermal expansion, the ratio between the upper coefficient of thermal expansion (that of the support substrate 1 or the germ layer 2) and the lower coefficient of thermal expansion (that of the support substrate 1 or the germ layer 2) is here between 1.05 and 2.5.

[0030] The support substrate 1 can have a thickness ranging from a few hundred micrometers to 800μm.

[0031] The single-crystal III-V material of the seed layer 2 is advantageously a binary compound, in particular indium phosphide (InP) or gallium arsenide (GaAs). The supporting substrate 1 can be formed from a single-crystal or polycrystalline material selected from silicon, sapphire, gallium arsenide, germanium, silicon carbide, etc.

[0032] The composite substrate 10 can for example be of the type InP on Silicon, InP on Sapphire, InP on GaAs, InP on Germanium, InP on SiC, GaAs on Silicon, GaAs on Sapphire, GaAs on Germanium, GaAs on SiC, etc.

[0033] The germ layer 2 has an intrinsic lattice parameter. In the remainder of this description, the intrinsic lattice parameter qualifies the natural lattice parameter, in the relaxed state, of the material forming the layer in question.

[0034] Even though the nature of seed layer 2 and the nature of support substrate 1 are different, seed layer 2 is in a significantly relaxed state because it is taken from a massive donor substrate 20 and transferred to support substrate 1, rather than being formed epitaxially on the latter. Therefore, the lattice parameter of seed layer 2 is not crystallographically related to that of support substrate 1: the respective lattice parameters of seed layer 2 and support substrate 1 are completely independent. The lattice parameter of seed layer 2 in the composite substrate 10 is thus equal to, or very close to, the intrinsic lattice parameter of the material constituting seed layer 2.

[0035] Note that the seed layer 2 could potentially exhibit a non-zero stress level due to the assembly temperature on the support substrate 1, due to creep phenomena at the bonding point, or other deformations related to the transfer process used to manufacture the composite substrate 10. In such a case, the actual lattice parameter of the seed layer 2, in the plane of said layer (a / ) could be somewhat different from the intrinsic mesh parameter.

[0036] For example, if seed layer 2 is formed in InP, its intrinsic lattice parameter at room temperature is approximately 5.869 Angstroms; if seed layer 2 is formed in GaAs, its intrinsic lattice parameter at room temperature is approximately 5.654 Angstroms.

[0037] The composite substrate 10 is produced by a thin film transfer technique, involving an assembly between said thin film and the support substrate 1 via a bonding interface 3.

[0038] Advantageously, and with reference to the Smart Cut process, step a) comprises the following sub-steps:

[0039] a1) the supply of a donor substrate 20 in single-crystal III-V material, from which the seed layer 2 will be taken, and the supply of the support substrate 1, whose coefficient of thermal expansion differs from that of the donor substrate 20 (). The donor substrate 20 and support 1 are usually in the form of circular platelets, with diameters ranging from 50mm to 300mm, depending on the availability of materials;

[0040] a2) the formation of a fragile plane buried 4 in the donor substrate 20, delimiting with a front face of said donor substrate 20, the germ layer 2 to be transferred ();

[0041] a3) the molecular adhesion of the front face of the donor substrate 20 to the support substrate 1, to form a glued assembly 120 including a bonding interface 3 between the two substrates 20,1 ();

[0042] a4) the separation along the buried fragile plane 4 to transfer the germ layer 2 onto the support substrate 1 and obtain the composite substrate 10, on the one hand, and the rest of the donor substrate 20', on the other hand ().

[0043] Substep a2) can in particular be carried out by ion implantation of light species such as hydrogen and / or helium.

[0044] The front face of the donor substrate 20 and / or the front face (assembled) of the support substrate 1 may include an intermediate layer, insulating, conductive, or semiconducting, capable of facilitating bonding, improving the quality and strength of the interface, or providing interesting insulating or conductive properties for the future components to be developed. Cleaning and surface treatments (polishing, plasma, etc.) are usually applied to the substrates before assembly.

[0045] As a reminder, direct molecular adhesion bonding (substep a3) does not require an adhesive, as bonds are established at the atomic level between the surfaces being joined. Several types of molecular adhesion bonding exist, differing in particular by their temperature, pressure, atmospheric conditions, and pretreatments required before the surfaces are brought into contact. Examples include room-temperature bonding with or without prior plasma activation of the surfaces to be joined, atomic diffusion bonding (ADB), surface-activated bonding (SAB), and others.

[0046] Substep a4) of separation along the buried weak plane is usually achieved by applying heat treatment at a temperature between 100°C and 500°C, depending on the materials involved. Such heat treatment induces the development of cavities and microcracks in the buried weak plane, and their pressurization by the light gaseous species present, until a fracture propagates along said weak plane. Alternatively or concurrently, mechanical stress can be applied to the bonded assembly, and in particular to the buried weak plane 4, so as to mechanically propagate or assist in propagating the fracture leading to separation.

[0047] The free surface of germ layer 2 is usually rough after separation.

[0048] A finishing substep (a5) is preferably applied to the composite substrate 10 to restore the crystalline quality and surface condition of the seed layer 2 and to consolidate the bonding interface 3. The finishing process may include thermal, mechanical, and / or chemical treatments. It also aims to make the surface of the seed layer 2 compatible with the epitaxial growth of a stack of type III-V single-crystal layers. For this purpose, polishing and cleaning treatments, in particular, may be used.

[0049] As an example of implementation, one can refer to the publication by B. Ghyselen et al "Large-Diameter III–V on Si Substrates by the Smart Cut Process: The 200 mm InP Film on Si Substrate Example”, physica status solidi (a) Volume 219, Issue 4.

[0050] Alternatively, the thin-film transfer technique can be based on bonding and mechanical and / or chemical thinning. Step a) may then include:

[0051] - the supply of a donor substrate 20 in single-crystal III-V material, having a front face and a back face,

[0052] - the molecular adhesion of the front face of the donor substrate 20 to the support substrate 1, to form a bonded assembly including a bonding interface 3 between the two substrates 20,1,

[0053] - thinning of the back face of the donor substrate 1 to obtain the composite substrate 10.

[0054] Thinning can be achieved by all known techniques, including grinding (rectification), mechanical or mechano-chemical polishing, and / or chemical etching.

[0055] The process then includes a step b) corresponding to the epitaxial growth of a stack 50 of type III-V single-crystal layers, referred to as epitaxial layers 51, 52, 53, 54, on the seed layer 2 ([Fig. 1b]). Each epitaxial layer 51, 52, 53, 54, according to its composition, is characterized by an intrinsic lattice parameter.

[0056] III-V material epitaxies, particularly those performed on InP- or GaAs-based substrates, are typically carried out at temperatures between 500°C and 700°C, depending on the epitaxial technique used, for example, metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE). The epitaxial layers can be composed of binary, ternary, quaternary, or even more than four III-V compounds, arranged in a functional stacking configuration for the fabrication of microelectronic components such as HBT and HEMT transistors, lasers, or photodiodes.

[0057] For example, to fabricate a short-wavelength infrared (SWIR) photodiode with a PIN structure, it is known to perform a stacking of layers as shown below, by epitaxy on a bulk InP substrate, following the order indicated (1 = first layer deposited on the bulk substrate, 2 = second layer deposited on the first layer, etc.): N-doped InP, with a typical thickness of 300 to 500 nm; In 0,53 Ga 0,47 As, intrinsic, with a typical thickness of 2.5 to 3 µm; InP, P-doped, with a thickness of 0.5 to 1 µm; In 0,53 Ga 0,47 As, doped P, with a typical thickness of 30 to 100 nm.

[0058] The ternary compound In 0,53 Ga 0,47 As provides a perfect mesh fit with InP, avoiding the development of stresses in the layers during the epitaxial growth of the stack on the massive InP substrate.

[0059] Within the framework of the present invention, due to the difference in thermal expansion between the seed layer 2 and the support substrate 1, certain conditions are required for the intrinsic lattice parameter of all or part of the epitaxial layers 51, 52, 53, 54 of the stack 50 formed during step b).

[0060] According to a first aspect, when the coefficient of thermal expansion of the support substrate 1 is less than that of the seed layer 2, at least one epitaxial layer of the stack 50 has a composition chosen so that its intrinsic lattice parameter is reduced from 200 ppm (i.e. 0.020%) to 3000 ppm (i.e. 0.3%) relative to the intrinsic lattice parameter of the seed layer 2. In some particular cases, the reduction of the intrinsic lattice parameter of the epitaxial layer can be between 500 ppm and 2500 ppm, between 750 ppm and 1800 ppm, or even between 900 ppm and 1300 ppm.

[0061] Thus, at the epitaxial temperature, the germinal layer 2, whose lattice parameter in the plane (a / ) is significantly reduced due to the lower expansion of the support substrate 1, is found to be favorable to the growth of the epitaxial layer 51,52,53,54 chosen with an intrinsic mesh parameter shifted.

[0062] As an illustration, consider a 100% InP-on-Si composite substrate (InPOSi). Between room temperature (or more broadly, the low temperatures at which the assembly of the seed layer 2 and the support substrate 1 can occur) and the typical epitaxial temperature on InP (i.e., 500 to 650°C), silicon expands by approximately half compared to InP. In a simplified model, considering on the one hand the difference between the average coefficients of thermal expansion of Si and InP (average difference on the order of 2 to 3E-6) and on the other hand the temperature amplitude between the epitaxial temperature and room temperature (amplitude on the order of 600°C), the calculation shows that the lattice parameter of the InP layer can be affected (relative to bulk relaxed InP) by the order of 900 to 1300 ppm.

[0063] Although this order of magnitude comes from an extremely simplified calculation, and does not take into account the exact conditions of growth (temperature, growth techniques, presence of other sources of stress, …) nor the exact composition of the epitaxial stack (nature, thickness, coefficient of thermal expansion of each of the layers which compose it), the applicant observed that the choice of one or more epitaxial layers 51,52,53,54 having an intrinsic lattice parameter shift of this order of magnitude, with respect to the seed layer 2, had a particularly beneficial effect on the quality of the epitaxial layers obtained.

[0064] The simplified calculation does not take into account other compromises that one might seek to make. For example, during the cooling process after epitaxy, opposite effects can come into play, again based on the differences in the coefficient of thermal expansion between the III-V material layers and the supporting substrate 1. Let's consider the case of an InP / Si type composite substrate 10. During cooling, the effect is that the epitaxial layers 51, 52, 53, and 54 are now under tension. If the composition adjustment of the epitaxial layer (shift in the intrinsic lattice parameter), an adjustment beneficial for handling waviness and crosshatch during epitaxy, is too large, the resulting tension during cooling can conversely be too high and lead to mechanical damage of the epitaxial stack (cracking and fissures in the case of tensioning).This is why the authors recommend, in some cases, only partially shifting the intrinsic lattice parameter of the epitaxial layer relative to the germ layer 2. Thus, only a partial adjustment of the composition may be desired.

[0065] Conversely, other effects, such as the presence of another source of stress (for example, the stress state of the seed layer 2 which would significantly shift the lattice parameter in the plane (a / The actual value of this layer (the intrinsic lattice parameter) could lead to a greater compensation magnitude compared to the same simplified calculation. Thus, even if a stress reduction of around 900-1300 ppm appears to be a good target value as a first approximation, a wider reduction range should be considered, depending on the specific real-world case, from 200 to 3000 ppm.

[0066] Thus, starting from a composite substrate 10 of the InP-on-silicon type, with a 0.2μm thick InP seed layer 2 and a 525μm thick silicon support substrate 1 (for example, for a composite substrate with a diameter of 100mm), one can, in particular, create a stack of layers 50 such as below, to form a composite structure 100 according to the present invention: 0,985 Ga 0,015 P, N-doped, with a thickness of 300 to 500 nm; In 0,515 Ga 0,485 As, intrinsic, with a thickness of 2.5 to 3μm; In 0,985 Ga 0,015 P, doped P, with a thickness of 0.5 to 1 μm; In 0,515 Ga 0,485 As or In 0,53 Ga 0,47 As, doped P, with a thickness of 50 to 100 nm.

[0067] In this example, compared to the conventional stacking on bulk InP described earlier for the fabrication of a SWIR photodiode, the first epitaxial layer 51 is a ternary In compound 0,985 Ga 0,015P, resulting from the fact that 1.5% of the indium atoms were replaced by gallium atoms, induces a reduction in the intrinsic lattice parameter of the first epitaxial layer of approximately 900–1300 ppm compared to the intrinsic lattice parameter of the seed layer 2 (InP). In the second epitaxial layer 52, the indium composition of element III was also decreased by 1.5% (expressed as a percentage of total element III), in favor of gallium, compared to the In compound 0,53 Ga 0,47 As paired with InP as an intrinsic lattice parameter, i.e., a final compound In 0,515 Ga 0,485As; the lattice parameter reduction of the second epitaxial layer relative to the intrinsic lattice parameter of the seed layer 2 is on the order of 900–1300 ppm. The third epitaxial layer 53 was chosen to be identical to the first 51, with the same lattice parameter reduction. Finally, the fourth epitaxial layer 54 may or may not have a lattice parameter shift; its small thickness makes it less likely to develop stresses leading to irreversible relaxation.

[0068] The SWIR photodiode fabricated from this composite structure 100 is perfectly functional and performs well due to the crystallographic quality of the epitaxial layers 51, 52, 53, and 54 of the stack 50, which are free of defects and dislocations related to cross-hatching. In this particular example, three (at least) of the four epitaxial layers 51, 52, 53, and 54 have a composition chosen such that their intrinsic lattice parameter is reduced by approximately 0.09%–0.13% compared to the intrinsic lattice parameter of the seed layer 2. Alternatively, it could be considered to reduce the intrinsic lattice parameter of only the second epitaxial layer 52 (by choosing the In compound). 0,515 Ga 0,485As) and to retain the first, third and fourth epitaxial layers 51,53,54 of the classical stacking usually done on InP. Or, it could be chosen to reduce the intrinsic lattice parameter of the first 51 and the third 53 epitaxial layer, and to retain the second 52 and the fourth 54 epitaxial layer of the classical stacking.

[0069] More generally, to reduce the intrinsic lattice parameter of a III-V compound, it is possible to substitute a certain proportion of III elements with a smaller III element.

[0070] In the case of InP, the substitution of 0.3% to 4% of the indium atoms by gallium or aluminium allows a reduction of the intrinsic lattice parameter of the layer of about 200 ppm to 3000 ppm compared to the intrinsic lattice parameter of InP.

[0071] For a germ layer 2 formed in InP (binary compound), an epitaxial layer 51,52,53,54 can advantageously consist of a ternary compound, such as In 1-x Ga x P or the In 1-x Al x P, in which x is between 0.003 and 0.04 (0.3% to 4%), between 0.006 and 0.03 (0.6% to 3%), or even between 0.01 and 0.02 (1% to 2%).

[0072] Again, for a germ layer in InP (binary compound), an epitaxial layer 51,52,53,54 can advantageously consist of a quaternary compound, such as In 1-x-y Ga x Al y P in which the sum of x and y is between 0.003 and 0.04 (0.3% to 4%), between 0.006 and 0.03 (0.6% to 3%), or even between 0.01 and 0.02 (1% to 2%).

[0073] Other compositions are also possible, involving the substitution of element V with a smaller element V (for example, substituting a certain proportion of arsenic with phosphorus). For example, considering a layer of InGaAs (e.g., In 0,53 Ga 0,47 As) whose intrinsic lattice parameter we wish to reduce relative to the intrinsic lattice parameter of InP, it is possible to replace As atoms with P atoms, to form a quaternary compound of the InGaAs type 1-x P x , in which x is between 0.003 and 0.04 (0.3% to 4%), between 0.006 and 0.03 (0.6% to 3%), or even between 0.01 and 0.02 (1% to 2%). The compound In 0,53 Ga 0,47 As 0,985 P 0,015 whose intrinsic lattice parameter is reduced by 900-1300 ppm compared to the intrinsic lattice parameter of the germ layer 2 in InP.

[0074] It is also possible to act on both elements III and elements V and form a quaternary compound of the In type 1-x Ga x As 1-z P z in which x and z are respectively between 0.003 and 0.04 (0.3% to 4%), between 0.006 and 0.03 (0.6% to 3%), or even between 0.01 and 0.02 (1% to 2%). Consider, for example, the compound In 0,52 Ga 0,48 As 0,99 P 0,01 whose intrinsic lattice parameter is reduced by 900-1300 ppm compared to the intrinsic lattice parameter of the germ layer 2 in InP.

[0075] These rules and proportions of substitution also apply to ternary compounds (as illustrated in the previous example, with the third epitaxial layer 53), quaternary compounds, or compounds with more than four elements, whose intrinsic lattice parameter is matched to that of InP and which we aim to reduce in the stacking of layers 50 of the composite structure 100, such as InAlAs, InGaAsP, etc. The common feature remains a shift in composition within the stacking 50 of epitaxial layers 51, 52, 53, 54, to migrate towards compositions with an intrinsic lattice parameter 200 ppm to 3000 ppm below that of InP, or even more specifically reduced by 500 ppm to 2500 ppm, or even by 750 ppm to 1800 ppm relative to that of InP. By using substitutions between the different III and V elements as much as possible, the variations in composition of each of these III and / or V elements remain limited to the order of a few percent, as mentioned previously.

[0076] In the case of a GaAs seed layer 2, for example when using a 10 GaAs-on-Si composite substrate, the reasoning is broadly the same as when the seed layer 2 is InP. However, since the difference in coefficient of thermal expansion is greater between gallium arsenide and silicon (compared to the InP-on-silicon system), a significantly greater reduction in the intrinsic lattice parameter of all or part of the epitaxial layers 51, 52, 53, and 54 is preferable, ideally between 1200 ppm and 1800 ppm, and more broadly within a range of 750 ppm to 3000 ppm. This reduction in the lattice parameter would typically correspond to a substitution of 2% to 8% of the arsenic atoms by phosphorus, or even between approximately 3% and 5%. The ternary compound GaAs is an example. 0,96 P 0,04whose intrinsic lattice parameter is reduced by approximately 1300–1600 ppm compared to the intrinsic lattice parameter of the GaAs germ layer 2. As with the InP germ layer 2, these adjustments can be achieved through a number of combinations of elements III and V.

[0077] More generally, when the binary compound of the seed layer 2 is gallium arsenide (GaAs) and the coefficient of thermal expansion of the supporting substrate 1 is lower than that of the seed layer 2, at least one epitaxial layer 51, 52, 53, 54 can be formed of a ternary GaAs-type compound 1-z P z in which z is between 0.0025 and 0.08, so that its intrinsic lattice parameter is reduced from 200 ppm to 3000 ppm relative to the intrinsic lattice parameter of the seed layer 2.

[0078] According to a second aspect, when the coefficient of thermal expansion of the support substrate 1 is greater than that of the seed layer 2, at least one epitaxial layer 51,52,53,54 of the stack 50 has a composition chosen so that its intrinsic lattice parameter is increased from 200 to 3000 ppm relative to the intrinsic lattice parameter of the seed layer 2. In some particular cases, the increase in the intrinsic lattice parameter of the epitaxial layer 51,52,53,54 can be between 250 ppm and 2000 ppm, or even between 300 ppm and 800 ppm.

[0079] Here again, at the epitaxial temperature, the germinal layer 2, whose lattice parameter in the plane (a / ) is significantly increased due to the greater dilation of the support substrate 1, is found to be favorable to the growth of the epitaxial layer 51,52,53,54 whose intrinsic mesh parameter has been intentionally shifted.

[0080] Thus, starting from a composite substrate 10 of the InP on GaAs type, with a 0.2 μm thick InP seed layer 2, one can notably create a stack 50 of layers such as below, to form a composite structure 100 according to the present invention: InAs 0,007 P 0.993 , N-doped, with a thickness of 300 to 500 nm; In 0,537 Ga 0,463 Intrinsic As, with a thickness of 2.5 to 3 μm; InAs 0,007 P 0.9993 , doped P, with a thickness of 0.5 to 1μm; In 0,537 Ga 0,463 As or In 0,53 Ga 0,55 As, doped P, with a thickness of 50 to 100 nm.

[0081] In this example, the first epitaxial layer is a ternary compound, in which 0.7% of the phosphorus atoms have been replaced by arsenic atoms, inducing an increase in the intrinsic lattice parameter of the first epitaxial layer 51 (InAs 0,007 P 0.993) of approximately 400-600 ppm relative to the intrinsic lattice parameter of seed layer 2 (InP). In the second epitaxial layer 52, the indium composition of the ternary compound was also increased by 0.7% (expressed as a percentage of the total element V), compared to the In compound 0,53 Ga 0,47 As paired with InP as an intrinsic lattice parameter, i.e., a final compound In 0,537 Ga 0.463 As; the increase in the intrinsic lattice parameter of the second epitaxial layer 52 compared to the intrinsic lattice parameter of the seed layer 2 is on the order of 400-600 ppm. The third epitaxial layer 53 was chosen to be identical to the first, with the same increase in lattice parameter. Finally, the fourth epitaxial layer 54 may or may not be offset; its small thickness makes it less likely to develop stresses leading to irreversible relaxation.

[0082] The SWIR photodiode fabricated from this composite structure 100 is perfectly functional and performs well due to the crystallographic quality of the epitaxial layers 51, 52, 53, 54 of the stack 50, which are free of defects and dislocations related to cross-hatching. In this particular example, three (at least) of the four epitaxial layers 51, 52, 53, 54 have a composition chosen such that their intrinsic lattice parameter is increased by approximately 0.04%–0.06% relative to the intrinsic lattice parameter of the seed layer 2. Alternatively, it could be considered to increase the intrinsic lattice parameter of one or two of the epitaxial layers 51, 52, 53, 54; for example, the intrinsic lattice parameter of only the second epitaxial layer 52 could be shifted (by choosing the In compound). 0,537 Ga 0,463As) and retain the first, third and fourth epitaxial layers 51,53,54 of the classic stacking usually done on InP.

[0083] More generally, to increase the relaxed lattice parameter of a III-V compound, it is possible to substitute a certain proportion of elements III and / or V with, respectively, a larger element III and / or V. The substitution proportions remain within the same ranges as according to the first aspect of the invention, namely on the order of % to a few percent, typically between 0.3% and 8% (expressed as a percentage of the total element III and / or V), to achieve an increase in the intrinsic lattice parameter of the epitaxial layer from 200 ppm to 3000 ppm relative to the intrinsic lattice parameter of the germ layer.

[0084] According to the first and second aspects, the invention proposes a shift in traditional compositions at the level of epitaxy III-V in order to promote the quality of epitaxial growth of the stack 50 on the germ layer 2 of the composite substrate 10.

[0085] The -at least one- epitaxial layer 51, 52, 53, 54 whose intrinsic lattice parameter is offset relative to the intrinsic lattice parameter of the seed layer 2 can be the raw stacking layer 50 directly on the seed layer 2 (called the first epitaxial layer 51) or an n ième epitaxial layer 52,53,54 of stacking 50.

[0086] All or part of the epitaxial layers 51,52,53,54 of the stacking 50 may have compositions chosen so that their intrinsic lattice parameter is reduced or increased relative to the intrinsic lattice parameter of the seed layer 2.

[0087] Advantageously, epitaxial layers with a thickness greater than 500 nm, greater than 250 nm, or even greater than 100 nm, have their compositions adjusted so that their intrinsic lattice parameters are shifted (down or up as appropriate) relative to the lattice parameter of the seed layer 2, depending on the nature of the composite substrate 10.

[0088] The invention also relates to a composite structure 100 comprising:

[0089] - the composite substrate 10 which includes the support substrate 1 and the seed layer 2 in single-crystal III-V material disposed on the support substrate 1 via a bonding interface 3, the support substrate 1 having a coefficient of thermal expansion different from that of the seed layer 2, and the seed layer 2 having an intrinsic lattice parameter;

[0090] - the stacking 50 of single-crystal layers of type III-V, called epitaxial layers 51,52,53,54, on the germ layer 2, each epitaxial layer having an intrinsic lattice parameter.

[0091] In the composite structure 100, at least one epitaxial layer 51, 52, 53, 54 of the stack 50 is chosen such that it has an intrinsic lattice parameter reduced by 200 ppm to 3000 ppm compared to the intrinsic lattice parameter of the seed layer 2, when the coefficient of thermal expansion of the support substrate 1 is less than that of the seed layer 2. When the coefficient of thermal expansion of the support substrate 1 is greater than that of the seed layer 2, at least one epitaxial layer of the stack 50 is chosen such that its intrinsic lattice parameter is increased by 200 to 3000 ppm compared to the intrinsic lattice parameter of the seed layer 2.

[0092] According to a preferred embodiment, the intrinsic lattice parameter of -at least one- epitaxial layer 51,52,53,54, reduced or increased relative to the intrinsic lattice parameter of the seed layer 2, is defined by the composition of said layer, in particular on a substitution of 0.3% to 8% of III or V elements by III or V elements respectively smaller or larger.

[0093] An example of a composite structure 100 can be given for the fabrication of a heterojunction bipolar transistor, based on InP.

[0094] A stack of twelve epitaxially grown layers on a bulk intrinsic InP substrate, such as the one below, was described by Sara Hamzeloui et al. (“High power InP / Ga(In)AsSb DHBTs for millimeter-wave Pas: 14.5 dBm output power and 10.4 mW / μm 2 power density at 94 GHz”, IEEE Journal of Microwaves, Oct 2022) for the manufacture of an InP / GaAsSb DHBT (“double hetero-junction bipolar transistor”) transistor:

[0095] 1. InP, doped Si : 2.8 E 19 / cm 3 , 300 nm

[0096] 2. Ga 0,47 In 0,53 As, doped Si : 3 E 19 / cm 3 , 20 nm

[0097] 3. InP, doped Si : 2.8 E 19 / cm 3 , 50 nm

[0098] 4. InP, doped Si : 9.1 E 16 / cm 3 , 125 nm

[0099] 5. Gas 0,41 Sb 0,59 Gas 0,58 Sb 0,42 , doped C : 8.6 E 19 / cm 3 , 20 nm

[0100] 6. Ga 0,22 In 0,78 P, doped Si:2.5 E 16 / cm 3 , 5 nm

[0101] 7. Language 0,22 In 0,78 P InP, Si doped:2.5 E 16 / cm 3 , 10 nm

[0102] 8. InP, doped Si : 2.5 E 16 / cm 3 , 5 nm

[0103] 9. InP, doped Si : 1.5 E 19 / cm 3 , 130 nm

[0104] 10. Ga 0,47 In 0,53 As, Si doped:3.8E19 / cm 3 , 20 nm

[0105] 11. Ga 0,47 In 0,53 As Ga 0,25 In 0,75 Acetylsalicylic acid (Si): 3.8 E 19 / cm 3 , 10nm

[0106] 12. Ga 0,25 In 0,75 Acetylsalicylic acid (Si): 3.8 E 19 / cm 3 , 5nm.

[0107] On a composite substrate 10 of the InP on silicon type, with a seed layer 2 in InP of 0.2μm thickness and a support substrate 1 in silicon of 525 μm thickness (for example for a composite substrate of diameter 100mm), an approximate stacking 50 of epitaxial layers can be achieved, the difference being that at least one of the twelve epitaxial layers has its composition modified so that its intrinsic lattice parameter is reduced relative to the intrinsic lattice parameter of the seed layer 2 in InP from 200 ppm to 3000 ppm, preferably from about 900-1300 ppm.

[0108] According to one variant, the first layer, 300 nm thick, can be the only one with a reduced intrinsic lattice parameter: for example, an InGaP layer could be chosen instead of an InP layer, with a Ga content between 1.0% and 1.5% replacing the In, in particular In 0,985 Ga 0,015 P or In 0,988 Ga 0,012 P.

[0109] According to another embodiment, all or part of the InP-based layers (layers referenced 1, 3, 4, 7, 8, and 9 above) are modified in composition so that their intrinsic lattice parameter is reduced within the range according to the invention. Among these cases, we can cite the particular case where only the InP layer referenced 1 is modified. Conversely, another embodiment consists of modifying only layers (all or some of them) that are not InP. Finally, according to yet another embodiment, all or a majority of the twelve layers of the stack 50 are adjusted in composition so as to exhibit a reduced intrinsic lattice parameter within the specified range.

[0110] The manufacturing process of a composite structure 100 according to the invention solves the problem of texturing, and consequently of defects, of the epitaxial layers on composite substrate 10, due to the particular adjustment of the intrinsic lattice parameter of at least one epitaxial layer 51, 52, 53, 54 of the composite structure 100 with respect to the intrinsic lattice parameter of the seed layer 2, depending on the differential expansion properties of the support 1 and the seed layer 2 of the composite substrate 10. The composite structure 100 obtained is thus formed of epitaxial layers exhibiting excellent crystallographic quality, free from defects and dislocations linked to a cross-hatching texture.

[0111] The invention minimizes stress in the epitaxial stack 50. As described earlier, the proposed solution is characterized in particular by the fact that it does not alter the nature (constituents, composition, doping) of the seed layer 2, which, for example in an InPOSi substrate, remains InP (binary). It differs in particular from solutions that would involve changing the composition of this seed layer itself, by substituting at least part of one or more of the two In and P elements with other III or V (or other) elements to address the stress problem in the composite substrate. This would cause migration within the substrate itself towards ternary or quaternary materials, or even more complex ones, for the seed layer, significantly complicating the manufacturing processes of the composite substrate.

[0112] Of course, the invention is not limited to the embodiments and examples described, and alternative embodiments can be made without departing from the scope of the invention.

Claims

Method of manufacturing a composite structure (100) comprising the following steps: a) the provision of a composite substrate (10) including a support substrate (1) and a seed layer (2) of single-crystal III-V material disposed on the support substrate (1) via a bonding interface (3), the support substrate (1) having a coefficient of thermal expansion different from that of the seed layer (2), and the seed layer (2) having an intrinsic lattice parameter; b) the growth by epitaxy of a stack (50) of single-crystal III-V type layers, called epitaxial layers (51,52,53,54), on the seed layer (2), each epitaxial layer (51,52,53,54) having an intrinsic lattice parameter;the manufacturing process being characterized in that: - when the coefficient of thermal expansion of the support substrate (1) is less than that of the seed layer (2), at least one epitaxial layer (51, 52, 53, 54) of the stack (50) has a composition chosen such that its intrinsic lattice parameter is reduced by 200 ppm to 3000 ppm compared to the intrinsic lattice parameter of the seed layer (2); - when the coefficient of thermal expansion of the support substrate (1) is greater than that of the seed layer (2), at least one epitaxial layer (51, 52, 53, 54) of the stack (50) has a composition chosen such that its intrinsic lattice parameter is increased by 200 ppm to 3000 ppm compared to the intrinsic lattice parameter of the seed layer (2). Manufacturing process according to claim 1, wherein the single-crystal III-V material of the seed layer (2) is a binary compound, in particular indium phosphide (InP) or gallium arsenide (GaAs). A manufacturing process according to claim 2, wherein the binary compound of the seed layer (2) is indium phosphide (InP), the coefficient of thermal expansion of the supporting substrate (1) is lower than that of the seed layer (2), and at least one epitaxial layer (51, 52, 53, 54) is formed of a ternary InP-type compound 1-x Ga x P or In 1-x Al x P, where x is between 0.0025 and 0.

03. Manufacturing method according to claim 3, wherein x is between 0.0075 and 0.025, preferably between 0.01 and 0.

02. A manufacturing process according to claim 2, wherein the binary compound of the seed layer (2) is indium phosphide (InP), the coefficient of thermal expansion of the supporting substrate (1) is lower than that of the seed layer (2), and at least one epitaxial layer (51, 52, 53, 54) is formed of a quaternary compound of the In type 1-x-y Ga x Al y P, in which the sum of x and y is between 0.0025 and 0.

03. Manufacturing method according to claim 5, wherein the sum of x and y is between 0.0075 and 0.025, preferably between 0.01 and 0.

02. A manufacturing process according to claim 2, wherein the binary compound of the seed layer (2) is gallium arsenide (GaAs), the coefficient of thermal expansion of the supporting substrate (1) is lower than that of the seed layer (2), and at least one epitaxial layer (51, 52, 53, 54) is formed of a ternary GaAs-type compound 1-z P zwhere z is between 0.0025 and 0.

08. A manufacturing process according to claim 2, wherein the binary compound of the seed layer (2) is indium phosphide (InP), the coefficient of thermal expansion of the supporting substrate (1) is greater than that of the seed layer (2), and at least one epitaxial layer (51, 52, 53, 54) is formed of a ternary InAs-type compound w P 1-w in which w is between 0.0025 and 0.03, preferably between 0.01 and 0.

02. A manufacturing method according to any one of the preceding claims, wherein at least two epitaxial layers (51, 52, 53, 54) of the stack (50) have compositions chosen so that their intrinsic lattice parameter is reduced or increased relative to the intrinsic lattice parameter of the seed layer (2). A manufacturing method according to any one of the preceding claims, wherein each of the epitaxial layers (51,52,53,54) of the stack (50) has compositions chosen so that their intrinsic lattice parameter is reduced or increased relative to the intrinsic lattice parameter of the seed layer (2). A manufacturing method according to any one of the preceding claims, wherein the support substrate (1) is formed from a single-crystal or polycrystalline material selected from silicon, sapphire, gallium arsenide, germanium, aluminum nitride and silicon carbide. A manufacturing process according to any one of the preceding claims, wherein step a) comprises the following substeps: - the provision of a donor substrate (20) of single-crystal III-V material, having a front face and a back face, - the bonding by molecular adhesion of the front face of the donor substrate (20) to the support substrate (1), - the thinning of the back face of the donor substrate to obtain the composite substrate (10). A manufacturing process according to any one of the preceding claims, wherein step a) comprises the following substeps: a1) supplying a donor substrate (20) of single-crystal III-V material, a2) forming a buried brittle plane (4) in the donor substrate (20), delimiting with a front face of said donor substrate, the seed layer (2) to be transferred, a3) bonding by molecular adhesion of the front face of the donor substrate (20) to the support substrate (1), a4) separating along the buried brittle plane (4) to transfer the seed layer (2) to the support substrate (1) and obtain the composite substrate (10), on the one hand, and the remainder (20') of the donor substrate, on the other hand. Composite structure (100) comprising: - a composite substrate (10) including a support substrate (1) and a seed layer (2) of single-crystal III-V material disposed on the support substrate (1) via a bonding interface (3), the support substrate (1) having a coefficient of thermal expansion different from that of the seed layer (2), and the seed layer (2) having an intrinsic lattice parameter; - a stack (50) of single-crystal III-V layers, called epitaxial layers (51, 52, 53, 54), on the seed layer (2), each epitaxial layer (51, 52, 53, 54) having an intrinsic lattice parameter; wherein, - when the coefficient of thermal expansion of the support substrate (1) is less than that of the seed layer (2), the intrinsic lattice parameter of at least one epitaxial layer (51, 52, 53, 54) of the stack (50) is reduced from 200 ppm to 3000 ppm relative to the intrinsic mesh parameter of the seed layer (2);- when the coefficient of thermal expansion of the support substrate (1) is greater than that of the seed layer (2), the intrinsic lattice parameter of at least one epitaxial layer (51,52,53,54) of the stack (50) is increased by 200 to 3000 ppm compared to the intrinsic lattice parameter of the seed layer (2). Composite structure (100) according to the preceding claim, wherein the intrinsic lattice parameter of -at least one- epitaxial layer (51,52,53,54), reduced or increased with respect to the lattice parameter of the seed layer (2), is defined by the composition of said layer, in particular by a substitution of 0.25% to 8% of III or V elements by III or V elements respectively smaller or larger.

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