Device with embedded electronic components and production method therefor

Abstract

One embodiment of the present disclosure provides a device with embedded electronic components comprised of: a base part that is derived from a wafer and has a cavity; and a plurality of electronic components and a sealing resin provided to the cavity. The cavity in the base part is configured from a plurality of recessed parts of which at least one of the height, the depth, and the shape differs in the thickness direction of the base part.

Description

Device with built-in electronic components and manufacturing method thereof

[0001] The present disclosure relates to a device with embedded electronic components and a method for manufacturing the same.

[0002] Semiconductor packages (PKGs) using devices with built-in electronic components have been known for some time. In such a configuration, one PKG may be provided above a heat dissipation member and the other PKG may be provided below the heat dissipation member. Within the PKG, multiple electronic components are provided on a predetermined pattern circuit, and a coating material such as resin is provided to cover the multiple electronic components. The electronic components and the pattern circuit are electrically connected to each other via wires (see Patent Document 1).

[0003] Japanese Patent Application Laid-Open No. 2019-24101

[0004] On the other hand, in the semiconductor packages using conventional electronic component-embedded devices such as those disclosed in Patent Document 1, there is no disclosure of the idea of ​​providing a cavity in a base portion derived from a wafer and embedding an electronic component therein. In particular, there is no disclosure or suggestion of a structure or manufacturing method capable of suppressing the occurrence of partial damage to the covering member that covers the electronic component in such semiconductor packages.

[0005] Therefore, an object of the present disclosure is to provide a device with built-in electronic components as a semiconductor package that can suppress the occurrence of partial damage to the covering member that covers the electronic components, and a method for manufacturing the same.

[0006] In order to achieve the above object, one embodiment of the present disclosure provides an electronic component-embedded device comprising: a wafer-derived base portion having a cavity; and a plurality of electronic components and a sealing resin provided in the cavity, wherein the cavity in the base portion is composed of a plurality of recessed portions differing in at least one of height or depth and shape in the thickness direction of the base portion.

[0007] In order to achieve the above object, one embodiment of the present disclosure provides an electronic component-embedded device comprising: a wafer-derived base portion having a cavity with a recessed portion; and a plurality of electronic components and sealing resin provided in the cavity; wherein the base portion has, on one main surface side, a flat first portion and a second portion that is continuous with the first portion and serves as the cavity; and the interface portion between the first portion and the second portion, which is the starting point of the recess in the cavity, partially has opposing regions that have mutually curved surfaces in a planar view.

[0008] In order to achieve the above object, one embodiment of the present disclosure provides a method for manufacturing an electronic component-embedded device, including: preparing a base wafer; forming a cavity having a recessed portion from a first main surface side of the base wafer using a blade; placing an electronic component in the cavity; and sealing the cavity with the electronic component placed in it with a resin member.

[0009] According to the electronic component-embedded device of the present disclosure, stress that occurs at a specific location in the base portion derived from the wafer, which serves as a covering member that covers the electronic component, when an external force acts on the device can be alleviated, thereby making it possible to effectively suppress the occurrence of partial damage to the base portion.

[0010] FIG. 1 is a cross-sectional view schematically showing a device with built-in electronic components according to a first embodiment. FIG. 2 is a cross-sectional view schematically showing a device with built-in electronic components according to a second embodiment. FIG. 3 is a cross-sectional view schematically showing a device with built-in electronic components according to a third embodiment. FIG. 4 is a cross-sectional view schematically showing a device with built-in electronic components according to a first embodiment. FIG. 5 is a cross-sectional view schematically showing a device with built-in electronic components according to a first embodiment. FIG. 6 is a cross-sectional view schematically showing a device with built-in electronic components according to a first embodiment. FIG. 10 is a schematic cross-sectional view illustrating step 2 of the method for manufacturing an electronic component-embedded device according to the second embodiment. FIG. 11 is a schematic cross-sectional view illustrating step 3 of the method for manufacturing an electronic component-embedded device according to the second embodiment. FIG. 12 is a schematic cross-sectional view illustrating step 4 of the method for manufacturing an electronic component-embedded device according to the second embodiment. FIG. 13 is a schematic cross-sectional view illustrating step 5 of the method for manufacturing an electronic component-embedded device according to the second embodiment. FIG. 14 is a schematic cross-sectional view illustrating step 6 of the method for manufacturing an electronic component-embedded device according to the second embodiment. FIG. 15 is a schematic cross-sectional view illustrating step 7 of the method for manufacturing an electronic component-embedded device according to the second embodiment. FIG. 16 is a schematic cross-sectional view illustrating step 8 of the method for manufacturing an electronic component-embedded device according to the second embodiment. FIG. 17 is a schematic cross-sectional view illustrating step 9 of the method for manufacturing an electronic component-embedded device according to the second embodiment.1 is a schematic cross-sectional view illustrating step 10 of the method for manufacturing an electronic component-embedded device according to a second embodiment. FIG. 2 is a schematic cross-sectional view illustrating step 1 of the method for manufacturing an electronic component-embedded device according to a third embodiment. FIG. 3 is a schematic cross-sectional view illustrating step 2 of the method for manufacturing an electronic component-embedded device according to the third embodiment. FIG. 4 is a schematic cross-sectional view illustrating step 5 of the method for manufacturing an electronic component-embedded device according to the third embodiment. FIG. 5 is a schematic cross-sectional view illustrating step 6 of the method for manufacturing an electronic component-embedded device according to the third embodiment. FIG. 6 is a schematic cross-sectional view illustrating step 7 of the method for manufacturing an electronic component-embedded device according to the third embodiment. FIG. 7 is a schematic cross-sectional view illustrating step 8 of the method for manufacturing an electronic component-embedded device according to the third embodiment. FIG. 8 is a schematic cross-sectional view illustrating step 9 of the method for manufacturing an electronic component-embedded device according to the third embodiment. FIG. 9 is a schematic cross-sectional view illustrating step 10 of the method for manufacturing an electronic component-embedded device according to the third embodiment. FIG. 10 is a schematic cross-sectional view illustrating step 11 of the method for manufacturing an electronic component-embedded device according to the third embodiment. FIG. 11 is a schematic cross-sectional view illustrating step 12 of the method for manufacturing an electronic component-embedded device according to the third embodiment. 5B is a schematic cross-sectional view illustrating step 13 of the method for manufacturing an electronic component-embedded device according to the third embodiment. FIG. 5C is a schematic cross-sectional view illustrating step 14 of the method for manufacturing an electronic component-embedded device according to the third embodiment. FIG. 5D is a schematic cross-sectional view illustrating an example of step 1 of forming a cavity of a predetermined shape in a base wafer using a blade. FIG. 5C is a schematic cross-sectional view illustrating an example of step 1 of forming a cavity of a predetermined shape in a base wafer using a blade, following FIG. 5A. FIG. 5D is a schematic plan view showing the state of the base wafer after cavity forming step 1 has been performed. FIG. 5D is a schematic cross-sectional view illustrating an example of step 2 of forming a cavity of a predetermined shape in a base wafer using a blade.5D , a schematic cross-sectional view illustrating another example of the step 2 of forming a cavity of a predetermined shape on a base wafer using a blade. FIG. 5D is a schematic cross-sectional view illustrating another example of the step 2 of forming a cavity of a predetermined shape on a base wafer using a blade. FIG. 5D is a schematic cross-sectional view illustrating another example of the step 2 of forming a cavity of a predetermined shape on a base wafer using a blade. FIG. 5D is a schematic cross-sectional view illustrating another example of the step 2 of forming a cavity of a predetermined shape on a base wafer using a blade. FIG. 5D is a schematic cross-sectional view illustrating another example of the step 2 of forming a cavity of a predetermined shape on a base wafer using a blade. FIG. 5D is a schematic cross-sectional view illustrating an example of the base wafer (having an obtained cavity and corresponding to a base portion derived from a wafer) after the step 2 of forming a cavity. FIG. 1 is a cross-sectional view schematically showing an example of a base portion having a cavity of a predetermined shape. FIG. 2 is a cross-sectional view schematically showing an example of a base portion having a cavity of a predetermined shape. FIG. 3 is a cross-sectional view schematically showing an example of a base portion having a cavity of a predetermined shape. FIG. 4 is a cross-sectional view schematically showing an example of a base portion having a cavity of a predetermined shape. FIG. 5 is a cross-sectional view schematically showing an example of a base portion having a cavity of a predetermined shape. FIG. 6 is a cross-sectional view schematically showing an example of a base portion having a cavity of a predetermined shape. FIG. 7 is a cross-sectional view schematically showing an example of a base portion having a cavity of a predetermined shape. FIG. 8 is a cross-sectional view schematically showing an example of a base portion having a cavity of a predetermined shape.

[0011] Hereinafter, the electronic component-embedded device of the present disclosure will be specifically described with reference to the drawings.

[0012] First Embodiment FIG. 1A is a cross-sectional view schematically showing an electronic component-embedded device according to a first embodiment.

[0013] 1A , the electronic component-embedded device 1000 according to the first embodiment includes a wafer-derived base 100 having a cavity 110, a plurality of electronic components 200 and a sealing resin 600, each provided in the cavity 110, a rewiring layer 400 electrically connectable to the electronic components 200 located on one main surface of the device 1000, and a heat dissipation shield member 500 located on the other main surface opposite the one main surface. Although not shown, external electrodes may be disposed on one main surface of the rewiring layer 400 in the electronic component-embedded device 1000. These external electrodes may be used when the electronic component-embedded device 1000 is secondarily mounted on another device.

[0014] That is, a plurality of electronic components 200 and a sealing resin 600 are provided in the cavity 110 of the base portion 100 between the rewiring layer and the heat dissipation shield member 500 that face each other.

[0015] Specifically, a plurality of electronic components 200 are arranged at predetermined intervals in cavity 110 of base portion 100. Sealing resin 600 is provided to fill the spaces between these spaced-apart electronic components 200. Furthermore, these mutually spaced-apart electronic components 200 are arranged side by side on rewiring layer 400.

[0016] In this embodiment, the electronic component 200 provided in the cavity 110 can be disposed so as to be covered by the main body portion 101 (or body portion) of the base portion 100. That is, the electronic component 200 is provided in the cavity 110 so that the top surface 201 of the electronic component 200 contacts the cavity forming surface 111 that defines the cavity 110.

[0017] A first conductive connection via 310 is interposed between each of the multiple electronic components 200 (first electronic component 210 to third electronic component 230) and the redistribution layer 400, and one end of this first conductive connection via 310 contacts each electronic component 200 and the other end contacts the redistribution layer 400.

[0018] Furthermore, a second conductive connecting via 320 is interposed between the first electronic component 210 and the heat dissipation shield member 500, with one end of this second conductive connecting via 320 contacting the first electronic component 210 and the other end contacting the heat dissipation shield member 500. In this specification, the conductive connecting via will be referred to as 300 unless it is necessary to distinguish between first, second, etc.

[0019] 1A , the plurality of electronic components 200 may include a first electronic component 210 that is relatively large in size, and a second electronic component 220 and a third electronic component 230 that are each relatively smaller in size than the first electronic component 210. Examples of electronic components 200 include active components (CPUs, GPUs, LSIs, etc.), passive components (capacitors, low-capacity capacitors, inductors, chip resistors, etc.), and power ICs. Examples of usable sealing resin 600 include liquid epoxy-based molding resin (containing inorganic filler), sheet-shaped resin, and granular resin molding resin.

[0020] In addition, from the viewpoint of improving heat dissipation from the inside of the device 1000 to the outside, ceramics and SiO ２ A mixed filler or a ceramic single filler can be used. As the ceramic, for example, alumina, silicon nitride, boron nitride, or aluminum nitride can be used. Among them, aluminum nitride is preferred because of its high thermal conductivity.

[0021] The redistribution layer 400 described above is a multilayer wiring layer. The redistribution layer 400 includes wiring (conductive wiring), a dielectric film substantially composed of an insulating material, and conductive vias that electrically connect wiring between different layers within the redistribution layer 400. The wiring and conductive vias include a conductive material. Examples of conductive materials include Cu, Ag, and Au, as well as alloys containing these, with Cu being preferred. The redistribution layer 400 can have multiple layers, for example, two or more layers of wiring and one or more layers of dielectric film. The thickness of each wiring layer and each dielectric film layer that constitutes the redistribution layer 400 is, for example, 1.5 μm to 5.0 μm. In this case, the thickness of the redistribution layer 400 is the value (unit: μm) obtained by multiplying the thickness of each layer (1.5 μm to 5.0 μm) by the total number of layers within the redistribution layer 400.

[0022] The dielectric film is made of, for example, an inorganic insulating material or an organic insulating material, and preferably consists essentially of an inorganic insulating material or an organic insulating material. Examples of inorganic insulating materials include silicon oxide (SiO ２ ) and silicon nitride (SiN, Si ３ N ４ Examples of organic insulating materials include epoxy resin, silicone resin, polyester, polypropylene, polyimide, acrylonitrile-butadiene-styrene (ABS) resin, acrylonitrile-styrene (AS) resin, methacrylic resin, polyamide, fluororesin, liquid crystal polymer, polybutylene terephthalate, and polycarbonate.

[0023] When the redistribution layer 400 has a dielectric film (hereinafter also referred to as an "inorganic dielectric film") substantially composed of an inorganic material (e.g., an inorganic insulating material), the width (wiring width) of the redistribution layer 400 can be made finer than when a dielectric film substantially composed of an organic material (e.g., an organic insulating material), thereby enabling the miniaturization of the device 1000. This is because the surface roughness of an inorganic dielectric film is much smaller than that of an organic dielectric film, and therefore the inorganic dielectric film has higher focal position accuracy than an organic dielectric film in the lithography process for forming the wiring. More specifically, while an inorganic dielectric film can be focused on the nanometer order, an organic dielectric film can be focused on the micrometer order. The wiring of the redistribution layer 400 substantially composed of an inorganic dielectric film can have a wiring width that is approximately 1 / 10 of that of the wiring of the redistribution layer 400 including a dielectric film substantially composed of an organic insulating material. This enables the miniaturization and low height of the device 1000. The line and space (L / S) of the rewiring layer 400 including a dielectric film substantially made of an inorganic insulating material is, for example, 1 μm / 1 μm.

[0024] The inorganic dielectric film has a thickness of, for example, 0.1 to 2 μm. The inorganic dielectric film may be a multi-component film containing two or more components. The multi-component film may be a multi-layer film in which a plurality of layers are formed for each component. The multi-layer film may have a layer structure, for example, in the order from the electronic component layer 110 side, of SiO ２(thickness 0.25 μm) / Si ３ N ４ (thickness 0.1 μm) / SiO ２ (thickness 0.25 μm) / Si ３ N ４ (thickness 0.1 μm).

[0025] When the dielectric film is substantially made of an organic insulating material, the cost of forming the dielectric film can be reduced. This is because a dielectric film substantially made of an organic insulating material can be fabricated without using large-scale equipment such as a plasma enhanced chemical vapor deposition (PECVD) apparatus, compared to a dielectric film substantially made of an inorganic insulating material. The line and space (L / S) of the redistribution layer 400 substantially made of an organic dielectric film is, for example, 10 μm / 10 μm. The thickness of the dielectric film is, for example, 1 to 20 μm.

[0026] Among the above-mentioned components, this embodiment is characterized by the structure of the base portion 100 with the cavity 110. First, the cavity 110 is composed of a plurality of recesses 115 of different heights in the thickness direction of the base portion 100. In particular, in this embodiment, the cavity 110 has a recess composite structure 110 in which the plurality of recesses 115 are integrated with one another. In this specification, the recess composite structure 110 refers to a structure in which the plurality of recesses 115 are integrated.

[0027] In this embodiment, it is assumed that the heights of the multiple recesses 115 in the cavity 110 are different, but this is not limited to this, and the heights and / or cross-sectional shapes of the multiple recesses 115 in the thickness direction of the base portion 100 may be different.

[0028] The plurality of recesses 115 may include a first recess 120 and a second recess 130. In one example, the plurality of recesses 115 in the first recess 120 and the second recess 130 may be arranged to intersect. The plurality of recesses 115 have different heights, so that electronic components 200 of different sizes can be provided in the cavity 110.

[0029] As shown in FIG. 1A, a first electronic component 210 having a relatively large size, and a second electronic component 220 and a third electronic component 230 each having a relatively small size compared to the first electronic component 210 can be provided in the cavity 110.

[0030] Furthermore, the base portion 100 has, on the first main surface 140 side of the base portion, a flat first portion 150 and a second portion 160 that is continuous with the first portion 150 and serves as a cavity 110 .

[0031] In this case, interface portion 170 between first portion 150 and second portion 160, which is the depression starting point of cavity 110, has, in a plan view, opposing regions 172 each having a curved surface relative to the other and opposing regions 171 each not having a curved surface relative to the other. That is, interface portion 170 partially has opposing regions 172 each having a curved surface relative to the other in a plan view. In other words, opposing regions 172 of interface portion 170 may have an R-surface or a rounded surface (see also FIG. 5F (a schematic plan view showing a wafer-derived base portion having a cavity)). Note that in this specification, first main surface 140 of base portion 100 refers to the main surface on the side having the depression starting point of cavity 110.

[0032] According to the above configuration, even when an external force acts on the electronic component-embedded device 1000, the curved or rounded surface of the interface portion 170 can prevent stress from concentrating at a predetermined location of the base portion 100 (corresponding to the interface portion 170) compared to when the interface portion 170 does not have a curved or rounded surface. In other words, the stress can be dispersed. As a result, it is possible to prevent partial damage to the base portion 100 as a covering member.

[0033] Furthermore, since the cavity 110 is provided with the sealing resin 600 in addition to the plurality of electronic components 200 (210 to 230), the contact area between the electronic components 200 and the base portion 100 that constitutes the cavity 110 can be relatively reduced compared to the conventional configuration in which the electronic components are directly covered with a covering member.

[0034] As a result, compared to conventional cases in which an electronic component is directly covered by a covering member, the base portion 100 itself is less affected by the shape of the electronic component (e.g., an electronic component having sharp corners) even when an external force acts on the electronic component-embedded device 1000. As a result, it is possible to prevent partial damage to the base portion 100 as a covering member.

[0035] Furthermore, the recessed portion 115 of the cavity 110 has a bottom or top surface 115a that depends on the shape of the outer edge in the circumferential direction of the blade used to form the cavity 110 during fabrication, and mutually opposing side surfaces 115b that depend on the shapes of the main surface of the blade and the outer edge in the width direction of the blade (see FIG. 5F). In this case, the bottom or top surface 115a of the recessed portion 115 (i.e., the cavity-forming surface) that forms the cavity 110 has a curved surface 180 (see FIGS. 5A to 5F). This curved surface 180 is based on the curved shape of the outer edge in the circumferential direction of the blade used to form the cavity 110 of the base portion 100.

[0036] By having the curved surface 180 on the bottom or top surface 115a of the recessed portion of the cavity 110, stress concentration on the curved surface can be suppressed and the stress can be dispersed, compared to when the inner wall surface forming the recessed portion does not have a curved surface, even when an external force acts on the electronic component-embedded device 1000. As a result, it is possible to suppress the occurrence of partial damage to the base portion 100 as a covering member.

[0037] Furthermore, as described above, the heat dissipation shield member 500 and the relatively large first electronic component 210 are connected to each other through the second conductive connection vias 320. Therefore, compared to conventional cases in which the electronic component and the pattern circuit are electrically connected to each other through wires, the electronic component-embedded device 1000 can be made lower in height and smaller in area because wires are not used.

[0038] Furthermore, in this embodiment, it is preferable that a second conductive connection via that connects between the redistribution layer 400 and the heat dissipation shield member 500 is provided inside the electronic component-embedded device 1000, specifically, inside the main body portion 101 of the base portion 100. In this case, the heat dissipation characteristics from the inside to the outside of the device 1000 can be improved. In other words, this second conductive connection via can be a heat dissipation conductive connection via.

[0039] A method for manufacturing the electronic component-embedded device according to the first embodiment will be described below. Note that, in the manufacturing process, components corresponding to those of the device 1000 as the finished product will be referred to by adding a letter such as α (alpha) or β (beta) to the end of the reference numeral.

[0040] <Preparation of base wafer> First, a base wafer is prepared. The prepared base wafer is attached and fixed to a predetermined die. The base wafer may be made of Si, SiC, SiO ２ , glass (quartz, sapphire, etc.), transparent ceramics, etc. The base wafer 100α has two main surfaces 140α and 190α facing each other, and these main surfaces may be flat.

[0041] <Formation of Cavities in Base Wafer> Next, cavities 110α are formed on the first main surface 140α side of the base wafer 100α using a blade (see FIG. 2A). In one example, a plurality of cavities 110α can be formed at predetermined intervals.

[0042] The cavity 110α can be formed, for example, through the steps shown in FIGS. 5A to 5F.

[0043] As an example, when forming the two recesses 120α and 130α, multiple types of blades with different widths are positioned in the same direction and then pressed against the first main surface 140α of the base wafer 100α multiple times, thereby forming a cavity 110α consisting of multiple recesses with different heights (see Figures 5A to 5F).

[0044] Specifically, for example, a disk-shaped blade B is pressed against the first main surface 140α of the base wafer 100α, and then the pressed blade B is moved away from the first main surface 140α, thereby forming the first recess 130α having a curved surface 180α in the first main surface 140α (see FIGS. 5A to 5C).

[0045] Next, a blade B2 having a different width from the blade B, specifically a blade B2 having a smaller width than the blade B, is pressed against the already formed depression 130α in the same direction as the blade B, but at different depths, multiple times. The pressed blade B2 is then separated from the base wafer 100α (see FIGS. 5D to 5F). This allows a second depression having a curved surface to be formed. This allows a cavity 110 to be formed, which has a depression composite structure 110 made up of multiple depressions of different heights.

[0046] As another example, after forming the first depression 130α (see FIGS. 5A to 5C), blade B shown in FIGS. 5A and 5B is used to shift the position of blade B, for example, from a position shifted by 90 degrees, and press blade B against curved surface 180α of the previously formed depression 130α. Then, the pressed blade B is moved away from curved surface 180α (see FIGS. 5G to 5I). This allows a second depression having a curved surface to be formed. In this manner, cavity 110 having a composite depression structure 110 composed of multiple depressions of different heights can be formed. In the embodiment shown in Figure 5I, at the interface portion 170 between the first portion 150 and the second portion 160, which is the starting point of the depression of the cavity 110, two sets of opposing regions 172 (specifically, the relatively short regions located above, below, and to the left and right of the cross-shaped interface portion 170 in a planar view) may have curved surfaces, in other words, R-shaped or rounded surfaces.

[0047] In the above-described alternative example, the same blade B can be used to form each of the two recesses. That is, a blade B having the same width, diameter, and shape can be used.

[0048] In yet another example, when a single blade B is pressed against the first main surface 140α of the base wafer 100α, a cavity 110 consisting of multiple recesses of different heights may be formed by changing the orientation of the die supporting the base wafer 100α.

[0049] <Placement of Electronic Components in Cavities> Next, multiple electronic components 200 (first electronic component 210 to third electronic component 230) are placed at predetermined intervals within the cavities 110α of the base wafer 100α (see FIG. 2B ). In the illustrated embodiment, multiple electronic components 200 are placed in each of the multiple cavities 110α. To place the electronic components 200, a portion of the electronic components 200 is attached to the surface of the cavity 110α using an adhesive such as a thermosetting resin. Such a thermosetting resin may be a thermosetting resin containing a repeating unit derived from benzocyclobutene (BCB).

[0050] Specifically, adhesive is applied to at least the bottom surface of cavity 110α, and each electronic component 200 is placed on the applied adhesive using an apparatus equipped with a vacuum chamber. Pressure is applied in both directions along the thickness direction of each electronic component, and heating is performed. Specifically, a base wafer with a cavity is prepared on a lower stage in a vacuum chamber of the apparatus, and electronic component 200 is vacuum-sucked (or decompressed) onto an upper stage in the vacuum chamber so that the electrodes of the electronic component face the applied adhesive (i.e., the coated film). In this way, electronic component 200 is adhered and attached to the bottom surface of cavity 110α.

[0051] By forming the cavity 110α consisting of the above-mentioned multiple recesses 120α, 130α of different heights, as shown in Figure 2B, for example, the forming surface 111α of the cavity 110α has two steps that are spaced apart and facing each other.

[0052] In this case, the first electronic component 210 can be provided on the cavity-forming surface 112α, which is relatively deep relative to the first main surface 140α side. Also, the third electronic component 230 and the second electronic component 220 can be disposed on the cavity-forming surface 111α and the cavity-forming surface 113α, which are relatively shallow relative to the first main surface 140α side, respectively.

[0053] <Sealing with Resin Member> Next, cavity 110α, in which multiple electronic components 200 are arranged, is sealed with resin member 600α (see FIG. 2C ). Specifically, in this sealing process, a dispenser is used to apply a liquid resin member onto the cavity-forming surface on which electronic components 200 are mounted, and after application, a compression molding device is used to mold the applied liquid resin member. The liquid resin member is then cured, for example, using a hot air circulating oven. The heat treatment conditions for curing are, for example, a heating temperature of 150°C and a heating time of 1 hour. As a result, cavity 110α is sealed with cured resin member 600α.

[0054] <Partial Removal of Encapsulated Resin Member and Base Wafer> Next, the encapsulated resin member 600α and the base wafer 100α are partially removed until each of the electronic components 200 is exposed (see FIG. 2D ). This removal process involves, for example, using a surface planer and a grinder to grind away a portion of the surface (corresponding to the top surface) of the encapsulated resin member 600α and the base wafer 100α. This allows each electronic component 200 to be exposed. Because the resin member 600α can cause warping of the electronic component-embedded device 1000, it is preferable to grind away as much of the resin member 600α as possible while still maintaining a certain strength.

[0055] <Temporarily Bonding Carrier Wafer to Base Wafer> Next, the first carrier wafer C1 is temporarily bonded to the base wafer 100α (see FIG. 2E ) so as to face the exposed electronic components 200. Specifically, the base wafer 100α is rotated 180 degrees from the state shown in FIG. 2D .

[0056] Thereafter, adhesive C11 is applied to one main surface of the first carrier wafer C1, and the first carrier wafer C1 is temporarily attached to the base wafer 100α via the adhesive C11 so as to face the plurality of electronic components 200, the first main surface 140α of the cavity 110α, and the sealing resin 600α. By attaching the carrier wafer, warping of the structure during manufacture can be reduced and rigidity can be improved. The same applies to the second carrier wafer C2 described below. A polyolefin adhesive containing a Si filler can be used as the adhesive C11.

[0057] Thereafter, the thickness of the base wafer 100α may be reduced by cutting the second main surface 190α of the base wafer 100α opposite the first main surface 140α (see FIG. 2F). The thickness of the base wafer 100α can be reduced by grinding the base wafer 100α using a back grinder.

[0058] <Formation of Conductive Connection Vias Connecting to Electronic Components> Next, first conductive connection vias 320α are formed on the second main surface 190α of the base wafer 100α in a portion facing the electronic component 200, particularly the first electronic component 210 (see FIG. 2G).

[0059] First, a photoresist film having a pattern corresponding to the first conductive connection via 320α is formed. This is exposed and developed to selectively remove, i.e., etch, the base wafer 100α that exists in the thickness direction from the opening in the photoresist film. Etching is performed using, for example, RIE (Reactive Ion Etching) and laser irradiation. This forms through holes for the vias. After the through holes are formed, the photoresist film is removed. Next, the first conductive connection via 320α is formed by electroplating. Specifically, the first conductive connection via 320α is formed in the through holes by electroplating using a Cu dual damascene method.

[0060] <Temporarily attaching the second carrier wafer C2 with a conductive film 500α on one main surface> Next, the second carrier wafer C2 with the conductive film 500α is temporarily attached to the second main surface 190α of the base wafer 100α so that the first conductive connection vias 320α formed above come into contact with the conductive film 500α (see FIG. 2H). The conductive film 500α can be made of a metal material such as copper.

[0061] <Removal of Second Carrier Wafer> After that, only the carrier wafer C2 is removed, leaving the conductive film 500α on the second main surface 190α of the base wafer 100α (see FIG. 2I).

[0062] <Removal of First Carrier Wafer> Then, the first carrier wafer C1 with the adhesive C11 is removed. After the first carrier wafer C1 is removed, a rewiring layer 400 is formed on the first main surface 140α side of the base wafer 100α so as to face each electronic component 200.

[0063] Thereafter, a dicing process is performed using a blade or the like along the thickness direction of the base wafer 100α so that the plurality of cavities 110α formed at predetermined intervals are separated from one another. Specifically, the dicing process is performed along the thickness direction of the base wafer 100α so that the base wafer 100α, the conductive film 500α, and the rewiring layer located between the plurality of cavities 110α formed at predetermined intervals can be separated. This completes the singulation process into the plurality of electronic component-embedded devices 1000.

[0064] In this manner, the electronic component-embedded device 1000 according to the first embodiment can be manufactured (see FIG. 2J).

[0065] According to the above manufacturing method, first, the heat dissipation shield member 500 located on one main surface of the device 1000 and the electronic component 200 can be interconnected through conductive vias provided inside the device 1000. Therefore, when the electronic component and the pattern circuit are electrically connected to each other via wires, as in the past, the wire loop that can be formed can be formed in the space above the top surface of the electronic component 200. Therefore, it is necessary to ensure the thickness of the electronic component and the height of the wire loop. In contrast, since the present disclosure does not use wires, the height of the wire loop is not required. As a result, it is possible to reduce the height and area of ​​the electronic component-embedded device 1000.

[0066] Furthermore, in the above-mentioned process of <Forming a cavity in the base wafer> and the subsequent process of <Installing an electronic component in the cavity>, as described above, the cavity 110α is formed in the base wafer 100α using the blade B (see FIG. 2A ). In this regard, when the above-mentioned cavity is formed in the base wafer by etching, the shape of the obtained cavity is a simple depression or recess with the same shape and height or depth.

[0067] In contrast, in this embodiment, it is possible to form cavity 110α composed of multiple recesses 120α, 130α using blade B or the like, for example, cavity 110α having recess composite structure 110α composed of multiple recesses of different heights, thereby improving the degree of freedom in arranging multiple electronic components 200.

[0068] Furthermore, the resulting embedded device 1000 may have a flat first portion 150 on the first main surface 140 side of the base portion 100, and a second portion 160 that is continuous with the first portion 150 and serves as the cavity 110 (see FIG. 5F ). ​​In this case, an interface portion 170 between the first portion 150 and the second portion 160, which is the starting point of the recess of the cavity 110, has an opposing region 172 that has a mutually curved surface in a planar view and an opposing region 171 that does not have a mutually curved surface. That is, the interface portion 170 partially has opposing regions 172 that have a mutually curved surface in a planar view. In other words, the opposing region 172 of the interface portion 170 may have an R-shaped or rounded surface.

[0069] The curved or rounded surface configuration of interface portion 170 can prevent stress from concentrating on interface portion 170 of base portion 100, compared to when interface portion 170 does not have a curved or rounded surface. Also, during the process of forming cavity 110, if blade B is pressed against base portion 100 multiple times, there is a risk that blade B will come into contact with interface portion 170. In this regard, since interface portion 170 has a curved or rounded surface, partial damage to base portion 100 can be prevented even if blade B comes into contact with interface portion 170. Note that the characteristics and effects of interface portion 170 can also be applied when the number of recesses 115 and electronic components 200 in the resulting electronic component-embedded device 1000 is one, not necessarily multiple.

[0070] Furthermore, the recess 115 of the cavity 110 has a bottom or top surface 115a that depends on the shape of the circumferential outer edge of the blade B used to form the cavity 110, and mutually opposing side surfaces 115b that depend on the shape of the main surface of the blade B and the shape of the widthwise outer edge (see FIG. 5F). In this case, the bottom or top surface 115a of the recess 115 (i.e., the cavity-forming surface) that forms the cavity 110 has a curved surface 180 (see FIGS. 5A to 5F). Because the bottom or top surface 115a of the recess 110 has the curved surface 180, even if an external force acts on the base 100, stress concentration on the curved surface can be suppressed compared to when the inner wall surface that forms the recess does not have a curved surface.

[0071] Furthermore, as described above, a blade B or the like is used to form the cavity 110 in the base portion 100, so in addition to the multiple recesses of different heights described above, the base portion 100, which is a component of the resulting device 1000, can have cavities of various shapes.

[0072] 6A-6R, various cavities 110A-110R may be formed, for example, with multiple integrated recesses, multiple spaced apart recesses of different heights and / or shapes, or multiple continuous steps.

[0073] It can be commonly mentioned that the interface portion 170 of each of the cavities 110A to 110R may have a curved surface or a rounded surface. Also, in each of the cavities 110A to 110R, the bottom surface or top surface 115a of the recess 115 (i.e., the cavity-forming surface) that forms the cavity 110 may have a curved surface 180.

[0074] Second Embodiment FIG. 1B is a cross-sectional view schematically showing the electronic component-embedded device according to the first embodiment.

[0075] In the electronic component-embedded device 1000I of the second embodiment, compared to the first embodiment, the electronic component 200 provided in the cavity 110 can be arranged so as to be supported by the main body portion 101 (or body portion) of the base portion 100. In other words, the electronic component 200 is provided in the cavity 110 so that the lower surface 202 of the electronic component 200 and the cavity-forming surface 111 are in contact with each other.

[0076] In this configuration, in the second embodiment, the cavity 110 has a recessed portion composite structure 110 in which a plurality of recessed portions with different depths are integrated with one another in the thickness direction of the base portion 100. Note that in the second embodiment, it is assumed that the depths of the plurality of recessed portions in the cavity 110 are different, but this is not limited thereto, and the depths and / or cross-sectional shapes of the plurality of recessed portions 115 in the thickness direction of the base portion 100 may also be different.

[0077] 1B , in the second embodiment, second conductive connection vias 330 may be provided inside the main body portion 101 of the base portion 100 so as to connect between the redistribution layer 400 and the heat dissipation shield member 500. In this case, the heat dissipation characteristics from the inside to the outside of the device 1000 can be improved. The heat dissipation shield member 500, the electronic component 200, the base portion 100, etc. are bonded to one another via an adhesive layer 700.

[0078] In addition, in order to avoid duplication of description, the description of the common effects achieved by the device 1000I of the second embodiment and the device 1000 of the first embodiment will be omitted or omitted in the section on the second embodiment.

[0079] Hereinafter, a method for manufacturing an electronic component-embedded device according to the second embodiment will be described. Explanations of parts that overlap with the description of the first embodiment will be omitted or omitted.

[0080] <Preparation of Base Wafer> First, a base wafer 100α is prepared.

[0081] <Formation of Cavities in Base Wafer> Next, similarly to the method described in the first embodiment, cavities 110α are formed on the first main surface 140α side of the base wafer 100α using a blade (see FIGS. 3A and 5A to 5F). In one example, multiple cavities 110α can be formed at predetermined intervals.

[0082] As described above, as an example, a cavity 110α having a composite depression structure 110α composed of multiple depressions of different depths can be formed using a relatively wide blade B and a relatively narrower blade B2 that are arranged in the same direction.

[0083] <Placement of Electronic Components in Cavities> Next, multiple electronic components 200 (first electronic component 210 to third electronic component 230) are placed at predetermined intervals within cavities 110α of base wafer 100α (see FIG. 3B ). In the illustrated embodiment, multiple electronic components 200 are placed in each of multiple cavities 110α so that the electrodes of the electronic components face the cavity-forming surface 111α. To install the electronic components 200, a portion of the electronic component 200 is attached to the cavity-forming surface 110α using an adhesive.

[0084] In this case, the first electronic component 210 can be provided on the cavity-forming surface 112α, which is relatively deep relative to the first main surface 140α side. Also, the third electronic component 230 and the second electronic component 220 can be disposed on the cavity-forming surface 111α and the cavity-forming surface 113α, which are relatively shallow relative to the first main surface 140α side, respectively.

[0085] <Sealing with Resin Member> Next, cavity 110α in which multiple electronic components 200 are arranged is sealed with resin member 600α (see FIG. 3C).

[0086] <Removal of Encapsulating Resin Member and Part of Base Wafer> Next, sealing resin member 600α and part of base wafer 100α are removed until each of multiple electronic components 200 is exposed (see FIG. 3D).

[0087] <Temporarily Bonding the Carrier Wafer to the Base Wafer> Next, a carrier wafer C2 having a conductive film 500α on one main surface is temporarily bonded to the base wafer 100α so as to face the exposed electronic components 200 (see FIG. 3E). Specifically, the base wafer 100α is rotated 180 degrees from the state shown in FIG. 3D, and an adhesive 700α is applied to the conductive film of the carrier wafer C2 with the conductive film 500α. The carrier wafer C2 is then temporarily bonded to the base wafer 100α via the adhesive 700α so as to face the electronic components 200, the first main surface 140α of the cavity 110α, and the sealing resin 600α. It is preferable that the adhesive have thermal conductivity.

[0088] Thereafter, the thickness of the base wafer 100α may be reduced by cutting the second main surface 190α of the base wafer 100α opposite to the first main surface 140α (see FIG. 3F).

[0089] <Formation of Conductive Connection Vias> Next, first conductive connection vias 320α are formed on the second main surface 190α of the base wafer 100α in portions facing the electronic components 200 (first electronic component 210 to third electronic component 230) (see FIG. 3G ). In addition, second conductive connection vias are formed that serve as heat dissipation conductive connection vias connecting the redistribution layer to be formed later and the heat dissipation shield member.

[0090] First, a photoresist film having a pattern corresponding to the second conductive connection via is formed in a positional relationship that does not face each electronic component 200. In this state, the base wafer 100α is exposed to light and developed, and etching is performed on the base wafer 100α that exists in the thickness direction from the opening of the photoresist film. This forms through holes for the vias. After the through holes are formed, the photoresist film is removed. Next, the second conductive connection vias are formed by electroplating.

[0091] <Peeling of Carrier Wafer> After that, only the carrier wafer C2 is peeled off while the conductive film 500α remains on the first main surface 140α of the base wafer 100α (see FIG. 3H).

[0092] <Performing Dicing Process> Then, a dicing process is performed using a blade or the like along the thickness direction of the base wafer 100α so that the multiple cavities 110α formed at predetermined intervals are separated from one another (see FIG. 3I). Specifically, the dicing process is performed along the thickness direction of the base wafer 100α so that the base wafer 100α, the conductive film 500α, and the rewiring layer 400α located between the multiple cavities 110α formed at predetermined intervals can be separated. This completes the singulation process into multiple electronic component-embedded devices 1000.

[0093] In this manner, the electronic component-embedded device 1000I according to the second embodiment can be manufactured (see FIG. 3J).

[0094] Third Embodiment FIG. 1C is a cross-sectional view schematically showing the electronic component-embedded device according to the first embodiment.

[0095] The electronic component-embedded device 1000II of the third embodiment differs from that of the first embodiment in that the electronic components 200 are arranged in a two-story structure with the circuit pattern 800 sandwiched between them in the thickness direction of the base portion 100.

[0096] In this device 1000II, a heat dissipation shield member 500 may be provided on one main surface side (corresponding to one outermost layer) of the device 1000, and a redistribution layer 400 may be provided on the other main surface side (corresponding to the other outermost layer) of the device 1000. The first floor structural portion of such device 1000II may have basically the same structure as the device 1000 according to the first embodiment.

[0097] As shown in FIG. 1C, in the first floor structural portion of the device 1000II, a second conductive connection via 330 may be provided inside the main body portion 101 of the base portion 100 to connect between the circuit pattern 800 and the heat dissipation shield member 500.

[0098] Furthermore, a thermally conductive member 340 (e.g., a conductive connection via, a metal (e.g., copper) heat dissipation core, or a heat dissipation resin) may be provided in the second-floor structure of device 1000II to connect the heat dissipation shield member 500 and the circuit pattern 800. Specifically, the electronic components 240, 250 and the thermally conductive member 340 may be arranged parallel to and spaced apart from one another on the circuit pattern 800. With the above configuration, a thermally conductive member such as a conductive via is disposed inside device 1000II, so that heat generated from electronic components 200 and the like can be effectively dissipated to the outside via this thermally conductive member. In other words, the heat dissipation characteristics can be improved.

[0099] Furthermore, when forming a cavity for accommodating an electronic component in the first floor structure, it may be easier to adjust the height of the multiple recesses that form the cavity with blade B. This makes it easier to create recesses that are relatively tall or deep compared to processes such as etching. This allows the first electronic component 210, which is relatively large as described above, to be placed in the first floor structure.

[0100] On the other hand, in the second floor structure, since a cavity is not formed in the base portion using a blade, it is preferable to place electronic components 240, 250 that are relatively smaller in size than in the first floor structure, which makes it possible to effectively suppress warping in the second floor structure.

[0101] In addition, in order to avoid duplication of description, the explanation of the common effects achieved by the device 1000II according to the third embodiment and the device 1000 according to the first embodiment will be omitted or omitted in the section on the third embodiment.

[0102] A method for manufacturing an electronic component-embedded device according to the third embodiment will be described below. Specifically, the manufacturing method according to the third embodiment differs from the manufacturing method according to the first embodiment in that the electronic components 200 are arranged in a two-story structure. Explanations of parts that overlap with the description of the first embodiment will be omitted or will be omitted.

[0103] <Preparation of Base Wafer> First, a base wafer 100α is prepared.

[0104] <Formation of Cavities in Base Wafer> Next, as in the first embodiment, cavities 110α are formed on the first main surface 140α side of the base wafer 100α using a blade (see FIGS. 4A and 5A to 5F). In one example, multiple cavities 110α can be formed at predetermined intervals.

[0105] As described above, as an example, a cavity 110α having a composite depression structure 110α composed of multiple depressions of different heights can be formed using a relatively wide blade B and a blade B2 that is relatively narrower than blade B, which are arranged in the same direction.

[0106] <Arrangement of Electronic Components in Cavities> Next, similarly to the first embodiment, multiple electronic components 200 (first electronic component 210 to third electronic component 230) are arranged at predetermined intervals in the cavities 110α of the base wafer 100α (see FIG. 4B ). In the illustrated embodiment, multiple electronic components 200 are arranged in each of the multiple cavities 110α.

[0107] In this case, the first electronic component 210 can be placed on the cavity-forming surface 112α, which is relatively deep relative to the first main surface 140α side. Also, the third electronic component 230 and the second electronic component 220 can be placed on the cavity-forming surface 111α and the cavity-forming surface 113α, which are relatively shallow relative to the first main surface 140α side, respectively.

[0108] <Sealing with Resin Member> Next, similarly to the first embodiment, cavity 110α in which multiple electronic components 200 are arranged is sealed with resin member 600α (see FIG. 4C).

[0109] <Removal of Encapsulating Resin Member and Part of Base Wafer> Next, similarly to the first embodiment, sealing resin member 600α and part of base wafer 100α are removed until each of multiple electronic components 200 is exposed (see FIG. 4D).

[0110] <Temporarily Bonding Carrier Wafer to Base Wafer> Next, the first carrier wafer C1 is temporarily bonded to the base wafer 100α so as to face the exposed electronic components 200 (see FIG. 4E ). Specifically, the base wafer 100α is rotated 180 degrees from the state shown in FIG. 2D . Thereafter, adhesive C11 is applied to one main surface of the first carrier wafer C1, and the first carrier wafer C1 is temporarily bonded to the base wafer 100α via the adhesive C11 so as to face the electronic components 200, the first main surface 140α of the cavity 110α, and the sealing resin 600α.

[0111] Thereafter, the thickness of the base wafer 100α may be reduced by cutting the second main surface 190α of the base wafer 100α opposite to the first main surface 140α (see FIG. 4F).

[0112] <Formation of conductive connection vias connected to electronic components> Next, first conductive connection vias 320α are formed on the second main surface 190α of the base wafer 100α in portions that face the electronic component 200, specifically, the first electronic component 210. In addition, second conductive connection vias 330α are formed in portions that do not face the electronic component 200 (see FIG. 4G).

[0113] <Temporary attachment of second carrier wafer with conductive film> Next, the second carrier wafer C2 having a conductive film 800α on one main surface is temporarily attached to the second main surface 190α of the base wafer 100α so that the first conductive connection via 320α formed above comes into contact with the conductive film 800α (see Figure 4H).

[0114] <Removal of Second Carrier Wafer> After that, only the carrier wafer C2 is removed while the conductive film 800α remains on the second main surface 190α of the base wafer 100α (see FIG. 4I).

[0115] <Circuit Pattern Formation> Thereafter, in comparison with the first embodiment, a predetermined circuit pattern 800β is formed by carrying out etching or the like on the conductive film 800α (see FIG. 4J).

[0116] <Formation of Electronic Components and Thermal Conduction Members> Then, a plurality of electronic components 240, 250 and thermal conduction members 340α are provided on the formed circuit pattern 800β so as to be spaced apart from each other (see FIG. 4K). Then, the spaces between the mutually spaced components (electronic components / thermal conduction members) are sealed with resin member 650α.

[0117] <Formation of Heat Dissipation Shield Member> Thereafter, a heat dissipation shield member 500α is formed in contact with the plurality of installed electronic components 240, 250 and heat conduction member 340α (see FIG. 4L).

[0118] <Removal of First Carrier Wafer and Formation of Rewiring Layer> Then, the first carrier wafer C1 with the adhesive C11 is removed. After the first carrier wafer is removed, a rewiring layer 400α is formed on the first main surface 140α of the base wafer 100α so as to face each electronic component 200. Then, a dicing process is performed using a blade or the like along the thickness direction of the base wafer 100α so that the multiple cavities 110α formed at predetermined intervals are separated from each other (see FIG. 4M).

[0119] In this manner, the electronic component-embedded device 1000II according to the third embodiment can be manufactured (see FIG. 4N).

[0120] The circuit board with built-in electronic components and the manufacturing method thereof according to the present disclosure may take the following forms: <1> A device with built-in electronic components, comprising: a base portion derived from a wafer, having a cavity; and a plurality of electronic components and a sealing resin provided in the cavity, wherein the cavity in the base portion is composed of a plurality of recessed portions differing in at least one of height or depth and shape in a thickness direction of the base portion. <2> A device with built-in electronic components, comprising: a base portion derived from a wafer, having a cavity with a recessed portion; and a plurality of electronic components and a sealing resin provided in the cavity, wherein the base portion has, on one main surface side, a flat first portion and a second portion that is continuous with the first portion and serves as the cavity, and an interface portion between the first portion and the second portion, which is the starting point of the recess of the cavity, partially has opposing regions that have curved surfaces relative to each other in a planar view. <3> The electronic component-embedded device according to <1> or <2>, having a plurality of the recesses, wherein the cavity has a recess composite structure constituted by the plurality of recesses. <4> The electronic component-embedded device according to any one of <1> to <3>, having a plurality of the recesses, wherein the plurality of recesses intersect. <5> The electronic component-embedded device according to any one of <1> to <4>, wherein the bottom or top surface of the recess has a curved surface. <6> The electronic component-embedded device according to any one of <1> to <5>, further comprising: a redistribution layer electrically connectable to the electronic component located on one main surface of the device; and a heat dissipation shield member located on the other main surface opposite the one main surface. <7> The electronic component-embedded device according to <6>, further comprising a heat dissipation conductive connection via therein connecting the redistribution layer and the heat dissipation shield member. <8> A method for manufacturing an electronic component-embedded device, comprising: preparing a base wafer; forming a cavity having a recessed portion from a first main surface side of the base wafer using a blade; arranging an electronic component in the cavity; and sealing the cavity with the electronic component arranged therein with a resin member.<9> The method for manufacturing an electronic component-embedded device according to <8>, comprising: forming a cavity having a plurality of the recesses; arranging a plurality of the electronic components in the cavity; and sealing the cavity with the plurality of electronic components arranged therein with the resin member. <10> The method for manufacturing an electronic component-embedded device according to <8> or <9>, further comprising: removing the sealing resin member and a portion of the base wafer until the electronic components are exposed; temporarily attaching a carrier wafer to the base wafer so as to face the exposed electronic components; forming first conductive connection vias connecting to the electronic components from a second main surface of the base wafer opposite to the first main surface; peeling off the carrier wafer; and providing a rewiring layer connecting to the electronic components on one of the first main surface and the second main surface of the base wafer, and providing a heat dissipation shield member on the other. <11> The method for manufacturing an electronic component-embedded device according to any of <8> to <10>, wherein the cavity in the base wafer has a plurality of recesses having different depths. <12> The method for manufacturing an electronic component-embedded device according to any one of <8> to <11>, wherein the base wafer after the cavity formation has, on the first main surface side, a flat first portion and a second portion that is continuous with the first portion and serves as the cavity, and an interface between the first portion and the second portion, which is a depression starting point for the cavity, partially has an opposing region where each portion has a curved surface relative to the other in a planar view. <13> The method for manufacturing an electronic component-embedded device according to any one of <8> to <12>, comprising pressing an outer surface of the blade against the first main surface of the base wafer when forming the cavity. <14> The method for manufacturing an electronic component-embedded device according to any one of <8> to <13>, wherein the blade has a curved outer edge. <15> The method for manufacturing an electronic component-embedded device according to any one of <10> to <14>, further comprising temporarily attaching a second carrier wafer with the conductive film to the second main surface of the base wafer so that the first conductive connection vias come into contact with the conductive film serving as the shielding member.<16> The method for manufacturing the electronic component-embedded device according to any one of <10> to <14>, further comprising: forming a predetermined circuit pattern from a conductive film after peeling off the second carrier wafer and before peeling off the first carrier wafer; further providing an electronic component and a heat conductive member on the circuit pattern so as to be spaced apart from each other and sealing with a resin member; and forming a heat dissipation shield member in contact with the further electronic component and the further heat conductive member. <17> The method for manufacturing the electronic component-embedded device according to any one of <10> to <14>, further comprising forming a second conductive connection via that connects the rewiring layer and the heat dissipation shield member.

[0121] The present disclosure is not limited to the above configuration, and can be modified and applied as appropriate within the scope that does not change the gist of the present disclosure.

[0122] 100, 100α Base portion 110, 110α Cavity 115 Recessed portion 115a Bottom surface or top surface of recessed portion (plan view) 115b Mutually opposing side surfaces of recessed portion (plan view) 120, 120α First recessed portion 130, 130α Second recessed portion 140, 140α First main surface of base portion 150 Flat first portion on the first main surface side of the base portion 160 Second portion as a cavity on the first main surface side of the base portion 170 Interface portion between first and second portions on the first main surface side of the base portion 171 Opposing regions at the interface portion of the base portion that do not have mutually curved surfaces 172 Opposing regions at the interface portion of the base portion that have mutually curved surfaces 180, 180α Curved surface of bottom or top surface of recessed portion that forms a cavity 190, 190α Second main surface of base portion 200, 210 to 250 Electronic component 300, 300α, 310 to 340, 310α to 340α Conductive connection via 400, 400α Rewiring layer 500, 500α Heat dissipation shield member 600, 600α Sealing resin 700α Adhesive 800, 800β Circuit pattern (corresponding to conductive film) 800α Conductive film 1000, 1000I to 1000II Electronic component built-in device B, B2 Blade

Claims

1. A device with built-in electronic components, comprising: a wafer-derived base portion having a cavity; and a plurality of electronic components and sealing resin provided in the cavity, wherein the cavity in the base portion is composed of a plurality of recessed portions differing in at least one of height, depth, and shape in the thickness direction of the base portion.

2. A device with built-in electronic components, comprising: a base portion derived from a wafer, having a cavity with a recessed portion; and a plurality of electronic components and sealing resin provided in the cavity, wherein the base portion has, on one main surface side, a flat first portion and a second portion that is continuous with the first portion and serves as the cavity, and the interface portion between the first portion and the second portion, which is the starting point of the recess of the cavity, partially has opposing regions that each have a curved surface relative to each other in a planar view.

3. The device with built-in electronic components according to claim 1 or 2, wherein the device has a plurality of said recesses, and the cavity has a recess composite structure made up of the plurality of said recesses.

4. The device with built-in electronic components according to any one of claims 1 to 3, which has a plurality of said recessed portions, and said plurality of recessed portions intersect with each other.

5. The device with built-in electronic components according to any one of claims 1 to 4, wherein the bottom or top surface of the recessed portion has a curved surface.

6. An electronic component-embedded device according to any one of claims 1 to 5, further comprising a redistribution layer electrically connectable to the electronic component located on one main surface of the device, and a heat dissipation shield member located on the other main surface opposite the one main surface.

7. The electronic component-embedded device according to claim 6, further comprising a heat dissipation conductive connection via therein that connects said rewiring layer and said heat dissipation shield member.

8. A method for manufacturing a device with built-in electronic components, comprising: preparing a base wafer; forming a cavity having a recessed portion from a first main surface side of the base wafer using a blade; placing an electronic component in the cavity; and sealing the cavity with the electronic component placed in it with a resin member.

9. A method for manufacturing an electronic component-embedded device as described in claim 8, comprising: forming a cavity having a plurality of the recessed portions; arranging a plurality of the electronic components in the cavity; and sealing the cavity in which the plurality of electronic components are arranged with the resin member.

10. A method for manufacturing an electronic component-embedded device according to claim 8 or 9, further comprising: removing the sealing resin member and a portion of the base wafer until the electronic component is exposed; temporarily attaching a carrier wafer to the base wafer so as to face the exposed electronic component; forming a first conductive connection via that connects to the electronic component from a second main surface of the base wafer opposite to the first main surface; peeling off the carrier wafer; and providing a rewiring layer that connects to the electronic component on one of the first main surface and the second main surface of the base wafer, and providing a heat dissipation shielding member on the other.

11. A method for manufacturing an electronic component-embedded device according to any one of claims 8 to 10, wherein the cavity in the base wafer has a plurality of recessed portions with different depths.

12. A method for manufacturing an electronic component-embedded device as described in any one of claims 8 to 11, wherein the base wafer after the cavity formation has, on the first main surface side, a flat first portion and a second portion that is continuous with the first portion and serves as the cavity, and the interface portion between the first portion and the second portion, which is the starting point of the cavity depression, partially has opposing regions that each have a curved surface relative to each other in a planar view.

13. The method for manufacturing an electronic component-embedded device according to any one of claims 8 to 12, further comprising pressing the outer surface of the blade against the first main surface of the base wafer when forming the cavity.

14. The method for manufacturing a device with built-in electronic components according to any one of claims 8 to 13, wherein the blade has a curved outer edge.

15. A method for manufacturing an electronic component-embedded device according to any one of claims 10 to 14, further comprising temporarily attaching a second carrier wafer with the conductive film to the second main surface of the base wafer so that the first conductive connection vias come into contact with the conductive film serving as the shielding member.

16. A method for manufacturing an electronic component-embedded device according to any one of claims 10 to 14, further comprising: forming a predetermined circuit pattern from the conductive film after peeling off the second carrier wafer and before peeling off the first carrier wafer; providing an electronic component and a heat conductive member on the circuit pattern so as to be spaced apart from each other and sealing them with a resin member; and forming a heat dissipation shield member in contact with the further electronic component and the further heat conductive member.

17. The method for manufacturing an electronic component-embedded device according to any one of claims 10 to 14, further comprising forming a second conductive connection via that connects between the rewiring layer and the heat dissipation shield member.

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