Heterogeneous integration

Abstract

A method includes: causing first vias to be formed between upper and lower surfaces of a first glass carrier; causing a first antenna to be disposed on the lower surface on at least one via of the first vias; causing a first metal layer to be disposed on the upper surface; causing a first dielectric layer to be disposed on the first metal layer; causing a second metal layer to be disposed on the first dielectric layer; causing a second dielectric layer to be disposed on the second metal layer; causing a third metal layer to be disposed on the second dielectric layer, the third metal layer being coupled to the first antenna via at least one of the first vias, the first, second, and third metal layers being coupled via second vias; and causing an integrated circuit to be disposed on the third metal layer.

Description

HETEROGENEOUS INTEGRATION

[0001] The present disclosure relates to integration, and in particular to heterogenous integration.Background

[0002] Wireless communication networks are used to transmit and receive data. Devices are used to assist with transmitting and receiving data.

[0003] The following is a simplified summary of the disclosure in order to provide a basic understanding of some aspects of the disclosure. This summary is not an extensive overview of the disclosure. It is intended to neither identify key or critical elements of the disclosure, nor delineate any scope of the particular implementations of the disclosure or any scope of the claims. Its sole purpose is to present some concepts of the disclosure in a simplified form as a prelude to the more detailed description that is presented later.

[0004] In an aspect of the disclosure, a method includes: causing a first plurality of vias to be formed from an upper surface of a first glass carrier to a lower surface of the first glass carrier; causing a first antenna to be disposed on the lower surface of the first glass carrier on at least one via of the first plurality of vias; causing a first metal layer to be disposed on the upper surface of the first glass carrier; causing a first dielectric layer to be disposed on the first metal layer; causing a second metal layer to be disposed on the first dielectric layer, the second metal layer being associated with at least one of control signals or ground; causing a second dielectric layer to be disposed on the second metal layer; causing a third metal layer to be disposed on the second dielectric layer, the third metal layer being coupled to the first antenna via one or more of the first plurality of vias, the first metal layer, the second metal layer, and the third metal layer being coupled via a second plurality of vias; and causing an integrated circuit to be disposed on the third metal layer.

[0005] In another aspect of the disclosure, a heterogeneous integration device including: a first glass carrier comprising an upper surface and a lower surface, wherein a first plurality of vias formed from the upper surface to the lower surface; a first antenna disposed on the lower surface of the first glass carrier on at least one via of the first plurality of vias; a first metal layer disposed on the upper surface of the first glass carrier; a first dielectric layer disposed on the first metal layer; a second metal layer disposed on the first dielectric layer, the second metal layer being associated with at least one of control signals or ground; a second dielectric layer disposed on the second metal layer; a third metal layer disposed on the second dielectric layer, the third metal layer being coupled to the first antenna via one or more of the first plurality of vias, wherein the first metal layer, the second metal layer, and the third metal layer are coupled via at least one of a second plurality of vias; and an integrated circuit disposed on the third metal layer.

[0006] In another aspect of the disclosure, a heterogeneous integration device comprising: a first glass carrier comprising an upper surface and a lower surface; a first plurality of vias formed from the upper surface to the lower surface, the first plurality of vias comprising a central via and perimeter vias that substantially circulate the central via; a first antenna disposed on the lower surface of the first glass carrier on the central via; a first metal layer disposed on the upper surface of the first glass carrier, the first metal layer being coupled to at least one of the perimeter vias; a dielectric layer disposed on the first metal layer; a second metal layer disposed on the dielectric layer, the second metal layer being coupled to the first antenna via the central via, wherein the first metal layer and the second metal layer are coupled via at least one of a second plurality of vias; and an integrated circuit disposed on the second metal layer.

[0007] The present disclosure is illustrated by way of example, and not by way of limitation in the figures of the accompanying drawings.

[0008] [Fig. 1A] FIGS. 1A-E illustrate heterogeneous integration devices, according to certain embodiments. [Fig. 1B] FIGS. 1A-E illustrate heterogeneous integration devices, according to certain embodiments. [Fig. 1C] FIGS. 1A-E illustrate heterogeneous integration devices, according to certain embodiments. [Fig. 1D] FIGS. 1A-E illustrate heterogeneous integration devices, according to certain embodiments. [Fig. 1E] FIGS. 1A-E illustrate heterogeneous integration devices, according to certain embodiments. [Fig. 2A] FIGS. 2A-D illustrate components of heterogeneous integration devices, according to certain embodiments. [Fig. 2B] FIGS. 2A-D illustrate components of heterogeneous integration devices, according to certain embodiments. [Fig. 2C] FIGS. 2A-D illustrate components of heterogeneous integration devices, according to certain embodiments. [Fig. 2D] FIGS. 2A-D illustrate components of heterogeneous integration devices, according to certain embodiments. [Fig. 3A] FIGS. 3A-C illustrate systems including heterogeneous integration devices, according to certain embodiments. [Fig. 3B] FIGS. 3A-C illustrate systems including heterogeneous integration devices, according to certain embodiments. [Fig. 3C] FIGS. 3A-C illustrate systems including heterogeneous integration devices, according to certain embodiments. [Fig. 3D] FIG. 3D illustrates systems including heterogeneous integration devices, according to certain embodiments. [Fig. 4] FIG. 4 is a flow diagram of a method associated with heterogeneous integration, according to certain embodiments. [Fig. 5] FIG. 5 is a block diagram illustrating a computer system, according to certain embodiments.Detailed Description

[0009] Embodiments described herein are related to heterogeneous integration (e.g., heterogeneous integration devices, etc.).

[0010] Wireless communication networks are used to transmit and receive data. Devices are used to assist with transmitting and receiving data. As wireless communications networks move towards higher frequencies to improve data rates, the corresponding decrease in wavelengths can lead to issues with providing uniform coverage in areas without line of sight to a transmitter, for example, in urban areas, forested areas, inside structures, and so forth.

[0011] [Rectified under Rule 91, 09.09.2025]As wireless communications networks start to move to frequencies at and above 5 gigahertz (GHz) (sometimes termed "fifth generation" or "5G"), the effects of attenuation by atmospheric gases such as oxygen (O2), carbon dioxide (CO2) and water vapor (H2O) can be significant in some frequency bands. Atmospheric weather effects can exacerbate such issues, for example attenuation may reach in the region of about 60 dB / m. Providing wireless network coverage to the interior of structures such as building and sports stadiums is already an issue for frequencies below 5 GHz. Moving to higher frequencies will cause further degradation of signal intensities penetrating into structures. Improvements in building glass relating to thermal regulation, for example inclusion of thin metallized layers to help keep buildings cooler, may further attenuate radio signals from the exterior.

[0012] Conventional devices use include printed circuit boards (PCBs). PCBs are not transparent. This causes PCBs to have limited locations where they can be installed (e.g., not installed on a window). PCBs can be complicated to fabricate and replicate. PCBs have limited resolution and poor tolerances which cause variations in dimensional features of components (e.g., antennas). This causes conventional devices to have inferior performance.

[0013] The systems, devices, and methods of the present disclosure provide solutions to these and other problems of conventional systems.

[0014] A heterogeneous integration device includes a glass carrier that includes an upper surface and a lower surface. First vias are formed from the upper surface to the lower surface. In some embodiments, an antenna is disposed on the first surface (e.g., lower surface, upper surface) of the first glass carrier on at least one via of the first plurality of vias and a first metal layer (e.g., ground layer) is disposed on a second surface of the first glass carrier (e.g., the upper surface, the lower surface) that is opposite the first surface of the glass carrier. The antennae can be fabricated on the topside of the glass and the integrated circuits on the bottom side (e.g., front and back sides can be interchanged).

[0015] In some embodiments, alternating layers of metal layers and dielectric layers are disposed on the upper surface of the glass carrier. In some embodiments, a first dielectric layer is disposed on the first metal layer, a second metal layer (e.g., associated with control signals and / or ground) is disposed on the first dielectric layer, a second dielectric layer disposed on the second metal layer, and a third metal layer disposed on the second dielectric layer. The third metal layer may be coupled to the antenna via one or more of the first plurality of vias. The first metal layer, the second metal layer, and the third metal layer are coupled via at least one of a second plurality of vias. An integrated circuit is disposed on the third metal layer.

[0016] In some embodiments, the first vias include a central via and perimeter vias that substantially circulate the central via. The first antenna is disposed on the lower surface of the first glass carrier on the central via. The first metal layer (e.g., ground layer) is disposed on the upper surface of the first glass carrier. The first metal layer is coupled to at least one of the perimeter vias. The first vias may be in a coaxial configuration or in a triaxial configuration (e.g., two outer rings of ground vias, an inner ring of ground vias and an outer ring of ground vias, concentric rings of ground vias).

[0017] In some embodiments, a method includes causing first vias to be formed from an upper surface of a first glass carrier to a lower surface of the first glass carrier, causing a first antenna to be disposed on the lower surface on at least one via of the first vias, and causing a first metal layer (e.g., ground layer) to be disposed on the upper surface. The method may further include causing a first dielectric layer to be disposed on the first metal layer, causing a second metal layer (e.g., associated with at least one of control signals or ground) to be disposed on the first dielectric layer, causing a second dielectric layer to be disposed on the second metal layer, and causing a third metal layer to be disposed on the second dielectric layer. The third metal layer may be coupled to the first antenna via one or more of the first vias. The first metal layer, the second metal layer, and the third metal layer may be coupled via second vias. The method may further include causing an integrated circuit to be disposed on the third metal layer.

[0018] The systems, devices, and methods of the present disclosure have advantages over conventional solutions. The present disclosure can be used to better provide better wireless network coverage (e.g., including coverage at higher frequencies) than conventional systems. The present disclosure may provide devices that are more transparent than conventional systems. This allows the present disclosure to be used in locations (e.g., on windows) where conventional systems are not used. The present disclosure may provide devices that are more easily fabricated and replicated than conventional systems. The present disclosure may provide devices that have better resolution and better tolerances than conventional systems. This allows the present disclosure to have less variations in dimensional features of components (e.g., antennas) and allows the present disclosure to have better performance than conventional systems.

[0019] Although some embodiments of the present disclosure are described with regards to heterogeneous integration devices that include antennas, in some embodiments, the present disclosure may include heterogeneous integration devices that include other or additional components such as light emitting diodes (LEDs).

[0020] Although some embodiments of the present disclosure are described with regards to devices to operate at higher frequencies (e.g., frequencies at and above 5 GHz), in some embodiments, the present disclosure may be used for to provide devices that operate at lower frequencies (e.g., frequencies below 5 GHz).

[0021] FIGS. 1A-E illustrate heterogeneous integration devices 100A-E, according to certain embodiments.

[0022] A heterogeneous integration (e.g., of heterogeneous integration device 100) may refer to integration of separately manufactured components into a higher level assembly (e.g., System-in-Package (SiP)) that in the aggregate, provides enhanced functionality and improved operating characteristics.

[0023] A heterogeneous integration device 100 may include a glass carrier 110 (e.g., electronic grade glass, display glass, computer monitor glass, building window glass, laptop display glass, solar cell glass, television screen, etc.). The glass carrier 110 may be a rectangular prism (e.g., has a rectangular cross-section, has perpendicular adjacent sides, has parallel opposite sides). The glass carrier 110 may have an upper surface and a lower surface that are opposite each other. The upper surface and the lower surface may be substantially planar and may be disposed in planes that are parallel to each other. The glass carrier 110 may be a borosilicate glass (e.g., type of glass that has silica and boron trioxide as the main glass-forming constituents). The glass carrier 110 may be at least 400 microns thick. In some embodiments, the glass carrier 110 is 400-600 microns thick.

[0024] Vias 120A (e.g., glass vias, via between top layer to fourth layer, via between metal layer 140C and component 130) may be formed from the upper surface to the lower surface of the glass carrier 110. The vias 120A may be formed by causing a laser to form holes through the glass carrier 110 form the upper surface to the lower surface, causing a wet etching of the holes to smooth corresponding edges of each of the holes through the glass carrier 110, and causing the holes to be filled with metal (e.g., copper, copper solid filled) via electroplating to form the vias 120A.

[0025] One or more components 130 (e.g., bottom layer, bottom layer for antenna, fourth layer) may be disposed on the lower surface of the glass carrier 110. In some embodiments, one or more of the components 130 are antennas. In some embodiments, one or more of the components 130 are light emitting diodes (LEDs). The LEDs may be running at about 300-900 kilohertz. The LEDs may be micro-LEDs. Each component 130 is disposed on a via 120A. In some embodiments, the component 130 (e.g., antenna) is disposed on the lower surface on the via 120 by sputtering of metal on the lower surface (e.g., on the via 120) to form the component 130.

[0026] One or more metal layers 140A (e.g., third layer for antenna ground) are disposed on the upper surface of the glass carrier 110. In some embodiments, each metal layer 140A may be a ground layer (e.g., ground for antenna, if facing antennae across the glass substrate). Each metal layer 140A may extend to an edge of the glass carrier 110. In some embodiments, each metal layer 140A has one or more functions (e.g., instead of being a ground layer, if not facing antennae across the glass carrier 110).

[0027] Dielectric layer 150A is disposed on the one or more metal layers 140A. The dielectric layer 150A may electrically isolate the metal layer 140A from other metal layers except for connection through vias.

[0028] One or more metal layers 140B (e.g., second metal layer) are disposed on the dielectric layer 150A. Each of the one or mor metal layers 140B are associated with at least one of control signals and / or ground.

[0029] Dielectric layer 150B is disposed on the one or more metal layers 140B. The dielectric layer 150B may electrically isolate the metal layer 140A and / or metal layer 140B from other metal layers (e.g., from each other) except for connection through vias.

[0030] One or more metal layers 140C (e.g., top metal layer) are disposed on the dielectric layer 150B. An integrated circuit 160 is disposed on the one or more metal layers 140C. The metal layer 140C may be coupled to one or more components 130 via the vias 120A. The vias 120A may extend through the glass carrier 110 and dielectric layers 150A-B. The vias 120A between the components 130 and the metal layer 140C may be formed by, for each via 120A, forming a hole through the glass carrier 110, smoothing the edges of the hole, filling the hole with metal, disposing a dielectric layer 150A on the glass carrier 110, forming a hole (e.g., aligned with the hole through the glass carrier 110) through the dielectric layer 150A, filling the hole with metal, disposing dielectric layer 150B on dielectric layer 150A, forming a hole (e.g., aligned with the hole through the glass carrier 110 and the hole through the dielectric layer 150A) through the dielectric layer 150B, and filling the hole with metal to form a via 120A.

[0031] One or more of the metal layers 140 may be laminated (e.g., top metal layer and second metal layer, metal layer 140C and metal layer 140B) and / or electroplated (e.g., third metal layer and / or bottom layer, metal layer 140A and component 130).

[0032] Metal layer 140A, metal layer 140B, and metal layer 140C may be coupled (e.g., electrically coupled, communicatively coupled, etc.) to each other via vias 120B (e.g., vias between top metal layer and second metal layer and third metal layer, vias between metal layers 140A-C, dielectric vias). The vias 120B may extend through the dielectric layers 150A-B and / or metal layer 140B.

[0033] The vias 120B between metal layers 140A-C may be formed by, for each via 120B, disposing a dielectric layer 150A on the metal layer 140A, forming a hole (e.g., aligned with the metal layer 140A) through the dielectric layer 150A, filling the hole with metal (e.g., copper), disposing a metal layer 140B on dielectric layer 150A (e.g., forming a hole through the metal layer 140B and filling the hole with metal), disposing a dielectric layer 150B on the metal layer 140B, forming a hole (e.g., aligned with the metal layer 140B) through the dielectric layer 150B, filling the hole with metal (e.g., copper), and disposing metal layer 140C on dielectric layer 150B.

[0034] In some embodiments, two or more glass carriers 110 are coupled together. In some examples, vias 120A are formed through a glass carrier 110B and the glass carrier 110B is attached to the glass carrier 110A (e.g., via one or more bonding layers 170). Components 130 (e.g., antennas) may be disposed between glass carrier 110B and glass carrier 110A (e.g., between lower surface of glass carrier 110A and upper surface of glass carrier 110B). Components (e.g., antennas) may be disposed on a lower surface of the glass carrier 110B.

[0035] The heterogeneous integration device 100 may be a wireless transceiver and glass carrier 110A may be a planar substrate having first and second opposite faces (e.g., upper surface and lower surface) and having a thickness between the first and second opposite faces. The integrated circuit 160 may be connected to the components 130 (e.g., antennas). Signals may be transmitted through the vias 120A between the integrated circuit 160 and the components 130 (e.g., antennas). The integrated circuit 160 may control a first set of the components 130 (e.g., first antennas) as a first phased array to receive radio signals. The first phased array may be directional and controllably orientable within a first range of acute angles to a normal to a surface of the heterogeneous integrated device 100A (e.g., lower surface of the glass carrier 110A). The integrated circuit 160 may be further configured to control a second set of components 130 (e.g., second antennas) as a second phased array to retransmit the radio signals received using the first phased array. The second phased array may be directional and controllably orientable within a second range of acute angles to a normal to a surface of the heterogeneous integrated device 100A (e.g., lower surface of the glass carrier 110B).

[0036] The vias 120 may be for interconnection of components of different functionality which may be layered and patterned into devices or heterogeneously integrated as discrete components.

[0037] The direction in which the first phased array is oriented may correspond to an axis of a principle radiation lobe of a first radiation pattern of the first phased array. The direction in which the second phased array is oriented may correspond to an axis of a principle radiation lobe of a second radiation pattern of the second phased array.

[0038] The first phased array and the second phased array may be controllably orientable in the sense that the directionally of the first phased array and the second phased arrays is not fixed, and may be independently varied in use by the heterogeneous integrated device 100.

[0039] The heterogeneous integrated device 100 may be connected to components 130 (e.g., antennas) using physical, hard-wired links such as, for example, conductive traces, micro-strip lines, conductive vias 120 and so forth. Herein an acute angle means between 0 and 90 degrees, inclusive of 0 and 90 degrees. The first range of acute angles may include all, or less than all, of a first hemisphere directed away from the first face. In other words, the first range of acute angles need not include the entire first hemisphere. The second range of acute angles may include all, or less than all, of a second hemisphere directed away from the second face. The first and second hemispheres may in combination define a complete sphere.

[0040] In some embodiments, the heterogeneous integration device 100 provides a base station of a wireless communication network. In some embodiments, the heterogeneous integration device 100 provides a relay station of a wireless communication network. In some embodiments, the heterogeneous integration device 100 provides a transceiver of a wireless communication network.

[0041] In some embodiments, the glass carrier 110 is a planar substrate that includes a flexible film or sheet.

[0042] One or more components (e.g., components 130, antennas, metal layers 140) may be disposed directly on a face of a glass carrier 110). One or more dielectric layers 150 may be disposed between One or more components (e.g., components 130, antennas, metal layers 140) and a face of a glass carrier 110.

[0043] [Rectified under Rule 91, 09.09.2025]The first phased array may be controllably orientable in use to any angle within the first range. In some embodiments, the first range may extend to encompass an entire hemisphere having a base parallel to a face of the glass carrier 110. In some embodiments, the first range may encompass a range of angles which is less than a hemisphere. The first range may be less than or equal to 2π steradians, less than or equal to 3π / 4 steradians, less than or equal to π steradians, or less than or equal to π / 2 steradians. The first range may be substantially cone shaped. The first range may be substantially horn-shaped. The first range may be substantially fan-shaped.

[0044] [Rectified under Rule 91, 09.09.2025]The first phased array may be controllably orientable in use about first and / or second axes. The first and second axes may be orthogonal. The first and second axes may correspond, when the wireless transceiver is installed, to horizontal and vertical directions with respect to gravity. The first phased array may be controllably orientable in use about azimuthal and / or polar angles of a spherical polar coordinate system having a zenith oriented at an acute angle to the normal of the first face. The zenith need not be perpendicular to the first face. The zenith need not be parallel to the first face. The second phased array may be controllably orientable in use to any angle within the second range. The second range may extend to encompass an entire hemisphere having a base parallel to the second face. However, the second range may encompass a range of angles which is less than a hemisphere. The second range may be less than or equal to 2π steradians, less than or equal to 3π / 4 steradians, less than or equal to π steradians, or less than or equal to π / 2 steradians. The second range may be substantially cone shaped. The second range may be substantially horn-shaped. The second range maybe substantially fen-shaped. The second phased array may be controllably orientable in use about second and / or second axes. The second and second axes may be orthogonal. The second and second axes may correspond, when the wireless transceiver is installed, to horizontal and vertical directions with respect to gravity. The second phased array may be controllably orientable in use about azimuthal and / or polar angles of a spherical polar coordinate system having a zenith oriented at an acute angle to the normal of the second face. The zenith need not be perpendicular to the second face. The zenith need not be parallel to the second face.

[0045] The heterogeneous integrated device 100 may include one or more components supported on a face of the glass carrier 110.

[0046] The glass carrier 110 may be a planar substrate that may include, or take the form of, a laminate of two or more layers. The heterogeneous integrated device 100 may include one or more components supported within the laminate planar substrate (e.g., glass carrier 110).

[0047] The glass carrier 110 (e.g., planar substrate) may be transparent (e.g., substantially transparent). Transparent may correspond to the glass carrier 110 (e.g., planar substrate) having a minimum transmission of 50% for visible wavelengths. A portion of the wireless transceiver supporting the first antennas and / or second antennas may be transparent or opaque.

[0048] The transparent glass carrier 110 (e.g., planar substrate) may include, or be formed from, glass. The transparent glass carrier 110 (e.g., planar substrate) may include, or take the form of, one or more plastics including but not limited to polycarbonate (PC), polyimide (PI), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), cyclo-olefin polymer (COP), or any other polymer having sufficient mechanical strength to support one or more components of the heterogeneous integrated device 100 and sufficient transparency to be seen through. The glass carrier 110 (e.g., planar substrate) may include, or take the form of, a laminate including one or more layers of glass and / or plastic and / or adhesive. The laminate may include one or more conductor layers. Conductor layers of the laminate may be internal (e.g., between the first and second faces), and / or external (e.g., supported on the first and / or second faces). One or more layers of the laminate may support one or more components of the heterogeneous integrated device 100.

[0049] The heterogeneous integrated device 100 may include a first metal layer (e.g., microstrip line) supported on a first face of the glass carrier 110 and a second metal layer (e.g., microstrip line) support on a second face of the glass carrier 110. The first metal layer and the second metal layer may be connected by corresponding vias. Vias connecting between metal layers (e.g., microstrip lines) supported on the first and second faces may be impedance matched to the metal layers (e.g., microstrip lines). The heterogeneous integrated device 100 may include a number of first metal layers (e.g., microstrip lines) supported on the first face. The heterogeneous integrated device 100 may include a number of second metal layers (e.g., microstrip lines) supported on the second face. Any metal layers (e.g., microstrip line) may be connected by vias extending through the glass carrier 110 (e.g., planar substrate) to one or more metal layers (e.g., microstrip lines) and / or other components of the heterogeneous integrated device 100 supported on the opposite side of the heterogeneous integrated device 100.

[0050] Compared to, for example, radiative transfer or capacitive coupling between the first and second faces, such physical connections do not require that the glass carrier 110 (e.g., planar substrate) is formed from a material or materials having loss dielectric loss properties. Though not required, materials having loss dielectric loss properties may still be used.

[0051] The heterogeneous integrated device 100 may include one or more components flip-chip bonded to the glass carrier 110. One or more components of the heterogeneous integrated device 100 may be flip-chip bonded to a first face of the glass carrier 110. One or more components of the heterogeneous integrated device 100 may be flip-chip bonded to the second face of the glass carrier 110. One or more components of the heterogeneous integrated device 100 may be flip-chip bonded to the first face and one or more further components may be flip-chip bonded to the second face. The one or more components may be flip-chip bonded to the glass carrier 110 in accordance with the Heterogeneous Integration Roadmap (HIR). The HIR is a set of guidelines developed for silicon systems-in-package (SiP) technologies. HIR may refer to, for example, the guidelines set out in the publication of the HIR 2019 edition. The guidelines of HIR may be established for semiconductor / flat panel device fabrication using substrates for packaging semiconductor / flat panel devices (e.g., for heterogeneous integration on printed circuit boards). The guidelines of HIR may not have been applied to glass and / or transparent plastic substrates (e.g., total systems integration of the form of the present disclosure being conducted on glass). The heterogeneous integrated device 100 (e.g., wireless transceiver) may include no printed circuit board substrates. Although the heterogeneous integrated device 100 may include no printed circuit board substrates, the heterogeneous integrated device 100 may be connected to separately packaged devices, for example a power supply, which may include printed circuit board substrates. The heterogeneous integrated device 100 may include an analog circuit configured for analog beamforming of the first phased array and / or analog beamsteering of the second phased array. The analog circuit may receive and re-transmit the radio signals without conversion to the digital domain. The analog circuit may include a first varactor diode corresponding to each first antenna of the first phased array. Each first varactor diode may be configured to apply a phase shift to a signal received from the respective first antenna. The heterogeneous integrated device 100 may be configured to control the first antennas as the first phased array by controlling the capacitances of the first varactor diodes. The heterogeneous integrated device 100 may be configured to control the capacitances of the first varactor diodes by controlling a reverse bias applied to each first varactor diode.

[0052] The analog circuit may include a second varactor diode corresponding to each second antenna of the second phased array. Each second varactor diode may be configured to apply a phase shift to a signal being transmitted to the respective second antenna. The heterogeneous integrated device 100 may be configured control the second antennas as the second phased array by controlling the capacitances of the second varactor diodes. The heterogeneous integrated device 100 may be configured to control the capacitances of the second varactor diodes by controlling a reverse bias applied to each second varactor diode.

[0053] The heterogeneous integrated device 100 may include one or more digital circuits configured for digital beamforming of the first phased array and / or digital beamsteering of the second phased array. The heterogeneous integrated device 100 may include a digital channel corresponding to each of the first antennas. The heterogeneous integrated device 100 may include a digital channel corresponding to each of the second antennas. The heterogeneous integrated device 100 may also include a down-conversion section configured to convert signals received from the first antennas from a transmit band to a baseband. The heterogeneous integrated device 100 may also include one or more digital circuits configured to perform digital beamforming on the down converted signals to obtain a summed signal, and to perform beam-steering on the summed signal to generate and output a plurality of transmit signals. The heterogeneous integrated device 100 may also include an up-conversion section configured to convert the transmit signals from the baseband to the transmit band and to output the up-converted transmit signals to corresponding second antennas.

[0054] Down-conversion and up-conversion refer to signal carrier frequencies. Down-conversion and / or up-conversion may utilize standard heterodyning techniques and apparatuses. Baseband may refer to a carrier frequency at or close to zero frequency, or equivalently the absence of a carrier frequency. Conversion to baseband may allow use of lower performance analog-to-digital convertors (ADCs).

[0055] The first antennas may be arranged into a number of first sub-arrays. Each first sub-array may include two or more of the first antennas. The second antennas may be arranged into a plurality of second sub-arrays. Each second sub-array may include two or more of the second antennas. The heterogeneous integrated device 100 may be configured for hybrid beamforming and / or beamsteering. The heterogeneous integrated device 100 may include a digital channel corresponding to each of the first sub-arrays. The circuit may include a digital channel corresponding to each of the second sub-arrays.

[0056] The heterogeneous integrated device 100 may also include a number of first analog circuits. Each first analog circuit may be configured to perform analog beamforming on signals received from a respective first sub-array. The heterogeneous integrated device 100 may also include a number of second analog circuits. Each second analog circuit may be configured to perform analog beamsteering for a respective second sub-array. The heterogeneous integrated device 100 may also include one or more digital circuits configured to perform digital beamforming on signals received from the first analog circuits to obtain a summed signal, and to perform beam-steering on the summed signal to generate and output a number of transmit signals to respective second analog circuits.

[0057] Each first analog circuit may include a first varactor diode corresponding to each first antenna of the respective first sub-array. Each first varactor diode may be configured to apply a phase shift to a signal received from the respective first antenna. Each first analog circuit may be configured to perform analog beamforming on signals received from the respective first sub-array by controlling the capacitances of the corresponding first varactor diodes. Each first analog circuit may be configured to control the capacitances of the corresponding first varactor diodes by controlling a reverse bias applied to each first varactor diode.

[0058] Each second analog circuit may include a second varactor diode corresponding to each second antenna of the respective second sub-array. Each second varactor diode may be configured to apply a phase shift to a signal being transmitted to the respective second antenna. Each second analog circuit may be configured to perform analog beamsteering for a respective second sub-array by controlling the capacitances of the corresponding second varactor diodes. Each second analog circuit maybe configured to control the capacitances of the corresponding second varactor diodes by controlling a reverse bias applied to each second varactor diode.

[0059] The heterogeneous integrated device 100 may also include a down-conversion section configured to convert signals received from the first analog circuits from a transmit band to baseband for reception by the one or more digital circuits. The heterogeneous integrated device 100 may also include an up-conversion section configured to convert the transmit signals output from one or more digital circuits from the baseband to the transmit band for reception by a respective second analog circuit.

[0060] The heterogeneous integrated device 100 may include one or more filters. A filter may include, or take the form of, a film bulk acoustic resonator (FBAR). A filter may include, or take the form of, a thin- film bulk acoustic resonator (TFBAR). A filter may include, or be formed from, metamaterials. Metamaterial filters suitable for use in the wireless transceiver include, without being limited to, metamaterial.

[0061] The heterogeneous integrated device 100 (e.g., wireless transceiver) may be configured for a radio signal in accordance with the 5G. The heterogeneous integrated device 100 may be configured for radio signals having carrier frequencies between and including 5 GHz and 300 GHz. The heterogeneous integrated device 100 may be configured for radio signals having carrier frequencies between and including 30 GHz and 300 GHz. The heterogeneous integrated device 100 may be configured for radio signals having carrier frequencies within one or more of the K (20 GHz to 40 GHz), L (40 GHz to 60 GHz), and M (60 GHz to l00 GHz) bands defined by NATO. The heterogeneous integrated device 100 may be configured for radio signals having carrier frequencies within one or more of the Ka (27 GHz to 40 GHz), V (40 GHz to 75 GHz) and W (75 GHz to 100 GHz) bands defined by the Institute of Electrical and Electronics Engineers (IEEE). The heterogeneous integrated device 100 maybe configured for radio signals having carrier frequencies exceeding 300 GHz. The heterogeneous integrated device 100 may be configured for radio signals having carrier frequencies equaling or exceeding 1 THz. The heterogeneous integrated device 100 may be configured for a radio signal which is a 5G signal. The heterogeneous integrated device 100 may be configured for a radio signal which is a 6G signal. The heterogeneous integrated device 100 may be configured for a radio signal which is a 7G signal.

[0062] In some embodiments, the antennas of the heterogeneous integrated device 100 may be multiplexed to function as transceivers. During the first period radio signals may be relayed in one direction, and during the second period the direction of relaying radio signals may be reversed. The alternating cycle of first and second periods may be repeated whilst the heterogeneous integrated device 100 is active. The first and second periods may have the same length. The first and second periods may have different lengths. The radio signals transmitted away from the second face of the glass carrier 110 may have a lower power than radio signals transmitted away from the first face of the glass carrier 110. For example, the first face may be oriented towards the outside of a building whilst the second face is oriented towards an interior of the building. Using reduced power levels for radio signals retransmitted inside the building, compared to those required for transmission back to the wider external network, may reduce power consumption of the heterogeneous integration device 100. Using reduced power levels for signals retransmitted inside the building may reduce interference with other electronics devices and / or equipment inside the building. Using reduced power levels for signals retransmitted inside the building may provide reassurance to any building occupants / users concerned about the intensity of radio signals. One or more of the antennas may include a dielectric material having a loss-tangent which is less than a loss-tangent of the glass carrier 110.

[0063] The dielectric material may have a loss-tangent which is less than a loss-tangent of the glass carrier 110 at a frequency of 28 GHz. A loss tangent of the glass carrier 110 may be two times, three times, five times or ten times greater than a loss tangent of a dielectric material included in the antennas. A loss tangent of the glass carrier 110 may be two times, three times, five times or ten times greater than a loss tangent of a dielectric material included in the antennas at a frequency of 28 GHz. The dielectric material may be disposed between ground plane and radiation plane of the antennas.

[0064] In this way, the heterogeneous integration device 100 may optionally utilize low-loss dielectric materials for antennas, whilst the direct, hard wired connections between the antennas and the circuit mean that the glass carrier 110 is not required to be formed from low-loss materials, and may instead be formed from relatively high dielectric-loss materials such as silica glass and / or polymers. This may reduce the cost and manufacturing complexity, for example by enabling use of high-loss but flexible polymer films suitable for roll-to-roll manufacturing methods.

[0065] The dielectric material (e.g., of dielectric layer 150) may include one or more of inorganic oxides, silica, alumina, an organic material, a fluoropolymer, polytetrafluoroethylene and nanocomposite. The dielectric material (e.g., of dielectric layer 150) may take the form of a film may have a thickness of between and including 1 pm and 1 mm. The dielectric material (e.g., of dielectric layer 150) may be include amorphous and / or crystalline regions of the same material. Where the dielectric material (e.g., of dielectric layer 150) exhibits polymorphism, the dielectric material may include two or more different polymorphs, and optionally amorphous material. The dielectric material (e.g., of dielectric layer 150) may have a loss-tangent of less than or equal to 10-3 at a frequency of 28 GHz. The dielectric material may have a loss-tangent of less than or equal to 10-4, 10-5 or 10-6 at a frequency of 28 GHz. The dielectric material may have a loss-tangent of greater than or equal to 10-2, 10-1 or 1 at a frequency of 28 GHz. The glass carrier 110 may have a loss tangent of greater than or equal to 10-3 at a frequency of 28 GHz.

[0066] The antennas may be formed using photolithography (e.g., directly on the glass carrier 110).

[0067] The heterogeneous integration device 100 may define two or more passbands for receiving and retransmitting radio signals. The heterogeneous integration device 100 may be configurable such that one or more of the passbands may be disabled. Different passbands may correspond to different service providers of a wireless communications network. Service providers may be mobile telephone, cell service and / or data service providers.

[0068] Each of the two or more passbands may include one or more analog filters. Analog filters may include, or take the form of, film bulk acoustic resonators (FBAR). Analog filters may include, or take the form of, thin-film bulk acoustic resonators, TFBAR. The outputs of each passband provided by analog filters may be grounded to disable that passband. Passband outputs may be selectively grounded by respective switches controlled by the circuit.

[0069] Each of the two or more passbands may include one or more digital filters. Digital filters may be provided by a digital circuit configured to perform beamforming and / or beamsteering. Digital filters may be provided by a dedicated digital filtering circuit.

[0070] The heterogeneous integration device 100 may be configurable such that each of the two or more passbands is independently enabled or disabled in a one-time configuration process. The one-time configuration process may include, or take the form of, programming a programmable read-only memory (programmable ROM). In an initial configuration of the heterogeneous integrated device 100, each passband output may be grounded by a fuse connection, and the onetime configuration process may include, or take the form of, blowing the fuse connections corresponding to passbands which are to be enabled. The heterogeneous integration device 100 may be configurable such that each of the two or more passbands may be independently enabled or disabled in use.

[0071] The heterogeneous integration device 100 may be configured to identify (e.g., receive, generate, etc.) passband modification messages including instructions to enable one or more passbands and / or to disable one or more other passbands. Passband modification messages may be received through a wireless network which the heterogeneous integrated device 100 forms a part or portion of. Passband modification messages may be received as radio signals. Passband modification messages may be received within one of the two or more passbands defined by the circuit. Passband modification messages may be received within an additional passband which may be (is always) enabled.

[0072] The heterogeneous integrated device 100 may be configured to receive and retransmit radio signals within a time multiplexed wireless communications system. The circuit may be configurable to only retransmit radio signals corresponding to one or more selected service providers. The heterogeneous integrated device 100 may be configured to identify the source of a received radio signal, for example using packet header data. In response to the source of a received radio signal corresponds to one of the selected service providers, the circuit may be configured to control the plurality of second antennas as a second phased array to retransmit that received radio signal. In response to the source of a received radio signal does not correspond to one of the selected service providers, the heterogeneous integration device 100 may not retransmit that received radio signal.

[0073] The selected service providers may be updatable in use. The heterogeneous integration device 100 may be configured to receive selected service provider modification messages comprising instructions to enable retransmission of radio signals originating from one or more service providers and / or to disable retransmission of radio signals originating from one or more other service providers. Selected service provider modification messages may be received through a wireless network which the heterogeneous integrated device 100 is a part of. Selected service provider modification messages may be received as radio signals.

[0074] The entire length of connections between the integrated circuit 160 and the antennas may be supported by the glass carrier 110. In this way, signals received and relayed between the antennas may not be routed off the glass carrier 110 (though they are routed through the glass carrier 110 using vias 120 as described herein).

[0075] A structure may include one or more heterogeneous integrated devices 100. The structure may include, or take the form of, a building. The building may be a commercial, residential or civic building. The structure may include, or take the form of, an item of street furniture such as, for example, a street light, a bench, a bus shelter, a signpost or sign, a parking meter, a safety barrier, an advertising hoarding or billboard, and so forth. The structure may include a window having interior and exterior surfaces, and the heterogeneous integrated device 100 may be attached to the interior surface of the window.

[0076] In some embodiments, a substantial fraction of the heterogeneous integrated device 100 (e.g., including the arrays of antennas) may potentially be made transparent or semi-transparent. For example, by using very fine and / or thin conductive traces, metallic nanowires, metal meshes and so forth to define the antennas.

[0077] Largely transparent heterogeneous integrated devices 100 may be applied to interior surfaces of a window glass of a building or other structure, for example using an adhesive layer, without significantly obscuring the view of people inside or reducing the natural illumination from the window. In this way, radio signals incident on the window may be retransmitted deeper into the building or structure.

[0078] In some embodiments, the glass carrier 110 is a single, monolithic block of material. In some embodiments, the glass carrier 110 is not a single, monolithic block of material, and may in some examples take the form of a laminate including one or more layers of glass and / or plastic and / or adhesive. A laminate may include one or more conductor layers, which may be internal (e.g., between the first and second faces of the glass carrier 110), and / or external (e.g., supported on the first and / or second faces of the glass carrier 110).

[0079] In some embodiments, the glass carrier 110 is thin enough to be flexible, for example a thin film or sheet of a polymer material.

[0080] [Rectified under Rule 91, 09.09.2025]The heterogeneous integrated devices 100 may be or may include a film-based bulk acoustic wave resonator that may offer properties including, but not limited to, low insertion loss, high selectivity at frequency bands including and in excess of 25 GHz bands, low power consumption, and high isolation as compared to surface acoustic wave (SAW) resonators with the same central frequency. Film-based bulk acoustic wave resonators may be configured for high (for example 60 GHz) frequencies, and may exhibit steep filter skirts because of their high Q-factor and high acoustic velocity, combined with high power handling. Materials having high thermal conductance are used. Possible materials may include aluminum nitride (AIN) as the dielectric - which is piezoelectric and is most widely magnetron sputtered at typically 200°C-300°C, with electrode materials range from platinum (Pt) to copper (Cu). For example, conductive elements may be formed using copper, Cu, with a barrier layer comprising an alloy of copper, Cu and one or more refractory metal elements selected from tantalum, Ta, niobium, Nb, molybdenum, Mo, tungsten, W, zirconium, Zr, hafnium, Hf, rhenium, Re, osmium, Os, ruthenium, Ru, rhodium, Rh, titanium, Ti, vanadium, V, chromium, Cr, and nickel Ni. Copper is preferable due to high conductance of electricity and heat, though other metals may be used subject to suitable electrical conductivity and skin depth at the intended operating frequencies. Molybdenum may be a good choice since this metal provides a combination of a relatively moderate acoustic impedance, density, and resistivity, in addition to being widely available in any Gen-X flat panel line as a source / drain metallization standard. The term Gen-X is a standard term used in the flat panel industry, and refers to the size of the substrate. For example, Genio+ refers to a substrate size up to 2840mm by 3370mm.

[0081] The glass carrier 110 may incorporate a heat spreader layer. The heat spreader layer may be incorporated during a heterogeneous integration fabrication process. A heat spreader layer may enable operation at higher power and / or using a higher density of antennas and / or microstrip interconnects without requiring a fan or other cooling method. In some examples, a ground plane layer (e.g., metal layer 140) may be formed from copper and may additionally serve as a heat spreader layer. In some embodiments, an antenna dielectric layer may be formed from a dielectric with relatively high thermal conductance, for example AlN, or AlOx(e.g., Al2O3in the sapphire structure) may also serve as a good heat spreader layer.

[0082] In some embodiments, the antennas are planar antennas. The antennas may be formed using photolithography.

[0083] In some embodiments, the heterogeneous integrated device 100 is attached to, or integrated as part of, a structure in the form of a commercial, residential or civic building. In some embodiments, the heterogeneous integrated device 100 is attached to, or integrated with, an item of street furniture such as, for example, a street light, a bench, a bus shelter, a signpost or sign, a parking meter, a safety barrier, an advertising hoarding or billboard, and so forth. In some examples, the In some embodiments, the heterogeneous integrated device 100 includes a glass carrier 110 which is transparent, and is attached to a window of a structure.

[0084] As described hereinbefore, the glass carrier 110 may be formed from a material which exhibits significant dielectric losses, because Radio frequency (RF) signals are transmitted using vias instead of radiatively through the thickness of the glass carrier 110. When lossy materials such as glass or transparent polymers are used, the antenna dielectric layers may be formed from a dielectric material having a loss tangent which is less than a loss tangent of the glass carrier 110 (e.g., effective, overall loss-tangent when the glass carrier 110 is a laminate). Unlike the glass carrier 110, the dielectric loss characteristics of the materials used for antenna dielectric layers may be considered and minimized.

[0085] Referring to FIG. 1A, in some embodiments, heterogeneous integrated device 100A includes a single glass carrier 110A. In some embodiments, heterogeneous integrated device 100A includes a metal layer 140A that is a first ground layer on a first side of the glass carrier 110A and a metal layer 140D that is a second ground layer on a second side (opposite the first side) of the glass carrier 110A. A via 120A may pass through the glass carrier 110A to electrically couple metal layer 140A with metal layer 140D.

[0086] Referring to FIG. 1B, in some embodiments, heterogeneous integrated device 100B includes two or more glass carriers 110 (e.g., glass carriers 110A-B). The glass carriers 110A-B may be bonded to each other via a bonding layer 170 (e.g., adhesive). In some embodiments, components 130 (e.g., antennas) are disposed on a lower surface of glass carrier 110A between glass carriers 110A-B and components 130 (e.g., antennas) are disposed on a lower surface of glass carrier 110B. Vias 120A may couple the components with integrated circuit 160 that is disposed on metal layer 140C.

[0087] In some embodiments, heterogeneous integrated device 100 includes more than two glass carriers 110.

[0088] In some embodiments, the heterogeneous integrated device 100 (e.g., glass carrier 110) has a short range smoothness and / or roughness in the range of about 1 nanometer (nm) to about 10 nm. The short range smoothness and / or roughness of the heterogeneous integrated device 100 (e.g., glass carrier 110) may be less than roughness of a conventional device (e.g., conventional PCB device). This may allow the heterogeneous integrated device 100 to have less losses than a conventional device (e.g., conventional PCB device). The roughness of heterogeneous integrated device 100 (e.g., glass carrier 110) may be less than skin depth (e.g., about 0.3 micrometers at 30 GHz).

[0089] In some embodiments, the heterogeneous integrated device 100 (e.g., glass carrier 110) has a dimensional stability that is more stable (e.g., more material homogeneity) over large panel formats than a conventional device (e.g., conventional PCB device). This may allow heterogeneous integrated device 100 (e.g., glass carrier 110) to have a higher stiffness coefficient than a conventional device (e.g., conventional PCB device).

[0090] In some embodiments, the heterogeneous integrated device 100 (e.g., glass carrier 110) has a process tolerance and / or design window that is better than that of a conventional device (e.g., conventional PCB device). A conventional device (e.g., conventional PCB device) may have poor process tolerance due to dimensional instability. The heterogeneous integrated device 100 (e.g., glass carrier 110) may have a tighter process tolerance (e.g., less than about 8% over about a 1 millimeter size) than a conventional device (e.g., conventional PCB device). The tighter process tolerance of heterogeneous integrated device 100 (e.g., glass carrier 110) may allow a broader design window than a conventional device (e.g., conventional PCB device).

[0091] In some embodiments, the heterogeneous integrated device 100 (e.g., glass carrier 110) has a feature size (e.g., lateral thickness and / or layer thickness) that is better than that of a conventional device (e.g., conventional PCB device). The heterogeneous integrated device 100 (e.g., glass carrier 110) may have about 1-2 micrometer feature size (and may have sub-micrometer thickness) for conductors (e.g., copper). The via diameter may be less than 200 micrometer, less than 100 micrometers, less than 50 micrometers, and / or less than 40 micrometers (e.g., as low as 30 micrometers). The smaller feature sizes and thin conductor layers may allow the heterogeneous integrated device 100 (e.g., glass carrier 110) to have higher density integration and lower losses than a conventional device (e.g., conventional PCB device).

[0092] In some embodiments, the heterogeneous integrated device 100 (e.g., glass carrier 110) has a higher patterning precision than a conventional device (e.g., conventional PCB device). In some embodiments, the patterning precision of the heterogeneous integrated device 100 (e.g., glass carrier 110) has about 1-2 accuracy. The heterogeneous integrated device 100 (e.g., glass carrier 110) may have higher definition features with better uniformity and / or precision over large formats (e.g., especially for vias 120 through dielectric layers 150 and glass carrier 110) compared to a conventional device (e.g., conventional PCB device).

[0093] In some embodiments, the heterogeneous integrated device 100 (e.g., glass carrier 110) has better substrate handling than a conventional device (e.g., conventional PCB device). A conventional device may need support substrate for precision patterning but with high spatial variation. The heterogeneous integrated device 100 (e.g., glass carrier 110) may not have a support wafer for handling. By not using a support wafer, the heterogeneous integrated device 100 (e.g., glass carrier 110) may not have lamination and / or delamination processes of conventional devices.

[0094] In some embodiments, the heterogeneous integrated device 100 (e.g., glass carrier 110) has a better coefficient of thermal expansion (CTE) than a conventional device (e.g., conventional PCB device). The heterogeneous integrated device 100 (e.g., glass carrier 110) may have a tunable CTE (e.g., less than about 17 parts per million per degree Celsius (ppm / °C), less than about 15 ppm / °C, less than about 10 ppm / °C, less than about 9 ppm / °C, about 3-9 ppm / °C, etc.). The CTE may be tuned depending on drawing conditions of the glass carrier 110. The heterogeneous integrated device 100 (e.g., glass carrier 110) may have a higher mechanical- and thermal-cycling reliability than conventional devices.

[0095] In some embodiments, the heterogeneous integrated device 100 (e.g., glass carrier 110) has better thermal conductivity (k) and / or heat dissipation than a conventional device (e.g., conventional PCB device). The heterogeneous integrated device 100 (e.g., glass carrier 110) may be more thermally conductive (e.g., k of about 0.8 Watt per meter per degree Celsius (W / m / °C), where air has a k of about 0.8 W / m / °C) than conventional devices (e.g., that have PCB materials). The heterogeneous integrated device 100 (e.g., glass carrier 110) may use thermal vias, ground planes, and / or copper thickness for heat dissipation. The low-thickness glass carrier 110 of the heterogeneous integrated device 100 may have a lower thermal resistance than conventional devices.

[0096] In some embodiments, the heterogeneous integrated device 100 (e.g., glass carrier 110) has a lower cost than a conventional device (e.g., conventional PCB device). The heterogeneous integrated device 100 may have availability in panel format (e.g., of about 1 meter) which may reduce cost per unit processed area.

[0097] In some embodiments, the heterogeneous integrated device 100 (e.g., glass carrier 110) has double-sided processing. The frontside and / or backside lithography may be amenable to double sided integration. This may use vias for vertical routing of interconnects.

[0098] In some embodiments, the heterogeneous integrated device 100 (e.g., glass carrier 110) has a better dielectric constant (Dk and / or Df) than a conventional device (e.g., conventional PCB device). Dk may be a dielectric constant or relative permittivity may be a measure of an ability of a material to store electrical energy in an electric field. Df may be a loss tangent that is a measure of an ability of a material to dissipate electrical energy as heat when the material is exposed to an alternating electric field. The glass carrier 110 and / or the dielectric layers 150 of the heterogeneous integrated device 100 may have a lower dielectric constant and / or lower loss tangent than conventional devices.

[0099] In some embodiments, the heterogeneous integrated device 100 has one or more side conductive coatings (e.g., in addition to or instead of one or more of the vias 120).

[0100] In some embodiments, the heterogeneous integrated device 100 has a glass carrier 110 and a PCB coupled to the glass carrier 110. In some embodiments, the heterogeneous integrated device 100 has a glass carrier 110 and does not include a PCB. In some embodiments, the heterogeneous integrated device 100 is a millimeter wave radio.

[0101] Referring to FIGS. 1C-E, heterogeneous integrated device may have a crossing divider configuration (e.g., between one or more transmission lines). The crossing divider configuration may have a substantially planar shape (e.g., substantially horizontal) without vias (e.g., without extending through a glass carrier 110, disposed on a glass carrier 110).

[0102] [Rectified under Rule 91, 09.09.2025]Referring to FIG. 1C, in some embodiments, heterogeneous integrated device 100C includes a crossing divider design. "V" may refer to a transmission line for vertical polarization and "H" may refer to a transmission line for horizontal polarization. "In" may refer to an input. "Out" may refer to an output. In some examples, one or more of In_V may be a substantially vertical polarized input, In_H may be a substantially horizontal polarized input, Out_V1 and Out_V2 may be substantially vertical polarized outputs and Out_H1, and / or Out_H2 may be substantially horizontal polarized outputs.

[0103] Conventionally, the wiring between RF input and the input for BFIC (beamforming integrated circuit) (e.g., cross-point of V and H) may be a bottleneck because V and H wiring must be parallel and yet branched, and it requires crossover. In the present disclosure, one or more of use RF components have an improved cross-section (e.g., changing the cross-section), use a crossing divider, and / or have asymmetrical feeding (e.g., designing other wiring).

[0104] The crossing divider may include one or more transmission lines 180 and metal layer 140E (e.g., L1). Metal layer 140E may have an Out_V1 and an Out H2 (e.g., port). Each port (e.g., Out_V1, Out_H2) may be connected through a transmission line 180 on metal layer 140E. The transmission line 180 may be branched (e.g., ladder-shaped transmission line and / or Y-shaped transmission line). The transmission line 180 may have a height (e.g., about 0.5 lambda, about 2-3 mm). Each transmission line 180 may have a crossing divider design where the transmission is a single vertical via that splits into two diagonal transmission lines that connect with ports Out_H1 and Out_V2. The two ends between the two Y-shaped transmission lines may have a resistance value (e.g., about 100 Ohms). Divided transmission lines may have an about 71 Ohms characteristic impedance

[0105] In some embodiments, the heterogeneous integrated device 100C may provide transmission (e.g., good transmission, threshold transmission) of signals from In_H to Out H1 and from In_H to Out_H2 may may prevent transmission (e.g., reject paths) from In_H to In_V, In_H to Out_V2, and In_H to Out_V1.

[0106] Conventionally, there is loss caused by additional layers (e.g., metal layers 140) (e.g., trade-off between gain and FBR). The present disclosure may provide one or more of simplification of cross-section (e.g., on glass model, on PCB model), improvement of design (e.g., transmission line coupling method to antenna structure), and / or use of functional reflector (e.g., meta-surface) as backside ground.

[0107] Referring to FIG. 1D, in some embodiments, heterogeneous integrated device 100D includes a crossing divider design where transmission lines 180 for extraction (e.g., away from each other) from the branch line.

[0108] Referring to FIG. 1E, in some embodiments, heterogeneous integrated device 100E includes a crossing divider design.

[0109] The heterogeneous integrated device 100E may include transmission lines 180A-D. The transmission lines 180A-B may connect Port n to the crossing divider ports. If the transmission line impedance is matched to the port, the length of the transmission lines may not have effect on the circuit parameters beyond a slight difference in loss. The previously observed changes in the S-parameters when altering the length of transmission lines 180B may be due to an impedance mismatch in the transmission line.

[0110] [Rectified under Rule 91, 09.09.2025]When the transmission line's characteristic impedance substantially matches (e.g., matches) the impedance of the lumped port, then impedance matching ratio may be substantially one.

[0111] Responsive to the transmission line impedance being substantially matched (e.g., matched), varying of the length of the transmission lines 180B may result in S-parameters exhibiting only minor differences in loss (e.g., differences in loss being less than a threshold amount).

[0112] In some embodiments, the transmission lines 180A-B are impedance matched to reduce (e.g., eliminate) effects of length of the transmission lines 180A-B on the circuit.

[0113] Parameters, such as width and / or length of one or more of the transmission lines 180A-D can be substantially optimized (e.g., optimized) to achieve improved circuit performance.

[0114] In substantial optimization (e.g., optimization), the transmission lines 180A-B may become impedance-mismatched and lengths of lengths of the transmission lines 180A-B may begin to influence the circuit parameters. At that point, the overall circuit dimensions may be fixed before performing further optimizations of width and length.

[0115] One or more of FIGS. 1A-E may be used for radio antenna implementation (e.g., 5G+)

[0116] FIGS. 2A-D illustrate components of heterogeneous integration devices 200A-D, according to certain embodiments. Features of one or more of heterogeneous integration devices 200A-D of one or more of FIGS. 2A-D that have similar names and / or reference numbers as one or more of heterogeneous integration devices 100A-E of one or more of FIGS. 1A-E may have the same or similar structure, material, and / or functionality as those of one or more of FIGS. 1A-E.

[0117] FIG. 2A illustrates a side cross-sectional view of heterogeneous integrated device 200A. The heterogeneous integrated device 200A may include a central via 220A (e.g., via 120A, signal carrying conductor) that passes through glass carrier 110A and dielectric layers 150A-B to couple component 130 (e.g., antenna) with integrated circuit 160 via metal layer 140C. The heterogeneous integrated device 200A may further include perimeter vias 220B that pass through the glass carrier 110A to couple metal layer 140A and metal layer 140D. In some embodiments, metal layer 140A is a first ground layer and metal layer 140D is a second ground layer. In some embodiments, the vias 120A-B are in a coaxial configuration. In some embodiments, the vias 120A-B are in a triaxial configuration.

[0118] FIG. 2B illustrates an upper or lower cross-sectional view of heterogeneous integrated device 200B (e.g., in a coaxial configuration). In some embodiments, heterogeneous integrated device 200B has the same or similar structure, materials, and / or functionality of the heterogeneous integrated device of one or more of FIGS. 1A-2A. Heterogeneous integrated device 200B includes a glass carrier 110 and vias 220 passing through glass carrier 110 (e.g., from an upper surface to a lower surface of glass carrier 110). The vias 220 may include a central via 220A and perimeter vias 220B. The central via 220A may couple a component (e.g., antenna, component 130 of one or more of FIGS. 1A-2A) with an integrated circuit (e.g., integrated circuit 160 of one or more of FIGS. 1A-2A) via metal layer (e.g., metal layer 140C of one or more of FIGS. 1A-2A). The perimeter vias 220B may couple metal layers (e.g., ground layers, metal layers 140A and 140D) that are disposed on opposite sides of the glass carrier 110. The perimeter vias 220B may surround central via 220A (e.g., perimeter vias 220B may be substantially equal-distant from the central via 220A, perimeter vias 220B may form a substantial circular perimeter around central via 220A).

[0119] In some embodiments, a double ring (e.g., double concentric ring) of ground perimeter vias 220B surrounds the central via 220A).

[0120] FIG. 2C illustrates an upper or lower cross-sectional view of heterogeneous integrated device 200C (e.g., in a triaxial configuration). In some embodiments, heterogeneous integrated device 200C has the same or similar structure, materials, and / or functionality of the heterogeneous integrated device of one or more of FIGS. 1A-2A. Heterogeneous integrated device 200C includes a glass carrier 110 and vias 220 passing through glass carrier 110 (e.g., from an upper surface to a lower surface of glass carrier 110). The vias 220 may include a central via 220A and perimeter vias 220B. The central via 220A may couple a component (e.g., antenna, component 130 of one or more of FIGS. 1A-2A) with an integrated circuit (e.g., integrated circuit 160 of one or more of FIGS. 1A-2A) via metal layer (e.g., metal layer 140C of one or more of FIGS. 1A-2A). The perimeter vias 220B may couple metal layers (e.g., ground layers, metal layers 140A and 140D) that are disposed on opposite sides of the glass carrier 110. The perimeter vias 220B may on opposite sides of central via 220A from each other (e.g., perimeter vias 220B may be substantially equal-distant from the central via 220A). A first perimeter via 220B may be coupled to first ground layers (e.g., metal layers) and a second perimeter via 220B may be coupled to second ground layers (e.g., metal different from the ground layers to which the first perimeter via 220B is coupled).

[0121] In some embodiments, the central via 220A and perimeter vias 220B may be disposed between component 130 and a metal layer 140. In some embodiments, the central via 220A and perimeter vias 220B may be disposed between a metal layer 140 and another metal layer 140.

[0122] FIG. 2D illustrates an upper or lower cross-sectional view of heterogeneous integrated device 200D (e.g., in concentric configuration). The heterogeneous integrated device 200D may include one or more concentric rings 230. In some embodiments, the heterogeneous integrated device 200D includes a concentric ring 230A and a concentric ring 230B. Each concentric ring 230 may include perimeter vias 220B that are coupled to a corresponding metal layer (e.g., ground layer). Each concentric ring 230 of perimeter vias 220B may be coupled to a different metal layer (e.g., different ground layer). In some embodiments, the heterogeneous integrated device 200D is a coaxial configuration that includes concentric rings 230. In some embodiments, the heterogeneous integrated device 200D is a triaxial configuration that has concentric rings 230 (e.g., concentric ring 230A of perimeter vias 220B is coupled to a first ground layer and concentric ring 230B of perimeter vias 220B is coupled to a second ground layer that is different from the first ground layer).

[0123] FIGS. 3A-C illustrate systems 301A-C including heterogeneous integration devices 300A-C, according to certain embodiments. In some embodiments, one or more of heterogeneous integrated devices 300A-C has the same or similar structure, materials, and / or functionality of the heterogeneous integrated device of one or more of FIGS. 1A-2D.

[0124] FIG. 3A illustrates a perspective view of system 301A that includes a heterogeneous integrated device 300A. System 301A may include one or more covers 302 (e.g., upper cover 302A and lower cover 302B) that form a housing structure to house the heterogeneous integrated device 300A. System 301A may include one or more thermal interface materials 304 (e.g., phase change materials) that are disposed between the heterogeneous integrated device 300A and one or more of the covers 302. System 301A may include a control unit 306 that is coupled (e.g., electrically coupled, communicatively coupled) to the heterogeneous integrated device 300A. The heterogeneous integrated device 300A may include one or more integrated circuits 160 and one or more components 130 (e.g., antennas). The heterogeneous integrated device 300A may include a glass substrate. The integrated circuits 160 and components 130 (e.g., antennas) may be coupled by vias through the glass carrier.

[0125] FIG. 3B illustrates a side cross-sectional view of system 301B that includes a heterogeneous integrated device 300B. In some embodiments, heterogeneous integrated device 300B has the same or similar structure, materials, and / or functionality of the heterogeneous integrated device of one or more of FIGS. 1A-3A.

[0126] Thermal interface material 304 may be disposed between cover 302 and integrated circuit 160. The heterogeneous integrated device 300B may include a first set of components 130 (e.g., antennas) on a first side of a first portion of the glass carrier 110, a first integrated circuit 160 on a second side of the first portion of the glass carrier 110 (that is opposite the first side), a second set of components 130 (e.g., antennas) on the second side of a second portion of the glass carrier 110, and a second integrated circuit 160 on the first side of the second portion of the glass carrier 110.

[0127] FIG. 3C illustrates a system 301C that includes a heterogeneous integrated device 300C. In some embodiments, heterogeneous integrated device 300C has the same or similar structure, materials, and / or functionality of the heterogeneous integrated device of one or more of FIGS. 1A-3B.

[0128] Heterogeneous integrated device 300C may include one or more components including one or more of a receiver (Rx) 330, impedance matching network (IMN) 340, low noise amplifier (LNA) 350, band pass filter (BPF) 360, power amplifier (PA), and transmitter (Tx) 380. One or more of the components may be disposed on or within a glass carrier. Heterogeneous integrated device 300C may receive a signal via Rx, the Rx 330 may provide the signal to IMN 340, IMN 340 may provide the signal to LNA 350, LNA 350 may provide the signal to an IMN 340, the IMN 340 may provide the signal to the BPF 360, the BPF 360 may provide the signal to IMN 340, the IMN 340 may provide the signal to PA 370, the PA 370 may provide the signal to IMN 340, the IMN 340 may provide the signal to Tx 380, and the heterogeneous integrated device 300C may provide the signal via Tx 380.

[0129] FIG. 3D illustrates a system 301D that includes a base station 310 (base station (BS)), heterogeneous integrated devices 300D, and a client device 320 (user equipment (UE)). In some embodiments, heterogeneous integrated device 300D has the same or similar structure, materials, and / or functionality of the heterogeneous integrated device of one or more of FIGS. 1A-3C.

[0130] Base station 310 may transmit a first signal to a first heterogeneous integrated device 300D, the first heterogeneous integrated device 300D may transmit the first signal to a second heterogeneous integrated device 300D, and the second heterogeneous integrated device 300D may transmit the first signal to a client device 320. The client device 320 may transmit a second signal to the second heterogeneous integrated device 300D, the second heterogeneous integrated device 300D may transmit the second signal to the first heterogeneous integrated device 300D, and the first heterogeneous integrated device 300D may transmit the signal to the base station 310. The heterogeneous integrated devices 300D may be configured to adjust the direction of the antennas of the heterogeneous integrated devices 300D to send and receive signals from other devices (e.g., base station 310, another heterogenous integrated device 300D, a client device 320, etc.). Although FIG. 3D illustrates system 301D sending and receiving signals using two heterogeneous integrated devices 300D, a system may include more or less heterogeneous integrated devices 300D to send and / or receive signals.

[0131] FIG. 4 is a flow diagram of method 400 associated with heterogeneous integration, according to certain embodiments. In some embodiments, method 400 is performed by processing logic that includes hardware (e.g., circuitry, dedicated logic, programmable logic, microcode, processing device, etc.), software (such as instructions run on a processing device, a general-purpose computer system, or a dedicated machine), firmware, microcode, or a combination thereof. In some embodiments, method 400 is performed, at least in part, by a processing device. In some embodiments, a non-transitory storage medium stores instructions that when executed by a processing device, cause the processing device to perform one or more operation of method 400 .

[0132] For simplicity of explanation, method 400 is depicted and described as a series of operations. However, operations in accordance with this disclosure can occur in various orders and / or concurrently and with other operations not presented and described herein. Furthermore, in some embodiments, not all illustrated operations are performed to implement method 400 in accordance with the disclosed subject matter. In addition, those skilled in the art will understand and appreciate that method 400 could alternatively be represented as a series of interrelated states via a state diagram or events.

[0133] Referring to FIG. 4, at block 402, processing logic causes first vias to be formed from an upper surface of a first glass carrier to a lower surface of the first glass carrier. In some embodiments, the first glass carrier is substantially transparent.

[0134] In some embodiments, the processing logic causes the first vias to be formed by: causing a laser to form holes through the first glass carrier from the upper surface to the lower surface; causing a wet etching of the holes to smooth corresponding edges of each of the holes through the first glass carrier; and causing the holes to be filled with metal via electroplating to form the first vias.

[0135] In some embodiments, the first vias include a central via and perimeter vias that substantially circulate the central via. The central via may be coupled to the first antenna. A first perimeter via of the perimeter vias may be coupled to the first metal layer (e.g., first ground layer). The first vias may form a coaxial configuration.

[0136] In some embodiments, a second perimeter via of the perimeter vias is coupled to a second ground layer that is different from the first ground layer. The first vias may form a triaxial configuration.

[0137] At block 404, processing logic causes a first antenna to be disposed on the lower surface of the first glass carrier on at least one via of the first vias. In some embodiments, the processing logic causes the first antenna to be disposed on the lower surface of the first glass carrier is via sputtering metal directly on the lower surface of the first glass carrier.

[0138] At block 406, processing logic causes a first metal layer to be disposed on the upper surface of the first glass carrier. The first metal layer may be a first ground layer.

[0139] At block 408, processing logic causes a first dielectric layer to be disposed on the first metal layer. In some embodiments, responsive to causing the first dielectric layer to be disposed on the first metal layer, the processing logic causes a first subset of second vias to be formed on the first metal layer through the first dielectric layer.

[0140] At block 410, processing logic causes a second metal layer to be disposed on the first dielectric layer. The second metal layer may be associated with at least one of control signals or ground.

[0141] At block 412, processing logic causes a second dielectric layer to be disposed on the second metal layer. In some embodiments, responsive to causing the second dielectric layer to be disposed on the second metal layer, the processing logic causes a second subset of the second vias to be formed on the second metal layer through the second dielectric layer. The third metal layer is to be disposed on the second subset of the second vias.

[0142] At block 414, processing logic causes a third metal layer to be disposed on the second dielectric layer. The third metal layer may be coupled to the first antenna via one or more of the first vias. The first metal layer, the second metal layer, and the third metal layer may be coupled via second vias.

[0143] At block 416, processing logic causes an integrated circuit to be disposed on the third metal layer. In some embodiments, one or more metal layers and / or one or more dielectric layers are disposed between the third metal layer and the integrated circuit. For example, in a multilayer (e.g., more than four metal layers including the first metal layer as an antennae layer), the integrated circuit can be disposed on the nth layer, where n is the last metal layer. In some embodiments, there are no restrictions on number of: metal layers fabricated in the stack; integrated circuits on the topmost metal layer; and / or surrounding ground via rings around the core signal carrying via. In some embodiments, the vias have a dual function: grounding; and heat conduction to heat sink that can be located as the same side of the first glass carrier as the integrated circuit(s).

[0144] In some embodiments, processing logic causes third vias to be formed through a second glass carrier and causes the second glass carrier to be attached to the first glass carrier. The first antenna may be located between the first glass carrier and the second glass carrier.

[0145] FIG. 5 is a block diagram illustrating a computer system 500, according to certain embodiments. In some embodiments, the computer system 500 is integrated circuit 160. In some embodiments, the computer system 500 causes formation of the heterogeneous integrated device 100.

[0146] In some embodiments, computer system 500 is connected (e.g., via a network, such as a Local Area Network (LAN), an intranet, an extranet, or the Internet) to other computer systems. In some embodiments, computer system 500 operates in the capacity of a server or a client computer in a client-server environment, or as a peer computer in a peer-to-peer or distributed network environment. In some embodiments, computer system 500 is provided by a personal computer (PC), a tablet PC, a Set-Top Box (STB), a Personal Digital Assistant (PDA), a cellular telephone, a web appliance, a server, a network router, switch or bridge, or any device capable of executing a set of instructions (sequential or otherwise) that specify actions to be taken by that device. Further, the term "computer" may include any collection of computers that individually or jointly execute a set (or multiple sets) of instructions to perform any one or more of the methods described herein.

[0147] In a further aspect, the computer system 500 includes a processing device 502, a volatile memory 504 (e.g., Random Access Memory (RAM)), a non-volatile memory 506 (e.g., Read-Only Memory (ROM) or Electrically Erasable Programmable ROM (EEPROM)), and a data storage device 516, which communicate with each other via a bus 508.

[0148] In some embodiments, processing device 502 is provided by one or more processors such as a general purpose processor (such as, for example, a Complex Instruction Set Computing (CISC) microprocessor, a Reduced Instruction Set Computing (RISC) microprocessor, a Very Long Instruction Word (VLIW) microprocessor, a microprocessor implementing other types of instruction sets, or a microprocessor implementing a combination of types of instruction sets) or a specialized processor (such as, for example, an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA), a Digital Signal Processor (DSP), or a network processor).

[0149] In some embodiments, computer system 500 further includes a network interface device 522 (e.g., coupled to network 574). In some embodiments, computer system 500 also includes a video display unit 510 (e.g., a liquid crystal display (LCD)), an alphanumeric input device 512 (e.g., a keyboard), a cursor control device 514 (e.g., a mouse), and a signal generation device 520.

[0150] In some implementations, data storage device 516 includes a non-transitory computer-readable storage medium 524 on which store instructions 526 encoding any one or more of the methods or functions described herein, including instructions encoding components for implementing methods described herein.

[0151] In some embodiments, instructions 526 also reside, completely or partially, within volatile memory 504 and / or within processing device 502 during execution thereof by computer system 500, hence, in some embodiments, volatile memory 504 and processing device 502 also constitute machine-readable storage media.

[0152] While computer-readable storage medium 524 is shown in the illustrative examples as a single medium, the term "computer-readable storage medium" shall include a single medium or multiple media (e.g., a centralized or distributed database, and / or associated caches and servers) that store the one or more sets of executable instructions. The term "computer-readable storage medium" shall also include any tangible medium that is capable of storing or encoding a set of instructions for execution by a computer that cause the computer to perform any one or more of the methods described herein. The term "computer-readable storage medium" shall include, but not be limited to, solid-state memories, optical media, and magnetic media.

[0153] In some embodiments, the methods, components, and features described herein are implemented by discrete hardware components or are integrated in the functionality of other hardware components such as application-specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), digital signal processors (DSPs), or similar devices. In some embodiments, the methods, components, and features are implemented by firmware modules or functional circuitry within hardware devices. In some embodiments, the methods, components, and features are implemented in any combination of hardware devices and computer program components, or in computer programs.

[0154] [Rectified under Rule 91, 09.09.2025]Unless specifically stated otherwise, terms such as "causing," "forming," "disposing," "depositing," "sputtering," "etching," "filling," "providing," "transmitting," "receiving," "identifying," "generating," "determining," or the like, refer to actions and processes performed or implemented by computer systems that manipulates and transforms data represented as physical (electronic) quantities within the computer system registers and memories into other data similarly represented as physical quantities within the computer system memories or registers or other such information storage, transmission or display devices. In some embodiments, the terms "first," "second," "third," "fourth," etc. as used herein are meant as labels to distinguish among different elements and do not have an ordinal meaning according to their numerical designation.

[0155] Examples described herein also relate to an apparatus for performing the methods described herein. In some embodiments, this apparatus is specially constructed for performing the methods described herein or includes a general-purpose computer system selectively programmed by a computer program stored in the computer system. Such a computer program is stored in a computer-readable tangible storage medium.

[0156] The methods and illustrative examples described herein are not inherently related to any particular computer or other apparatus. In some embodiments, various general-purpose systems are used in accordance with the teachings described herein. In some embodiments, a more specialized apparatus is constructed to perform methods described herein and / or each of their individual functions, routines, subroutines, or operations. Examples of the structure for a variety of these systems are set forth in the description above. The above description is intended to be illustrative, and not restrictive. Although the present disclosure has been described with references to specific illustrative examples and implementations, it will be recognized that the present disclosure is not limited to the examples and implementations described. The scope of the disclosure should be determined with reference to the following claims, along with the full scope of equivalents to which the claims are entitled.

Claims

1. A method comprising: causing a first plurality of vias to be formed from an upper surface of a first glass carrier to a lower surface of the first glass carrier; causing a first antenna to be disposed on the lower surface of the first glass carrier on at least one via of the first plurality of vias; causing a first metal layer to be disposed on the upper surface of the first glass carrier; causing a first dielectric layer to be disposed on the first metal layer; causing a second metal layer to be disposed on the first dielectric layer, the second metal layer being associated with at least one of control signals or ground; causing a second dielectric layer to be disposed on the second metal layer; causing a third metal layer to be disposed on the second dielectric layer, the third metal layer being coupled to the first antenna via one or more of the first plurality of vias, the first metal layer, the second metal layer, and the third metal layer being coupled via a second plurality of vias; and causing an integrated circuit to be disposed on the third metal layer.

2. The method of claim 1, wherein the causing of the first antenna to be disposed on the lower surface of the first glass carrier is via sputtering metal directly on the lower surface of the first glass carrier.

3. The method of claim 1, wherein the causing of the first plurality of vias to be formed comprises: causing a laser to form a plurality of holes through the first glass carrier from the upper surface to the lower surface; causing a wet etching of the plurality of holes to smooth corresponding edges of each of the plurality of holes through the first glass carrier; and causing the plurality of holes to be filled with metal via electroplating to form the first plurality of vias.

4. The method of claim 1 further comprising: responsive to causing the first dielectric layer to be disposed on the first metal layer, causing a first subset of the second plurality of vias to be formed on the first metal layer through the first dielectric layer; and responsive to causing the second dielectric layer to be disposed on the second metal layer, causing a second subset of the second plurality of vias to be formed on the second metal layer through the second dielectric layer, wherein the third metal layer is to be disposed on the second subset of the second plurality of vias.

5. The method of claim 1, wherein: the first plurality of vias comprise a central via and perimeter vias that substantially circulate the central via; the central via is coupled to the first antenna; and a first perimeter via of the perimeter vias is coupled to the first metal layer.

6. The method of claim 5, wherein the first plurality of vias form a coaxial configuration.

7. The method of claim 5, wherein: the first metal layer is a first ground layer; a second perimeter via of the perimeter vias is coupled to a second ground layer that is different from the first ground layer; and the first plurality of vias form a triaxial configuration.

8. The method of claim 1 further comprising: causing a third plurality of vias to be formed through a second glass carrier; and causing the second glass carrier to be attached to the first glass carrier, the first antenna being located between the first glass carrier and the second glass carrier.

9. The method of claim 1, wherein at least one of: the first glass carrier is substantially transparent; or heterogeneous integrated device has a crossing divider configuration between one or more corresponding transmission lines.

10. A heterogeneous integration device comprising: a first glass carrier comprising an upper surface and a lower surface, wherein a first plurality of vias formed from the upper surface to the lower surface; a first antenna disposed on the lower surface of the first glass carrier on at least one via of the first plurality of vias; a first metal layer disposed on the upper surface of the first glass carrier; a first dielectric layer disposed on the first metal layer; a second metal layer disposed on the first dielectric layer, the second metal layer being associated with at least one of control signals or ground; a second dielectric layer disposed on the second metal layer; a third metal layer disposed on the second dielectric layer, the third metal layer being coupled to the first antenna via one or more of the first plurality of vias, wherein the first metal layer, the second metal layer, and the third metal layer are coupled via at least one of a second plurality of vias; and an integrated circuit disposed on the third metal layer.

11. The heterogeneous integration device of claim 10, wherein the first antenna is disposed on the lower surface of the first glass carrier via sputtering metal directly on the lower surface of the first glass carrier.

12. The heterogeneous integration device of claim 10, the second plurality of vias comprising: a first subset of the second plurality of vias formed on the first metal layer through the first dielectric layer; and a second subset of the second plurality of vias formed on the second metal layer through the second dielectric layer, wherein the third metal layer is disposed on the second subset of the second plurality of vias.

13. The heterogeneous integration device of claim 10, wherein: the first plurality of vias comprise a central via and perimeter vias that substantially circulate the central via; the central via is coupled to the first antenna; and a first perimeter via of the perimeter vias is coupled to the first metal layer.

14. The heterogeneous integration device of claim 13, wherein the first plurality of vias form a coaxial configuration.

15. The heterogeneous integration device of claim 13, wherein: the first metal layer is a first ground layer; a second perimeter via of the perimeter vias is coupled to a second ground layer that is different from the first ground layer; and the first plurality of vias form a triaxial configuration.

16. The heterogeneous integration device of claim 10 further comprising a second glass carrier, wherein a third plurality of vias are formed through the second glass carrier, wherein the second glass carrier is attached to the first glass carrier, the first antenna being located between the first glass carrier and the second glass carrier.

17. The heterogeneous integration device of claim 10, wherein at least one of: the first glass carrier is substantially transparent; or heterogeneous integrated device has a crossing divider design between one or more corresponding vias and one or more transmission lines.

18. A heterogeneous integration device comprising: a first glass carrier comprising an upper surface and a lower surface; a first plurality of vias formed from the upper surface to the lower surface, the first plurality of vias comprising a central via and perimeter vias that substantially circulate the central via; a first antenna disposed on the lower surface of the first glass carrier on the central via; a first metal layer disposed on the upper surface of the first glass carrier, the first metal layer being coupled to at least one of the perimeter vias; a dielectric layer disposed on the first metal layer; a second metal layer disposed on the dielectric layer, the second metal layer being coupled to the first antenna via the central via, wherein the first metal layer and the second metal layer are coupled via at least one of a second plurality of vias; and an integrated circuit disposed on the second metal layer.

19. The heterogeneous integration device of claim 18, wherein the first plurality of vias form a coaxial configuration.

20. The heterogeneous integration device of claim 18, wherein: a first perimeter via of the perimeter vias is coupled to the first metal layer; the first metal layer is a first ground layer; a second perimeter via of the perimeter vias is coupled to a second ground layer that is different from the first ground layer; and the first plurality of vias form a triaxial configuration.

Images